Solid Dielectric Patents (Class 361/311)
  • Patent number: 10726994
    Abstract: A multilayer ceramic capacitor having a ceramic sintered body with alternately laminated dielectric layers and internal electrodes. The dielectric layers are formed from a perovskite-type compound represented by the general formula ABO3, and the perovskite-type compound contains at least Ti and a volatile element that forms a solid solution at a B site thereof. The internal electrodes are formed from a base metal material and contain the volatile element. The content of the volatile element is greater than 0 parts by mole and less than or equal to 0.2 parts by mole with respect to 100 parts by mole of the constituent element at the B site, and excluding the volatile element at the B site.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: July 28, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Takafumi Okamoto
  • Patent number: 10699848
    Abstract: A multilayer ceramic electronic component includes: a ceramic body including a dielectric layer and first and second internal electrodes stacked to be alternately exposed to one side surface and the other side surface with the dielectric layer disposed therebetween; and first and second external electrodes disposed on an external surface of the ceramic body to be connected to the first and second internal electrodes, respectively, in which the ceramic body includes an area of overlap in a thickness direction of the first and second internal electrodes, margin region, and/or cover region, and the margin region in the width direction and/or the cover region includes a phosphoric acid-based second phase.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: June 30, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sim Chung Kang, Eun Jung Lee, Ki Pyo Hong, Yong Park
  • Patent number: 10645819
    Abstract: A printed wiring board includes a core substrate having cavity to accommodate an electronic component and including a front conductor layer formed on front side of the core substrate, and a back conductor layer formed on back side of the core substrate, through-hole conductors formed through the core substrate such that the through-hole conductors connect the front and back conductor layers of the core substrate, a front build-up layer formed on front surface of the core substrate and including interlayer insulating layers and conductor layers, and a back build-up layer formed on back surface of the core substrate and including interlayer insulating layers and conductor layers. The conductor layers in the front build-up layer include a conductor layer sandwiching one of the interlayer insulating layers with the front conductor layer such that the conductor layer and the front conductor layer have the same electric potential in region surrounding the cavity.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: May 5, 2020
    Assignee: IBIDEN CO., LTD.
    Inventors: Toshiki Furutani, Takema Adachi, Toshihide Makino, Yasushi Usami
  • Patent number: 10643791
    Abstract: Disclosed are a dielectric material, a multi-layered capacitor, and an electronic device including the same. The dielectric material includes a dielectric material particle represented by ADO3, wherein A includes Sr, Ba, Ca, Pb, K, Na, or a combination thereof, D includes Ti, Zr, Mg, Nb, Ta, or a combination thereof, the dielectric material particle includes about 2.5 moles to about 4 moles of the donor element, based on 100 moles of D, and a diameter of the dielectric material particle is in a range of from about 100 nanometers to about 300 nanometers.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: May 5, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyun Sik Kim, Yoon Chul Son, Kyoung-Seok Moon, Daejin Yang, Chan Kwak
  • Patent number: 10622157
    Abstract: An improved multilayer ceramic capacitor is described. The multilayered ceramic capacitor comprises first internal electrodes and second internal electrodes. The first internal electrodes and said second internal electrodes are parallel with dielectric there between. A first external termination is in electrical connection with the first internal electrodes and a second external termination is in electrical contact with the second internal electrodes. A closed void layer, comprising at least one closed void, is between electrodes.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: April 14, 2020
    Assignee: KEMET Electronics Corporation
    Inventor: John Bultitude
  • Patent number: 10600573
    Abstract: A capacitor component includes a body in which a dielectric layer and an internal electrode are alternately stacked, and an external electrode disposed on the body and connected to the internal electrode. The dielectric layer includes a composite layer including a dielectric material powder and a metallic particle and first and second protective layers including a dielectric material powder and spaced apart by the composite layer. A thickness of each of the first and second protective layers is equal to or greater than ? of a thickness of the dielectric layer.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: March 24, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyung Soon Kwon, Hyoung Uk Kim, Tae Young Ham, Jong Han Kim, Ki Myoung Yun, Jae Sung Park
  • Patent number: 10545058
    Abstract: Sensors, sensing arrangements and devices, and related methods are provided. In accordance with an example embodiment, an impedance-based sensor includes a flexible dielectric material and generates an output based on pressure applied to the dielectric material and a resulting compression thereof. In certain embodiments, the dielectric material includes a plurality of regions separated by gaps and configured to elastically deform and recover in response to applied pressure.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: January 28, 2020
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Zhenan Bao, Stefan Christian Bernhardt Mannsfeld, Jason Locklin, Chee-Keong Tee
  • Patent number: 10541087
    Abstract: A multilayer ceramic capacitor includes a ceramic body with first and second internal electrodes facing each other and dielectric layers interposed therebetween. First and second external electrodes are on external surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. A dielectric layer includes dielectric grains including, respectively, first regions in which dysprosium (Dy) is not present and second regions surrounding the first regions. Where a shortest distance between boundaries of the first regions (in which dysprosium (Dy) is not present) of two of the dielectric grains is “L,” the concentration of dysprosium (Dy) in a region within ±0.2 L from a halfway point between the boundaries is lower than that of dysprosium (Dy) in the second regions.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: January 21, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyung Soon Kwon, Kyoung Jin Cha, Ji Hong Jo
  • Patent number: 10535465
    Abstract: A multilayer ceramic capacitor includes a ceramic body with first and second internal electrodes facing each other and dielectric layers interposed therebetween. First and second external electrodes are on external surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. A dielectric layer includes dielectric grains including, respectively, first regions in which dysprosium (Dy) is not present and second regions surrounding the first regions. Where a shortest distance between boundaries of the first regions (in which dysprosium (Dy) is not present) of two of the dielectric grains is “L,” the concentration of dysprosium (Dy) in a region within ±0.2L from a halfway point between the boundaries is lower than that of dysprosium (Dy) in the second regions.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: January 14, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyung Soon Kwon, Kyoung Jin Cha, Ji Hong Jo
  • Patent number: 10490804
    Abstract: A method for producing a galvanic element includes applying a first electrode to a substrate, applying a separator to the first electrode, and applying a second electrode to the separator. At least one of the electrodes is applied in the form of a composite electrode using an aerosol separation method.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: November 26, 2019
    Assignee: Robert Bosch GmbH
    Inventors: Tjalf Pirk, Dominik Hanft, Michael Butzin, Christine Engel, Ralf Moos
  • Patent number: 10490351
    Abstract: A multilayer ceramic capacitor includes a ceramic body with first and second internal electrodes facing each other and dielectric layers interposed therebetween. First and second external electrodes are on external surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. A dielectric layer includes dielectric grains including, respectively, first regions in which dysprosium (Dy) is not present and second regions surrounding the first regions. Where a shortest distance between boundaries of the first regions (in which dysprosium (Dy) is not present) of two of the dielectric grains is “L,” the concentration of dysprosium (Dy) in a region within ±0.2L from a halfway point between the boundaries is lower than that of dysprosium (Dy) in the second regions.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: November 26, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyung Soon Kwon, Kyoung Jin Cha, Ji Hong Jo
  • Patent number: 10490353
    Abstract: A multilayer ceramic capacitor includes a ceramic body with first and second internal electrodes facing each other and dielectric layers interposed therebetween. First and second external electrodes are on external surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. A dielectric layer includes dielectric grains including, respectively, first regions in which dysprosium (Dy) is not present and second regions surrounding the first regions. Where a shortest distance between boundaries of the first regions (in which dysprosium (Dy) is not present) of two of the dielectric grains is “L,” the concentration of dysprosium (Dy) in a region within ±0.2 L from a halfway point between the boundaries is lower than that of dysprosium (Dy) in the second regions.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: November 26, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyung Soon Kwon, Kyoung Jin Cha, Ji Hong Jo
  • Patent number: 10475579
    Abstract: A multi-layer ceramic capacitor includes a multi-layer unit and a side margin. The multi-layer unit includes ceramic layers laminated in a first direction, and internal electrodes disposed between the ceramic layers. The side margin covers the multi-layer unit from a second direction orthogonal to the first direction, the side margin having a higher concentration of a rare-earth element and a higher concentration of vanadium than center portions of the ceramic layers in the second direction.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: November 12, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Daisuke Sakate, Kotaro Mizuno
  • Patent number: 10395829
    Abstract: A dielectric resin composition for a film capacitor is a mixture containing an organic material A and an organic material B. The organic material A includes at least two kinds of organic material components A1, A2, . . . having reactive groups (for example, OH, NCO) that cross-link each other. The organic material B does not have a reactive site capable of reacting with the organic material A and has a dielectric loss tan ? of 0.3% or less at a temperature of 125° C. The mixture has a glass transition temperature of 130° C. or higher and preferably 280° C. or lower.
    Type: Grant
    Filed: April 17, 2014
    Date of Patent: August 27, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tomomichi Ichikawa, Norihiro Yoshikawa, Ichiro Nakamura, Shinichi Kobayashi, Ichiro Nakaso, Yasunori Hioki, Tomoki Inakura
  • Patent number: 10347422
    Abstract: Prismatic polymer monolithic capacitor structure operating at temperatures exceeding 140° C. and including multiple interleaving radiation-cured polymer dielectric layers and metal layers. Method for fabrication of same. The geometry of structure is judiciously chosen to increase sheet resistance of metal electrodes while reducing the capacitor's equivalent series resistance. Metal electrode layers are provided with a thickened peripheral portion to increase strength of terminating connections and are passivated to increase corrosion resistance. Materials for polymer dielectric layers are devised to ensure that the capacitor's dissipation factor remains substantially unchanged across the whole range of operating temperatures, to procure glass transition temperature that is no less than the desired operating temperature, and to optimize the absorption of ambient moisture by the polymeric layers.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: July 9, 2019
    Assignee: SIGMA TECHNOLOGIES, INT'L, LLC
    Inventor: Angelo Yializis
  • Patent number: 10319522
    Abstract: A multilayer ceramic capacitor includes: a capacitance layer including dielectric layers and first and second internal electrodes disposed with respective dielectric layers interposed therebetween; a protection layer disposed on one surface of the capacitance layer; an alpha connection electrode provided in an alpha via penetrating through the protection layer; and a beta connection electrode provided in a beta via penetrating through the capacitance layer and connected to the alpha via. The alpha via has a diameter greater than that of the beta via.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: June 11, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Taek Jung Lee, Hyo Youn Lee, Seung Woo Song, Jong Pil Lee, Sung Kwon An
  • Patent number: 10304631
    Abstract: A ceramic electronic component includes a ceramic body and external electrodes. The ceramic body includes ceramic layers formed of a ceramic material and laminated in a first axis direction, and internal electrode layers each including an extracted portion and disposed between the ceramic layers, the extracted portion being extracted to a circumference of each of the ceramic layers and having a width of 100 ?m or less along the circumference. The external electrodes contain the ceramic material, the external electrodes being provided to a surface of the ceramic body and each connected to the extracted portion.
    Type: Grant
    Filed: November 23, 2016
    Date of Patent: May 28, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Koichiro Morita
  • Patent number: 10290701
    Abstract: A MIM capacitor includes a bottom electrode, a middle electrode disposed over the bottom electrode, a top electrode disposed over the middle electrode, a first dielectric layer sandwiched between the bottom electrode and the middle electrode, and a second dielectric layer sandwiched between the middle electrode and the top electrode. A surface of the bottom electrode and a surface of the top electrode respectively comprise a Ra value lower than 0.35 nm and a Rq value lower than 0.4 nm.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: May 14, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventor: Yao-Wen Chang
  • Patent number: 10290426
    Abstract: A capacitor component includes a substrate, a body disposed on one region of an upper surface of the substrate and having a porous structure, and a capacitor part including a first electrode, a dielectric layer, and a second electrode, formed on the porous structure of the body. The first and second electrodes extend to other regions of the upper surface of the substrate, respectively.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: May 14, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Il Lee, Byeong Cheol Moon
  • Patent number: 10236125
    Abstract: A dielectric ceramic composition contains: a barium titanate-based powder as a main ingredient; a first accessory ingredient containing Na; a second accessory ingredient containing Ba; and a third accessory ingredient containing Si. A content of the first accessory ingredient (based on moles of Na) is 0.3 to 4.0 moles per 100 moles of the main ingredient, and a Ba/Si ratio is in a range of 0.16 to 1.44.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: March 19, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seok Hyun Yoon, Jung Deok Park, Chang Hak Choi, Dong Hun Kim, Seung Ho Lee, Chan Hee Nam
  • Patent number: 10175188
    Abstract: A trenched base capacitive humidity sensor includes a plurality of trenches formed in a conductive layer, such as polysilicon or metal, on a substrate. The trenches are arranged parallel to the each other and partition the conductive layer into a plurality of trenched silicon electrodes. At least two trenched silicon electrodes are configured to form a capacitive humidity sensor. The trenches that define the trenched silicon electrodes can be filled partially (e.g., sidewall coverage) or completely with polyimide (Pl) or silicon nitride (SiN). A polyimide layer may also be provided on the conductive layer over the trenches and trenched electrodes. The trenches and the trenched silicon electrodes may have different widths to enable different sensor characteristics in the same structure.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 8, 2019
    Assignee: Robert Bosch GmbH
    Inventors: Gary O'Brien, Ando Feyh, Andrew Graham, Ashwin Samarao, Gary Yama
  • Patent number: 10176922
    Abstract: In an embodiment, a multilayer ceramic capacitor 10 is constituted in such a way that four capacitive components C1 to C4 that are connected in series are formed between a first internal electrode layer group 14 and a second internal electrode layer group 15 adjacent to it, wherein, among the four capacitive components C1 to C4, the facing area Sc1 that defines the capacitance value of the capacitive component C1 closest to the first external electrode 12 and the facing area Sc4 that defines the capacitance value of the capacitive component C4 closest to the second external electrode 13 are greater than the facing areas Sc2 and Sc3 that define the capacitance values of the two remaining capacitive components C2 and C3, respectively. The multilayer ceramic capacitor is capable of satisfying the needs for both size reduction and voltage resistance increase.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: January 8, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Yasuyuki Inomata, Shintaro Hayashi
  • Patent number: 10176928
    Abstract: In one embodiment, a system, comprising: a first non-magnetic conductive electrode; a second non-magnetic conductive electrode; a dielectric layer disposed between the first and second electrodes, the dielectric layer extending between the first and second electrodes; and first and second layers comprising plural pairs of magnetically coupled pairings of discrete magnets, the first and second layers separated by a non-magnetic material, wherein the magnets of at least the first layer are conductively connected to the first non-magnetic conductive electrode.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: January 8, 2019
    Assignee: E1023 CORPORATION
    Inventors: Daniel Albert Gabig, Matthew B. Jore
  • Patent number: 10154594
    Abstract: A printed circuit board including a circuit board having a cavity between an upper surface of the circuit board and a lower surface of the circuit board that are substantially parallel to each other, and a connection board including insulating layers substantially parallel with metal layers, the metal layers including metal patterns. The connection board is disposed in the cavity with the insulating layers and the metal layers of the connection board substantially perpendicular to the upper and lower surfaces of the circuit board.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: December 11, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jeong-Ho Lee, Young-Do Kweon, Hyoung-Joon Kim, Kyoung-Moo Harr, Kyung-Seob Oh
  • Patent number: 10109423
    Abstract: In an electronic component, each of a distance between a first outer electrode and a third outer electrode along a length direction and a distance between a second outer electrode and the third outer electrode along a length direction is about 8% to about 13% of a dimension of the electronic component along the length direction.
    Type: Grant
    Filed: November 19, 2014
    Date of Patent: October 23, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takanobu Katsuyama, Yasunari Nakamura, Naoto Muranishi, Takashi Sawada
  • Patent number: 10102978
    Abstract: Improved electrodes and currents through the use of organic and organometallic high dielectric constant materials containing dispersed conductive particles in energy storage devices and associated methods are disclosed. According to an aspect, a dielectric material includes at least one layer of a substantially continuous phase material comprising a combination of organometallic having delocalized electrons, organic compositions and containing metal particles in dispersed form, in another aspect, the novel material is used with a porous electrode to further increase charge and discharge currents.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: October 16, 2018
    Assignee: Cleanvolt Energy, Inc.
    Inventors: Zakaryae Fathi, John James Felten, James Elliott Clayton
  • Patent number: 10079117
    Abstract: A electric storage device that includes a device body having a first end face that has a first portion and a second portion, and second end face that has a third portion and a fourth portion. The second portion is inclined relative to the first portion, and the fourth portion is inclined relative to the third portion. A first electrode film extends from the first portion to the second portion, and a second electrode film extends from the third portion to the fourth portion.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: September 18, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hiroki Horiguchi, Kyotaro Mano, Tatsuya Mizushima
  • Patent number: 10074479
    Abstract: A manufacturing method for a multilayer capacitor includes alternately laminating dielectric layers and conductor layers including less than 50 included in a first arrangement and a second arrangement different from the first arrangement when viewed from a lamination direction to form a laminate in which at least one pair of the conductor layers adjacent to each other with the dielectric layer interposed therebetween are included in the first or second arrangement, pressing the laminate to stretch the conductor layers in a direction perpendicular or substantially perpendicular to the lamination direction, pressing the laminate to bend the conductor layers in the lamination direction, and forming first and second outer electrodes on laminate surfaces such that the first outer electrode is connected to the conductor layers included in the first arrangement and the second outer electrode is connected to the conductor layers included in the second arrangement.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: September 11, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masaki Tsukida, Hiroshi Masai
  • Patent number: 10045444
    Abstract: A printed circuit board includes: a core board including, on a first surface thereof, an element mounting part and an element non-mounting part; an insulation layer disposed on the element non-mounting part; a copper-clad laminate plate disposed on the insulation layer; a first penetration via penetrating the insulation layer and the copper-clad laminate plate; and a second penetration via disposed in the core board and connected to the first penetration via.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: August 7, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae-Ean Lee, Jee-Soo Mok, Young-Gwan Ko, Kyung-Hwan Ko, Yong-Ho Baek
  • Patent number: 10037851
    Abstract: A multilayer ceramic capacitor includes a laminated body including an inner layer portion including ceramic dielectric layers and internal electrodes, and outer layer portions including ceramic dielectric layers. External electrodes connected to the internal electrodes are provided on both ends of the laminated body. The main constituent of the inner layer portion is a perovskite-type compound represented by ABO3. The outer layer portions include first outer layers and second outer layers respectively containing oxides that differ from each other in main constituents, and boundary reaction layers are provided between the first outer layers and the second outer layers. First ceramic dielectric layers outside the boundary reaction layers differ in color from second ceramic dielectric layers inside the boundary reaction layers.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: July 31, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hiroyuki Wada, Kohei Shimada, Kenji Takagi, Tomomi Koga, Tomotaka Hirata, Hitoshi Nishimura, Hiroki Awata, Sui Uno
  • Patent number: 9978479
    Abstract: An electrode coating composition that includes at least one crosslinkable monomer; at least one hydrophobic monomer; and at least one dielectric constant enhancing agent selected from dielectric enhancing monomers, ferroelectric particulates, and electroactive polymers. Coatings including the polymer of compositions, and articles including electrically isolating layers are also disclosed.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: May 22, 2018
    Assignee: Corning Incorporated
    Inventors: Lenwood Lynell Fields, Arthur Winston Martin, Shawn Michael O'Malley, Dean Michael Thelen
  • Patent number: 9892863
    Abstract: The disclosure provides for electrochemical supercapacitors with high energy densities, based on paired groups of carbon nanotube mounted to conductive substrates. In one variation, the electrochemical supercapacitors are double layer capacitors, or electrochemical double layer capacitors, containing opposing groups of carbon nanotubes on opposing substrates. In another variation, the capacitor is an interdigitated capacitor of alternating electrode containing carbon nanotubes, mounted on a common substrate. Processes and devices are also described.
    Type: Grant
    Filed: May 24, 2015
    Date of Patent: February 13, 2018
    Assignee: Georgia Tech Research Corporation
    Inventor: William Jud Ready
  • Patent number: 9847203
    Abstract: A multi layer fuse device includes a substrate and an elongated fuse element, having a pair of contact pads formed therewith at opposed longitudinal ends thereof formed on one surface of the substrate. A pair of passivation layers are provided covering the fuse and contact pads. Windows may be opened through both passivation layers above both of the contact pads, and conductive electrode material is electroplated through the windows to contact the contact pads and to extend partially above a top surface of the passivation layers. Exposed electroplated material may be coated with solderable conductive material or a surface mount termination may be provided. Electroplated material may cover a portion of the fuse surface prior to application of the passivation layers and extend to an end of the substrate so that windows are not required.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: December 19, 2017
    Assignee: AVX Corporation
    Inventors: Alona Goldstein, Irina Daynov, Herzl Ovadia, Elinor O'Neill, Michael Dakhyia, Evgeny Glickman
  • Patent number: 9824820
    Abstract: A multi-layered capacitor device is provided in which the multi-layered capacitor device includes a metal or metal-oxide ground electrode, a capacitor dielectric layer, a metal or metal-oxide top electrode, a hole blocking layer and an electron blocking layer. The hole blocking layer is located at the interface of the metal or metal-oxide ground electrode and the capacitor dielectric layer to increases the effective barrier height at the interface. The electron blocking layer is located at the interface of the metal or metal-oxide top electrode and the capacitor dielectric layer to increases the effective barrier height at the interface.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: November 21, 2017
    Inventors: James Gerard Grote, Donna Marie Joyce, Fahima Ouchen
  • Patent number: 9812259
    Abstract: A multilayer ceramic capacitor may include: an active part including dielectric layers and internal electrodes which are alternately stacked therein; and a cover part disposed on at least one of an upper surface and a lower surface of the active part. The cover part may include an active part protective cover and an exterior cover, and the active part protective cover may be disposed adjacent to the active part.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: November 7, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Ho Lee, Jong Han Kim, Min Gon Lee
  • Patent number: 9767958
    Abstract: An electrical capacitor includes a dielectric spacer. Metal electrodes are held in contact with opposite surfaces of the dielectric spacer by magnetic force.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: September 19, 2017
    Assignee: COHERENT LASERSYSTEMS GMBH & CO., LG
    Inventor: Igor Bragin
  • Patent number: 9721727
    Abstract: A multilayer ceramic capacitor has a laminate including dielectric layers laminated alternately with internal electrode layers of different polarities, wherein the dielectric layer contains ceramic grains having Ba, Ti, and X (wherein X represents at least one type of element selected from the group consisting of Mo, Ta, Nb, and W) and a variation in the concentration distribution of X above in the ceramic grain is within ±5%. The multilayer ceramic capacitor can offer excellent service life characteristics even when the thickness of the dielectric layer is 0.8 ?m or less, as well as excellent bias characteristics.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: August 1, 2017
    Assignee: TAIYO YUDEN CO., LTD
    Inventors: Chie Kawamura, Tetsuo Shimura, Minoru Ryu, Koichiro Morita, Yukihiro Konishi, Yoshiki Iwazaki
  • Patent number: 9691549
    Abstract: A laminated ceramic capacitor that includes a laminated body that has dielectric ceramic layers including crystal grains and crystal grain boundaries and has internal electrode layers; and external electrodes on the surface of the laminated body and electrically connecting the internal electrode layers exposed at the surfaces of the laminated body. When a direct-current voltage is applied to the laminated ceramic capacitor, the voltage/current curve has a critical point dividing the curve into a first area on the lower-voltage side and a second area on the higher-voltage side, an electric field obtained by dividing the critical voltage at the critical point by the thickness of one of the dielectric ceramic layers when the voltage (V)/current (I) characteristics are measured at 25° C. is 10 V/?m or more, and the voltage/current curve has a slope of 3 or less in the second area.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: June 27, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Akihiro Shiota, Makoto Matsuda
  • Patent number: 9672984
    Abstract: There are provided a multilayer ceramic electronic component capable of preventing problems occurring due to a difference in sintering behavior between ceramic layers and internal electrodes and having excellent reliability, and a manufacturing method thereof. The multilayer ceramic electronic component may include a ceramic body including a plurality of ceramic layers; and internal electrodes disposed in the ceramic body. The internal electrodes may contain a conductive ceramic oxide.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: June 6, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hong Seok Kim, Chung Eun Lee, Chang Hoon Kim, Doo Young Kim
  • Patent number: 9627136
    Abstract: A multilayer ceramic capacitor includes an external electrode that is unlikely to be peeled. First and second external electrodes each include base layers provided over a ceramic body and including a metal and glass, and Cu plated layers provided over the base layers. The multilayer ceramic capacitor includes a reactive layer. The reactive layer contains about 5 atomic % to about 15 atomic % of Ti, about 5 atomic % to about 15 atomic % of Si, and about 2 atomic % to about 10 atomic % of V.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: April 18, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yasuhiro Nishisaka, Takehisa Sasabayashi, Satoshi Muramatsu
  • Patent number: 9627289
    Abstract: The present invention is to provide a semiconductor device in which the generation of the eddy current in a metal flat plate is reduced, and the Q value of the RF circuit of the semiconductor device is improved even using the metal flat plate as a support.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: April 18, 2017
    Assignee: J-DEVICES CORPORATION
    Inventors: Yoshihiko Ikemoto, Shigenori Sawachi, Fumihiko Taniguchi, Akio Katsumata
  • Patent number: 9583267
    Abstract: There are provided a multilayer ceramic capacitor and a board having the same. The multilayer ceramic capacitor may include: three external electrodes disposed on a mounting surface of a ceramic body to be spaced apart from each other and connected to lead portions of internal electrodes, wherein an interval between adjacent lead portions is 500.7 ?m or less, widths of one-side margin portions of the external electrodes in a length direction of the ceramic body that are not in contact with the corresponding lead portions are 20.2 ?m or more.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: February 28, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Ghyu Ahn, Hyun Tae Kim, Hwi Geun Im, Jin Kim, Kyo Kwang Lee, Byoung Hwa Lee
  • Patent number: 9548160
    Abstract: A cast raw sheet for a capacitor film, prepared by heating and melting a polypropylene resin and extruding the resin from a T-die, wherein the polypropylene resin has: a weight average molecular weight, determined by gel permeation chromatography, of 100,000 or more and 500,000 or less; and a molecular weight distribution Mw/Mn of 7 or more, the resin contains 97% by mass or more of an isotactic component that is an extraction residue obtained by sequential extraction, and the cast raw sheet contains a ?-form in a proportion of 1% or more and less than 20%, the proportion being determined by X-ray diffraction intensity.
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: January 17, 2017
    Assignee: OJI HOLDINGS CORPORATION
    Inventors: Tadakazu Ishiwata, Manabu Furukawa, Fumio Jinno
  • Patent number: 9528895
    Abstract: MEMS and/or NEMS differential pressure measurement sensor comprising at least one first membrane and at least one second membrane, each suspended from a substrate, the first membrane having a face subjected to a reference pressure and a second face subjected to a first pressure to be detected, the second membrane having a first face subjected to the reference pressure and a second face subjected to a second pressure to be detected, a rigid beam of longitudinal axis articulated with respect to the substrate by a pivot link around an axis, said beam being solidly connected by a first zone to the first membrane and by a second zone to the second membrane such that the pivot link is situated between the first zone and the second zone of the beam, a sensor of measuring the movement of the beam around the axis, said sensor being arranged at least in part on the substrate.
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: December 27, 2016
    Assignee: COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES
    Inventors: Philippe Robert, Bernard Diem, Guillaume Jourdan
  • Patent number: 9499898
    Abstract: A method of forming thin film heater traces on a wafer chuck includes positioning a pattern, that forms openings corresponding to a desired layout of the heater traces, in proximity to the wafer chuck. The method includes sputtering a material toward the pattern and the wafer chuck such that a portion of the material passes through the openings and adheres to the wafer chuck to form the heater traces. A method of forming thin film heater traces on a wafer chuck includes sputtering a blanket layer of a material onto the wafer chuck, and patterning a photoresist layer utilizing photolithography. The photoresist layer covers the blanket layer in an intended layout of the heater traces, exposing the blanket layer in areas that are not part of the intended layout. The method removes the areas that are not part of the intended layout by etching, and removes the photoresist layer.
    Type: Grant
    Filed: March 3, 2014
    Date of Patent: November 22, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Son T. Nguyen, Dmitry Lubomirsky
  • Patent number: 9431172
    Abstract: The invention relates to a biaxially oriented electrical insulating film which is constituted of a base layer and at least one cover layer, the base layer containing a mixture from a polypropylene P1 and a polypropylene P2 which is different therefrom, the polypropylene P1 being a linear polypropylene and having an Mw/Mn>5 and a mesopentadene isotactic index of at least 95% and the polypropylene P2 having a long-chain branching.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: August 30, 2016
    Assignee: Borealis Technology Oy
    Inventors: Detlef Busch, Thilo Mohr
  • Patent number: 9370111
    Abstract: A ceramic multilayer substrate incorporating a chip-type ceramic component, in which, even if the chip-type ceramic component is mounted on the surface of the ceramic multilayer substrate, bonding strength between the chip-type ceramic component and an internal conductor or a surface electrode of the ceramic multilayer substrate is greatly improved and increased. The ceramic multilayer substrate includes a ceramic laminate in which a plurality of ceramic layers are stacked, an internal conductor disposed in the ceramic laminate, a surface electrode disposed on the upper surface of the ceramic laminate, and a chip-type ceramic component bonded to the internal conductor or the surface electrode through an external electrode. The internal conductor or the surface electrode is bonded to the external electrode through a connecting electrode, and the connecting electrode forms a solid solution with any of the internal conductor, the surface electrode, and the external electrode.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: June 14, 2016
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yoshiko Okada, Osamu Chikagawa, Hidekiyo Takaoka, Shodo Takei
  • Patent number: 9368990
    Abstract: The present invention provides a thin-film capacitor device having a charging circuit and a discharge circuit and capable of stably producing a constant voltage during discharging a thin-film capacitor by an inexpensive configuration. The thin-film capacitor device is characterized by a hybrid type for temporarily storing charge upon receiving DC current from the thin-film capacitor while the voltage becomes lowering, and for supplying DC current in a state of a DC/DC inverter having a base voltage remaining so that a discharge effect continues until the amount of storage in the thin-film capacitor completely runs out.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: June 14, 2016
    Assignees: ENZO PLANNING CO., LTD., K.S. INTERNATIONAL CO., LTD.
    Inventor: Kanji Shimizu
  • Patent number: 9336946
    Abstract: The present application describes a multilayer ceramic electronic component including a ceramic body having a thickness greater than a width and includes a dielectric layers, and has upper and lower surfaces opposing each other in a thickness direction. First and second side surfaces oppose each other in a width direction, and first and second end surfaces oppose each other in a length direction. First and second internal electrodes are stacked with at least one of the dielectric layers interposed therebetween within the ceramic body in the width direction. A volume increasing part is disposed in a lower portion of the ceramic body in the thickness direction to allow a volume of a lower margin portion of the ceramic body to be greater than that of an upper margin portion thereof.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: May 10, 2016
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jong Ho Lee, Doo Young Kim, Chang Hoon Kim, Byung Soo Kim
  • Patent number: 9305707
    Abstract: In a ceramic electronic component, a first internal electrode includes a first opposed section and a first extraction section. The first opposed section is opposed to a second internal electrode with a ceramic layer interposed therebetween. The first extraction section is located closer to a first end surface than the first opposed section. The first extraction section is connected to a first external electrode. The number of cross-linked sections per unit area in the first extraction section is less than the number of cross-linked sections per unit area in the first opposed section.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: April 5, 2016
    Assignee: Murato Manufacturing Co., Ltd.
    Inventors: Takashi Hiramatsu, Kunihiko Hamada