Impedance Insertion Patents (Class 361/58)
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Patent number: 5526214Abstract: The present invention is directed to effectively prevent "load short-circuit breakdown" of a power Darlington transistor. When a potential different between a base BX and emitter E at a final stage of a power Darlington transistor (20) is at a specified level of voltage determined by base-emitter forward voltage of a protective bipolar transistor (32), the protective bipolar transistor (32) turns on, and accordingly, base current I.sub.B at an initial stage of the power Darlington transistor (20) is bypassed to the emitter E at the final stage. Hence, excessive rising of collector current I.sub.C of the Darlington transistor (20) is suppressed, and "load short-circuit breakdown" is prevented.Type: GrantFiled: September 28, 1993Date of Patent: June 11, 1996Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Ikunori Takata, Masanori Inoue
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Patent number: 5519264Abstract: A method and apparatus for preventing current inrush upon the application of power to a load includes the steps of applying a first increasing DC voltage from a voltage source to the load through a negative temperature coefficient device having a first terminal coupled to the voltage source and a second terminal coupled to the load and after a preselected period of time, bypassing said first and second terminals via a bypass circuit and coupling the increasing voltage to the load through the bypass circuit.Type: GrantFiled: March 27, 1995Date of Patent: May 21, 1996Assignee: EMC CorporationInventors: Christopher A. Heyden, Donald R. Watson
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Patent number: 5517379Abstract: A device for protecting battery-powered semiconductor devices and the like against a reverse battery condition. During normal operation a charge pump charges the gate of a power MOSFET, turning the MOSFET on and providing a low-resistance power supply path from the battery to the load. If the battery is reversed, a depletion mode device shorts the gate and source of the MOSFET, turning it off and disconnecting the load from the battery.Type: GrantFiled: May 26, 1993Date of Patent: May 14, 1996Assignee: Siliconix incorporatedInventors: Richard K. Williams, Thomas Toombs, King Owyang, Hamza Yilmaz
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Patent number: 5513060Abstract: An overvoltage protection circuit for a load having a determined resistance value is connected to a supply line with a predetermined polarity. An overvoltage detector is connected across the line. A first switch, normally on, is located in series with a conductor of the line and is controlled (i.e. switched to the off state) by the detector. A second switch, located in series with a resistance having the same determined value R, is disposed between the line conductors and is controlled by the detector in a complementary manner to the first switch.Type: GrantFiled: October 28, 1994Date of Patent: April 30, 1996Assignee: SGS-Thomson Microelectronics S.A.Inventor: Andre Bremond
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Patent number: 5510942Abstract: This series-capacitor compensation equipment comprises a series-capacitor bank in series with a power line and an overvoltage protection circuit for the capacitor bank comprising the series combination of a surge arrester and electric bus structure connected in series with the power line and in parallel with the capacitor bank. The surge arrester includes metal-oxide varistor elements which impart a relatively high resistance to the arrester when the voltage across the arrester is in a normal range and a relatively low resistance when the voltage across the arrester rises to a predetermined value that produces arrester operation. The capacitor bank will discharge through the overvoltage protective circuit should a varistor element fail during arrester operation.Type: GrantFiled: December 19, 1994Date of Patent: April 23, 1996Assignee: General Electric CompanyInventors: Larry E. Bock, John C. Hill, Jr., Josef Urbanek
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Patent number: 5508874Abstract: A disconnect switch circuit for disconnecting an under-voltage battery from a hard disk drive connected between a voltage supply line and ground includes a MOSFET device connected between the battery and the voltage supply line, control means responsive to the supply voltage on the voltage supply line for generating a control signal powering the gate of the MOSFET switch. The control signal turns on the MOSFET switch when the supply voltage is in normal condition and turns off the MOSFET switch when the supply voltage drops below an under-voltage limit, thereby beginning head retract in the hard disk drive.Type: GrantFiled: May 14, 1993Date of Patent: April 16, 1996Assignee: Siliconix IncorporatedInventors: Richard K. Williams, Allen A. Chang, Barry J. Concklin
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Patent number: 5500546Abstract: An electrostatic discharge protection circuit 11 coupled between an input pad 12 and operational circuitry 20 includes a primary clamp circuit 14 coupled to input pad 12, and a current limit circuit 16 coupled to primary clamp circuit 14. Primary clamp circuit 14 clamps an electrostatic discharge voltage to a first voltage value. Operational circuitry 20, susceptible to damage due to an electrostatic discharge, is coupled to current limit circuit 16 and a zener diode 30 is coupled between current limit circuit 16 and a ground potential. Zener diode 30 has a cathode terminal coupled to current limit circuit 16 and an anode terminal coupled to ground potential. Zener diode 30 further clamps a voltage across operational circuitry 20 to a second voltage which is less than 10 V, thereby protecting operational circuitry 20 from damage due to electrostatic discharge.Type: GrantFiled: September 16, 1994Date of Patent: March 19, 1996Assignee: Texas Instruments IncorporatedInventors: Steven E. Marum, Karl-Heinz Kraus
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Patent number: 5477407Abstract: An input protection circuit includes a conductor pattern extending from a first end connected to an input pad to a second end connected to an integrated circuit, first and second, mutually separated ground patterns disposed at both sides of the conductor pattern with a separation therefrom, a first gate pattern provided on a gap between the conductor pattern and the first ground pattern, and a second gate pattern provided on a gap between the conductor pattern and the second ground pattern, wherein the conductor pattern, the first ground pattern and the first gate pattern form a first transistor extending continuously from the first end to the second end of the conductor pattern at a first side of the conductor pattern, and wherein the conductor pattern, the second ground pattern and the second gate pattern form a second transistor extending continuously from the first end to the second end of the conductor pattern at a second side of the conductor pattern.Type: GrantFiled: August 30, 1994Date of Patent: December 19, 1995Assignees: Fujitsu Limited, Fujitsu VLSI LimitedInventors: Isamu Kobayashi, Yasunori Murase
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Patent number: 5475560Abstract: A current limiting device using a superconductor limits a current flowing throu A c5 V pV:a current limiting coil, which mangetically couples to the superconductor. A control coil is provided to magnetically couple with the current limiting coil when the superconductor is switched to a normal conduction state. A variable control impedance is connected to the control coil to adjust a control current flowing through the control coil. The current limiting impedance value of the current limiting coil is adjusted by the value of the control impedance to obtain an adjustable value of the current flowing through the current limiting coil.Type: GrantFiled: May 29, 1992Date of Patent: December 12, 1995Assignees: Kogyo Gijutsuin, Denryoku Chuo KenkyushoInventors: Toshitada Onishi, Michiharu Ichikawa, Hiroyuki Kado, Yasuo Watanabe
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Patent number: 5473499Abstract: A method of connecting an IC card to a motherboard involves first connecting the ground busses, then the power busses and finally the general signal busses. When the power busses are connected, a low current is allowed to flow initially, then, a predetermined period of time is allowed to elapse for equalization of IC card and motherboard voltages, then a full current is allowed to flow. A method of disconnecting an IC card from a motherboard involves first disconnecting the general signal busses, then the power busses and finally the ground busses.Type: GrantFiled: June 30, 1993Date of Patent: December 5, 1995Assignee: Harris CorporationInventor: Steven P. Weir
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Patent number: 5473494Abstract: An electrical power supply system includes an electrical power source system connected to a bus bar and a plurality of electric power transmission systems each connected via circuit breakers to the bus bar. The supply system has overvoltage suppression equipments each installed between the transmission system and the ground. The overvoltage suppression equipment includes a switching device and an impedance connected to the switching device. The switching device in a sound transmission system is closed when the circuit breaker operates in other faulty transmission system, thereby an overvoltage being occurred on the sound system is effectively suppressed.Type: GrantFiled: September 10, 1992Date of Patent: December 5, 1995Assignee: Hitachi, Ltd.Inventors: Yukio Kurosawa, Youichi Ohshita, Masaru Watanabe, Isao Nishida, Yoshihito Asai, Tokio Yamagiwa
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Patent number: 5473496Abstract: A circuit for protecting nonvolatile memories against loss of Vcc while Vpp is high. An NMOS gated by Vcc is connected, in series with a load element, between Vpp and ground. The node between the NMOS and the load element gates a PMOS which is interposed between Vpp and the memory. Thus when Vcc fails while Vpp is high, the NMOS will turn off, and the load element will pull up the gate of the PMOS to turn it off, interrupting the Vpp supply. This prevents spurious write or erase operations under these circumstances. The circuit can be designed to trigger at threshold voltages as low as V.sub.TN, and is thus particularly advantageous for operation with specified Vcc values of 3 Volts or less.Type: GrantFiled: August 2, 1993Date of Patent: December 5, 1995Assignee: SGS-Thomson Microelectronics, S.A.Inventor: Olivier Rouy
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Patent number: 5473495Abstract: A combination load controller for controlling application of power to a load such as a motor, has an input terminal coupleable to a power source, and an output terminal coupleable to a load. A conductive polymer and a protective, electromagnetic switch are disposed along a current path between the input and output terminals. The conductive polymer has a relatively low electrical resistance during conduction at nominal currents. The resistance of the conductive polymer increases substantially promptly upon conduction of excessive current, e.g., due to a short-circuit. In this manner the load is protected from even short bursts of excessively high, short-circuit current by the insertion of additional series resistance by the conductive polymer. The electromagnetic switch protects the line and load by opening the current path. The switch includes a current or voltage sensor coupled to a logic controller that opens the switch if over-current or under-voltage conditions persist for a predetermined period.Type: GrantFiled: December 3, 1993Date of Patent: December 5, 1995Assignee: Eaton CorporationInventor: James A. Bauer
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Patent number: 5467242Abstract: A circuit and method for detecting and protecting against an overcurrent condition in a power transistor switching device, and particularly an IGBT. The power transistor switching device has main terminals and a control terminal, the main terminal having a normal saturation voltage therebetween during normal conduction of the power transistor device. The circuit includes a driver providing control signals to the control terminal of the power transistor device for switching the power transistor device on and off, a sensing circuit coupled to the power transistor device for sensing the saturation voltage of the power transistor device, and a switching circuit coupled to the control terminal of the power transistor device and responsive to the sensing circuit for removing the control signals from the control terminal in the event the saturation voltage reaches an abnormal level indicating an overcurrent condition in the power transistor device.Type: GrantFiled: September 8, 1994Date of Patent: November 14, 1995Assignee: International Rectifier CorporationInventor: Laszlo Kiraly
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Patent number: 5465188Abstract: A circuit protection arrangement that is intended to be series connected in a line of an electrical circuit comprises a transistor switch 1 that controls the circuit current and has a control input, and a control arrangement that controls the voltage of the control input of the switch. The control arrangement comprises a comparator circuit 3 that compares a fraction of the voltage across the switch 1 with a reference voltage, for example supplied by a Zener diode or bandgap diode, and opens the switch if the fraction is greater than the reference voltage. The comparator circuit is powered by the voltage drop in the line across the switch so that the arrangement can be formed as a two-terminal device that requires no external power source.The arrangement has the advantage that it exhibits a relatively small variation in performance with respect to temperature variations.Type: GrantFiled: June 10, 1993Date of Patent: November 7, 1995Assignee: Raychem LimitedInventors: Dennis M. Pryor, Michael Challis
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Patent number: 5465189Abstract: A new semiconductor controlled rectifier which may be used to provide on-chip protection against ESD stress applied at the input, output, power supply pins or between any arbitrary pair of pins of an integrated circuit is disclosed. The structure which has the lowest breakdown voltage for a given technology is incorporated into the SCR enabling a SCR trigger voltage determined by the lowest breakdown-structure.Type: GrantFiled: August 12, 1994Date of Patent: November 7, 1995Assignee: Texas Instruments IncorporatedInventors: Thomas L. Polgreen, Amitava Chatterjee, Ping Yang
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Patent number: 5463521Abstract: In one aspect of the present invention, an apparatus for protecting electronic circuit elements from hazardous voltages is provided. The apparatus includes a source of electrical energy that produces electrical energy having a predetermined energy level. An electrical load is connected to the electrical energy source and responsively receives electrical energy. A signaling device receives electrical energy from the electrical energy source and produces an overvoltage signal in response to receiving electrical energy greater than the predetermined energy level. An NMOSFET is connected to the electrical load, and controllably regulates the electrical current flowing through the electrical load. A control device receives the overvoltage signal and responsively controls the operation of the NMOSFET.Type: GrantFiled: June 3, 1994Date of Patent: October 31, 1995Assignee: Caterpillar Inc.Inventor: W. John Love
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Patent number: 5450266Abstract: A fault current limiter for use in alternating current transmission utilizes a (high temperature) superconductor body. If the current density through the body exceeds a critical value, the superconductor becomes a resistor; the fault current limiter makes use of this principle. In order to enable the critical current density to be selected from within a range of different values, the superconductor is immersed in a volume of cryogenic liquid, e.g. liquid nitrogen, in a vessel provided with a closure having an outlet communicating with a duct in which is disposed a manually adjustable back pressure regulator. The back pressure regulator enables the pressure in the ullage space of the vessel to be set at a chosen value, usually below atmospheric pressure. The liquid nitrogen is stored in the vessel at its boiling point which depends on the pressure in the ullage space. Accordingly, the temperature of the liquid nitrogen can be set by the regulator.Type: GrantFiled: December 6, 1994Date of Patent: September 12, 1995Assignee: The BOC Group plcInventor: Neil A. Downie
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Patent number: 5444594Abstract: A snubber energy recovery circuit for protecting switching devices from current and voltage, which comprises a snubber circuit connected in parallel with a switching device, a recovery path for recovery the energy stored in the snubber circuit, and a constant-current source for maintaining current flowing in the recovery path at a constant value. The snubber circuit is composed of a snubber diode and a snubber capacitor, with one end of the recovery path being connected to the junction point of the snubber capacitor and snubber diode.Type: GrantFiled: February 4, 1993Date of Patent: August 22, 1995Assignee: Kabushiki Kaisha ToshibaInventors: Shigeru Tanaka, William Ofosu-Amaah
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Patent number: 5426323Abstract: An integrated semiconductor circuit includes a semiconductor substrate. At least one first and at least one second potential rail respectively carry first and second supply potentials of the semiconductor circuit during operation. At least one input signal line has at least one input signal terminal and at least one output signal line has at least one output signal terminal and at least one additional line connected to the output signal terminal. At least one first circuit portion receives and processes input signals and at least one second circuit portion develops at least one output signal of the semiconductor circuit during operation of the semiconductor circuit. A configuration for protection against overvoltages has a first protection circuit for each input signal terminal being connected between a respective input signal terminal and a respective first circuit portion, and has a second protection circuit for each output signal terminal being connected to the additional line.Type: GrantFiled: May 4, 1994Date of Patent: June 20, 1995Assignee: Siemens AktiengesellschaftInventors: Werner Reczek, Hartmud Terletzki
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Patent number: 5424892Abstract: A circuit for protecting a MOSFET power transistor, the circuit having a variable input impedance in which the rate of rise of voltage is to be increased and thus the switching time reduced. For this purpose, a second MOSFET auxiliary transistor is connected by its bulk electrode to the source of the MOSFET power transistor. The source of the second MOSFET auxiliary transistor is connected to the gate of a third MOSFET auxiliary transistor and to the gate of the MOSFET power transistor. The drain of the second MOSFET auxiliary transistor is connected to a circuit input terminal which is coupled by a resistor to the gate of the MOSFET power transistor. The gate of the second MOSFET auxiliary transistor is connected to the drain of the second MOSFET auxiliary transistor as well as to the source of the third MOSFET auxiliary transistor.Type: GrantFiled: July 6, 1994Date of Patent: June 13, 1995Assignee: Robert Bosch GmbHInventors: Rainer Topp, Roland Schmid, Dagmar Oertel
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Patent number: 5396393Abstract: A pumping station feeds hydraulic energy to a grid or raises water from a low level to a high level. It includes, in particular, a transformer connected between an alternator and a grid, with a circuit breaker between the transformer and the grid. It further includes resistance for limiting the surge current through the transformer. This resistance lies in the range of 500 ohms to 100,000 ohms and is inserted for a period lying in the range 15 milliseconds to 19 milliseconds when the circuit breaker is closed, and a controller for ensuring that the circuit breaker closes on the unloaded transformer only at an instant that is no more than 1.2 milliseconds from an extreme value in the grid voltage.Type: GrantFiled: February 4, 1993Date of Patent: March 7, 1995Assignee: GEC Alsthom SAInventors: Edmond Thuries, Martin Motz
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Patent number: 5396394Abstract: A line protection circuit for an ISDN device includes a pair of identical, NMOS field effect transistors connected between the device and opposite terminals of one winding of an isolation transformer. Each device has one N region connected to an output line from the ISDN device, a second N region connected to one winding terminal, a grounded channel or P region and a gate connected to a source of positive logic voltage. During normal operation, the FETs pass current provided by a constant current source within the ISDN device without attenuation. If a power surge occurs elsewhere in the ISDN network, the voltage at one of the FETs is be clamped to ground while the voltage at the other FET rises only until FET cut-off occurs. If power is removed from the FETs, at least one PN junction will always be reverse biased to isolate the protected ISDN device from the remainder of the network.Type: GrantFiled: February 6, 1990Date of Patent: March 7, 1995Assignee: International Business Machines Corp.Inventor: Timothy W. Gee
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Patent number: 5391930Abstract: A circuit breaker with a parallel resistor which fulfills with a simple structure incompatible requirements for a resistance circuit making contact with regard to maintenance of the dielectric strength and prearcing characteristic between electrodes. A resistance circuit making contact 2 and a resistance circuit breaking contact 3 are electrically connected in parallel, one end of the parallel circuit is connected to one end of a common resistor and the other end of the parallel circuit and the other end of the resistor are connected to the respective ends of a main contact 1. After the opening of the resistance circuit making contact 2 the resistance circuit breaking contact 3 is still closed.Type: GrantFiled: May 26, 1992Date of Patent: February 21, 1995Assignee: Hitachi, Ltd.Inventors: Youichi Ohshita, Katuichi Kashimura, Akira Hashimoto, Osamu Koyanagi, Yukio Kurosawa, Isao Nishida
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Patent number: 5383081Abstract: The live insertion circuit of the present invention comprises a movable magnetic body for changing an inductance of a variable inductor, and the movable magnetic body is moved toward a supporting member by a rod at the time of inserting the package into the unit. At this time, an inductance of the variable inductor is changed according to the connection condition of terminals for connecting the package and the unit, thus suppressing a surge current.Type: GrantFiled: January 24, 1994Date of Patent: January 17, 1995Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Naofumi Nishikawa
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Patent number: 5381296Abstract: A current limiting short-circuiting protector is disclosed which utilizes an electronic and thermal feedback principle for achieving precise and rapid release of the protector, which can be readily reset. The principle utilizes a non-linear powerful temperature-dependent resistor in the collector circuit of a field effect transistor which serves as a current valve and through which the total current to be monitored is passed. The circuit replaces a conventional fuse and may also function as a load on/off control means. When a fault occurs in the load, the erroneous current is limited to a much lower value than is the case with a conventional fuse.Type: GrantFiled: November 15, 1993Date of Patent: January 10, 1995Assignee: Telefonaktiebolaget L M EricssonInventors: Folke Ekelund, Leif Hansson
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Patent number: 5374887Abstract: An inrush current limiting circuit contains an FET as an active component which is controlled by a network of passive components. The network includes a gate control circuit for controlling the operation of the FET and a negative feedback circuit which responds to the load voltage during the transient state. The current limiting circuit is fast acting during momentary power interruptions and has low power losses.Type: GrantFiled: November 12, 1993Date of Patent: December 20, 1994Assignee: Northern Telecom LimitedInventor: Josef C. Drobnik
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Patent number: 5355275Abstract: A variable impedance device comprises a coil (10) and an associated magnetic circuit (16) having a gap receiving a plate (20) of superconducting material which acts as a shield or barrier so that, while the plate (20) is in its superconducting state, magnetic flux is caused to traverse the gap via pathways substantially greater in length than the width of the gap. If a large current is passed through the coil (10), the plate (20) becomes resistive thereby presenting a substantially increased impedance to the current. The device may be used in current limiting applications, or other applications where a variable impedance is required.Type: GrantFiled: December 20, 1991Date of Patent: October 11, 1994Assignee: Imperial Chemical Industries PLCInventors: Philip J. Goodier, Peter J. Davidson
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Patent number: 5349489Abstract: An integrated semiconductor circuit for use in a low voltage (1.5-2 V) battery operated device is provided with a protection circuit against reverse connection of the battery.The protection circuit takes care that the substrate is always connected to one extreme potential and a region containing one or more resistors is always connected to the other extreme potential irrespective of the proper or reverse mode of connection of the battery. The protection circuit has been designed in such a way that no voltage drop occurs between the battery connections and the supply voltage connection terminals of the integrated semiconductor circuit.Type: GrantFiled: December 12, 1991Date of Patent: September 20, 1994Assignee: B.V. Optische Industrie "De Oude Delft"Inventor: Johannes B. J. Schelen
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Patent number: 5333094Abstract: A transient reduction circuit is provided for use in an arrangement including a backplane having at least two conductors, a power supply connected to the conductors, and a plurality of circuit cards attached to the backplane and connected to the conductors. Each of the plurality of circuit cards includes a transient reduction circuit having inputs for connection to the power supply output and a reference potential, a transistor having an emitter connected to the power input, a collector connected to the load and a base, a resistor connected between the base and the reference potential input, and a decoupling capacitor connected between the collector and the reference potential input. When the cards are powered the transistor is turned on and saturates, thus introducing only a 0.1 V drop in the power supply line. A sudden decrease in power supply voltage output is prevented from discharging the decoupling capacitor by a reverse biased base-collector junction in the transistor.Type: GrantFiled: June 17, 1992Date of Patent: July 26, 1994Assignee: Northern Telecom LimitedInventor: Dermot T. Fucito
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Patent number: 5321318Abstract: A method and device neutralize alternating stray current flowing through a ground return circuit in the proximity of an animal susceptible to be affected by this current. The alternating stray current flowing through the ground return circuit is sensed and a signal representative of that stray current is produced. In response to this current representative signal, an alternating compensatory current is generated and injected in the ground return circuit. The alternating compensatory current has an amplitude equal to the amplitude of the sensed stray current and is out of phase with respect to that stray current by an angle of 180.degree.. Therefore, the alternating compensatory current and the alternating stray current add in the ground return circuit and substantially cancel each other whereby the stray current can no longer affect the animal.Type: GrantFiled: May 26, 1992Date of Patent: June 14, 1994Inventor: Michel Montreuil
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Patent number: 5311391Abstract: Electrostatic discharge (ESD) protection circuitry having a string of diode-connected field-effect transistors (FETs) connected between a bus and ground plane for triggering a shunt element, such as a large n-channel FET, connected between the same or a different bus and the ground plane. The bus or buses are diode-connected through the base-emitter junction of pnp transistors to signal pads, as well as to a positive voltage power supply. The string of FETs turns on when the pad-to-ground voltage, and thus the bus-to-ground voltage, exceeds a threshold characteristic of an ESD event. The string acts as a voltage divider to bring a node between two of the FETs up to a voltage that will activate an n-channel trigger FET, which is part of a resistive-load inverter. This drives another inverter that in turn drives the shunt FET. When the voltage is pulled back down below the threshold voltage, the shunt FET continues to shunt current to the ground plane for the duration of the ESD event.Type: GrantFiled: May 4, 1993Date of Patent: May 10, 1994Assignee: Hewlett-Packard CompanyInventors: Thomas Dungan, Eugene Coussens
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Patent number: 5305174Abstract: An electrical power system protection device includes a circuit breaker and a switch connected in series to a power line. The protection device also has a current limiting element connected in parallel to the circuit breaker. When the level of electrical current flowing in the power line, detected by a current detector, has exceeded a predetermined first set level, a first over-current detector delivers immediately a trip command to the circuit breaker. As a consequence, fault current is commutated to the current limiting element so that any drop of voltage in the power line upstream of the circuit breaker is greatly suppressed. When a state in which a predetermined second set level is exceeded by the detected current level is continued beyond a predetermined period, a second over-current detector delivers an off command to the switch, thus protecting the upstream portion of the power line against the fault in this power line.Type: GrantFiled: September 3, 1991Date of Patent: April 19, 1994Assignees: Hitachi, Ltd., Chubu Electric Power Co., Ltd.Inventors: Masao Morita, Toshiaki Ueda, Yukio Kurosawa, Hiroshi Arita, Tokio Yamagiwa
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Patent number: 5301082Abstract: A method for using an underground mine communication system to effect minewide communication and an intrinsically safe current limiter circuit for insuring that electrical equipment in the system will not cause incendiary conditions. The underground mine communication system comprises a plurality of repeaters and medium frequency radios, including mobile, portable and personal-carried radios, coupled to electrical conductors and natural waveguides existing in the earth by tuned loop antennas. Messages transmitted by the radios are carried to the repeaters by the conductors or coal seam waves. The repeaters amplify, replicate and retransmit the message at two different frequencies for transmission of the message to a surface base station and to other radios in the system. A paging system, which has a separate set of repeaters, is also coupled to the network of electrical conductors and natural waveguides by tuned loop antennas. The paging system alerts miners to contact the surface base station.Type: GrantFiled: November 13, 1991Date of Patent: April 5, 1994Assignee: Stolar, Inc.Inventors: Larry G. Stolarczyk, Kurt A. Smoker, Gerald J. Boese, William E. Mondt, Marvin L. Hasenack, Jr., James L. Zappanti, Seth A. Smith, Edward D. Moore
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Patent number: 5293298Abstract: An improved electro/mechanical connector through which multi-media electrical signals are transported includes a first port with resilient contact tongues, a second port for supporting a coaxial assembly and a third port coupled to a circuit module which receives the multi-media electrical signals on an input terminal splits the multi-media electrical signals into broadband signals which are routed to the coaxial assembly and baseband signals which are routed to the first port. The circuit module also receives broadband signals and baseband signals from the coaxial assembly and first port respectively combines them into the multi-media signals which are outputted on the input terminal.Type: GrantFiled: October 16, 1991Date of Patent: March 8, 1994Assignee: International Business Machines CorporationInventor: Henry R. Foglia
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Patent number: 5283707Abstract: An inrush current limiting circuit includes a power FET switch connected between power source and load and a control circuit. The power FET switch includes one or more parallel-connected power FETs, each having low individual conductive resistances. The control circuit, connected between the power inputs and the gate of power FET switch, includes a voltage supply for providing sufficient voltage to turn the power FET switch on and a time constant circuit for controlling the rate at which the power FET means is turned on. With the voltage supply connected to an optional enable terminal, a DC enable signal can control powering of the load. A second time constant circuit controls the rate of power down.Type: GrantFiled: November 27, 1992Date of Patent: February 1, 1994Assignee: Northern Telecom LimitedInventors: Christopher R. Conners, Manfred K. Ficker
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Patent number: 5272584Abstract: A hot plug circuit insuring that the plugging of cards to a board is performed in the hot-plug mode when the cards are supplied from a common power supply located on one of the cards or on the board. This circuit (62) limits the surge current generated at the interconnection of first circuits (30) arranged on a first card (1) and powered by a supply device (2) providing a first supply voltage (ground) on a first supply line (36) and a second supply voltage (+V) on a second supply line (34), with second circuit (24) on a second card powered by the supply device (2) through a third supply line (74) and fourth supply line (76). The surge current results from the charge of a decoupling capacitor of capacitance Cd arranged on the second card between the third and fourth supply lines when the cards are interconnected through an interconnecting arrangement (14, 12, 22).Type: GrantFiled: November 12, 1991Date of Patent: December 21, 1993Assignee: International Business Machines CorporationInventors: Pierre Austruy, Jean-Paul Conjeaud, Patrick Massi, Christian Jacquart
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Patent number: 5272586Abstract: Proper operation of an integrated circuit (IC) is destroyed when voltage exceeding a predetermined level is applied to the circuit. A switching MOS transistor utilizing floating gate technology is used to shunt electrostatic discharge (ESD) away from the IC. The switching MOS transistor is adapted to switch at a voltage level which is greater than the normal operating voltage for the IC but less than the predetermined voltage level characteristic of the IC. A first switching MOS transistor provides a path for a positive ESD stress by having its control gate and drain connected to the line of interest and its source connected to a reference point. Thus, when a positive voltage spike greater than the circuit voltages occurs on the line of interest, the first switching MOS transistor shunts the ESD stress away from the line of interest.Type: GrantFiled: January 29, 1991Date of Patent: December 21, 1993Assignee: National Semiconductor CorporationInventor: Yung-Chau Yen
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Patent number: 5268592Abstract: A circuit for facilitating hot plugging by limiting the inrush current when a card is plugged into a board having plural card-receiving slots. A single MOSFET charging circuit for all of the cards is provided on the board for each voltage level supplied to the cards. Each card connector half has a staggered set of pins so that, upon insertion of a card, the following events occur in sequence (1) the card ground is connected to the board ground through a high-resistance path; (2) the card ground is connected to board ground through a low-resistance path and the MOSFET source is coupled to the card components; (3) the MOSFET gate is coupled through a card jumper to a bias supply; (4) the normal connection is made between the voltage supply and the card components; and (5) the connection to the card components from the MOSFET source is broken.Type: GrantFiled: February 26, 1991Date of Patent: December 7, 1993Assignee: International Business Machines CorporationInventors: Paul D. Bellamy, Ted T. Takayesu
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Patent number: 5268588Abstract: A semiconductor structure (30) is provided for electrostatic discharge protection. A first bipolar transistor (Q1) has a collector electrically coupled to a first node (12), a base electrically coupled to a second node, and an emitter electrically coupled to a third node (14). A second bipolar transistor (Q2) has a collector, a base electrically coupled to the second node, and an emitter electrically coupled to the first node (14). The second bipolar transistor (Q2) supplies a base current to the base of the first bipolar transistor (Q1) in response to the first node (12) reaching a threshold voltage relative to the third node (14), so that the first bipolar transistor (Q1) conducts current between the first (12) and third (14) nodes in response to the base current.Type: GrantFiled: September 30, 1992Date of Patent: December 7, 1993Assignee: Texas Instruments IncorporatedInventor: Steven E. Marum
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Patent number: 5262691Abstract: For responding to a shorted gate in a gate turnoff thyristor the gate electrode of which is connected by means of a controllable switch to a control voltage terminal having a negative potential with respect to the cathode potential of the thyristor, the controllable switch being arranged to conduct negative gate current in response to a thyristor turnoff command, voltage comparing means is coupled to the controllable switch for detecting when the switch is conducting negative gate current of relatively high magnitude, timing means is active for a predetermined interval following the start of said thyristor turnoff command, and logic means is operative to cause the switch to stop conducting negative gate current if the voltage comparing means detects high gate current at the end of such interval.Type: GrantFiled: November 30, 1992Date of Patent: November 16, 1993Assignee: General Electric CompanyInventors: Ronald B. Bailey, Herbert J. Brown
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Patent number: 5250508Abstract: The invention relates to superconductor current-limiting apparatus of the type having a magnetic core around which firstly a superconductor component is disposed, followed by an electric coil made of non-superconducting material, the apparatus being designed to be inserted in a line to be protected (L), the assembly constituted by the magnetic core (6A, 6B), the superconductor component (3A, 3B) and the electric coil (2A, 2B) forming a current-limiting unit which is connected in the line to be protected in series with a circuit-breaker.Type: GrantFiled: September 16, 1991Date of Patent: October 5, 1993Assignee: Gel Alsthom SAInventor: Van Doan Pham
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Patent number: 5243648Abstract: In order to protect computers and the like against the pick up, the recording and the unauthorized use of data from the computers during the working thereof, and to protect them against high energy transient disturbances taking place on the main A.C. power line, a filter unit (1) is foreseen comprising a plurality of sections (19) comprising inductances (21) and capacitances (23), between which it is interposed at least a gas-discharge surge arrester (25) and varistors (27), and masking unit (3) comprising a power supply (31), a white noise generator (33) and an amplifier (35) emitting from the antenna circuit (61) said properly amplified white noise which is completely random and unpredictable, and therefore impossible to be decoded.Type: GrantFiled: May 1, 1992Date of Patent: September 7, 1993Assignee: Data Protection S.R.L.Inventors: Giovanni Gilardi, Severino Scarazini
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Patent number: 5241447Abstract: An electrical switch structure which employs superconductive material. A magnetizable core is encompassed by a body of superconductive material. The body of superconductive material has a superconductive state and a normal resistive state and can be placed in either state. The magnetizable core is also encompassed by at least one electrically conductive winding through which electrical current flows to create a magnetic flux within the magnetizable core. When the body of superconductive material is in its superconductive state current is induced therein by the magnetic flux in the magnetizable core. Current flow in the body of superconductive creates a magnetic flux in the magnetizable core which cancels the magnetic flux which is created by current flow in the electrically conductive winding.Type: GrantFiled: February 27, 1991Date of Patent: August 31, 1993Assignee: The United States of America as represented by the Secretary of the Air ForceInventors: John P. Barber, Neal D. Clements, Russell L. Spyker
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Patent number: 5239441Abstract: A fault locating system for locating a fault in an underground power distribution system includes a method and an apparatus. The underground power distribution system receives and distributes power from a bulk power source to power consumers through a fused switchgear unit and a first vault. The first vault distributes power from the fused switchgear unit among plural outgoing underground power lines, with each line supplying power to at least one power consumer. A current limiting apparatus for locating faults in the above system includes an enclosure of an insulative material defining a fuse receiving chamber. First and second bushings extend through the enclosure to the fuse receiving chamber. The apparatus has a current limiting fuse received by the respective first and second bushings within the fuse receiving chamber.Type: GrantFiled: August 20, 1990Date of Patent: August 24, 1993Assignee: Portland General Electric CorporationInventors: Larry D. Fox, Robert K. Flath
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Patent number: 5237395Abstract: An electrostatic discharge (ESD) protection circuit for protecting internal devices of an integrated circuit is coupled between the power rails of the integrated circuit. First and second current shunt paths between the power rails are maintained non-conductive during normal circuit operation and are triggered to a conductive mode in response to an ESD event on the power rails. A triggering circuit may employ a logic gate, such as an inverter with its input coupled to the positive power rail, which maintains a low level output during normal operation and provides a high output in response to an ESD event on the power rail.Type: GrantFiled: May 28, 1991Date of Patent: August 17, 1993Assignee: Western Digital CorporationInventor: Kwok Fai V. Lee
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Patent number: 5233495Abstract: A device for protecting a principal static relay including semi-conductors from overloads which includes an auxiliary static relay which is connected in series with a conventional parallel protection circuit and whose closure is controlled at the same time as the opening of the principal static relay.Type: GrantFiled: June 11, 1991Date of Patent: August 3, 1993Inventors: Jian F. De Palma, Jean-Jacques Rousseau, Pierre Epron
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Patent number: 5233498Abstract: An arrangement for forced triggering a spark gap at a voltage below self-ignition voltage, which spark gap is divided into at least two sub spark gaps arranged in series, whereby voltage division components are connected in parallel with the sub spark gaps for effecting voltage division between the sub spark gaps. In order to obtain a forced triggering arrangement which is simple and reliable in operation, an element which is controlled to adopt a high-impedance or low-impedance state is arranged in series with the voltage division components, whereby the element, when adopting the high-impedance state, changes the voltage division between all the spark gaps so that one of the two series connected spark gaps arranged in parallel therewith is ignited.Type: GrantFiled: May 2, 1991Date of Patent: August 3, 1993Assignee: Nokia Capacitors Ltd.Inventor: Tarmo Kansala
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Patent number: 5227713Abstract: A subsynchronous resonance mitigation system, including a method and apparatus, for damping undesirable subsynchronous resonance oscillations in a generator, which, if left unchecked, may damage the shafts of a turbine-generator set. A remote coupling apparatus, such as a thyristor controlled series capacitor (TCSC) system, a sourced inverter device, or a static phase shifter, is coupled to the generator by a transmission line. In response to a firing command, the coupling apparatus introduces subsynchronous resonance mitigating currents into the transmission line. Sensors monitor power line parameters and/or the generator speed, and in response thereto, a higher-level controller generates a voltage command. A vernier controller responds to the monitored power line parameters and the voltage command to provide the firing command to the coupling apparatus.Type: GrantFiled: May 15, 1992Date of Patent: July 13, 1993Assignee: Electric Power Research InstituteInventors: Colin E. J. Bowler, Einar V. Larsen, Daniel H. Baker
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Patent number: 5227941Abstract: An electrical circuit supplying a load from a voltage source includes a switching device and a diode, and is to be protected from recovery current caused by momentary reversal of the diode current during the operation of the switching device. The electrical circuit further includes a transformer having an excitation winding sensing the reverse recovery current through the diode immediately after operation of the switching device, and a sink winding inductively coupled to the excitation winding for inducing in the sink winding a current proportional to the current in the excitation winding. A unidirectional conducting device directs the current induced in the sink winding to the diode to cause reverse recovery of the diode.Type: GrantFiled: November 16, 1990Date of Patent: July 13, 1993Assignee: Systel Development & Industries Ltd.Inventor: Daniel Rubin