Impedance Insertion Patents (Class 361/58)
  • Patent number: 5225956
    Abstract: In a superconducting AC (alternating current) current limiter, quenched trigger coil assembly is quickly recovered to the superconductive state by minimizing a loop current flowing through the trigger coil assembly.
    Type: Grant
    Filed: June 28, 1991
    Date of Patent: July 6, 1993
    Assignees: The Tokyo Electric Power Company, Incorporated, Kabushiki Kaisha Toshiba
    Inventors: Tsukushi Hara, Kiyoshi Okaniwa, Kazuyuki Tsurunaga, Mitsuhito Sawamura, Yoshihisa Masuda, Daisuke Ito
  • Patent number: 5225702
    Abstract: A first silicon controlled rectifier structure (220) is provided for electrostatic discharge protection, comprising a lightly doped semiconductor layer (222) having a first conductivity type and a face. A lightly doped region (224) having a second conductivity type opposite the first conductivity type is formed in the semiconductor layer (222) at the face. A first heavily doped region (226) having the second conductivity type is formed laterally within the semiconductor layer (222) at the face and is electrically coupled to a first node (62). A second heavily doped region (230) having the second conductivity type is formed laterally within the lightly doped region (224) and is electrically coupled to a second node (58). A third heavily doped region (228) having the first conductivity type is formed laterally within the lightly doped region (224) to be interposed between the first and second heavily doped regions (226 and 230) and is electrically coupled to the second node (58).
    Type: Grant
    Filed: December 5, 1991
    Date of Patent: July 6, 1993
    Assignee: Texas Instruments Incorporated
    Inventor: Amitava Chatterjee
  • Patent number: 5225957
    Abstract: An improvement of a current limiting device using a superconductive coil. A trigger coil and current limiting coils are formed as a superconductive coil. A switching element which is actuated when a current limiting operation by the current limiting coil occurs, is connected in series to the trigger coil to immediately suppress heat generation by the trigger coil. When a quenching is detected by a detector, the trigger coil is disconnected and an additionally provided recovery coil is connected to speed up the recovery operation. A plurality of trigger coils connected in series may be used.
    Type: Grant
    Filed: May 22, 1990
    Date of Patent: July 6, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kazuyuki Tsurunaga
  • Patent number: 5222010
    Abstract: A railway track circuit surge suppression system for the protection of wayside equipment from transitory energy surges appearing in the rails. The system has a primary surge suppression stage typically near the rails and a secondary surge suppression stage typically near the equipment to be protected. The secondary stage comprises an apparatus having a pair of inductors arranged serially with the respective track line wires to oppose the flow of surging current. Thus, the much of the energy dissipates at the primary stage. Remaining energy is dissipated by a voltage clamp behind the inductors.
    Type: Grant
    Filed: January 22, 1992
    Date of Patent: June 22, 1993
    Assignee: Union Switch & Signal Inc.
    Inventor: Ronald R. Capan
  • Patent number: 5212616
    Abstract: An improved latch-up protection circuit is disclosed which prevents damage to a CMOS integrated circuit chip due to transient surges or internal-circuitry initiated latch-ups and which clears any latch-up condition or SCR mode. In each embodiment, the latch-up protection circuit is integrated with an on-chip voltage regulation circuit which provides on-chip power to the internal chip circuitry. A first approach to implementing the latch-up protection circuit is to detect an average current through the power transistor of the voltage regulation circuit over a few microseconds. Should the average current exceed a preset value, then the power transistor is turned off and the power (V.sub.DDI) supplied to the internal chip circuitry is reduced to zero, thereby removing the latch-up condition. In a second approach, the on-chip voltage (V.sub.DDI) supplied to internal chip circuitry is compared with a reference voltage signal representative of the occurrence of a latch-up condition, i.e.
    Type: Grant
    Filed: October 23, 1991
    Date of Patent: May 18, 1993
    Assignee: International Business Machines Corporation
    Inventors: Sang H. Dhong, Robert L. Franch
  • Patent number: 5210674
    Abstract: A superconducting coil protective system comprises a quenching detector (QD) for detecting occurrence of a quenching in a superconducting coil (L) and generating a quenching signal indicative of the occurrence of the quenching. In response to the quenching signal, a voltage controller (VC) reduces an output voltage from a power source (PS) to zero or to a negative polarity. A current interrupter (CI) including a circuit breaker (CB) or a fuse (F) is connected in parallel to the superconducting coil (L) for allowing a first commutation of a current from the superconducting coil (L) to the current interrupter (CI) upon the reduction of the output voltage from the power source (PS). The system also comprises a protective resistor (RD) connected in parallel to the current interrupter (CI) for allowing a second commutation of the first-commutated current thereto upon the opening of the current interrupter (CI), whereby energy of the second-commutated current is dissipated in the protective resistor.
    Type: Grant
    Filed: May 29, 1991
    Date of Patent: May 11, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Satarou Yamaguchi, Tadanori Tsukamoto
  • Patent number: 5198957
    Abstract: A transient protection circuit provides protection from high voltage transients appearing along a transmission line by sensing a predetermined threshold of the voltage developed thereon and opening the conduction path through first and second switching circuits in the transmission line. The switching circuits are implemented with first and second serially coupled transistors sharing a common drain and enabled by a control signal during normal operation. The first and second transistors each have a diode oriented to conduct from the source to the drain for bi-directional operation. During high voltage transient conditions, a sensing circuit detect a predetermined threshold of the potential on the transmission line and disables one of the first and second transistors which opens the conduction path through the first and second switching circuits thereby suppressing the surge currents flowing therethrough.
    Type: Grant
    Filed: July 2, 1990
    Date of Patent: March 30, 1993
    Assignee: Motorola, Inc.
    Inventors: Dennis L. Welty, John Bliss, Judith L. Sutor, Stephen P. Robb, David M. Susak, Lloyd H. Hayes
  • Patent number: 5195010
    Abstract: A protection circuit for a solid state instrument includes a plurality of fuses and a switching device arranged in parallel with the input capacitance of the solid state instrument, The fuses protect the instrument from high voltage surges, and the switching device protects the instrument from lower voltage surges. The fuses and the switching device are solid state devices and thus can be fabricated along with the solid state instrument.
    Type: Grant
    Filed: January 23, 1990
    Date of Patent: March 16, 1993
    Assignee: Thomson, S.A.
    Inventor: Joseph Dresner
  • Patent number: 5179492
    Abstract: A detachable operating unit for connection with a main unit comprises at least two power supply units for applying operating voltages to the detachable operating unit, the power supply units generating two different voltages, respectively; at least two power supply terminals for engaging the detachable operating unit and the main unit to receive two different voltages applied to the power supply units, respectively; a ground terminal for engaging the detachable operating unit and the main unit; a protective circuit for applying a reverse voltage in repsonse to a differential voltage between voltages of the power supply units, the protective circuit being disposed between one of power supply units which generates the operating voltage lower than that of the other power supply unit, and the ground terminal.
    Type: Grant
    Filed: March 25, 1992
    Date of Patent: January 12, 1993
    Assignee: Pioneer Electronic Corporation
    Inventors: Seiji Kato, Kazuhiro Kiyoura
  • Patent number: 5179488
    Abstract: A process control instrument receives a DC current from a two wire loop and has overcurrent protection and reverse current protection circuits which pass a portion of the DC current as a device current to a process controlling device. The overcurrent protection circuit includes a current sensing circuit which conducts the device current and generates an output indicative of device current. The overcurrent protection circuit also includes a current diverting circuit coupled across the two wire loop and responsive to the sensor output for diverting loop current in excess of a predetermined upper limit of device current back to the loop when the sensor output indicates the upper limit is reached. The reverse current protection circuit is coupled across the loop and includes a variable impedance which conducts the device current. The variable impedance inhibits the device current from flowing through the device when a loop potential is reversed from a predetermined polarity.
    Type: Grant
    Filed: July 26, 1990
    Date of Patent: January 12, 1993
    Assignee: Rosemount Inc.
    Inventor: Bruce D. Rovner
  • Patent number: 5161082
    Abstract: The present invention relates to an overload-limiting method and circuit based on the PWM control technique. An overload-limiting induction coil is kept short circuited until a maximum value of a magnitude that is a function of the current flowing through the load is detected. The induction coil is put into circuit only after the maximum value of said magnitude has been detected and it is kept in circuit until a minimum value of said magnitude is detected. The magnitude may be constituted by the current flowing through the load or by the voltage across the terminals of the load. The means for short circuiting and inserting the induction coil comprise a transformer whose primary winding is constituted by the induction coil and whose secondary winding is in circuit with an electronic switch constituted by a full-wave electronic rectifier controlled by a comparator. The invention is applicable to the electronics industry.
    Type: Grant
    Filed: May 14, 1991
    Date of Patent: November 3, 1992
    Assignee: Agence Spatiale Europeenne
    Inventor: Manuel M. Alfonso
  • Patent number: 5159518
    Abstract: An input protection circuit protects MOS semiconductor circuits from electrostatic discharge voltages and from developing circuit latchup. The input protection circuit includes a low resistance input resistor, and two complementary true gated diodes. One true gated diode has a P-doped node coupled to the input node, and a gate and N-doped node coupled to a high voltage power supply node. The other true gated diode has a N-doped node coupled to the input node, and a gate and P-doped node coupled to a second power supply node.
    Type: Grant
    Filed: January 17, 1990
    Date of Patent: October 27, 1992
    Assignee: VLSI Technology, Inc.
    Inventor: Richard S. Roy
  • Patent number: 5159517
    Abstract: A sensing conductor and a detection circuit cause a low resistance shorting of an appliance circuit in response to immersion in water or other electrically conductive liquid, and an interrupter device, preferably located in the plug of the cord set, reacts to overcurrent, by opening both sides of the line. The sensing conductor must be strategically placed, within the appliance housing, to pass in proximity to liquid access points and the current carrying parts of the appliance. The detection circuit may be within the appliance or in the plug, with the sensing conductor extended to the appliance as a third conductor in the line cord. When a small current passes between the sensing conductor and the ungrounded or grounded neutral sides of the line or earth ground, current is shunted through the detection circuit from the ungrounded to the grounded neutral conductor, and away from the appliance circuit.
    Type: Grant
    Filed: July 17, 1990
    Date of Patent: October 27, 1992
    Assignee: Innovative Designer Products, Inc.
    Inventor: Lawrence E. Bodkin
  • Patent number: 5157573
    Abstract: An electrostatic discharge protection circuit for an integrated circuit employing a segmented field effect buffer transistor between the input/output pad and the active devices on the integrated cicuit. An extended resistive structure is configured in series with the segmented buffer transistor and the input/output electrical contact pad. The extended resistive structure is integrally formed with the individual segments of the buffer FET. The resistive structure may be implemented as an extended n well structure adjacent the FET segments. In a first resistance mode during normal circuit operations, the extended resistive structure has a low resistance value and introduces virtually no additional load to the input/output buffer circuitry. In a second mode of operation during ESD discharge, the resistive structure has a second significantly higher resistance which reduces current values during the ESD event thereby protecting the buffer circuit.
    Type: Grant
    Filed: January 31, 1991
    Date of Patent: October 20, 1992
    Assignee: Western Digital Corporation
    Inventors: Kowk Fai V. Lee, Alan Lee
  • Patent number: 5155648
    Abstract: A device for protecting a direct current electrical power supply from disturbances caused by connecting to it or disconnecting from it an electronic system comprises at least one variable impedance component. The impedance of this component is controlled so that it has a very high first value when said electronic system is disconnected, a very low second value when said system is connected, a value varying slowly from said first value to said second value on changing from the disconnected state to the connected state and a value varying quickly from said second value to said first value on changing from the connected state to the disconnected state. The output current from said variable impedance component constitutes the supply current of said electronic system.
    Type: Grant
    Filed: February 27, 1991
    Date of Patent: October 13, 1992
    Assignee: Alcatel Cit
    Inventor: Claude Gauthier
  • Patent number: 5153804
    Abstract: A hybrid current limiter comprising a first winding of non-superconducting conductive material having a large number of turns and electrically connected in series with a superconductoring coil of low self-inductance and placed in a cryostat, and a second winding of non-superconducting conductive material having a small number of turns, said second winding being closely coupled with said first winding in such a manner as to obtain low overall inductance, the second winding being connected in parallel with the series circuit constituted by the first winding and the superconducting coil.
    Type: Grant
    Filed: April 24, 1991
    Date of Patent: October 6, 1992
    Assignee: GEC Alsthom SA
    Inventors: Van Doan Pham, Jean-Pierre Dupraz, Michel Collet, Yves Brunet, Pascal Tixador
  • Patent number: 5144519
    Abstract: A semiconductor chip protection circuit has a transmission gate TG.sub.11 disposed between an input pin 11 and an input terminal of an internal circuit 12, and two further transmission gates TG.sub.12, TG.sub.13 respectively connected between the input terminal of the internal circuit and a power terminal V.sub.DD, and between the input terminal and a ground terminal. Two additional transmission gates TG.sub.14, TG.sub.15 are connected respectively between an output terminal of the internal circuit and the power terminal, and between the output terminal and ground. At least one final transmission gate TG.sub.16 is connected between the power terminal and ground. Electrostatic charges are smoothly discharged because of the low resistance value of the N-type and P-type transistors of gates TG.sub.11 to TG.sub.16.
    Type: Grant
    Filed: May 29, 1991
    Date of Patent: September 1, 1992
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Deugsoo Chang
  • Patent number: 5132999
    Abstract: An X-ray imaging system includes an vacuum tube, which is biased by a high voltage power supply connected to the tube by two shielded cables. The cables collectively have a plurality of conductors which are coupled at one end to the high voltage power supply. The other end of each conductor is coupled to a component of the vacuum tube by a separate inductor. During a voltage breakdown of the vacuum tube, the inductors depress electrical current flow between the anode and the cathode of the tube to reduce the erosion of tube components which results from the discharge. This current is in part due to the energy stored in the cable, which is not depressed by conventional current limiting circuits in the high voltage power supply. Voltage limiting devices connected to the tube prevent ringing in the cables from generating excessively high voltage levels.
    Type: Grant
    Filed: January 30, 1991
    Date of Patent: July 21, 1992
    Assignee: General Electric Company
    Inventor: William F. Wirth
  • Patent number: 5124872
    Abstract: A high tension circuit breaker comprising at least one circuit-breaking chamber and, in parallel with the circuit-breaking chamber, firstly a varistor in series with an interrupter, and secondly a tension-distributing capacitor. The circuit breaker has a linear resistor having a resistance lying in the range range 30 ohms to 300 ohms inserted in series with the varistor. The invention is particularly suitable for reactance circuit breakers.
    Type: Grant
    Filed: November 21, 1990
    Date of Patent: June 23, 1992
    Assignee: GEC Alsthom SA
    Inventors: Van Doan Pham, Joseph Martin, Robert Deville
  • Patent number: 5124877
    Abstract: In one embodiment, the threshold voltage of the electrostatic protection circuit is selectively raised above the power supply voltage by the inclusion of a plurality of serially connected diodes connected between the power supply voltage and a discharge reference rail. The serially connected diodes become forward biased when a voltage applied to the rail is above the power supply voltage by a voltage equal to the sum of the various voltage drops across the serially connected diodes.The various input pads of the integrated circuit are connected to an anode of an associated diode, wherein the cathode of the associated diode is connected to the discharge reference rail, rather than directly to V.sub.DD as in the prior art. The anodes of each of these diodes are also connected to the device to be protected within the integrated circuit.
    Type: Grant
    Filed: July 18, 1989
    Date of Patent: June 23, 1992
    Assignee: Gazelle Microcircuits, Inc.
    Inventor: Andrew C. Graham
  • Patent number: 5124873
    Abstract: A surge suppression circuit for use in a high frequency communication network, having a primary line and a ground line, includes a gas tube connected between the primary line and ground line, a bi-directional avalanche diode and one or more ferrite beads connected in series between the primary line and ground line, and a metal oxide varistor connected in series in the primary line.
    Type: Grant
    Filed: October 30, 1989
    Date of Patent: June 23, 1992
    Assignee: EFI Corporation
    Inventors: John M. Wheeler, Michael F. Stringfellow
  • Patent number: 5121281
    Abstract: The invention relates to a circuit breaker for limiting a direct current and comprising a combination of first means including superconducting windings for limiting the current and second means for interrupting the residual current. The invention is applicable to interrupting high tension direct currents.
    Type: Grant
    Filed: December 10, 1990
    Date of Patent: June 9, 1992
    Assignee: GEC Alsthom SA
    Inventors: Van Doan Pham, Michel Collet, Mohamed Bekhaled, Thierry Verhaege
  • Patent number: 5101313
    Abstract: A system for preventing voltage drops when a load circuit is connected and preventing arcing when a load is disconnected from an energized bus includes a current limit device and low impedance shunt that bypasses the current limit device when activated. The system activates the low impedance shunt only after a load capacitance is charged when the load is connected and deactivates the low impedance shunt prior to disconnecting the load.
    Type: Grant
    Filed: November 22, 1989
    Date of Patent: March 31, 1992
    Assignee: Tandem Computers Incorporated
    Inventors: Joseph S. Neilson, Donald J. Tighe
  • Patent number: 5086365
    Abstract: For electrostatic-discharge-protection, a first transistor is configured with the transistor channel connected between circuit ground and an associated (input or output) pad. In addition, transistors(s) are included configured to "float" the gate and/or the well of the first transistor when no power supply potential (Vcc) is present and to couple to circuit ground (or the power supply potential) the gate and/or the well of the first transistor when the normal power supply potential (Vcc) is present.
    Type: Grant
    Filed: May 8, 1990
    Date of Patent: February 4, 1992
    Assignee: Integrated Device Technology, Inc.
    Inventor: Cheun-Der Lien
  • Patent number: 5083232
    Abstract: A fault current limiter according to the invention comprises a contact device (K) to the contacts of which is connected a resistor/inductor combination comprising a series connection of a first (R1) and a second (R2) resistor as well as a third resistor/inductor (R3) connected in parallel with the series-connected resistors. The second resistor consists of a resistor with superconducting properties, dimensioned such that the change from superconducting to normally-conducting state occurs when the critical current density of the resistor is attained.
    Type: Grant
    Filed: February 4, 1991
    Date of Patent: January 21, 1992
    Assignee: Asea Brown Boveri AB
    Inventors: Nils-Johan Bergsjo, Birger Drugge, Lars Liljestrand, Emile Schreurs
  • Patent number: 5077675
    Abstract: A power sequencer for connecting a system to an electrical power supply without powering down the system and without damage to the system or the power supply. A plurality of sequentially engageable contacts are coupled to the power supply for receiving power signals. The contacts are spatially positioned to toggle in a predetermined sequence during engagement. A controller is coupled to the contacts, for supplying a terminal signal to the load in response to the predetermined sequence of toggling of the contacts and in response to the power signals. The controller has a control circuit for generating a control signal which varies in response to the sequence, and a regulator, coupled to the control circuit, for regulating the terminal signal in response to the control signal.
    Type: Grant
    Filed: October 4, 1989
    Date of Patent: December 31, 1991
    Assignee: Amdahl Corporation
    Inventor: Kam T. Tam
  • Patent number: 5073837
    Abstract: There is disclosed a low voltage protection circuit for preventing overdischarging in a back-up battery. The circuit includes: switching a device which supplies voltage to the load and being connected in series between the battery and load; a charging device which charges the battery by being connected in parallel to the switching device; a first control device which determines the different operation-starting and operation-terminating voltage of the battery and, at the same time, controls the "on" and "off" of the switching device by being connected in parallel to the input terminal of the battery; and a second control device which generates hysteresis voltage between the operation-starting and operation-terminating voltage by supplying the voltage which determines the operation-terminating voltage to the first control device.
    Type: Grant
    Filed: August 10, 1989
    Date of Patent: December 17, 1991
    Assignee: SamSung Electronics Co., Ltd.
    Inventor: Hoon-Kee Baek
  • Patent number: 5073839
    Abstract: The proposed invention provides a single fusing device for both 115VAC and 230VAC line voltages, a panel mounted fuse holder and a method for simultaneously selecting the proper fusing element and line voltage.This invention consists of a dual element AC fuse were the proper fusing element is selected simultaneuously with the required line voltage by a Double Pole Double Throw (DPDT) switch as shown in FIG. 3.The invention offers a distinct advantage to all manufacturers of electrical/electronics consumer products, systems and instrumentation both in the U.S. and abroad.
    Type: Grant
    Filed: July 27, 1989
    Date of Patent: December 17, 1991
    Inventor: H. C. Yallon
  • Patent number: 5063472
    Abstract: Device for detecting the quenching of part a superconducting element comprising two identical superconducting conductors electrically connected in parallel is provided with means (104, 105, 109, 110) of detecting a difference in intensity or phase between the currents flowing in the conductors. An application to a superconducting current limiter is described.
    Type: Grant
    Filed: April 2, 1990
    Date of Patent: November 5, 1991
    Assignee: GEC Alsthom SA
    Inventors: Pham van Doan, Jean-Pierre Dupraz, Alain Fevrier
  • Patent number: 5051860
    Abstract: An electrostatic discharge protection circuit employing an extended resistive structure having bimodal resistance characteristics in series with an input/output buffer circuit and an input/output electrical contact pad on an integrated circuit. The extended resistive structure is integrally formed with the device or devices in the buffer circuit most susceptible to damage due to ESD breakdown effects. In a first resistance mode during normal circuit operations, the resistor has a low resistance value and introduces virtually no additional load to the input/output buffer circuitry. In a second mode of operation during ESD discharge, the resistor has a second significantly higher resistance which reduces current values during the ESD event thereby protecting the buffer circuit. Thick oxide snap-back device is also employed to provide a parallel ESD discharge path with low power dissipation.
    Type: Grant
    Filed: May 12, 1989
    Date of Patent: September 24, 1991
    Assignee: Western Digital Corporation
    Inventors: Kowk Fai V. Lee, Alan Lee, Melvin L. Marmet, Kenneth W. Ouyang
  • Patent number: 5040088
    Abstract: An electric motor controller comprises a circuit for selecting between driving and braking an electric motor in accordance with the health or otherwise of a pair of main electric motor control switches (14 and 16). In a preferred embodiment the health of the switch is determined by the voltage (A) between the switches. The controller also comprises apparatus for detecting the sense of movement of the motor. In the event that the motor is moving in a sense opposite to that selected, the apparatus increase field current to reduce the armature current thereby increasing the braking effect of the motor. Also in the controller are apparatus for changing from armature to field current control and vice versa, in response to a given magnitude of control signal. In order to provide an unambiguous change-over, a lockout circuit is provided to inhibit change-over in a transition region. The lockout circuit maintains the mode of control to above/beneath the change-over level when changing from one level to another.
    Type: Grant
    Filed: October 17, 1990
    Date of Patent: August 13, 1991
    Assignee: Chloride Group Public Limited Company
    Inventors: Christopher A. Harrington, Dennis M. Jones
  • Patent number: 5038245
    Abstract: A method and apparatus for suppressing electrical transient signals, occurring on power lines, includes a clamping circuit for switching from a high impedance to a low impedance at a certain switching voltage, to suppress the transient signals. A first blocking circuit inhibits the clamping circuit from switching to maintain it at its high impedance during normal line voltage, and permits the clamping circuit to switch to its low impedance for clamping purposes responsive to an initial portion of a transient signal for initial suppression purposes. A second blocking circuit has a second low impedance, which is substantially lower than said first low impedance of the first blocking circuit, for inhibiting substantially the first blocking circuit from continuing to dissipate the transient signal following the initial time period, and for permitting the clamping circuit to suppress the transient signal following the initial time period.
    Type: Grant
    Filed: September 15, 1989
    Date of Patent: August 6, 1991
    Inventor: Lennart Gronskog
  • Patent number: 5034845
    Abstract: An LSI includes two internal circuits connected to different power sources, and conventional static electricity protection circuits, provided for connecting input terminals of the internal circuit connected to one power source and for connecting output terminals of the other internal circuit connected to the other power source. The LSI further includes two static electricity protection circuits each having an enhancement type field effect N channel MOS transistor provided for connecting the power source and the other power source. Thus, a potential rise or a potential fall on one input/output terminal of the internal circuit connected to the power source, which has static electricity applied with respect to the other power source as a reference, is transmitted to one of the new static electricity protection circuits through the conventional static electricity protection circuits connected to the above input/output terminal.
    Type: Grant
    Filed: October 19, 1989
    Date of Patent: July 23, 1991
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yukichi Murakami
  • Patent number: 5030844
    Abstract: A DC power switch (10) for a capacitive load (11) has a main transistor (Q1) in series with the load between positive and negative DC bus terminals (B.sup.+, B.sup.-). A secondary transistor (Q2) and a resistor (R.sub.1) are connected in series and this series connection is connected in parallel to the main transistor (Q1). A control circuit (20; 50) is connected to the main and secondary transistors (Q1, Q2) and controls them. In response to an enable signal (26), the secondary transistor (Q2) is initially turned on such that it and the resistor provide the initial charging current for the capacitor load (11) and subsequently the secondary transistor is turned off and the main transistor is turned on such that it provides the subsequent current required by the load. This configuration minimizes the power dissipation ratings required for the transistors while balancing this requirement with the relative rapid providing of charging current for the capacitive load.
    Type: Grant
    Filed: June 25, 1990
    Date of Patent: July 9, 1991
    Assignee: Motorola, Inc.
    Inventors: Edward Li, John E. Herrmann
  • Patent number: 5029038
    Abstract: A dual resistance connector system is provided to allow the replacement of power regulators in a computer system without removing power from the operating voltage bus. The new power regulator can be "hot plugged" into the voltage bus without creating a voltage drop on the bus which could lead to voltage transients and logic errors. The low resistance bus bar is augmented by a retractable high resistance contact. The high resistance contact is configured to make electrical connection with the operating voltage bus before the low resistance contact. The establishment of a high resistance circuit allows charging of output filter capacitors without creating a large voltage drop on the operating voltage bus. As installation continues, the low resistance bus bar makes contact and is held in position by a fastener. The fastener is initially held out of electrical contact by a compression spring.
    Type: Grant
    Filed: September 4, 1990
    Date of Patent: July 2, 1991
    Assignee: International Business Machines Corporation
    Inventors: Kevin R. Covi, Donald P. Rearick
  • Patent number: 5027252
    Abstract: A semiconductor input protection device is disclosed which comprises a well type punch-through transistor consisting of a pair of parallel-opposed well layers through intermediation of a field oxide film, one of which is connected to an input terminal and the other to a reference potential. The device further comprises an impurity diffusion layer resistance with an end thereof connected to the input terminal. The lower limit distance between the opposed sides of the well layers to each other and the channel stopper is set to be smaller than that between the channel stopper and the input terminal-side well layer in the area where the latter and the impurity diffusion layer resistance intersect. The two lower limit distances depend on punch-through voltage, the width of the depletion layer in the well layer at applied punch-through voltage, and the junction disruptive strength of the well layer.
    Type: Grant
    Filed: October 12, 1990
    Date of Patent: June 25, 1991
    Assignee: NEC Corporation
    Inventor: Ryuji Yamamura
  • Patent number: 5027250
    Abstract: An electronic circuit with a protection device against fluctuations in the supply battery voltage, being of a type which comprises a MOS power transistor connected between one pole of the battery and an electric load for driving said load to ground, further comprises a pair of Zener diodes connected to each other in a push-pull configuration, between said pole and the gate electrode of the power transistor.
    Type: Grant
    Filed: June 23, 1989
    Date of Patent: June 25, 1991
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Carlo Cini, Bruno Murari
  • Patent number: 5014156
    Abstract: To protect an encapsulated fuse (9) within a wholly enclosed sealed safety barrier having a first voltage limiting circuit (10) and a current limiting circuit (15), an externally accessible high current interrupter (5), such as a fuse, positive temperature coefficient resistor (26) or circuit breaker (27) is connected in series with an input terminal, and further serially connected with a second voltage limiting circuit (6) connected downstream of the interrupter and across the safety barrier circuit, the second voltage limiting circuit having a voltage limiting response characteristic which is, preferably, the same as the first voltage limiting circuit within the barrier, and the interrupter having a response threshold which is at least as high, but may be higher than the fuse (9) encapsulated within the circuit.
    Type: Grant
    Filed: August 31, 1989
    Date of Patent: May 7, 1991
    Assignee: R. Stahl Schaltgerate GmbH
    Inventors: Peter Bruch, Anton Schimmele
  • Patent number: 5010293
    Abstract: An inrush current limiting circuit in accordance with the principles of the present invention limits initial current flow to a highly initially reactive power load. The current limiting circuit comprises a plug in connection to a power source and two conductor paths leading from the plug in connection. A power FET has a source element to drain element path in series with one of the conductor paths and has a gate connection. A bipolar transistor is connected to shunt the gate element of the power FET to the potential at its source element when the bipolar transistor is conducting, thereby to limit the current passing through the power FET. A sense resistor is in series with one of the conductor paths for controlling a base element of the bipolar transistor to cause it to conduct when current through the sense resistor exceeds a predetermined amount.
    Type: Grant
    Filed: November 20, 1989
    Date of Patent: April 23, 1991
    Assignee: Raynet Corporation
    Inventor: William F. Ellersick
  • Patent number: 5008912
    Abstract: An X-ray imaging system includes an X-ray tube, which is biased by a high voltage power supply connected to the tube by one or two shielded cables which have a characteristic impedance. The cables are coupled to the X-ray tube by a resistance which is substantially equal to the characteristic impedance when a single cable is used or to twice the characteristic impedance when two cables are used. During a breakdown of the X-ray tube, the resistance depresses electrical current flow between the anode and the cathode of the tube. This current is in part due to the energy stored in the cable, which is not depressed by conventional current limiting circuits in the high voltage power supply.
    Type: Grant
    Filed: October 5, 1989
    Date of Patent: April 16, 1991
    Assignee: General Electric Company
    Inventors: George A. Farrall, Steven D. Hansen
  • Patent number: 4999731
    Abstract: A surge protector, particularly for protecting components in a telecommunications system, has a thin ceramic substrate on a surface of which is formed a surge protection resistor having a serpentine path extending over the substrate, the width of the path and the distance between adjacent path lengths being relatively narrow. Resistance trimming means are provided, positioned such that there is a substantially isothermal heat distribution over the substrate under surge conditions.
    Type: Grant
    Filed: April 13, 1990
    Date of Patent: March 12, 1991
    Assignee: Northern Telecom Limited
    Inventors: David K. Bender, Richard R. Lathrop, Jr.
  • Patent number: 4994932
    Abstract: A superconducting current limiting apparatus includes a first container, a superconducting current limiting element accommodated in the first container, a refrigerant filling the first container for cooling the superconducting current limiting element accommodated in the first container, a second container for accommodating the first container in such a manner that the first container is heat insulated, and a conductor for connecting the superconducting current limiting element to an external power supply system. Such a superconducting current limiting apparatus can be used to limit a short-circuit current. It can be incorporated in a short circuit controlling superconducting system.
    Type: Grant
    Filed: January 26, 1990
    Date of Patent: February 19, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaru Okamoto, Hitoshi Mizoguchi, Masayuki Ishikawa, Hisatoshi Ikeda, Katsumi Suzuki, Susumu Nishiwaki, Tsuneharu Teranishi, Satoru Yanabu, Tsutomu Fujioka
  • Patent number: 4990802
    Abstract: An integrated circuit obtains improved protection of output buffers against damage from electrostatic discharge (ESD). Each output buffer is connected to its bondpad by means of a resistor, and protective clamping diodes are disposed around the periphery of the bondpad. It has been found that a suitably sized resistor allows the protective diodes to discharge an ESD event before damage to the buffer occurs, by reducing current flow through the buffer, without significantly limiting performance.
    Type: Grant
    Filed: June 19, 1990
    Date of Patent: February 5, 1991
    Assignee: AT&T Bell Laboratories
    Inventor: Yehuda Smooha
  • Patent number: 4987512
    Abstract: A solid state circuit protector is comprised of a coil winding, a latching type Hall effect device, and a solid state switching network including an NPN bipolar junction transistor with a current limiting resistor. Other types of solid state switches can be employed instead of or in addition to the bipolar junction transistor.
    Type: Grant
    Filed: March 6, 1989
    Date of Patent: January 22, 1991
    Assignee: Inresco, Inc.
    Inventor: James P. Mulshine
  • Patent number: 4982306
    Abstract: In a method and device for limiting the starting current of a DC converter, at least one buffer capacitor is initially charged through a load resistor. The current going through the load resistor is measured with a monitor. The monitor switches on a DC converter and bridges the load resistor once a switching threshold is reached. A predetermined minimum current is used as the switching threshold.
    Type: Grant
    Filed: September 20, 1988
    Date of Patent: January 1, 1991
    Assignee: Siemens Aktiengesellschaft
    Inventors: Adam-Istvan Koroncai, Alexander Lechner
  • Patent number: 4977476
    Abstract: There is described a semiconductor switch device having two semiconductor components, the first component receiving drive signals from the second. The first component contains either a single power bipolar switch element for single ended control of the energization of a load or a bridge of such elements enabling energization of a load with different polarities. The switch elements, which may be transistors or darlington multiple transistors, have voltage dropping means connected in the leads to their control bases, so that the drive signals from the second component can be produced by low impedance connection to one or other supply connductor, thereby keeping the power dissipation of the second component to a low value. The voltage dropping means may be a series resistor or a constant current circuit.
    Type: Grant
    Filed: March 4, 1988
    Date of Patent: December 11, 1990
    Assignee: Texas Instruments Incorporated
    Inventors: Andrew Marshall, Derek Colman, Philip J. Cavanagh, David P. Dale
  • Patent number: 4973937
    Abstract: A multipurpose electrical shunt, formed from an integral body of material, includes a first and second electrical connectors spaced apart for mating with a first terminal of a main circuit breaker and a first terminal of a branch circuit breaker. The shunt further includes an electrically resistive material integrally connected to the first and second electrical connectors for providing a voltage drop thereacross proportional to the current flowing therethrough and first and second output terminals extending beyond the resistive material for connection to a current sensing means such as an electrical meter. The shunt provides a current carrying conductor connecting a main circuit breaker to the branch circuit breaker and further provides sensing of the current flow between the main circuit breaker and the branch circuit breaker.
    Type: Grant
    Filed: April 19, 1989
    Date of Patent: November 27, 1990
    Inventors: Barnet Weinstein, Ralph A. Naylor
  • Patent number: 4969062
    Abstract: The output terminals (15, 16) of an analog sensor (14) are monitored by a microprocessor (17). The microprocessor is DC coupled to a main analog ground terminal (16) of the sensor, while also separately being connected to a main power ground terminal (13) at which ground reference potential is provided to the microprocessor. A resistor (38), a semiconductor switch (36) and a printed circuit board metalization trace (35) provide a normal low resistance connection between the main analog sensor ground terminals (20) and the main power ground terminal (13). Current sensing circuitry (33) limits the current passed through the low resistance connection and thereby prevents excessive current from damaging printed circuit board metalization paths (34, 35) connecting the sensor analog ground terminal (16) to the main power ground terminal (13).
    Type: Grant
    Filed: May 30, 1989
    Date of Patent: November 6, 1990
    Assignee: Motorola, Inc.
    Inventors: Jeffery T. Barylak, Mark X. Stavropoulos, Brian R. Kemper
  • Patent number: RE34107
    Abstract: A gate drive circuit for an insulated gate bipolar transistor initially drives the gate to a first voltage potential which causes the transistor to partially turn on. A sensor detects when the transistor saturates at which point the gate drive voltage is increased to increase the conductivity of the transistor and reduce its saturation voltage drop. If, however, a load coupled to the transistor is short circuited, the transistor will never reach saturation and will remain partially turned on at a point where it has increased short circuit current handling capability. In addition, once the transistor has been fully turned on, should a short circuit load condition occur, the transistor will drop out of saturation causing the drive circuit to reduce the gate voltage to increase the short circuit current handling capability of the transistor.
    Type: Grant
    Filed: January 30, 1991
    Date of Patent: October 20, 1992
    Assignee: General Electric Company
    Inventor: William F. Wirth
  • Patent number: RE34159
    Abstract: An electric motor controller comprises a circuit for selecting between driving and braking an electric motor in accordance with the health or otherwise of a pair of main electric motor control switches (14 and 16). In a preferred embodiment the health of the switch is determined by the voltage (A) between the switches. The controller also comprises apparatus for detecting the sense of movement of the motor. In the event that the motor is moving in a sense opposite to that selected, the apparatus increase field current to reduce the armature current thereby increasing the braking effect of the motor. Also in the controller are apparatus for changing from armature to field current control and vice versa, in response to a given magnitude of control signal. In order to provide an unambiguous change-over, a lockout circuit is provided to inhibit change-over in a transition region. The lockout circuit maintains the mode of control to above/beneath the change-over level when changing from one level to another.
    Type: Grant
    Filed: February 28, 1992
    Date of Patent: January 12, 1993
    Assignee: Chloride Group Public Limited Co.
    Inventors: Christopher A. Harrington, Dennis M. Jones