Impedance Insertion Patents (Class 361/58)
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Patent number: 6078488Abstract: A current source circuit includes a variable impedance circuit coupling the returns of dual-floating power sources, and is configured to limit maximum current output in the event of fault and facilitate detection thereof. The first power source powers the current loop using its source, with the current loop returning through the second power source's return. Control circuitry detects an increase in current beyond the predetermined maximum and appropriately increases the impedance between the first and second power sources returns to limit current provided to the current output to the predetermined maximum. This amount of current is detected by, for example, analog to digital conversion and the fault can thereby be appropriately signaled.Type: GrantFiled: October 28, 1998Date of Patent: June 20, 2000Assignee: The Foxboro CompanyInventor: Allan R. Gunion
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Patent number: 6072678Abstract: A short-circuit protection circuit for a switching output having a non-self-protected field-effect transistor to whose control electrode a control voltage can be supplied via an input. A series circuit comprising a timer, a switch-off release stage and a switch-off stage is provided at the control electrode of the non-self-protected semiconductor switch.Type: GrantFiled: August 6, 1998Date of Patent: June 6, 2000Assignee: Mannesmann VDO AGInventor: Martin Degen
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Patent number: 6069781Abstract: Suppression of transient voltage surges in an electrical power-carrying line is achieved by a voltage surge suppressor having a capacitor, varistor, and gas tube connected in parallel between the line and a current carrying conductor. The invention is effective for suppressing transient voltage surges more reliably, efficiently, and safely than is possible using primary arrestors or serially connected varistors in accordance with conventional technology. The invention may be adapted for use on medium voltage lines carrying either single-phase or three-phase electrical power.Type: GrantFiled: June 17, 1998Date of Patent: May 30, 2000Assignee: Maxi Volt Corporation, Inc.Inventors: Mark W. Wingate, F. Bryant Hawkes
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Patent number: 6069782Abstract: A circuit for protecting the internal circuitry of a semiconductor chip from increased power supply voltages due to electrostatic discharge events is presented. The circuit comprises a trigger circuit including a resistor and diode array coupled between a power line and a ground line and a discharge circuit which, when turned on by an output signal of the trigger circuit, conducts the excess charge on the power line to ground.Type: GrantFiled: August 26, 1998Date of Patent: May 30, 2000Assignee: Integrated Device Technology, Inc.Inventors: Chuen-Der Lien, Tak Kwong Wong, Tzong-Kwang Yeh
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Patent number: 6067217Abstract: A current limiter used for stable control of an electric power system, and particularly applied to a high voltage of the electric power system, has a reduced voltage for suppressing the overcurrent of the electric power system. The current limiter is not enlarged so that the current limiter secures the insulation of the voltage withstanding level, and the current limiter is easy to be introduced to the system. A limiting device is inserted between a low potential terminal of a winding of a star-connection of a three-phase transformer that has at least one winding of the star-connection and a ground point.Type: GrantFiled: February 3, 1999Date of Patent: May 23, 2000Assignee: Hitachi, Ltd.Inventors: Junzo Kida, Hiroshi Arita
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Patent number: 6061219Abstract: Device for the protection of an electrical load. A branch (4) connects an input terminal (1) to an output terminal (2). The branch includes in series:a channel of a first transistor (10) of the "normally on" type anda channel of a second transistor (20) of the "normally on" type of a second conductivity type. A gate (10g) of the first transistor (10) is connected to the output terminal (2) and a gate (20g) of the second transistor (20) is connected to the input terminal (1) by means of a third "normally on" transistor (30) of the first conductivity type. A gate (30g) is connected to a node (6) between the channels of the first and second transistors. The device has application to the protection of electronic components.Type: GrantFiled: July 10, 1998Date of Patent: May 9, 2000Assignee: Commissariat A L'Energie AtomiqueInventor: Benoit Giffard
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Patent number: 6061223Abstract: An apparatus and method for protecting hardware devices using a spiral inductor. The surge suppressor protects hardware devices from electric surges by isolating the radio frequency from an inner conductor. The surge suppressor includes a housing, an inner conductor, a surge blocking device, and a spiral inductor. The surge blocking device is inserted in series with the hardware devices for blocking the flow of electrical energy therethrough. The spiral inductor is coupled to the surge blocking device and is shunted to ground for discharging the electrical surge.Type: GrantFiled: March 18, 1998Date of Patent: May 9, 2000Assignee: PolyPhaser CorporationInventors: Jonathan L. Jones, Richard C. Dunning, Ted K. Kulbieda
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Patent number: 6061220Abstract: A power switching circuit is provided, which automatically performs the necessary power switching, and by which the power specifications of external devices in a network can be uniformly determined. The power switching circuit comprises, for each external device, (i) a first diode for transmitting the power from the main device to the network, and for preventing power from reversely flowing from the network to the main device; (ii) a second diode for transmitting power from the external device to the main device, and for preventing power from reversely flowing from the main device to the external device; and (iii) a port for physically connecting the main device and the external device. The connection between the external devices is maintained regardless of the state of the power of the main device.Type: GrantFiled: June 9, 1999Date of Patent: May 9, 2000Assignee: NEC CorporationInventors: Takeshi Ohmori, Kenji Oguma
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Patent number: 6061218Abstract: An overvoltage protection device (40) and a method for increasing the overvoltage current the device can carry. The overvoltage protection device (40) includes a Silicon Controlled Rectifier (SCR) (11) and an SCR enhance circuit (42). The SCR enhance circuit (42) provides the SCR (11) with an additional low resistance path to increase the amount of overvoltage shunt current the SCR (11) carries during an overvoltage event.Type: GrantFiled: October 3, 1997Date of Patent: May 9, 2000Assignee: Motorola, Inc.Inventors: Richard T. Ida, Daniel L. Ziegler, Robert O. Wagner
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Patent number: 6058002Abstract: A common mode signal attenuator includes a magnetic core, and a communications cable having at least one conductor adapted to transmit a communications signal. The communications cable is magnetically coupled to the core to form an inductive element having a magnetic flux path passing through the core. The inductive element has a volt-time capacity of at least about 0.0001 volt-seconds.An electrical transient suppression system includes an electronic device having a ground path, a communications cable, and a magnetic core. The communications cable has at least one conductor adapted to transmit a communications signal and is connected to the electronic device. The communications cable is magnetically coupled to the core to form a common mode signal attenuator having an inductance of about at least 10 times the inductance of the ground path.A method for reducing electrical transients in a communications cable includes magnetically coupling the communications cable to a magnetic core.Type: GrantFiled: July 28, 1997Date of Patent: May 2, 2000Assignee: Emerson Electric Co.Inventors: C. Peter Rau, Glenn E. Wilson
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Patent number: 6057996Abstract: A leakage current alarming/blocking apparatus using an antiphase transformer for detecting the leakage of current from an electric appliance.Type: GrantFiled: November 19, 1998Date of Patent: May 2, 2000Assignee: Dong Yang Hi-Tec Co., Ltd.Inventor: JungMoo Kim
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Patent number: 6057577Abstract: The present invention relate to a device of protection against voltage gradients of a monolithic component including a vertical MOS power transistor and logic circuits. The protection circuit has an N-type substrate corresponding to the drain of the MOS transistor, and logic components being realized in at least one P-type well formed in the upper surface of the substrate. Each of the N-type regions connected to the ground of the logic circuit, or to a node of low impedance with respect to the ground, is in series with a resistor.Type: GrantFiled: May 27, 1998Date of Patent: May 2, 2000Assignee: STMicroelectronics S.A.Inventors: Jean Barret, Antoine Pavlin, Pietro Fichera
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Patent number: 6049446Abstract: Electrical modules which incorporate multiple state input circuitry limit the in-rush current thereto when electrical energy is initially applied. The input circuitry exhibits a high impedance and subsequently a very low impedance state. When electrical energy is first applied, the high impedance state limits the in-rush current to an acceptable predetermined maximum value. Subsequently, in response to either elapsed time or an electrical parameter such as current flow, the circuit switches to a low impedance state which results in its having no material effect on the operation of the module. The module can incorporate a visual alarm indicating output device, an audible alarm indicating output device or both. The output indicating devices can be synchronized by applied control signals. The output devices can be controlled independently by means of either pulse width modulated control signals or by means of patterns of control pulses.Type: GrantFiled: June 4, 1997Date of Patent: April 11, 2000Assignee: Pittway CorporationInventors: Simon Ha, Andy Chud
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Patent number: 6049447Abstract: A device for limiting overload currents using a semiconductor element with at least one controllable semiconductor having an electron source (source), an electron acceptor (drain) and a control electrode (gate) controlling the electron flow, which device has characteristic curves typical of a field-effect transistor (FET). In the case of alternating voltage, two FETs are connected in series, in complementary fashion. Arrangement is provided for internally obtaining the control voltage required for driving the semiconductor element from at least part of the load current and/or from at least part of the voltage drop across the semiconductor element.Type: GrantFiled: August 4, 1998Date of Patent: April 11, 2000Assignee: Siemens AGInventors: Helmut Roesch, Hermann Zierhut
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Patent number: 6043969Abstract: Electrostatic discharge (ESD) protection is provided for NMOS pull up transistors 700A-H and 702A-H of a 5.0 volt compatible output buffer using 2.5 volt process transistors. The ESD protection includes ballast resistors 701A-H and 703A-H separating individual pairs of NMOS pull up transistors 700A-H and 702A-H from the pad and from a power supply connection NV3. The ballast resistors enable turn on of additional pairs of NMOS pull up transistors after a first pair, such as 700A,702A turns on during an ESD event to prevent secondary breakdown in the first NMOS pair. Pairs of NMOS pull up transistors are used to prevent voltages across individual NMOS transistors from exceeding a 2.7 volt maximum while still enabling the transistors to provide 5.0 volts to the pad.Type: GrantFiled: July 13, 1998Date of Patent: March 28, 2000Assignee: Vantis CorporationInventor: Bradley A. Sharpe-Geisler
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Patent number: 6043965Abstract: A circuit having reverse battery protection includes a combination of an electrical load and an N-channel MOSFET inversely coupled in series with the load. The gate of the MOSFET is coupled to the high potential side of the electrical load. The series combination is powered by a DC voltage source. Positive polarity voltages enhance the MOSFET and provide for low loss conduction thus completing the series circuit whereas negative polarity voltages bias the MOSFET off thus providing a DC block by way of the intrinsic diode of the inversely coupled MOSFET. Gate to source voltage may be limited or controlled to prevent damage due to punch through effects at high positive voltages and to ensure turn-off of the MOSFET at negative polarity voltages.Type: GrantFiled: February 26, 1998Date of Patent: March 28, 2000Assignee: General Motors CorporationInventors: Lawrence Dean Hazelton, Lance Ronald Strayer
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Patent number: 6043968Abstract: An inverter is connected between an external GND terminal and a drain of an internal circuit such that the drain of the internal circuit is not directly connected to the external GND terminal. As a result, even when the input of a transfer gate of the internal circuit is to be at a GND level, it is possible to prevent any current flowing to VDD from the drain of a p-type transistor through a well and to prevent electrons from flowing into an external power supply potential VDD terminal from the drain of an n-type transistor. Thus, the internal circuit can be protected from ESD even when static electricity is applied to an external power supply terminal or GND terminal.Type: GrantFiled: June 18, 1998Date of Patent: March 28, 2000Assignee: NEC CorporationInventor: Tadashi Haruki
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Patent number: 6038117Abstract: A power switching apparatus is disclosed which has an electrical conductor to which high voltage can be applied. A series of circuits formed by a switching point and a current-limiting element which contains PTC thermistors and varistors is arranged in the cable run of the electrical conductor. An apparatus for operating the switching point interacts with the current-limiting element. The current-limiting element has n (where n is a natural number greater than 1) series-connected parallel circuits each having at least one PTC thermistor and at least one varistor connected in parallel with it. A current sensor arranged in the cable run of the electrical conductor or those connections of one of the PTC thermistors and of the varistor connected in parallel with it which are interconnected at two junction points in one of the parallel circuits are operatively connected to the input of the operating apparatus.Type: GrantFiled: December 31, 1997Date of Patent: March 14, 2000Assignee: ABB Research Ltd.Inventors: Edgar Dullni, Joachim Glatz Reichenbach, Jan Kuhlefelt, Ruzica Loitzl, Zdenek Pelanek, J.o slashed.rgen Skindh.o slashed.j, Ralph Strumpler
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Patent number: 6034855Abstract: A circuit is described which maintains the current flowing toward a main circuit within a prescribed limit, regardless of instantaneous voltage or current changes. The circuit includes elements that maintain the current flow in a path toward a main circuit within a prescribed limit by selectively changing the impedance presented in response to any instantaneous change in the voltage flowing toward the main circuit and by introducing into the path a voltage which opposes any such instantaneous change in the current flowing toward the main circuit. Elements may also be provided to protect the main circuit by disconnecting same from a cable leading thereto after signals on the cable have been analyzed and a determination has been made that a signal outside of predetermined upper and lower limit values has been coupled to the cable, for example, from a high altitude electromagnetic pulse.Type: GrantFiled: May 30, 1997Date of Patent: March 7, 2000Assignee: Lucent Technologies Inc.Inventor: John Daniel Bishop
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Patent number: 6031352Abstract: A control apparatus controlling the operation of pulse width modulator for an electric clutch or electric motor in portable spray painting equipment having a pressure transducer for sensing the pressure, a manually adjustable pressure reference, a comparator type error detector, and a pressure deadband control for inserting a deadband in a pressure control loop with the deadband varying as the pressure reference varies. A fixed deadband is provided below a predetermined low pressure setting to avoid excessive cycling of the control apparatus during low pressure operation. The pulse width modulator control circuit includes compensation for improving input power factor. The clutch control includes an active alternative load circuit switched in when the alternator output voltage is above a predetermined value.Type: GrantFiled: May 10, 1996Date of Patent: February 29, 2000Assignee: Wagner Spray Tech CorporationInventor: Dennis A. Carlson
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Patent number: 6031704Abstract: A power line and a ground line of a bipolar transistor for the electrostatic protection are isolated from a power line and a ground line of an active transistor for data input and output. Also, a resistor is coupled between a power line and a ground line of an active transistor for data input and output, and another resistor is coupled between a pad and the active transistor. Accordingly, the active transistor for data input and output is operated as an internal circuit in the electrostatic protection test since main current flows toward the bipolar transistor. An electrostatic protection circuit according to the present invention uses a bipolar transistor for the electrostatic protection and uses an active transistor for data input and output as an internal circuit in order to increase transistor size. Accordingly, a rated current of a data input and output pad is satisfied as well as the data pin capacitance is reduced since the distance between a gate and a contact in an active transistor is decreased.Type: GrantFiled: June 26, 1998Date of Patent: February 29, 2000Assignee: Hyundai Electronics Industries Co., Ltd.Inventor: Jae Goan Jeong
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Punch down protection module providing both transient protection and longitudinal current protection
Patent number: 6031706Abstract: A single circuit protection module for protecting a first T/R pair that is electrically coupled to a punch down connection block from undesirable transients and longitudinal currents that appear on a second T/R pair that is electrically coupled to the punch down block and to the first T/R pair through the punch down block.Type: GrantFiled: July 16, 1998Date of Patent: February 29, 2000Assignee: Emerson Electric Co.Inventor: Robert E. Nabell -
Patent number: 6028417Abstract: An active digital voltage regulator circuit is a two terminal device that is connected in shunt to first and second power supply input lines. The active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during times when the parasitic inductances supplement the local power supply voltage. The active digital voltage regulator circuit uses the stored energy to supplement the local power supply voltage during times when the local power supply voltage starts to collapse, e.g., during periods when inductive losses are preventing the power supply from maintaining the local power supply voltage. Consequently, digital active voltage regulator circuit smooths the local power supply voltage by greatly ameliorating the ripple voltages associated with parasitic inductances and resistances. A control circuit within the regulator circuit is a combination of two self-biasing and off-set nulling power supply monitor circuits.Type: GrantFiled: June 27, 1997Date of Patent: February 22, 2000Assignee: Sun Microsystems, Inc.Inventors: Michael Anthony Ang, Alexander Dougald Taylor
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Patent number: 6025982Abstract: A weatherproof protector module for telecommunication circuits has wire insertion points that are arranged in lateral, forward and rearward symmetry about a single stuffer screw. The module contains J-shaped insulation displacement connectors (IDCs) with slits for engaging the wires. The symmetry of the module allows the screw to exert balanced forces in every direction as the wires engage the IDCs. The module also contains an insulative gel that is extruded around the wire contact locations when the wires are engaged. A wiper seal located each wire insertion point and a thixotropic gel prevent the expulsion of the insulative gel from the module after extrusion.Type: GrantFiled: October 1, 1998Date of Patent: February 15, 2000Assignee: Siecor Operations, LLCInventor: Boyd G. Brower
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Patent number: 6014302Abstract: A finger guard for use with an electronic device is provided for restricting physical access to a component of the electronic device having an uninsulated surface adapted to carry a voltage. The apparatus includes a housing which defines a first opening and which is adapted to mount to the electronic device so that the first opening permits passage of passive infrared energy and ambient light to the component. The apparatus further includes a projection arrangement, extending from the housing, which limits physical access to the surface of the component through the first opening, and defining a second opening through which the infrared energy can enter and pass through the first opening to the component. An electronic circuit can also be provided which limits current being provided to an uninsulated component, such as an infrared or ambient light detector of the electronic device, from a circuit of the electronic device.Type: GrantFiled: August 28, 1998Date of Patent: January 11, 2000Assignee: Hubbell IncorporatedInventors: Thomas J. Batko, Ward E. Strang, Christopher A. Carbone
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Patent number: 6014298Abstract: The protection circuit of the invention connects in series with an internal circuit between a first power source and a second power source. The protection circuit includes a switch which is connected with the internal circuit and one of the first power source and a second power source; and a delay circuit which connects with the switch. The switch which is controlled by the delay circuit is closed for providing a voltage to the internal circuit in normal operation mode, and is opened when an electrostatic stress occurs.Type: GrantFiled: April 27, 1998Date of Patent: January 11, 2000Assignee: Winbond Electronics CorporationInventor: Ta-Lee Yu
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Patent number: 6014300Abstract: A power source circuit includes switch for connecting and disconnecting a power source to and from a circuit proper; stabilizing means for suppressing a variation of an input voltage to stabilize the input voltage; voltage increasing means for increasing the input voltage in amplitude; switching means for controlling a voltage increasing operation; rectifying means for rectifying a switching waveform; smoothing means for smoothing a rectified waveform; and control means for controlling an output voltage to be constant in amplitude. In the power source circuit, the start of operating the power source circuit is delayed behind the start of supplying electric power. Therefore, it is prevent a power source circuit from failing to operate under the condition that a power source of a large internal resistance is coupled thereto, and the rush current, for example, causes the power source voltage drop.Type: GrantFiled: June 9, 1998Date of Patent: January 11, 2000Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Koichi Yamashita, Hiroaki Sugiura, Tetsuya Kuno, Narihiro Matoba
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Patent number: 6012114Abstract: A computer system has a connector and a circuit card that is inserted in the connector. A mechanism that is associated with the connector and the card has a state for indicating when the card is secured to the connector. A controller of the computer system is configured to monitor the state and provide an indication when the state changes. A processor of the computer system is configured to determine when software of the computer system is interacting with the connector and based on the determining and the indication, regulating interaction of the computer system with the card.Type: GrantFiled: June 30, 1997Date of Patent: January 4, 2000Assignee: Compaq Computer CorporationInventors: Jeffrey S. Autor, Daniel J. Zink
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Patent number: 6005756Abstract: A circuit for grounding a signal at a first frequency and at a second frequency. The circuit includes a first capacitor and an inductor in series and a second capacitor in parallel with the first capacitor and inductor. The first capacitor is series resonant at the first frequency and the second capacitor is series resonant at the second frequency. The inductance of the inductor is selected so the combination of the packaging inductance of the first capacitor and the inductor parallel resonants with the second capacitor at a frequency lower than the second frequency and higher than the first frequency, where the second frequency is greater than the first frequency. The grounding circuit may be used to provide a second input to a balanced RF mixer where the RF mixer receives a RF signal at the second frequency at a first input and generates an IF signal at the first frequency.Type: GrantFiled: November 25, 1997Date of Patent: December 21, 1999Assignee: Uniden San Diego Research & Development Center, Inc.Inventor: Mark Lane
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Patent number: 6002564Abstract: An overcurrent protection thick-film resistor device and overcurrent protection circuit employing the same are provided. Overcurrent (e.g., surge current) flows into the overcurrent protection circuit due to electrical shorting between external cables and power lines in communication networks. The thick-film resistor suppresses sparks due to such overcurrent, which would otherwise negatively affect peripheral parts or components disposed around the overcurrent protection circuit. This function is achieved by providing a thick-film resistor having an elongated meander or spiral shape, and also having a width-reduced section at one location of the thick-film resistor. Any sparks will predictably occur at this width-reduced section. A casing or other spark-dampening mechanism can be disposed selectively around the width-reduced section of the thick-film resistor.Type: GrantFiled: December 2, 1997Date of Patent: December 14, 1999Assignee: Murata Manufacturing Co., Ltd.Inventor: Masashi Ohtsuchi
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Patent number: 6002566Abstract: An overcurrent protective circuit includes a N-type depletion mode FET, a P-type depletion mode FET, and a switch. The sources of the N-type depletion mode FET and the P-type depletion mode FET are connected to each other. The gate of the N-type depletion mode FET is connected through a resistor to the drain of the P-type depletion mode FET. The gate of the P-type depletion mode FET is connected through a resistor to the drain of the N-type depletion mode FET. The drain of the N-type depletion mode FET is a positive external terminal of the circuit, while the drain of P-type depletion mode FET is a negative external terminal of the circuit. A switch electrically connects and disconnects between the gate of the N-type depletion mode FET and the gate of the P-type depletion mode FET.Type: GrantFiled: July 16, 1998Date of Patent: December 14, 1999Assignee: SOC CorporationInventors: Hiroo Arikawa, Masaya Maruo
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Method and apparatus for limiting current in a direct voltage network of a power transmission system
Patent number: 5999388Abstract: Apparatus and method for limiting current in a direct voltage network of a HVDC power distribution system. A direct voltage network is connected to an alternating voltage network through a VSC-converter. At least one parallel connection including a semiconductor switching element is connected in series with the direct voltage network. A surge diverter is connected in parallel with the semiconductor switching element. During a high current condition in the direct voltage network, the switching element is switched off interrupting the current flow which is then diverted through the surge diverter which reduces the current flowing in the direct voltage network. By inserting a plurality of parallel connections, and selectively turning off a number of the semiconductor switching elements, a number of different levels of over current conditions in the direct voltage network may be controlled.Type: GrantFiled: September 16, 1997Date of Patent: December 7, 1999Assignee: Asea Brown Boveri ABInventor: Gunnar Asplund -
Patent number: 5999387Abstract: A device for limiting overload currents by means of a semiconductor element with at least one controllable semiconductor having an electron source (source), an electron acceptor (drain) and a control electrode (gate) controlling the electron flow, which device has characteristic curves typical of a field-effect transistor (FET). In the case of alternating voltage, two FETs are connected in series, in complementary fashion. Means are provided for internally obtaining the control voltage required for driving the semiconductor element from at least part of the load current and/or from at least part of the voltage drop across the semiconductor element.Type: GrantFiled: July 8, 1996Date of Patent: December 7, 1999Assignee: Siemens AktiengesellschaftInventors: Helmut Roesch, Hermann Zierhut
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Patent number: 5995392Abstract: A current limiter for a rectifier circuit includes a fixed resistor 50 and a positive temperature coefficient (PTC) resistor 100 connected in series across a control switch 70. The control switch is connected between a rectifier output and a smoothing capacitor 20. If the switch fails to operate, the PTC resistor heats up, increasing its resistance in the presence of an abnormal current. The increased resistance will limit the current supplied to the rectifier output terminals 40.Type: GrantFiled: December 5, 1997Date of Patent: November 30, 1999Assignee: Switched Reluctance Drives LimitedInventor: Michael James Turner
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Patent number: 5986864Abstract: A voltage variable capacitor (VVC) is made by placing an intercalation compound between two electrodes of a capacitor. The VVC has a reservoir of an intercalant in proximity with the intercalation compound. The two materials are chosen from those known to exhibit the intercalation reaction. The extent of the intercalation reaction is controlled by applying a voltage to the intercalant reservoir and the intercalation compound. A variable capacitor is created by applying a signal to the device and appropriately controlling the .epsilon. of the device by using the input control voltages.Type: GrantFiled: May 14, 1998Date of Patent: November 16, 1999Assignee: Motorola, Inc.Inventor: James Lynn Davis
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Patent number: 5973897Abstract: An electrostatic discharge (ESD) protection circuit with reduced high frequency signal distortion includes an additional input shunting diode and a voltage follower amplifier. This second diode and the original input shunting diode are connected in series between the circuit node to be protected and circuit ground so as to limit the voltage level at such node during an ESD event. The voltage follower amplifier maintains a substantially constant voltage across this second diode, thereby maintaining a substantially constant diode junction capacitance. Hence, with the introduction of this additional, serially connected junction capacitance of the second diode, the nonlinear input capacitance responsible for input signal distortion is reduced, plus with a substantially constant diode junction capacitance due to the use of the voltage follower amplifier, such reduced capacitance remains substantially more constant over variations in the input signal voltage.Type: GrantFiled: July 9, 1997Date of Patent: October 26, 1999Assignee: National Semiconductor CorporationInventors: Ion E. Opris, Joseph Biran
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Patent number: 5973896Abstract: An apparatus and method for electrical shock protection and electrical arc fault protection in an electrical distribution system. The invention consists of a current interrupting circuit that impedes electrical current flow during short time intervals in each half cycle of an AC source. If a shock hazard or electrical arc fault condition occurs during this short time interval, it results in current flow that is sensed at a load center, causing a circuit interrupter to open and preventing current flow to the distribution system for a period of time as short as one half cycle. When the fault is removed, that event is detected within one half cycle and power is restored to the load thus implementing an automatic reset. The invention is well suited for the retrofit of existing electrical distribution systems using the existing wiring.Type: GrantFiled: November 26, 1996Date of Patent: October 26, 1999Assignee: David C. NemirInventors: Stanley S. Hirsh, David C. Nemir
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Patent number: 5973419Abstract: This apparatus and method controls and limits the flow of in-rush current and maintains a supply voltage to a peripheral device during power surges. The apparatus and method essentially isolate and limit in-rush current flow to an in-rush circuit comprising a capacitive load and series resistor connected directly to the power bus at one end and to a reference potential at the other end. A switching device is coupled to the series resistor. A current sensing circuit is coupled to the series resistor. During initial start-up or "hot plugging" of the device, a control circuit turns "off" the switching device causing the load to be charged from the power bus through the resistive device for a pre-selected time interval, after which the switching circuit is turned "on" to bypass the resistive device and connect the load and the peripheral device to the power bus.Type: GrantFiled: August 5, 1998Date of Patent: October 26, 1999Assignee: International Business Machines CorporationInventors: Robert William Kruppa, Jeffrey Paul Rutigliano
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Patent number: 5969928Abstract: A method for determining the resistance of a shunt for use with a current limiting device that exhibits PTC characteristics to protect an electrical circuit. The method comprises steps for determining maximum and minimum resistance values based on operating criteria and component characteristics and selecting resistance values that fall within selected ranges.Type: GrantFiled: December 3, 1997Date of Patent: October 19, 1999Assignee: Gould Electronics Inc.Inventors: Masato Hashimoto, William R. Crider, Alan F. Wilkinson, Jr., Robert Wilkins, Arnav Mukherjee
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Patent number: 5968083Abstract: An active overload detection and protection circuit for protecting a host device (e.g., an implantable cardiac therapy device) from potential damage due to high voltage transients applied to an I/O node thereof. The protection circuit includes an I/O circuit coupled to the I/O node, the I/O circuit having low-impedance and high-impedance modes, a current overload detection circuit coupled to the I/O circuit which detects a current overload condition induced by a high voltage transient, and which generates an overload detect signal in response, and, a mode changing circuit which changes the mode of the I/O circuit from the low-impedance mode to the high-impedance mode in response to the overload detect signal. The protection circuit further includes a reset circuit which generates a reset signal a prescribed time after the overload detect signal is generated, wherein the mode changing circuit is responsive to the reset signal to change the mode of the I/O circuit.Type: GrantFiled: November 12, 1997Date of Patent: October 19, 1999Assignee: Pacesetter, Inc.Inventors: Timothy E. Ciciarelli, Stephen T. Archer
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Patent number: 5951660Abstract: A current control interface arrangement includes a card circuit and a connector means. The connector means is adapted to generate, from the supply voltage terminals, an enable signal which is directly correlated to the moment of insertion or extraction of the load from the power supply. The card circuit includes an active device to be coupled between a power supply terminal and a load, an enable controlled switch for delivering the correct voltage to the control terminal of the active device for turning on, respectively turning off this device and a time constant means for controlling the rate at which the active device is further rendered conductive. A very simple power supply sequencing apparatus including the current control interface arrangement allows for coupling a plurality of supply voltages to a card in descending order starting from the highest supply voltage to the lowest supply voltage.Type: GrantFiled: December 10, 1997Date of Patent: September 14, 1999Assignee: Alcatel Alsthom Compagnie Generale d'ElectriciteInventor: Geert Arthur Edith Van Wonterghem
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Patent number: 5946175Abstract: To protect an input buffer from gate-oxide breakdown failure during an ESD/EOS event, an inventive secondary protection circuit is disclosed. In one embodiment, the protection circuit includes a first switch terminal connected to a pad, a second switch terminal connected to the buffer of an internal circuit, a control terminal, and an RC circuit connected between the control terminal and the supply voltage Vcc. The RC circuit delays a propagation of an ESD/EOS voltage from Vcc to the control terminal, so as to delay a generation of a conductive path between the first and second switch terminals until the ESD/EOS event lapses.Type: GrantFiled: February 17, 1998Date of Patent: August 31, 1999Assignee: Winbond Electronics Corp.Inventor: Ta-Lee Yu
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Patent number: 5943200Abstract: For use in a boost converter having a main boost switch, a boost inductor, a boost diode coupled to the boost inductor and the main boost switch and a resonant, passive snubber coupled to the boost inductor and the main boost switch that limits reverse recovery currents in the boost diode during a turn-on of the main boost switch, a peak voltage clamping circuit for, and method of, reducing voltage stress on the main boost switch caused by operation of the snubber. In one embodiment, the circuit includes a blocking switch and a zener diode, coupled in series between the main boost switch and the boost diode, that cooperate to provide a conductive path from the main boost switch to an output of the boost converter for electrical currents that exceed a predetermined peak voltage value thereby to reduce the voltage stress on the main boost switch.Type: GrantFiled: January 6, 1998Date of Patent: August 24, 1999Assignee: Lucent Technologies Inc.Inventor: Jin He
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Patent number: 5939968Abstract: An electrical apparatus comprising first and second PTC elements composed of a polymer composition with conductive particles dispersed therein, an insulating body, and first and second conductive terminals. Flexible conductive members having a first end that can be electrically connected to a source of electrical power and a second end that is adapted to receive and make electrical contact with the apparatus are provided. The PTC element and the insulating body are positioned between the first and second conductive terminals so that when the apparatus is inserted between the flexible conductive members, the members exert a pressure on the insulating body.Type: GrantFiled: September 15, 1998Date of Patent: August 17, 1999Assignee: Littelfuse, Inc.Inventors: Thinh Nguyen, Anthony Minervini
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Patent number: 5933311Abstract: A circuit breaker including a switch having an open and a closed position connected to a line of the circuit breaker. A first actuating device, actuated by a first activating signal, is connected to the switch to move the switch from the closed position to the open position wherein the flow of electric current in the line is interrupted. A positive temperature coefficient resistivity element (PTC element) is tripped at least once wherein the tolerance of the PTC element is reduced and the PTC element is connected to the first actuating device for providing the first activating signal. In another embodiment of the present invention, a second actuating device, actuated by a second activating signal provided by the circuit breaker current, is connected to the switch to move the switch from the closed position to the open position wherein the flow of electric current in the line is interrupted.Type: GrantFiled: April 2, 1998Date of Patent: August 3, 1999Assignee: Square D CompanyInventors: William W. Chen, Brett E. Larson
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Patent number: 5930095Abstract: A superconducting current limiting device protects an electric circuit from a fault current. The device comprises a magnetically saturable core having saturated and non-saturated states and an input coil for electrically coupling the core to the electric circuit, the input coil drawing a current therethrough so that a magnetic flux is generated in the core due to the current. Further, the core includes a main path for drawing the generated magnetic flux and at least two magnetic paths, a first of the magnetic paths drawing a first portion of the magnetic flux, and a second of the magnetic paths drawing a second portion of the magnetic flux and having a damping element for cancelling at least a fraction of the second portion of the magnetic flux to thereby prevent the core from getting into the saturated state.Type: GrantFiled: September 4, 1998Date of Patent: July 27, 1999Assignees: Back Joo, Min-Seok JooInventors: Back Joo, Min-Seok Joo, Tae-Kuk Ko
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Patent number: 5930093Abstract: A method and apparatus for limiting the fault current in a portable welding gun comprising a power circuit, the power circuit comprising a circuit breaker and an isolation contactor, the isolation contactor in series with the circuit breaker, the fault current limited by providing a safety circuit, the safety circuit comprising a safety circuit comprising two resistor/relay pairs, the resistor and the relay of each pair in series with each other and each pair in parallel with a contact of said contactor, the resistors sized to limit the fault current in the power circuit to less than 50 ma.Type: GrantFiled: August 17, 1996Date of Patent: July 27, 1999Assignee: Chrysler CorporationInventor: Thomas Morrissett
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Patent number: 5911050Abstract: A multiple supply voltage peripheral component interconnect (PCI) connector is disclosed which replaces connectors that are keyed for a specific signaling voltage. A single connector receives all current types of PCI keyed card edge connectors and supplies the correct signaling voltage thereto. The type of PCI card is identified and the appropriate signaling voltage is switched to the signaling power input (Vio) using industry standard conditions at selected pin locations rather than using unique keying of cards and connectors to assure a match between the signaling voltage required by the card and the signaling voltage supplied at the connector. As shown, detection and control circuitry senses the presence of grounded or open conditions at selected pin locations indicative of the type card present in the connector and switches the signaling power supply to the correct voltage source.Type: GrantFiled: July 1, 1997Date of Patent: June 8, 1999Assignee: International Business Machines CorporationInventors: Patrick Kevin Egan, Jan Douglas Smid
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Patent number: 5909350Abstract: The present invention relates to a passive electronic component architecture employed in conjunction with various dielectric and combinations of dielectric materials to provide a differential and common mode filter for the suppression of electromagnetic emissions and surge protection. The architecture allows single or multiple components to be assembled within a single package such as an integrated circuit or connector. The component's architecture is dielectric independent and provides for integration of various electrical characteristics within a single component to perform the functions of filtering, fusing and surge suppression, alone or in combination.Type: GrantFiled: April 8, 1997Date of Patent: June 1, 1999Assignee: X2Y Attenuators, L.L.C.Inventor: Anthony A. Anthony
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Patent number: 5909065Abstract: A system for limiting power supply transients in a powered up backplane when a printed circuit (PC) board is plugged in. The PC board includes first connecting pins with different lengths connecting to precharge planes on the backplane where each sequentially longer pin length is connected to a precharge plane providing a sequentially lower voltage. The first connecting pins are further connected by precharge circuits to power planes on the PC board. The precharge circuits are configured to ramp current to minimize power supply transients. In one embodiment, the precharge circuits each include a transistor and RC circuit connecting each first connecting pin to a power plane on the PC board.Type: GrantFiled: December 23, 1997Date of Patent: June 1, 1999Assignee: DSC Telecom L.P.Inventors: James Jones, Jason W. Dove