Impedance Insertion Patents (Class 361/58)
  • Patent number: 6611408
    Abstract: The present invention relates to an electrical transformer which includes a primary winding coupled to first and second magnetic circuits. A magnetic flux is driven through the magnetic circuits by the primary winding. First and second secondary windings are also provided, each associated with a respective one of the magnetic circuits and being electrically connected together in series opposition. A closed superconducting fault current winding is also provided to link with the magnetic flux in the second magnetic circuit.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: August 26, 2003
    Assignee: Oxford Instruments PLC
    Inventors: Peter Hanley, Ian Leitch McDougall
  • Publication number: 20030156368
    Abstract: A method and apparatus are provided for controlling delivery of electrical power to a hot swappable device. In a system that accepts hot swappable devices, a sensing circuit is provided to detect the hot swappable device being inserted into the system. The sensing circuit provides a signal indicative of the hot swappable device being inserted and a controller blocks delivery of system voltage to the hot swappable device for a preselected duration of time.
    Type: Application
    Filed: November 2, 2001
    Publication date: August 21, 2003
    Inventor: Ricki D. Williams
  • Patent number: 6606011
    Abstract: The present invention is a component carrier (132) consisting of a plate of insulating material having a plurality of apertures (140) for accepting the leads of a thru-hole differential and common mode filter (130). Another embodiment consists of a surface mount component carrier (10) comprising a disk (16) of insulating material having a plurality of apertures (24). The same concept for the above described carrier is also incorporated into several alternate embodiments, either independently, embedded within electronic connectors. The overall configuration and electrical characteristics of the concepts underlying the present inventions are also described as an energy conditioning circuit assembly which encompasses the combination of differential and common mode filters and component carriers optimized for such filters.
    Type: Grant
    Filed: October 24, 2001
    Date of Patent: August 12, 2003
    Assignee: X2Y Attenuators, LLC
    Inventors: Anthony A. Anthony, William M. Anthony, Kenneth W. Musil
  • Publication number: 20030142449
    Abstract: A miniaturized cost-saving intermittent short circuit determining device located between a power source and an electric load in a vehicle electric circuit. The determining device includes detecting means for detecting current flowing through the electric circuit, determining means for determining whether the current detected by the detecting means is an intermittent short circuit, and disconnecting means for disconnecting the electric circuit when the determining means judges that there is an abnormality. The determining means is connected to an external switch circuit, which selectively supplies and stops current to the electric load of the electric circuit. The determining means determines whether the external switch circuit is switched on or off, and switches the disconnecting means on or off according to the determination.
    Type: Application
    Filed: January 25, 2002
    Publication date: July 31, 2003
    Inventors: Toshinori Iwata, Manabu Ohta
  • Patent number: 6597551
    Abstract: A polymer current limiting device is provided that has a wider operating temperature range and a lower thermal derating than conventional current limiting devices. The device may include pure lead (Pb) electrodes and a perfluoroalkoxy (PFA) polymer mixed with carbon black that achieve the wide temperature range and the low thermal derating.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: July 22, 2003
    Assignee: Huladyne Corporation
    Inventor: Michael B. Heaney
  • Patent number: 6597550
    Abstract: A high voltage integrated circuit (HVIC) chip with a resistor connected between the substrate of the chip and ground. The resistor substantially improves the handling of negative voltage spikes by limiting the current passing through the intrinsic diode of the chip when the diode conducts due to negative transients at the output node.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: July 22, 2003
    Assignee: International Rectifier Corporation
    Inventors: Christopher C. Chey, Marijana Vukicevic
  • Patent number: 6594128
    Abstract: The present invention relates to a passive electronic component architecture employed in conjunction with various dielectric and combinations of dielectric materials to provide one or more differential and common mode filters for the suppression of electromagnetic emissions and surge protection. The architecture allows single or multiple components to be assembled within a single package such as an integrated circuit or connector. The component's architecture is dielectric independent and provides for integration of various electrical characteristics within a single component to perform the functions of filtering, decoupling, fusing and surge suppression, alone or in combination.
    Type: Grant
    Filed: July 27, 2001
    Date of Patent: July 15, 2003
    Assignee: X2Y Attenuators, LLC
    Inventor: Anthony A. Anthony
  • Publication number: 20030123203
    Abstract: A high-impedance-insertion system suppresses load-produced electromagnetic noise from interfering into a power source by coupling the load to the power source through a switch. If the power source is an AC power source, the switch couples to the power source through a storage element and a rectifier, such that the switch is OFF (in the high impedance state) when the rectifier is reversed biased (or in a low impedance state). If the power source is a DC power source, the switch couples to the power source through a storage element and a second switch, such that the switch is OFF (in the high impedance state) when the second switch is ON (in the low impedance state).
    Type: Application
    Filed: May 31, 2002
    Publication date: July 3, 2003
    Inventors: Mark D. Telefus, Anatoly Shteynberg
  • Patent number: 6587322
    Abstract: A method and apparatus for manufacturing an electrostatic discharge protection device. A first gate structure for the electrostatic device is formed. A first lightly doped drain and a second lightly doped drain for the electrostatic discharge protection device is formed. A second gate structure for a data path transistor is formed. A third lightly doped drain and a fourth lightly doped drain for a data path transistor is formed, wherein the first lightly doped drain and the second lightly doped drain have a higher doping level relative to the third lightly doped drain and the fourth lightly doped drain.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: July 1, 2003
    Assignee: LSI Logic Corporation
    Inventor: Todd A. Randazzo
  • Patent number: 6587323
    Abstract: A circuit including a power supply plane, a ground supply plane, and a signal source that generates reference voltage signals and a first signal. The signal source includes a driver adapted to generate a first signal to the receiver, the first signal having a present and a previous voltage levels. The signal source also includes a low reference voltage generator and a high reference voltage generator, each producing a low reference voltage signal and a high reference voltage signal, respectively, from a low reference output and a high reference output, respectively. The high reference output and the low reference output are coupled to the ground plane and the power supply plane, respectively. The high reference voltage generator and the low reference generator are capable of communicating the high reference voltage signal and the low reference voltage signal to the receiver.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: July 1, 2003
    Assignee: Intel Corporation
    Inventor: Maynard C. Falconer
  • Patent number: 6583973
    Abstract: An interface device adapted to be connected between an electrical circuit and a monitor. The invention of a common terminal, “n” number of sensing terminals, “n” number of sensing impedances, and “n” number of load terminals. Each load terminal is in electrical communication with the common terminal through a separate sensing impedance. Each sensing impedance is substantially less than the aggregate electrical circuit load side impedance between the sensing impedance and ground when the invention is connected in series between the supply side and load side of the electrical circuit. Each load terminal is substantially the same electrical point as only one sensing terminal. In one embodiment, the invention incorporates various protective elements including: a supply side electrical circuit protective element; a load side electrical circuit protective element; and a monitor circuit protective element.
    Type: Grant
    Filed: April 30, 2000
    Date of Patent: June 24, 2003
    Assignee: Volvo Car Corporation
    Inventor: Juri Pärn
  • Patent number: 6583977
    Abstract: This invention includes a current limiting circuit comprised of an array of switch-fuse pairs. Switches are coupled in series with fuses to form fuse-switch pairs. The fuse switch pairs are coupled in parallel forming an equivalent fuse. A current censing circuit senses the current flowing in the equivalent fuse. When the current exceeds a predetermined threshold, the current sense circuit actuates a control circuit that clears the fuses by opening all the transistors save one. This forces the entire current through a single fuse, causing it to clear. Each fuse is cleared in similar fashion in much the same way that a zipper is opened one tooth at a time. In other words, under normal conditions, all switches are on and each fuse carries Ta/n amps, where Ta is the current rating of the fuse and n is the number of fuses. If all but one transistor is turned off, then Ta amps would flow through a single fuse. If the fuse were rated for 2Ta/n, the fuse would clear.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: June 24, 2003
    Assignee: Motorola, Inc.
    Inventor: John Wendell Oglesbee
  • Patent number: 6580591
    Abstract: An electrostatic discharge (ESD) switch circuit for an integrated circuit (IC) with multiple power inputs for improving pin-to-power isolation of the IC. The IC includes a plurality of positive power pins and a corresponding plurality of negative power pins. The IC also includes an ESD ring network with a high ESD bus and a low ESD bus. The IC further includes a control circuit indicating one of several operational modes. The ESD switch circuit includes a first switch circuit that couples the high ESD bus to a first positive power pin in a first operational mode and that couples the high ESD bus to a second positive power pin in a second operational mode. The ESD switch circuit further includes a second switch circuit that couples the low ESD bus to a first negative power pin in the first operational mode and that couples the low ESD bus to a second negative power pin in the second operational mode.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: June 17, 2003
    Assignee: Intersil Americas, Inc.
    Inventor: Patrick J. Landy
  • Patent number: 6580595
    Abstract: A predetermined amalgamation of electrodes formed or manufactured at least in part, by predetermined, sequential manufacturing operations into a balanced and shielding electrode structure. The balanced total electrode structure also uses a grouping of identically configured, and balanced positioned, shielding electrodes that are amalgamated in sequential combination with predetermined, complimentary balanced shielded electrodes groupings and other predetermined elements that are together, practicable to provide predetermined multiple energy conditioning functions operable upon portions of propagating energy as well simultaneously being operable to provide a common, voltage reference function operable for at least dynamic circuit operations.
    Type: Grant
    Filed: April 30, 2001
    Date of Patent: June 17, 2003
    Assignee: X2Y Attenuators, LLC
    Inventors: Anthony A. Anthony, William M. Anthony, James P. Muccioli
  • Publication number: 20030107859
    Abstract: An inrush current suppression circuit is installed between a DC voltage and a load with a parallel system capacitor. The inrush current suppression circuit includes a first current limiting circuit which includes a first resistor, a first controlled switch, and a second controlled switch. The inrush current suppression circuit further includes a second current limiting circuit which further includes a second resistor, a third controlled switch, and an energy-storing capacitor. The second current limiting circuit is electrically connected in parallel to the system capacitor, and the first current limiting circuit is electrically connected with the DC voltage and the second current limiting circuit. When the DC voltage is detected, the first controlled switch is conducted. When a voltage of two ends of the load reaches a first threshold value, the second controlled switch is conducted so as to bypass the first resistor.
    Type: Application
    Filed: March 14, 2002
    Publication date: June 12, 2003
    Applicant: Delta Electronics, Inc.
    Inventors: Kuang-Hua Pan, Chih-Ming Hsu
  • Patent number: 6576959
    Abstract: A semiconductor circuit for multi-voltage operation having built-in electrostatic discharge (ESD) protection is described, comprising a drain extended nMOS transistor and a pnpn silicon controlled rectifier (SCR) merged with the transistor so that a dual npn structure is created and both the source of the transistor and the cathode of the SCR are connected to electrical ground potential, forming a dual cathode, whereby the ESD protection is enhanced. The rectifier has a diffusion region, forming an abrupt junction, resistively coupled to the drain, whereby the electrical breakdown-to-substrate of the SCR can be triggered prior to the breakdown of the nMOS transistor drain. The SCR has anode and cathode regions spaced apart by semiconductor surface regions and insulating layers positioned over the surface regions with a thickness suitable for high voltage operation and ESD protection.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: June 10, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Keith E. Kunz, Charvaka Duvvury, Hisashi Shichijo
  • Patent number: 6577486
    Abstract: A stacked-type capacitor with a fuse function for breaking an abnormal current wherein internal electrodes of a same polarity stacked in a ceramic body are led out to an outer surface of the ceramic body through lead-out electrodes. The lead-out electrodes have end surfaces exposed in the outer surface of the ceramic body. A film electrode for fuse function is formed on the outer surface to overlie the end surfaces of the lead-out electrodes and to be connected to an external electrode formed on the ceramic body. The film electrode is made from metallic powder and/or metallo-organic compound paste. The paste can contain powder of glass forming elements.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: June 10, 2003
    Assignees: NEC Tokin Corporation, NEC Tokin Ceramics Corporation
    Inventors: Yukio Nishimiya, Syuji Aisawa, Shinji Ito, Masayuki Kurano
  • Publication number: 20030103302
    Abstract: A power supply rejection circuit and method thereof for capacitively-stored reference voltages is disclosed. The power supply rejection circuit generally comprises a comparison circuit for comparing a signal associated with a power supply such as, for example, a Wheatstone bridge configuration, to a stored reference voltage, such that the comparison circuit includes at least one existing capacitor therein. At least one additional capacitor can be then coupled to the comparison circuit, such that the additional capacitor creates a capacitively-coupled voltage divider. This capacitively-coupled voltage divider negates the first order effects of power supply noise in the system. This effect significantly reduces the effect of power supply noise and improves signal jitter associated with the comparison circuit during a comparison of the signal to the stored reference voltage utilizing the comparison circuit.
    Type: Application
    Filed: December 5, 2001
    Publication date: June 5, 2003
    Inventors: Perry A. Holman, Jason M. Chilcote
  • Publication number: 20030103303
    Abstract: An apparatus and method for optimizing power factor in single-phase home power electrical systems. Advantages associated with the achievement of this objective include reduced electrical consumption and cost and prolonged equipment life. A capacitor circuit is connected with a circuit breaker to the home main power panel. The correct capacitance to optimize the power factor is determined prior to installation of the apparatus.
    Type: Application
    Filed: November 14, 2002
    Publication date: June 5, 2003
    Inventors: Roger Dale Barnes, Lama Marcos
  • Publication number: 20030099074
    Abstract: An electronic device having first and second external pins; first and second pads connected to the first external pin by respective bonding wires; and third and fourth pads connected to the second external pin respective bonding wires, and to a first common line by respective resistors. By means of a circuit configuration of this type, the intactness of the bonding wires can easily be checked by carrying out a simple resistance measurement between the first and the second external pin.
    Type: Application
    Filed: January 2, 2003
    Publication date: May 29, 2003
    Applicant: STMicroelectronics S.r.l.
    Inventors: Filippo Marino, Salvatore Capici
  • Patent number: 6570750
    Abstract: A micromechanical electrical systems (MEMS) metallic micromachined multiple ported electrical switch receivable on the die of an integrated circuit and within the integrated circuit package for controlling radio frequency signal paths among a plurality of switch-enabled different path choices. The switch provides desirably small signal losses in both the switch open and switch closed conditions. The switch is primarily of the single pole multiple throw mechanical type with possible use as a single input pole, multiple output poles device and provision for grounding open nodes in the interest of limiting capacitance coupling across the switch in its open condition. Cantilever beam switch element suspension is included along with normally open and normally closed switch embodiments, electrostatic switch actuation and signal coupling through the closed switch by way of increased inter electrode capacitance coupling. Switch operation from direct current to a frequency above ten gigahertz is accommodated.
    Type: Grant
    Filed: April 19, 2000
    Date of Patent: May 27, 2003
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Mark C. Calcatera, Christopher D. Lesniak, Richard E. Strawser
  • Patent number: 6570505
    Abstract: In a light-emitting-diode lamp, there is provided an input impedance-changing circuit for establishing a low input impedance circuit when the light-emitting-diode lamp is missingline turned off. This input impedance-changing circuiting comprises Shunt circuit section, and a detector circuit section. The shunt circuit section includes a low impedance element and a controllable switching device connected in series. The detector circuit section detects turning off of the light-emitting-diode lamp and, in response to such detection, close the switching device to thereby cause electric current to flow through the shunt circuit section in order to simulate lower input impedance of the light-emitting-diode lamp. When the light-emitting-diode lamp replaces a conventional traffic signal incandescent lamp, the input impedance-changing circuitry prevents the conflict monitor of the already installed traffic-light lamp system to detect a high lamp impedance and accordingly a faulty lamp.
    Type: Grant
    Filed: December 30, 1997
    Date of Patent: May 27, 2003
    Assignee: Gelcore LLC
    Inventor: Martin Malenfant
  • Patent number: 6563684
    Abstract: An excess current interrupting structure comprising a conductive wire rod which generates heat by an excess current connected between a pair of electric conductors, a circumference of the conductive wire rod being covered with a resin with a thin coated layer formed in the vicinity of a path of the conductive wire rod.
    Type: Grant
    Filed: November 6, 2001
    Date of Patent: May 13, 2003
    Assignee: Omron Corporation
    Inventors: Naoyuki Kanamaru, Naoki Motoyama, Yoshinori Watajima, Takashi Fujimoto, Tetsuya Sawamura, Nobutamo Matsunaga, Kazutaka Yoshida, Shuichi Sugimoto, Hoshihisa Toki
  • Publication number: 20030086221
    Abstract: The present invention discloses an over-current protection apparatus for high voltage, which connects the ceramic current-sensing element and polymer current-sensing element in series to form a novel over-current protection apparatus. By the characteristic of the polymer current-sensing element having higher switching off speed, the invention first responds to the over-current by raising its temperature, and then the heat is thermally conducted through the adhesive layer to the ceramic current-sensing element, resulting in a voltage drop produced by the over-current partially or predominantly received by the ceramic current-sensing element. Thus, the over-current protection device of the invention not only can endure high voltage (>600V), but also will not exhibit a negative temperature coefficient phenomenon.
    Type: Application
    Filed: October 31, 2002
    Publication date: May 8, 2003
    Inventors: Edward Fu-Hua Chu, David Shau-Chew Wang, Yun-Ching Ma
  • Patent number: 6556406
    Abstract: A solid state relay has a first external connection terminal which is conductive with one end of a main switching element, and a second external connection terminal which is conductive with another end of the main switching element, and is used with a load and a power source connected in series between the external connection terminals. A third external connection terminal is disposed in the solid state relay. The third external connection terminal is connected to the second external connection terminal via a capacitor. The load and the power source are connected in series between the first external connection terminal and the second external connection terminal, and a node of the load and the power source is connected to the third external connection terminal, thereby allowing the resistance of the load and the electrostatic capacitance of the capacitor to constitute an RC filter circuit for preventing noise leakage.
    Type: Grant
    Filed: May 7, 2001
    Date of Patent: April 29, 2003
    Assignee: Omron Corporation
    Inventors: Nobutomo Matsunaga, Hiroshi Hashimoto, Yasuo Hayashi
  • Patent number: 6549389
    Abstract: A differential mode and common mode filtering arrangement (1—1, 1-2, 1-3A, 1-6) having a plurality of shielded electrodes (213, 215) and a plurality of shielding electrodes (204, 214, 269A, 269B).
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: April 15, 2003
    Assignee: X2Y Attenuators, LLC
    Inventors: Anthony A. Anthony, William M. Anthony
  • Patent number: 6538864
    Abstract: The protective circuit for an electronic device is located between a DC source (UV) and the circuit voltage input of the device (G). The protective circuit comprises the serial connection of a diode (DV) and a limiting resistor (RV). The series connected diode (DV) and the limiting resistor (RV) are connected and parallel with a control switch (S). A circuit voltage (UB, UA) of the device (G) is connected to a voltage monitoring element (W) which emits a switch signal (S) which closes the switch (S) when a determined minimum value of the circuit voltage (UB) is reached.
    Type: Grant
    Filed: October 15, 2001
    Date of Patent: March 25, 2003
    Assignee: Siemens AG Osterreich
    Inventor: Thomas Müllner
  • Patent number: 6535367
    Abstract: By way of summary, in the preferred form of the invention, the patch panel comprises a manually programmable device that incorporates shunts or dip switches that are readily accessible from the front panel of the device. In the patch panel construction of the invention, a multi-pin connector block is connected to a first circuit board that, in turn, is connected to a second circuit board via a cable connector, thus allowing the signal switching (normalizing) and grounding circuits of the respective jacks to be selectively altered from the front access panel of the device. By manually changing the shunt or dip switch configurations, the respective normalizing and grounding circuits can easily and simply be altered as may be desired without costly system interruption.
    Type: Grant
    Filed: June 13, 2000
    Date of Patent: March 18, 2003
    Assignee: Bittree Incorporated
    Inventors: Bryan J. Carpenter, Glen Garrard
  • Patent number: 6529358
    Abstract: This circuit is inserted between a terminal (RGB) and a line (LI). The signal of the input terminal (RGB) is applied to the base of a bipolar amplifier transistor (T2) mounted with a top load (LR1) and a bottom load (LR2). A series transistor (T1) mounted in series in the main signal path has its collector wired up as an electrode for receiving the input signal, its emitter feeds a line (LI), and its base is linked by a resistor to the collector of the second transistor.
    Type: Grant
    Filed: March 27, 2000
    Date of Patent: March 4, 2003
    Assignee: Siemens VDO Automotive AG
    Inventor: Norbert Boigues
  • Patent number: 6529354
    Abstract: Switching circuits including DC:DC converters of various topologies are provided with a soft-start mechanism that ensures safe start-up operation. The mechanism causes the converter switches to be driven such that on-impedance is increased during at least a portion of the time the switches are turned on. Increased on-impedance condition is invoked during power-up, and/or no-load or light-load condition. The increased on-impedance temporarily reduces output voltage and/or drive current provided by the converter.
    Type: Grant
    Filed: March 3, 2000
    Date of Patent: March 4, 2003
    Assignee: Switch Power, Inc.
    Inventors: Anatoly Shteynberg, Dimitry Goder
  • Patent number: 6528904
    Abstract: A hot swappable system is described. It included software controlled hot swapping operations which provided a graceful booting or power-down of the system. In the even of force insertion or extraction of the system blades, a set of hardware features (such as using different pin lengths in the connectors and dampening resistor) prevents these types of operations from damaging the system hardware or affecting the operation states of other blades within the system.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: March 4, 2003
    Assignee: Intel Corporation
    Inventor: Hong W. Wong
  • Patent number: 6525395
    Abstract: An inductor obtained by laminating a plurality of ceramic layers having an internal coil conductor, and a thermistor obtained by laminating a plurality of ceramic layers having internal electrodes and having a predetermined resistance-temperature characteristic are laminated via an intermediate insulating layer. Both ends of the internal coil conductor of the inductor and the internal electrodes of the thermistor are connected to a pair of external electrodes. Thus, the inductor and the thermistor are connected in parallel.
    Type: Grant
    Filed: October 17, 2000
    Date of Patent: February 25, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masahiko Kawase, Hidenobu Kimoto
  • Patent number: 6525915
    Abstract: Fieldbus is a digital, two-way communication link for remotely located sensors, controllers and actuators used in industrial applications. The fieldbus simultaneously carries a digital signal for communication with devices attached to the bus and DC power to operate those devices. Unless isolated from the fieldbus, the constant voltage DC power supply would prevent the propagation of the varying voltage of the digital communication signals on the fieldbus. An adaptive current source is provided between the output the constant voltage power supply and the fieldbus wiring to isolate the power supply. The adaptive current source can also be used to isolate the input of DC/DC voltage converters providing power to devices attached to the fieldbus.
    Type: Grant
    Filed: June 11, 1999
    Date of Patent: February 25, 2003
    Assignee: Relcom, Inc.
    Inventor: Maris Graube
  • Patent number: 6525916
    Abstract: An electronic device having first and second external pins; first and second pads connected to the first external pin by respective bonding wires; and third and fourth pads connected to the second external pin respective bonding wires, and to a first common line by respective resistors. By means of a circuit configuration of this type, the intactness of the bonding wires can easily be checked by carrying out a simple resistance measurement between the first and the second external pin.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: February 25, 2003
    Assignee: STMicroelectronics S.r.l.
    Inventors: Filippo Marino, Salvatore Capici
  • Patent number: 6522513
    Abstract: A back-electromotive force protection circuit that is able to protect circuit components other than a hard disc against the back-electromotive force generated in the hard disc. A back-electromotive force protection circuit includes a power source 10, a hard disc 20 having a positive side terminal connected via a connection line 22 to the positive side terminal of the power source 10 and having Ma negative side terminal connected via connection lines 24, 26 to the negative side terminal of the power source 10, a load 30 provided between the connection line 22 and the connection line 24 and a FET 40 for turning off the connection lines 24, 26 if no power is supplied from the power source 10.
    Type: Grant
    Filed: November 1, 1999
    Date of Patent: February 18, 2003
    Assignee: NEC Corporation
    Inventor: Akihiro Akiba
  • Publication number: 20030030952
    Abstract: A cPCI server system includes a plurality of printed circuit assemblies. A server management card coupled to the plurality of printed circuit assemblies monitors and manages operation of the server system. The server management card receives and stores status information from the plurality of printed circuit assemblies. A first LCD panel is mounted on the server system and is coupled to the server management card. The first LCD panel provides a user interface for configuring the server management card and accessing the stored status information from the server management card.
    Type: Application
    Filed: August 7, 2001
    Publication date: February 13, 2003
    Inventors: Thane M. Larson, Kirk Bresniker
  • Patent number: 6498708
    Abstract: A method and apparatus for mounting heat generating components on a printed circuit board. Components mounted on the printed circuit board that generate heat may alter the properties of the printed circuit board and allow the printed circuit board to conduct current. To stop the flow of current in the printed circuit board, a slot may be used between the mounting points of the component. The slot prevents current from flowing within the printed circuit board.
    Type: Grant
    Filed: May 27, 1999
    Date of Patent: December 24, 2002
    Assignee: Emerson Electric Co.
    Inventors: Walter Schilloff, Scot Bigelow, Glenn Wilson, Bryan Cole
  • Patent number: 6498710
    Abstract: The present invention relates to a passive electronic component architecture employed in conjunction with various dielectric and combinations of dielectric materials to provide one or more differential and common mode filters for the suppression of electromagnetic emissions and surge protection. The architecture allows single or multiple components to be assembled within a single package such as an integrated circuit or connector. The component's architecture is dielectric independent and provides for integration of various electrical characteristics within a single component to perform the functions of filtering, decoupling, fusing and surge suppression, alone or in combination.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: December 24, 2002
    Assignee: X2Y Attenuators, LLC
    Inventor: Anthony A. Anthony
  • Publication number: 20020191359
    Abstract: The invention relates to an inrush current protection circuit for a power supply. The power supply includes a rectification circuit coupled to a main body of the power supply through an energy-storage capacitor. The main body of the power supply is provided with a reference voltage, and the setup time of the reference voltage is greater than a threshold value. The inrush current protection circuit includes a current limiting resistor coupled between a negative terminal of the rectification circuit and a ground terminal of the energy-storage capacitor for preventing the generation of an inrush current the instant that the power supply is powered on, and a switch coupled in parallel with the current limiting resistor and which is controlled by the reference voltage. When the reference voltage is set up, the switch switches from an open state to a short state, so as to bypass the current limiting resistor.
    Type: Application
    Filed: March 6, 2002
    Publication date: December 19, 2002
    Inventor: Chin-Hou Chen
  • Patent number: 6492799
    Abstract: An electrical monitor circuit in which star points of taps on a first and a second side of a three-phase current limiting device are voltage compared. Possible applications are combinations with electrical switches, especially for power supplying and protecting circuits for electrical motors.
    Type: Grant
    Filed: February 14, 2001
    Date of Patent: December 10, 2002
    Assignee: ABB Research Ltd
    Inventors: Erkki Rajala, Ralf Strümpler, Timo Jokiniemi
  • Publication number: 20020176216
    Abstract: An inrush circuit for electronic devices is particularly useful for point-of-sale printers. The circuit applies an active feedback-controlled voltage ramp to a bulk capacitor by means of a P-channel field effect transistor that is operated linearly after a controlled delay for contact bounce.
    Type: Application
    Filed: January 29, 2001
    Publication date: November 28, 2002
    Inventors: James R. Del Signore II, Steven M. Spano, Randolph Bullock
  • Publication number: 20020176217
    Abstract: The present invention relates to an overload protector structure of an extension cord receptacle that mainly comprised a fire wire conducting plate of a switching unit (or a receptacle unit) connected with an overload protector in the extension cord receptacle to extend properly; the overload protector has a housing member, a power input plate exposed at the said housing member, a temperature sensing plate is fixedly connected to an inner end of the power input plate, the said overload protector further penetrates outward through a slot channel from a contact point, the fire wire conducting plate can fitly extend into the said slot channel and contacts with the contact point of the temperature sensing plate; thereby, the effectiveness of rapid connection and eliminating the soldering joint point is possessed between the overload protector and the switch unit (or the receptacle unit).
    Type: Application
    Filed: May 23, 2001
    Publication date: November 28, 2002
    Inventor: Chyong-yen Huang
  • Publication number: 20020176215
    Abstract: In a semiconductor protection circuit comprising a low speed protection circuit having an overcurrent detector for detecting an overcurrent of a predetermined switching element and turning off the semiconductor switching element following detection of the overcurrent, and a high speed protection circuit turning off the semiconductor switching element based on a voltage signal proportional to an output voltage of the semiconductor switching element, the high speed protection circuit includes a MOSFET having a drain connected to a gate of the semiconductor switching element, a diode having a cathode which is connected to a gate of the MOSFET, and a anode through which the voltage signal proportional to the output current from the semiconductor switching element is inputted to the diode, and a capacitor having one end connected to a cathode of the diode and a gate of the MOSFET.
    Type: Application
    Filed: October 30, 2001
    Publication date: November 28, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuaki Hiyama, Akihisa Yamamoto
  • Patent number: 6487058
    Abstract: A method for placing several electrical portions of an electrical component at substantially the same electrical potential includes identifying electrical conductors which lead to a first electrical portion and separate electrical conductors which lead to a second electrical portion. Indium metal is placed across the leads of the first electrical portion and the leads of the second electrical portion. An indium metal wire may be placed across the leads of the first electrical portion and the leads of the second electrical portion. A sheet of indium metal foil may also be placed across the leads of the first electrical portion and the leads of the second electrical portion. The indium metal, in either the wire form or the sheet form, is pressed across the leads of the first electrical portion and the leads of the second electrical portion. The indium metal material may be doped to porduce a static dissipative material.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: November 26, 2002
    Assignee: Seagate Technology LLC
    Inventor: John W. Dykes
  • Patent number: 6483685
    Abstract: An electrically-conductive and mechanically-compliant joint is formed between a pair of electrical components. The joint is positioned between a lower face of a first electrical component and an upper face of a second electrical component. The Young's modulus of the joint is less than approximately half that of the Young's modulus of the electrical components.
    Type: Grant
    Filed: May 25, 2000
    Date of Patent: November 19, 2002
    Assignee: McGraw Edison Company
    Inventors: Michael M. Ramarge, David P. Bailey, Thomas C. Hartman, Roger S. Perkins, Alan P. Yerges, Michael G. Scharrer, Lisa C. Sletson
  • Publication number: 20020167770
    Abstract: A protecting circuit against short-circuit of an output terminal of an AC adapter, includes a current output switching transistor in which a power source is connected to an emitter thereof and an output terminal is connected to a collector thereof, a first switching transistor which is turned on when a controlled constant-voltage is over an available range of a voltage difference between a voltage of said power source and an output voltage, a second switching transistor which is connected to be turned on when the first switching transistor is turned on, a switch control amplifier which controls a switching operation so that the current output switching transistor is turned off when a voltage of the power source is a predetermined voltage or less, and a constant-current control amplifier which controls a constant current when the second switching transistor is turned on and enters a protecting operation state.
    Type: Application
    Filed: February 4, 2002
    Publication date: November 14, 2002
    Inventors: Hiromi Kato, Yuji Yamanaka
  • Publication number: 20020154464
    Abstract: Protection and filtering functions are provided for external circuits by internal circuits that use controlled elements.
    Type: Application
    Filed: April 24, 2001
    Publication date: October 24, 2002
    Inventors: Patrizio Vinciarelli, Jay Prager
  • Publication number: 20020149892
    Abstract: A high precision, high efficiency controller for LED devices such as LED arrays includes a current limiter, driver and buffer.
    Type: Application
    Filed: April 12, 2001
    Publication date: October 17, 2002
    Inventor: Marion S. Williams
  • Patent number: 6466421
    Abstract: Disclosed are a solid electrolytic capacitor comprising a valve-acting metal, an oxide dielectric layer formed on a surface of the valve-acting metal and a solid electrolyte layer provided on the dielectric film layer, in which the electrically conducting polymer composition layer contains as a dopant at least one anion selected from (1) an alkoxy-substituted naphthalene monosulfonate anion, (2) a heterocyclic sulfonate anion, and (3) an anion of an aliphatic polycyclic compound or a combination thereof with another anion having a dopant ability and a method for producing such a solid electrolytic capacitor. The solid electrolytic capacitor of the invention is excellent in voltage resistance, high frequency property, tan &dgr;, leakage current, heat resistance (reflow property), etc.
    Type: Grant
    Filed: January 19, 2000
    Date of Patent: October 15, 2002
    Assignee: Showa Denko K.K.
    Inventors: Ryuji Monden, Atsushi Sakai, Toru Sawaguchi, Hideki Ohata, Koro Shirane, Hiroshi Konuma, Yuji Furuta, Katsuhiko Yamazaki, Yoshiaki Ikenoue
  • Patent number: 6462926
    Abstract: A low loss diode ORing circuit has a feed input connected in series with a diode/transistor parallel network and the ouput. Heat is generated by the transistor when the transistor is turned on. A thermally conductive material (such as a heatsink) can dissipate heat and transfer heat from the transistor to the diode. The generated heat is transferred to the diode via the heatsink. As a result of the increased temperature of the diode and the diode's own negative temperature coefficient on conduction voltage, the diode's characteristic conduction threshold is reduced and the diode begins to conduct and share the current load as the current increases, thus providing minimal power dissipation as the current is routed to an output. A comparator may be used to monitor a voltage difference between the voltage level on the feed input and a voltage level on the output.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: October 8, 2002
    Assignee: Nortel Networks Limited
    Inventors: Boris Zaretsky, Roger M. Goodner