Circuit Board Mounted Patents (Class 361/719)
  • Patent number: 10375833
    Abstract: An embodiment of an electronic device includes a circuit component (e.g., a transistor or other component) coupled to the top surface of a substrate. Encapsulation is formed over the substrate and the component. An opening in the encapsulation extends from the encapsulation top surface to a conductive feature on the top surface of the component. A conductive termination structure within the encapsulation opening extends from the conductive feature to the encapsulation top surface. The device also may include a second circuit physically coupled to the encapsulation top surface and electrically coupled to the component through the conductive termination structure. In an alternate embodiment, the conductive termination structure may be located in a trench in the encapsulation that extends between two circuits that are embedded within the encapsulation, where the conductive termination structure is configured to reduce electromagnetic coupling between the two circuits during device operation.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: August 6, 2019
    Assignee: NXP USA, Inc.
    Inventors: Lakshminarayan Viswanathan, Audel A. Sanchez, Fernando A. Santos, Jerry L. White
  • Patent number: 10334716
    Abstract: Exemplary embodiments are disclosed of multifunctional components for electronic devices. In an exemplary embodiment, a multifunctional component generally includes a base component, such as a smart phone case (e.g., a back cover, etc.), an inner plate (e.g., a screenplate, a mid-plate, etc.). A heat spreader may be disposed on the base component. Thermal interface material and electromagnetic interference shielding may be disposed on area(s) of the heat spreader. The area(s) may correspond in mirror image relation to component(s) of a circuit board with which the multifunctional component is configured to be joined. During operation of the electronic device, the multifunctional component may draw waste heat from one area and transfer/spread the waste heat to one or more other areas of the electronic device, which may increase a temperature of these one or more other areas. This, in turn, may make device temperature more uniform.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: June 25, 2019
    Assignee: Laird Technologies, Inc.
    Inventors: Jason L. Strader, Eugene Anthony Pruss
  • Patent number: 10253966
    Abstract: The LED construction of the invention simplifies the thermal path for heat by directly connecting the LED and the heatsink, removing the circuit board from the thermal path. This is accomplished by a heatsink boss that protrudes from the heat sink, through an opening in the circuit board, and contacting the LED.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: April 9, 2019
    Assignee: Aluminis, LLC
    Inventors: Glen Hanington, James Grady
  • Patent number: 10237943
    Abstract: A ring-shaped light-emitting heat-dissipating fan comprises a base having a ring-shaped frame and a pivot portion; a fan pivotally disposed at the pivot portion; a ring-shaped light guide having an upper top surface, a lower top surface, an inner lateral surface, and an outer lateral surface; a lid disposed on the ring-shaped frame, with the ring-shaped light guide disposed between the base and the lid, and a receiving space formed between the lid and the ring-shaped light guide; and a ring-shaped circuit board disposed on an upper top surface of the ring-shaped light guide in the receiving space and having thereon a plurality of light-emitting elements arranged annularly. Therefore, the ring-shaped flat region dispenses with any receiving recesses for receiving the light-emitting elements. The ring-shaped circuit board controls color of light emitted from the light-emitting elements and their light emission cycles.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: March 19, 2019
    Assignee: THERMALTAKE TECHNOLOGY CO., LTD.
    Inventor: Pei-Hsi Lin
  • Patent number: 10199365
    Abstract: According to one embodiment, a semiconductor module includes a first circuit component, a first connection member, and a first wire. The first circuit component includes a first substrate, a first conductive layer, a first switching device, and a first diode. The first substrate has an insulation property. The first connection member is provided on a first electrode of the first switching device and the fourth electrode of the first diode, and has a conductive property. The first wire connects the first conductive layer and the first connection member.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: February 5, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akiya Kimura, Tomohiro Iguchi, Akihiro Sasaki
  • Patent number: 10194563
    Abstract: An object of the present invention is to provide a power conversion device that suppresses a bypass flow and has superior heat dissipation performance. The power conversion device according to the present invention includes a power semiconductor module 300 and a flow channel formation body 1000 on which the power semiconductor module 300 is disposed. The power semiconductor module 300 has a high thermal conductor 920 which is disposed at a position between a semiconductor chip and the flow channel formation body 1000 and a sealing material that seals a power semiconductor element and the high thermal conductor 920. The high thermal conductor 920 has a fin protruding to the flow channel formation body 1000 at the side of the flow channel formation body 1000 and a part of the sealing material surrounding the fin and a leading edge of the fin are on almost the same plane.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: January 29, 2019
    Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD
    Inventors: Nobutake Tsuyuno, Eiichi Ide, Takeshi Tokuyama
  • Patent number: 10178757
    Abstract: A compartment EMI shield is provided that is suitable for use in system module packages having thin form factors and/or smaller widths and/or lengths. The compartment EMI shield comprises a fence arranged along a compartment boundary at least in between first and second sets of electrical components of the system module package and a substantially horizontal conductive structure that is coupled to the conductive fence. The fence being configured to attenuate EMI of a frequency of interest traveling in at least one of a first direction and a second direction, where the first direction is from the first set of electrical components toward the second set of electrical components and the second direction is from the second set of electrical components toward the first set of electrical components.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: January 8, 2019
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Ah Ron Lee, Deog Soon Choi, Young Ho Lee, Boon Keat Tan, Jin Ho Choi
  • Patent number: 10109591
    Abstract: An integrated shield electronic component package includes a substrate having an upper surface, a lower surface, and sides extending between the upper surface and the lower surface. An electronic component is mounted to the upper surface of the substrate. An integrated shield is mounted to the upper surface of the substrate and includes a side shielding portion directly adjacent to and covering the sides of the substrate. The integrated shield covers and provides an electromagnetic interference (EMI) shield for the electronic component, the upper surface and sides of substrate. Further, the integrated shield is integrated within the integrated shield electronic package. Thus, separate operations of mounting an electronic component package and then mounting a shield are avoided thus simplifying manufacturing and reducing overall assembly costs.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: October 23, 2018
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventors: Paul Mescher, Danny Brady
  • Patent number: 10090279
    Abstract: In a general aspect, an apparatus can include a first substrate operatively coupled with a second substrate. The apparatus can also include a power supply terminal assembly including a first power supply terminal aligned along a first plane, the first power supply terminal being electrically coupled with the first substrate. The power supply terminal assembly can also include a second power supply terminal aligned along a second plane, the second power supply terminal being electrically coupled with the second substrate. The power supply terminal assembly can further include a power supply terminal frame having an isolation portion disposed between the first power supply terminal and the second power supply terminal and a retention portion disposed around a portion of the first power supply terminal and disposed around a portion of the second power supply terminal.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: October 2, 2018
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Seungwon Im, Mankyo Jong, ByoungOk Lee, Joonseo Son, Oseob Jeon
  • Patent number: 10090234
    Abstract: Methods and systems for a semiconductor device package with a die to interposer wafer first bond are disclosed and may include bonding a plurality of semiconductor die comprising electronic devices to an interposer wafer, and applying an underfill material between the die and the interposer wafer. Methods and systems for a semiconductor device package with a die-to-packing substrate first bond are disclosed and may include bonding a first semiconductor die to a packaging substrate, applying an underfill material between the first semiconductor die and the packaging substrate, and bonding one or more additional die to the first semiconductor die. Methods and systems for a semiconductor device package with a die-to-die first bond are disclosed and may include bonding one or more semiconductor die comprising electronic devices to an interposer die.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: October 2, 2018
    Assignee: Amkor Technology, Inc.
    Inventors: Michael G. Kelly, Ronald Patrick Huemoeller, Won Chul Do, David Jon Hiner
  • Patent number: 10074586
    Abstract: A thermal dissipation device includes a main body and a support member. The main body has an upper surface, a lower surface opposite to the upper surface, and a lateral surface. The main body defines an injection hole extending through the main body, and includes an inner ring protruding from the upper surface and adjacent to the injection hole and an outer ring protruding from the upper surface and adjacent to the lateral surface. The support member connects to the lateral surface of the main body. An upper surface of the inner ring is higher than an upper surface of the outer ring. A first intersection point between the inner ring and the upper surface of the main body is higher than a second intersection point between the outer ring and the upper surface of the main body.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: September 11, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Pin Hung Chiu, Yu Li Chung, Shu Ling Su, Yi Tzu Lin
  • Patent number: 10034379
    Abstract: A stacked electronic structure is provided. The stacked electronic structure includes: a magnetic device, electronic devices, and a substrate. The substrate is disposed under the magnetic device. First and second electronic devices are disposed between a bottom surface of the magnetic device and a top surface of the substrate. The first and second electronic devices comprise first and third terminals, disposed on first and second surfaces thereof, respectively, electrically connected to the magnetic device without using the substrate. The first and second electronic devices also comprise second and fourth terminals, disposed on second and fourth surfaces thereof, respectively, electrically connected to the substrate.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: July 24, 2018
    Assignee: CYNTEC CO., LTD.
    Inventors: Chi-Feng Huang, Bau-Ru Lu, Da-Jung Chen
  • Patent number: 9936600
    Abstract: Disclosed herein is a motor drive unit. The motor drive unit includes a base part; a middle base part disposed above the base part; a heat discharging part mounted on the base part and disposed under the middle base part to slide on the middle base part, wherein an area in which the heat discharging part is installed is smaller than an area of the middle base part; and a power PCB part disposed above the middle base part, an EMC PCB part disposed above the power PCB part with a spacing; a control PCB part coupled with a side portion of the power PCB part; and a condenser unit penetrating the middle base part to be fixed to it, wherein a lower end of the condenser unit is disposed on a side of the heat discharging part.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: April 3, 2018
    Assignee: LSIS CO., LTD.
    Inventors: Dong-Sik Kim, Chun-Suk Yang
  • Patent number: 9917034
    Abstract: A method and an apparatus for cooling a semiconductor device. The method comprises the steps of contacting a surface of the semiconductor device with respective end portions of an array of contact elements thermally coupled to a cooling fluid, and disposing a flexible, heat conductive sheet between the respective end portions of the contact elements and the surface of the semiconductor device for transferring heat generated in the semiconductor device to the cooling fluid via the sheet and the contact elements.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: March 13, 2018
    Assignee: SEMICAPS PTE LTD
    Inventors: Choon Meng Chua, Lian Ser Koh, Sze Wei Choong
  • Patent number: 9907215
    Abstract: A power electronic subassembly having a housing and a capacitor arranged therein. The housing has an internally arranged cooling area, which is cooled by a cooling device integrated in the housing or an external cooling device. The capacitor has a contact device of a first polarity and a contact device of a second polarity and a capacitor busbar system. This capacitor busbar system comprises first and second sheet-like shaped metal bodies. The first metal body with the first contact device of the first polarity and the second metal body with the second contact device of the second polarity are electrically conductively connected. A first portion of the first metal body has a first subportion, which is arranged parallel to and at a distance from the cooling area, and a second subportion, which is in thermal contact with the cooling area, wherein the two subportions are connected by an intermediate portion.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: February 27, 2018
    Assignee: Semikron GmbH & Co., KG
    Inventors: Klaus Backhaus, Roland Bittner, Marco Lederer, Rainer Popp
  • Patent number: 9848512
    Abstract: Various embodiments described herein include systems, methods and/or devices used to dissipate heat generated by electronic components in an electronic system (e.g., a memory system including closely spaced memory modules). Specifically, a heat sink includes an attachment structure and a tab. The attachment structure defines a slot configured to receive an edge of a substrate and thermally couple to a ground plane of the substrate. The tab is located opposite to the slot, and is configured to slide into a card guide slot of an assembly rack, such that in use, heat generated by at least one electronic component on the substrate is at least partially transferred through the ground plane to the attachment structure to be dissipated.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: December 19, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: David A. Wright, David Dean, Robert W. Ellis
  • Patent number: 9839116
    Abstract: A circuit card assembly includes a heat sink, a locking mechanism, a first thermal path, and a second thermal path. The heat sink couples to a circuit board and has an upper surface and a lower surface. The heat sink has a channel extending downward along the upper surface of the heat sink. The locking mechanism is disposed within the channel and includes a plurality of solid wedges movably arranged within the channel. Movement of the wedges is effective to secure the circuit card assembly to a holder. The first thermal path extends from the circuit board through the heat sink to the lower surface of the heat sink and removes thermal energy from the circuit board. The second thermal path is formed from the circuit board, through the heat sink, and then through the wedges to the holder. The second thermal path removes thermal energy from the circuit board that is greater than a leakage amount.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: December 5, 2017
    Assignee: Abaco Systems, Inc.
    Inventors: Graham Charles Kirk, Zeshan Jabar Hussain
  • Patent number: 9793189
    Abstract: A printed wiring board assembly includes a first board including a first surface; a second board including a second surface and facing the first surface; a plurality of first electrodes formed on a bottom surface of a recess formed in one of the first and the second surfaces; a plurality of second electrodes formed on the one of the first surface and the second surface and positioned outside the recess; a plurality of first solders each coupled to a respective one of the plurality of first electrodes; and a plurality of second solders each coupled to a respective one of the plurality of second electrodes, wherein the plurality of first electrodes are formed at a larger pitch than a pitch at which the plurality of second electrodes are formed, and a size of each the plurality of first solders is larger than a size of the plurality of second solders.
    Type: Grant
    Filed: August 16, 2016
    Date of Patent: October 17, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Manabu Watanabe
  • Patent number: 9645619
    Abstract: At least one hollow metal body with a plurality of micro heat pipes embedded in the hollow metal body is used as a heat sink to remove heat from memory chips in a memory device.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: May 9, 2017
    Assignee: Corsair Memory, Inc.
    Inventor: Robert Michael Kinstle, III
  • Patent number: 9622387
    Abstract: An air directing device includes a rack-coupling portion that couples the air directing device with a rack, and one or more air directing portions. The air directing portions include one or more openings and one or more scoops that direct air from outside the rack into at least one of the openings when the air directing device is coupled to the rack.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: April 11, 2017
    Assignee: Amazon Technologies, Inc.
    Inventor: Michael P. Czamara
  • Patent number: 9614620
    Abstract: A coaxial transmitter optical subassembly (TOSA) including a cuboid type TO laser package may be used in an optical transceiver for transmitting an optical signal at a channel wavelength. The cuboid type TO laser package is made of a thermally conductive material and has substantially flat outer surfaces that may be thermally coupled to substantially flat outer surfaces on a transceiver housing and/or on other cuboid type TO laser packages. An optical transceiver may include multiple coaxial TOSAs with the cuboid type TO laser packages stacked in the transceiver housing. The cuboid type TO laser package may thus provide improved thermal characteristics and a reduced size within the optical transceiver.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: April 4, 2017
    Assignee: Applied Optoelectronics, Inc.
    Inventors: I-Lung Ho, Chong Wang, Justin Lii, Zhengyu Miao
  • Patent number: 9609739
    Abstract: According to one embodiment, an electronic device according to an embodiment includes, for example, a board, a first electronic component, and a heat dissipation member. The board includes a first face. The heat dissipation member is disposed at a side opposite to the first face of the first electronic component. The heat dissipation member is thermally connected to the first electronic component. The heat dissipation member includes a first extending portion, a second extending portion, and a plurality of third extending portions. The first extending portion extends along the first face. The second extending portion is positioned away, in a direction that intersects the first face, from the first extending portion by a space. The second extending portion extends along the first face. The plurality of the third extending portions are connected to the first extending portion and the second extending portion. The plurality of the third extending portions are positioned away from each other by a space.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: March 28, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Naoya Kamimura
  • Patent number: 9585290
    Abstract: A rack mountable 10U storage unit includes a plurality of memory modules arranged in multiple rows. The storage unit also has control circuitry. Each of the memory modules have multiple heating zones and a heat spreader coupled to it. The memory modules may have heat spreaders having differing thermal dissipation capacity coupled to them. The storage unit can accommodate up to 120 memory modules due to a unique method of placing the individual memory modules.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: February 28, 2017
    Assignee: Skyera, LLC
    Inventors: Pinchas Herman, William Radke, Radoslav Danilak
  • Patent number: 9572244
    Abstract: A latch device for heat dissipation component includes a main body, a first and a second elastic member, a first and a second rotary unit. Two sides of the main body are respectively formed with a first and a second perforation. The first and second elastic members are fixedly disposed on one face of a motherboard. A first and a second hook/latch section respectively protrude from the first and the second elastic members corresponding to the first and second perforations. By means of a first and a second hook/latch member, the first and second rotary units are correspondingly hooked/latch with the first and second hook/latch sections. Then, the first and second rotary units are rotated to pull upward the first and second hook/latch members; further the first and second hook/latch sections can fix the main body. Hence, a user can assemble/detach the main body without using any hand tool.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: February 14, 2017
    Assignee: ASIA VITAL COMPONENTS CO., LTD.
    Inventor: Sheng-Huang Lin
  • Patent number: 9563238
    Abstract: A fixing member is used for fixing a plate to a frame. The fixing member includes a body and a fixing plate extending from the body. The body can lock with the frame along a first direction substantially parallel to the body. The fixing plate is configured to deform along a second direction substantially perpendicular to the first direction and lock with an aligning portion of the plate. An electronic device is also provided.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: February 7, 2017
    Assignees: HONG FU JIN PRECISION INDUSTRY (WuHan) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Wei-Yong Ma, Da-Long Sun
  • Patent number: 9553038
    Abstract: An apparatus for cooling semiconductor elements uses heat exchangers to transfer heat from the semiconductor elements to a coolant flowing through the heat exchangers. A central body, made from a flexible material, is positioned between the heat exchangers and a manifold from which the coolant is provided. The central body includes a plurality of flexible runners fluidly coupled to each heat exchanger and the manifold to provide the coolant to the heat exchanger. Heat is transferred away from the semiconductor elements by the coolant and heated coolant is returned from the heat exchanger to the manifold. Each flexible runner is configured to flex to conform to a height of a respective semiconductor element and thereby apply a force to the heat exchanger to maintain contact with the semiconductor element.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: January 24, 2017
    Assignee: Raytheon Company
    Inventors: Christopher R. Koontz, Charles Chu, Rosalio S. Vidaurri
  • Patent number: 9520386
    Abstract: A method of protecting an LED chip from damage by ESD and EMI when the LED chip is housed in a light-emitting diode(s) housing package (LED package) and the LED package is mounted on a printed circuit board is provided. The method comprises a step of not including an ESD and EMI suppressing Zener diode within the combination of the printed circuit board and the LED package and of providing within the combination of the printed circuit board and the LED package a first conductive member and a spaced apart second conductive member which are electrically connected to the LED chip and which have defined between them at least one insulative ESD and/or EMI suppressing region which breaks down in its insulative properties when subjected to voltages of absolute magnitudes greater than a predetermined threshold voltage.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: December 13, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Si Joon Song, Hyuk Hwan Kim, Seok Hyun Nam, Byoung Dae Ye, Young Keun Lee
  • Patent number: 9497889
    Abstract: Various embodiments described herein include systems, methods and/or devices used to dissipate heat generated by electronic components in an electronic system (e.g., a memory system that includes closely spaced memory modules). In one aspect, an electronic system includes a substrate, at least one electronic component, and a heat sink. The at least one electronic component is mechanically coupled to the substrate and thermally coupled to a ground plane of the substrate, such that heat generated by the at least one electronic component is dissipated at least partially to the ground plane of the substrate. The heat sink is mechanically coupled to an edge of the substrate, and thermally coupled to the ground plane of the substrate to at least partially dissipate the heat generated by the at least one electronic component. In some embodiments, the heat sink further includes an attachment structure, a tab and a plurality of heat dissipaters.
    Type: Grant
    Filed: May 12, 2014
    Date of Patent: November 15, 2016
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: David A. Wright, David Dean, Robert W. Ellis
  • Patent number: 9414530
    Abstract: Described are features to control distribution of thermal energy by structures such as portions of a case of a device. Various patterns of thermally conductive or insulating substances alter the thermal conductivity of a structure and provide selective directional distribution of thermal energy away from a hot spot caused by operation of a device component. The features result in a predetermined distribution of thermal energy across one or more structures, and may increase thermal uniformity.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: August 9, 2016
    Assignee: Amazon Technologies, Inc.
    Inventors: John Avery Howard, David Eric Peters, Ross Kenneth Thayer
  • Patent number: 9385055
    Abstract: A method of assembling a semiconductor chip device is provided that includes placing an interposer on a first semiconductor chip. The interposer includes a first surface seated on the first semiconductor chip and a second surface adapted to thermally contact a heat spreader. The second surface includes a first aperture. A second semiconductor chip is placed in the first aperture.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: July 5, 2016
    Assignees: ATI Technologies ULC, Advanced Micro Devices, Inc.
    Inventors: Gamal Refai-Ahmed, Michael Z. Su, Bryan Black, Maxat Touzelbaev, Yizhang Yang
  • Patent number: 9354383
    Abstract: A display device is disclosed. In one aspect, the display device includes a protective member, a display panel accommodated in the protective member, a light guide member including a light incident surface, a heat discharge member including a support surface facing the light incident surface, and a light source disposed on the support surface to supply light to the light incident surface. The light source includes a light-emitting device disposed on one surface of a circuit board, the circuit board including a first area substantially overlapping the light-emitting device and a second area adjacent to the first area, a first adhesive member disposed between the other surface of the circuit board and the support surface and substantially overlapping the first area, and a second adhesive member disposed to substantially overlap the second area. The first adhesive member has a higher heat conductivity than the second adhesive member.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: May 31, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young-Min Park, Jaehyun Chae
  • Patent number: 9349616
    Abstract: A semiconductor device includes a semiconductor die. An encapsulant is deposited over the semiconductor die. An insulating layer is formed over the encapsulant and a first surface of the semiconductor die. A semiconductor component is disposed over the insulating layer and first surface of the semiconductor die. A first interconnect structure is formed over the encapsulant and first surface of the semiconductor die to embed the semiconductor component. A conductive via is formed in the semiconductor die. A heat sink is formed over the semiconductor die. A second interconnect structure is formed over a second surface of the semiconductor die opposite the first surface. A conductive layer is formed over the semiconductor component. An opening is formed in the insulating layer.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: May 24, 2016
    Assignee: STATS ChipPAC, Ltd.
    Inventors: KyungHoon Lee, HyunJin Song, Kyoungll Huh, DaeSik Choi
  • Patent number: 9342121
    Abstract: Embodiments of the present invention provide for non interruptive fluid cooling of an electronic enclosure. One or more electronic component packages may be removable from a circuit card having a fluid flow system. When installed, the electronic component packages are coincident to and in a thermal relationship with the fluid flow system. If a particular electronic component package becomes non-functional, it may be removed from the electronic enclosure without affecting either the fluid flow system or other neighboring electronic component packages.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: May 17, 2016
    Assignee: International Business Machines Corporatoin
    Inventors: William James Anderl, Evan George Colgan, James Dorance Gerken, Christopher Michael Marroquin, Shurong Tian
  • Patent number: 9338926
    Abstract: A cooling structure for a shunt resistor has a semiconductor switching element mounted on a component side of a circuit board, a shunt resistor surface-mounted a solder side of the circuit board, a radiator for releasing heat generated from the semiconductor switching element and the shunt resistor, and an insulating material interposed between the shunt resistor and the radiator and having a high thermal conductivity.
    Type: Grant
    Filed: April 30, 2013
    Date of Patent: May 10, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hideyuki Sotome, Takaya Muto
  • Patent number: 9331370
    Abstract: Integrated circuit packages with stripline structures are provided. An integrated circuit package substrate may include a core layer having top and bottom surfaces and dielectric layers formed on the top and bottom surfaces of the core layer. Stripline structures may be formed in at least some of the dielectric layers. A stripline trace may include signal routing conductors sandwiched between top and bottom ground planes. In particular, a dielectric layer may be formed between the signal conductors and the bottom ground plane to support the signal conductors, whereas a localized air region may be formed over the signal routing conductors separating the signal conductors from the top ground plane. If desired, the region above the signal routing conductors between the top ground plane and the signal routing conductors may be filled using other types of material having low loss and/or a dielectric constant that is frequency independent.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 3, 2016
    Assignee: Altera Corporation
    Inventor: Xiaohong Jiang
  • Patent number: 9307678
    Abstract: A low thermal resistance cooler module includes a heat-transfer base member defining a recess and multiple elongated, curved locating grooves, flat heat pipes set in the elongated, curved locating grooves with respective hot interfaces thereof suspending in the recess and respective cold interfaces thereof bonded to the heat-transfer base member, a heat-transfer block fixedly mounted with the hot interfaces of the flat heat pipes in the recess of the heat-transfer base member for transferring waste heat from a heat source of an external circuit board by direct contact, and connection plates respectively connected between the heat-transfer block and the heat-transfer base member.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: April 5, 2016
    Assignee: ADLINK TECHNOLOGY INC
    Inventor: Li-Jie Yu
  • Patent number: 9301385
    Abstract: An electronic unit includes an electronic body on which a heat generating component is mounted; a resin casing in which the electronic body is housed; and a heat diffusion sheet interposed between the casing and a region of the electronic body where the heat generating component is mounted.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: March 29, 2016
    Assignee: KOITO MANUFACTURING CO., LTD.
    Inventors: Toshihiko Kurebayashi, Mikio Urushibata
  • Patent number: 9293393
    Abstract: An exemplary implementation of the present disclosure includes a stacked package having a top die from a top reconstituted wafer situated over a bottom die from a bottom reconstituted wafer. The top die and the bottom die are insulated from one another by an insulation arrangement. The top die and the bottom die are also interconnected through the insulation arrangement. The insulation arrangement can include a top molding compound that flanks the top die and a bottom molding compound that flanks the bottom die. The top die and the bottom die can be interconnected through at least the top molding compound. Furthermore, the top die and the bottom die can be interconnected through a conductive via that extends within the insulation arrangement.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: March 22, 2016
    Assignee: Broadcom Corporation
    Inventors: Kevin Kunzhong Hu, Sam Ziqun Zhao, Rezaur Rahman Khan, Pieter Vorenkamp, Sampath K. V. Karikalan, Xiangdong Chen
  • Patent number: 9292058
    Abstract: A heat sink for a processor includes: a main heat exchange zone that bears in contact with a processor; at least one peripheral heat exchange zone that bears in contact with a cooling source, and at least one heat pipe connecting the main heat exchange zone with the peripheral heat exchange zone, the heat pipe containing a cooling fluid.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: March 22, 2016
    Assignee: BULL SAS
    Inventor: Fabien Demange
  • Patent number: 9279576
    Abstract: An illustrative lighting system provides a single light housing and an associated lens cover that together interchangeably receive one of a selection of heat sink trays and one of a selection of light reflectors. Each of the selection of heat sink trays includes a different number and/or orientation of light emitter packages. Each the selection of light reflectors includes openings and surfaces matching the number and orientation of light emitter packages for one of the selection of heat sink trays.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: March 8, 2016
    Assignee: RAB Lighting Inc.
    Inventors: Vincenzo Guercio, Jiang Hu
  • Patent number: 9275975
    Abstract: Some embodiments relate to an electronic package. The electronic package includes a substrate that includes a plurality of buildup layers. A first die is embedded in one of the buildup layers on one side of the substrate. A second die is bonded to the substrate within a cavity on an opposing side of the substrate. The first die and the second die may be electrically connected to conductors within the plurality of buildup layers. Other embodiments relate to method of connecting a first die to a second die to form an electronic package. The method includes attaching a first die to a core and fabricating a substrate onto the core. The method further includes creating a cavity in another of the buildup layers on an opposing side of the substrate and attaching a second die to the substrate within the cavity.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: March 1, 2016
    Assignee: Intel Corporation
    Inventors: Harold Ryan Chase, Mathew J Manusharow, Mihir K Roy
  • Patent number: 9275925
    Abstract: Presented herein are an interconnect structure and method for forming the same. The interconnect structure comprises a contact pad disposed over a substrate and a connector disposed over the substrate and spaced apart from the contact pad. A passivation layer is disposed over the contact pad and over connector, the passivation layer having a contact pad opening, a connector opening and a mounting pad opening. A post passivation layer comprising a trace and a mounting pad is disposed over the passivation layer. The trace may be disposed in the contact pad opening and contacting the mounting pad, and further disposed in the connector opening and contacting the connector. The mounting pad may be disposed in the mounting pad opening and contacting the opening. The mounting pad separated from the trace by a trace gap, which may optionally be at least 10 ?m.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: March 1, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsien-Wei Chen, Hao-Yi Tsai, Mirng-Ji Lii, Chen-Hua Yu, Tsung-Yuan Yu
  • Patent number: 9252739
    Abstract: A module substrate includes: a multilayered wiring substrate that includes wiring layers; and embedded duplexers that are embedded in the multilayered wiring substrate and electrically connected to the wiring layers, wherein the embedded duplexers include duplexers supporting at least two bands of Band1, Band2, Band5, and Band8.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: February 2, 2016
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Naoyuki Tasaka, Tooru Takezaki, Ken Sasaki
  • Patent number: 9247670
    Abstract: A support member that positions a system board is provided herein. The support member includes a frame and a plurality of mounting members. The frame supports a system board. The plurality of mounting members are formed in the frame. The plurality of mounting members connect the frame to the system pan holding the system board. The plurality of mounting members are disposed on the frame to bend the system board.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: January 26, 2016
    Assignee: Hewlett Packard Enterprise Patent Development LP
    Inventor: Keith A Sauer
  • Patent number: 9247034
    Abstract: A heat dissipation structure includes a heat conduction support body disposed in a handheld electronic device. The heat conduction support body has a first face and a second face opposite to the first face. A chamber is defined between the first and second faces. More than one capillary structure and a working fluid are disposed in the chamber. One of the first and second faces or both of the first and second faces are in contact with the electronic components of the handheld electronic device. One of the first and second faces is in contact with the housing of the handheld electronic device. Accordingly, the heat generated by the electronic components can be quickly conducted and dissipated outward.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: January 26, 2016
    Assignee: ASIA VITAL COMPONENTS CO., LTD.
    Inventors: Kuo-Chun Hsieh, Chuan-Chin Huang
  • Patent number: 9244232
    Abstract: A circuit module can include a substrate, a photonic conversion unit placed on the substrate; and a retention assembly. The retention assembly can include a heat sink in thermal contact with the photonic conversion unit and a fastener. The fastener can be mechanically coupled to both the substrate and the heat sink, and configured to press the heat sink against the photonic conversion unit. The photonic conversion unit is removably secured to the substrate by the retention assembly without the use of a bonding material.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: January 26, 2016
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Terrel Morris
  • Patent number: 9209114
    Abstract: Disclosed herein is a power module package including an external connection terminal, a substrate in which a fastening unit allowing one end of the external connection terminal to be insertedly fastened thereinto is formed to penetrate in a thickness direction thereof, and a semiconductor chip mounted on one surface of the substrate.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: December 8, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae Yoo, Young Ki Lee, Bum Seok Suh, Joon Seok Chae
  • Patent number: 9204530
    Abstract: The present invention relates to electronic components assembly for electrically connecting electronic components to each other, wherein a wiring formed on a surface of a first electronic component and a wiring formed on a surface of a second electronic component face each other, and are bonded to each other with an electric conductor interposed therebetween, so as to electrically connect the first electronic component and the second electronic component. The electric conductor is a resin composition containing solder or conductive filler.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: December 1, 2015
    Assignee: PANASONIC CORPORATION
    Inventors: Hiromitsu Takashita, Tsuyoshi Takeda, Yuko Konno, Hiroaki Fujiwara, Shingo Yoshioka
  • Patent number: 9202798
    Abstract: Disclosed herein is a power module package including an external connection terminal; a substrate in which a fastening unit allowing one end of the external connection terminal to be insertedly fastened thereinto is buried at a predetermined depth in a thickness direction; and a semiconductor chip mounted on one surface of the substrate.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: December 1, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae Yoo, Sun Woo Yun, Joon Seok Chae, Kwang Soo Kim
  • Patent number: 9190399
    Abstract: Embodiments of the present invention disclose a semiconductor structure and method for increasing thermal dissipation in a three-dimensional integrated circuit package. In certain embodiments, the semiconductor structure comprises a logic die or a processor die attached to a substrate; a memory die stack attached to the logic die or the processor die; and a first lid attached to a first side of the logic or the processor die. The semiconductor structure further comprises a second lid attached to a second side of the memory die stack; a first heat sink attached to the first lid; and a second heat sink attached to the second lid.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: November 17, 2015
    Assignee: International Business Machines Corporation
    Inventors: Mark C. Lamorey, Janak G. Patel, Peter Slota, Jr., David B. Stone