For Integrated Circuit Patents (Class 361/718)
  • Patent number: 11309280
    Abstract: An electronic device includes a circuit board, a semiconductor device package mounted on the circuit board, the semiconductor device package including a package substrate connected to the circuit board, a first semiconductor device and a second semiconductor device mounted side by side on the package substrate, and a molding surrounding a sidewall of the first semiconductor device and a sidewall of the second semiconductor device, the molding not covering a top surface of the first semiconductor device, and a heat dissipation structure on the semiconductor device package, the top surface of the first semiconductor device being in contact with the heat dissipation structure.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: April 19, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-hoon Kim, Kil-soo Kim, Kyung-suk Oh, Tae-joo Hwang
  • Patent number: 11289856
    Abstract: Electrical connector grounding structure includes electrically insulative housing having accommodation hole located on base thereof and tongue plate forwardly extended from base, conducting terminal sets positioned in electrically insulative housing and including one or more than one grounding terminal, one or more than one power terminal and plurality of signal terminals, conducting member mounted in accommodation hole and having first contact portion located at top and second contact portion downwardly extended from first contact portion and kept in contact with grounding terminal, and shielding shell surrounding electrically insulative housing and kept in contact with first contact portion.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: March 29, 2022
    Assignee: ACES ELECTRONICS CO., LTD.
    Inventors: Chang-Ho Teng, Rong-Hsun Kuo, Chia-Sheng Liang
  • Patent number: 11222879
    Abstract: A semiconductor module structure includes: a semiconductor element portion including a plurality of capacitor elements; two bus bars sandwiching the semiconductor element portion and being electrically connected to the semiconductor element portion; and cooling fins, which are conductive, formed on respective surfaces of the bus bars at positions sandwiching the semiconductor element portion. Further, insulating refrigerant is provided in the cooling fins.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: January 11, 2022
    Assignee: DENSO CORPORATION
    Inventors: Tomo Sasaki, Hideyuki Murayama
  • Patent number: 11150236
    Abstract: In an embodiment, a system includes a plurality of sensor devices contained in a plurality of wells contained in a well-plate assembly. The sensor devices are used in a plurality of oscillators. Each oscillator generates a frequency and a resistance based on a quality of living biological cells contained in a corresponding well. The quality may include, for example, surface coupled mass, density, viscosity, and/or viscoelasticity of the living biological cells. The system also includes logic for measuring a resonant frequency and motional resistance associated with each sensor device and logic for processing the measured resonant frequency and motional resistance. Moreover, the system includes logic for displaying one or more graphs showing one or more characteristics of the living biological cells contained in the wells.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: October 19, 2021
    Assignee: University of Massachusetts
    Inventors: Abiche H. Dewilde, Berk Akinci, Joel M. Therrien, Kenneth A. Marx, Susan J. Braunhut
  • Patent number: 11147153
    Abstract: Aspects of the embodiments include an edge card and methods of making the same. The edge card can include a printed circuit board (PCB) comprising a first end and a second end, the first end comprising a plurality of metal contact fingers configured to interface with an edge connector, and the second end comprising a through-hole configured to mate with a post of a screw, the PCB further comprising an aperture proximate the second end of the PCB. The PCB can also include a thermal conduction element secured to the PCB, the thermal conduction element supporting an integrated circuit package, the integrated circuit package received by the aperture, wherein the thermal conduction element contacts the PCB proximate the through-hole and the thermal conduction element is configured to conduct heat from the integrated circuit towards the second portion of the printed circuit board.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: October 12, 2021
    Assignee: Intel Corporation
    Inventor: Brian J. Long
  • Patent number: 11037907
    Abstract: Implementations of semiconductor packages may include: a first substrate having a first dielectric layer coupled between a first metal layer and a second metal layer; a second substrate having a second dielectric layer coupled between a third metal layer and a fourth metal layer. A first die may be coupled with a first electrical spacer coupled in a space between and coupled with the first substrate and the second substrate and a second die may be coupled with a second electrical spacer coupled in a space between and coupled with the first substrate and the second substrate.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: June 15, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Seungwon Im, Oseob Jeon, JoonSeo Son, Mankyo Jong, Olaf Zschieschang
  • Patent number: 11031315
    Abstract: A method for fabricating a semiconductor structure includes providing a substrate and forming a plurality of fins on a surface of the substrate. Along an extending direction of the fins, the fins include first regions, second regions, and gate structures across the second regions. The first regions are located at both sides of the second regions. The method also includes forming first openings in the fins by removing the first regions of the fins at both sides of the gate structures until the substrate is exposed. Further, the method includes forming thermal conductive layers in the first openings, and forming doped layers on top surfaces of the thermal conductive layers. A material of the fins has a first thermal conductivity, a material of the thermal conductive layers have a second thermal conductivity, and the second thermal conductivity is larger than the first thermal conductivity.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: June 8, 2021
    Assignees: Semiconductor Manufacturing International (Beijing) Corporation, Semiconductor Manufacturing International (Shanghai) Corporation
    Inventor: Fei Zhou
  • Patent number: 11006539
    Abstract: A locking bracket system for a pair of line replaceable modules (LRMs) includes a locking bracket assembly including an expanding member configured to be actuated to expand; and an extension bracket attached to the expanding member. The extension bracket extends from the expanding member in a direction opposite that the expanding member expands. Each of the expanding member and the extension bracket are configured to compress against a LRM to retain the pair of LRMs to a chassis when the expanding member is in an expanded position.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: May 11, 2021
    Assignee: Hamilton Sundstrand Corporation
    Inventors: Kevin Donald Kilroy, Steven E. Jackson
  • Patent number: 10818573
    Abstract: An object of the present invention is to provide a structure, particularly, a power semiconductor module, which suppresses a bypass flow of a cooling medium and improves cooling efficiency. A structure according to the present invention includes a heat dissipation plate thermally connected to a heating element, and a resin region having a resin material that fixes the heating element and the heat dissipation plate, wherein the heat dissipation plate includes a fin portion including a plurality of fins protruding from a heat dissipation surface of the heat dissipation plate and formed to be exposed from the sealing resin material, and a wall portion formed to protrude from the heat dissipation surface to a same side as the fin and which separates the fin portion and the resin region.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: October 27, 2020
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Nobutake Tsuyuno, Takeshi Tokuyama, Eiichi Ide
  • Patent number: 10777485
    Abstract: A semiconductor device may include coolers, semiconductor modules, and a pair of connecting pipes. The coolers are arranged in a line and each of which includes a first flow path. Each of the semiconductor modules is interposed between a corresponding pair of the coolers. Each of the connecting pipes communicates with the adjacent coolers. A pair of coolant holes may be provided at one of the coolers located at one end in the stacking direction. A pair of second flow paths may extend respectively from the coolant holes to one of the coolers located at other end in the stacking direction. A bolt-head retainer and an internally threaded portion may be provided in each second flow path, the bolt-head retainer retaining a head of a bolt, and the internally threaded portion fixing the bolt. The coolers between the bolt-lead retainers and the internally threaded portions are fixed by the bolts.
    Type: Grant
    Filed: April 5, 2019
    Date of Patent: September 15, 2020
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Yuya Takano, Fumiki Tanahashi
  • Patent number: 10729036
    Abstract: An electronic device comprises a heat dissipating layer disposed on a rear cover, a first shield cover and a second shield cover disposed on a mainboard, and a speaker box disposed on a surface of an antenna panel. The first region of the heat dissipating layer is in contact with the first shield cover, and the second shield cover is in contact with a first region of a middle frame; a second region of the heat dissipating layer is in contact with a surface of a battery, and the other surface of the battery is in contact with a second region of the middle frame, and a third region of the heat dissipating layer is in contact with a surface of the speaker box that is distant from the antenna panel, and the other surface of the antenna panel is in contact with a third region of the middle frame.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: July 28, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Linfang Jin, Guo Yang, Shuainan Lin
  • Patent number: 10727157
    Abstract: An electrical power conversion device is provided which includes a stack of semiconductor modules and a plurality of cooling pipes. Each of the cooling pipes includes a first and a second outer shell plate which are electrically conductive. Each of the outer shell plates includes a flow-path defining portion which defines a coolant flow path between the outer shell plates and a flow-path outer periphery forming a circumference of the flow-path defining portion. The flow-path outer periphery of at least one of the outer shell plates has formed thereon an outer shell protrusion which is laid to overlap power terminals or control terminals extending from the semiconductor module to cancel a magnetic flux, as developed around the power terminals or the control terminals, thereby decreasing the inductance of the power terminals or the control terminals.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: July 28, 2020
    Assignee: DENSO CORPORATION
    Inventor: Kazuya Takeuchi
  • Patent number: 10702076
    Abstract: A product display merchandiser comprising a track, a pusher configured to move along the track, a biasing mechanism configured to apply a force on the pusher in one direction along the track, and a distance sensor configured to detect the distance between the pusher and a fixed point. The distance sensor determines the number of products contained in the product display merchandiser based on the distance measured.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: July 7, 2020
    Assignee: Atlas Bolt & Screw Company LLC
    Inventors: Michael William Mercier, Daniel Davenport
  • Patent number: 10665563
    Abstract: A semiconductor chip packaging structure without soldering wire and a packaging method thereof are disclosed. The semiconductor chip packaging structure comprises at least one packaging structure, and each packaging structure comprises a substrate, and a semiconductor chip is arranged on the substrate. Pins of the semiconductor chip are electrically connected to the conductive circuit formed by engraving or etching metal film or alloy film. The semiconductor chip packaging structure also comprises a packaging glue layer covering the semiconductor chip and the conductive circuit. The semiconductor chip packaging method includes steps of arranging a semiconductor chip on the substrate; forming a metal film or an alloy film around the semiconductor chip; etching the metal film or alloy film, to form the conductive circuit; and covering a packaging glue layer on the semiconductor chip and the conductive circuit. As a result, the production efficiency can be improved greatly.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: May 26, 2020
    Assignee: SHENZHEN JIEJIANDA INNOVATION TECHNOLOGY CO., LTD.
    Inventors: Bo Tu, Hsiang-Yi Cheng
  • Patent number: 10653037
    Abstract: In an example, a thermal interface material (TIM) structure is disclosed. The TIM structure includes a first thermal interface material layer comprising a gap filler material and a second thermal interface material layer comprising a solid thermal pad. The TIM structure has one or more overlapping regions associated with partial overlap of a surface of the gap filler material by the solid thermal pad such that a portion of the surface is exposed.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: May 12, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark K. Hoffmeyer, Phillip V. Mann
  • Patent number: 10524375
    Abstract: An electric power converter includes a semiconductor module, a first electronic circuit board, a second electronic circuit board, and a container that contains the first electronic circuit board and the second electronic circuit board. The container has a first fixing portion to which the first electronic circuit board is fixed and a second fixing portion to which the second electronic circuit board is fixed. The electric power converter is configured such that the second electronic circuit board does not intervene between the first fixing portion of the container and the first electronic circuit board in the board thickness direction and the first electronic circuit board does not intervene between the second fixing portion of the container and the second electronic circuit board in the board thickness direction.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: December 31, 2019
    Assignee: DENSO CORPORATION
    Inventor: Shintaro Kogure
  • Patent number: 10418257
    Abstract: The present disclosure relates to a substrate with a plating configuration and a process for making the same. The disclosed substrate includes a substrate base with a substrate body, and a plating configuration with a plating seed layer and a plating barrier layer. Herein, the substrate body is formed of metal-diamond composites. The plating seed layer is formed of copper, silver, or gold, and the plating barrier layer includes nickel material. The plating seed layer directly covers at least sidewalls of the substrate body, and the plating barrier layer is directly formed over the plating seed layer and encloses the substrate base.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: September 17, 2019
    Assignee: Qorvo US, Inc.
    Inventor: Dylan Murdock
  • Patent number: 10292309
    Abstract: A heat sink, including a base section in contact with a heating unit, and a heat-dissipating section for dissipating heat received from the heating unit by the base section, in which the base section includes at least one metal layer, and the heat-dissipating section includes a laminate prepared by laminating a metal layer and a graphite layer through an adhesive layer formed by using a composition containing a polyvinyl acetal resin, or a heat sink for dissipating heat from a heating unit, in which the heat sink includes a laminate prepared by laminating a metal layer and a graphite layer through an adhesive layer formed by using a composition containing a polyvinyl acetal resin, and is arranged so as to cover the heating unit.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: May 14, 2019
    Assignee: JNC CORPORATION
    Inventor: Takeshi Fujiwara
  • Patent number: 9929074
    Abstract: Use of highly oriented graphite including graphite layers placed on top of one another and containing only a small amount of water allows for production of an electronic device that includes, as an element, highly oriented graphite in which no delamination occurs, that is highly reliable in use, and that has a good heat dissipation capability.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: March 27, 2018
    Assignee: KANEKA CORPORATION
    Inventors: Makoto Kutsumizu, Yusuke Kato, Yasushi Nishikawa, Yusuke Ohta
  • Patent number: 9922900
    Abstract: A heat source (single semiconductor chip or group of closely spaced semiconductor chips of similar height) is provided on a first side of a substrate, which substrate has on said first side a support member comprising a compressible material. A heat removal component, oriented at an angle to said heat source, is brought into proximity of said heat source such that said heat removal component contacts said support member prior to contacting said heat source. Said heat removal component is assembled to said heat source such that said support member at least partially absorbs global inequality of force that would otherwise be applied to said heat source, absent said support member comprising said compressible material.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: March 20, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark D. Schultz, Todd E. Takken, Shurong Tian, Yuan Yao
  • Patent number: 9888612
    Abstract: It is proposed a two-phase heat exchanger device for a power-electronic module arrangement having a semiconductor module. The two-phase heat exchanger device includes a base plate configured for being in contact with a first semiconductor module at a first side of the base plate; and at least one tube element for a first cooling medium including a first portion having at least one evaporator channel and a second portion having at least one condenser channel. The base plate has a groove containing the tube element, wherein the groove is dimensioned for enabling thermal contact between the base plate and the first portion of the tube element and dimensioned to form a gap between the base plate and the second portion of the tube element for thermal separation of the base plate and the second portion of the tube element.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: February 6, 2018
    Assignee: ABB Schweiz AG
    Inventors: Daniele Torresin, Bruno Agostini, Francesco Agostini, Thomas Gradinger, Mathieu Habert
  • Patent number: 9674986
    Abstract: A heat spreader including multiple layers of anisotropic material to conduct thermal energy. Multiple graphite sheet layers may be laminated and each sheet may be thermally connected to one or more thermal energy sources in a portable electronic device. Methods for making a heat spreader are also disclosed.
    Type: Grant
    Filed: August 3, 2015
    Date of Patent: June 6, 2017
    Assignee: Apple Inc.
    Inventors: Benjamin J. Pope, Scott A. Myers, Ihtesham H. Chowdhury
  • Patent number: 9658116
    Abstract: A heat generation point detection method comprises: step of stabilizing an average temperature of a surface of an integrated circuit S; steps of applying a bias voltage of a low frequency to the integrated circuit S and acquiring a heat generation detection signal detected from the integrated circuit S in response thereto; steps of supplying a bias voltage of a high frequency and acquiring a heat generation detection signal detected in response thereto; steps of detecting a phase shift between the bias voltage of the low frequency and the heat generation detection signal and a phase shift between the bias voltage of the high frequency and the heat generation detection signal; and step of calculating a change rate of the phase shift against a square root of the frequency of the bias voltage, and obtaining depth information of the heat generation point from the change rate.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: May 23, 2017
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventor: Tomonori Nakamura
  • Patent number: 9594410
    Abstract: A heat sink including a top surface, a first bottom surface configured to thermally contact a first controller having a first height from a circuit board, and a second bottom surface configured to thermally contact a second controller having a second height from the circuit board, wherein the second height is different than the first height.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: March 14, 2017
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventor: Kevin M. Takeuchi
  • Patent number: 9545038
    Abstract: Disclosed is an inverter housing which is installed in a vehicle, and more particularly, an inverter housing which is capable of having a high heat dissipation effect and realizing a compact size. To this end, the inverter housing according to the present invention includes a body having a plate shape; a plurality of capacitor insertion portions formed to be recessed in a first direction of the body, so that capacitors are inserted thereinto, and integrally arranged to be spaced from each other; a plurality of switching device installation portions configured as spaces in which switching devices are installed, and arranged between the capacitor insertion portions in a second direction of the body opposite to the first direction; and a plurality of heat dissipation fins installed in the first direction of the body to face the switching devices with the body interposed therebetween.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: January 10, 2017
    Assignee: MANDO CORPORATION
    Inventor: Seok Hwan Lee
  • Patent number: 9502383
    Abstract: Presented herein is a package comprising a carrier device of a device stack and at least one top device of the device stack mounted on a first side of the carrier device. A lid is mounted on the first side of the carrier device, with a first portion of the lid attached to the carrier device and a second portion of the lid extending past and overhanging a respective edge of the carrier device. The lid comprises a recess disposed in a first side, and the at least one top device is disposed within the recess. A thermal interface material disposed on the top device and contacts a surface of the recess.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: November 22, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Ding Wang, Han-Ping Pu, Kim Hong Chen, Jung Wei Cheng, Chien Ling Hwang, Hsin-Yu Pan
  • Patent number: 9485867
    Abstract: A wiring board includes an insulating substrate having a side surface including a protrusion portion or a recess portion and a lower surface having a metal member bonded thereto; a wiring conductor embedded in the insulating substrate and having an exposed portion partially exposed above the protrusion portion or the recess portion from the side surface of the insulating substrate; and a metal member bonded to the lower surface of the insulating substrate. It is possible to suppress occurrence of ion migration between the wiring conductor and the metal member by increasing a distance between the exposed portion and the metal member without increasing a thickness of the wiring board.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: November 1, 2016
    Assignee: KYOCERA CORPORATION
    Inventors: Yurie Onitsuka, Yousuke Moriyama
  • Patent number: 9460980
    Abstract: Some examples of the disclosure include a semiconductor package having a heat spreader, an outer perimeter portion attached to the bottom of the heat spreader along the perimeter and having a plurality of electrical pathways, a package substrate located below and spaced from the outer perimeter portion and having a plurality of electrical pathways, a plurality of connection points located between the outer perimeter component and the package substrate to provide connection points coupling the plurality of electrical pathways of the outer perimeter portion to the plurality of electrical pathways in the package substrate, and a cavity formed on the bottom of the heat spreader inside the outer perimeter portion.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: October 4, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventors: Sun Yun, Rajneesh Kumar, Houssam Wafic Jomaa, Joan Rey V. Buot
  • Patent number: 9433075
    Abstract: An electric power semiconductor device includes a heat transfer plate. A printed wire board is spaced a predetermined gap apart from the heat transfer plate. An opening portion is provided in the vicinity of an electrode strip formed on the outer side of the printed wire board. An electric power semiconductor element is disposed between the heat transfer plate and the printed wire board, and adhered to the heat transfer plate. A wiring member has one end bonded to a first bonding portion of a main power electrode of the electric power semiconductor element, and the other end is bonded to a second bonding portion. At least part of the second bonding portion is included in a space that extends from the main power electrode to the printed wire board, and the first bonding portion is included in a space that extends from the opening portion.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: August 30, 2016
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Junji Fujino, Yutaka Yoneda, Yoshitaka Onishi, Masafumi Sugawara
  • Patent number: 9322514
    Abstract: A luminous module comprising a plurality of radiation-emitting semiconductor components (2), a connection carrier (3), on which the radiation-emitting semiconductor components (2) are arranged, and a cooling body (6), which, on its front-side surface, is connected to the connection carrier (3) and has a basic body (4) and also a means (5), which is designed to locally alter the thermal resistance of the cooling body (6), wherein the average thermal resistance of the cooling body (6) decreases along a main extension direction of the luminous module (1).
    Type: Grant
    Filed: October 20, 2009
    Date of Patent: April 26, 2016
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Steffen Block, Rainer Huber
  • Patent number: 9318450
    Abstract: A monolithic microwave integrated circuit structure having: a semiconductor substrate structure having a plurality of active devices and a microwave transmission line having an input section, an output section and a interconnecting section electrically interconnecting the active devices on one surface of the substrate; a thermally conductive, electrically non-conductive heat sink; and a thermally conductive bonding layer for bonding the heat sink to the substrate, the thermally conductive bonding layer having an electrically conductive portion and an electrically non-conductive portion, the electrically conductive portion being disposed between the heat sink and an opposite surface of a portion of the substrate having the active devices and the electrically non-conductive portion being disposed on the opposite surface portion overlaying portion of the microwave transmission line section.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: April 19, 2016
    Assignee: RAYTHEON COMPANY
    Inventors: Shahed Reza, David H. Altman, Susan C. Trulli
  • Patent number: 9312855
    Abstract: In one embodiment, a method includes receiving a touch sensor substrate associated with a plurality of electrodes and a plurality of connection pads. The plurality of electrodes is configured to detect a touch. The plurality of connection pads are configured to be electrically coupled with a touch controller. The method further includes laser etching a plurality of paths. The method also includes filling the plurality of paths with an electrically conductive material to form a plurality of tracks. Each track is configured to electrically couple at least one connection pad of the plurality of connection pads with at least one electrode of the plurality of electrodes.
    Type: Grant
    Filed: January 10, 2012
    Date of Patent: April 12, 2016
    Assignee: Atmel Corporation
    Inventor: Carl Carley
  • Patent number: 9269694
    Abstract: An embodiment package includes a first die stack on a surface of a package component, a second die stack on the surface of the package component, and a contour lid over the first die stack and second die stack. The contour lid includes a first thermal conductive portion over the first die stack, a second thermal conductive portion over the second die stack, and a thermal barrier portion between the first thermal conductive portion and the second thermal conductive portion. The thermal barrier portion includes a low thermal conductivity material.
    Type: Grant
    Filed: December 11, 2013
    Date of Patent: February 23, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kim Hong Chen, Wensen Hung, Szu-Po Huang, Shin-Puu Jeng
  • Patent number: 9159640
    Abstract: At least a part of a heat radiation member (9) connected to a DRAM (11) for radiating heat of the DRAM (11) is exposed from a protection member (4) arranged to surround the DRAM and the heat radiation member (9) so as to protect the DRAM (11). Thus, it is possible to provide a semiconductor device having a preferable heat radiation performance.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 13, 2015
    Assignee: NIKON CORPORATION
    Inventor: Isao Sugaya
  • Patent number: 9117786
    Abstract: The chip module includes a carrier, a semiconductor chip arranged on or embedded inside the carrier, and an insulation layer that at least partly covers a face of the carrier. The dielectric constant ?r and the thermal conductivity ? of the insulation layer satisfy the condition ?·?r<4.0 W·m?1·K?1.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: August 25, 2015
    Assignee: Infineon Technologies AG
    Inventors: Ralf Otremba, Josef Hoeglauer, Juergen Schredl, Xaver Schloegel, Klaus Schiess
  • Patent number: 9099689
    Abstract: A method for making current collector is described. In the method, a substrate, a graphene film, and a plastic support film are provided. The substrate has a surface. The graphene film is disposed on the surface of the substrate. The graphene film disposed on the surface of the substrate and the plastic support film are laminated to form a substrate-graphene-plastic support film composite structure. The substrate is removed.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: August 4, 2015
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Xiang-Ming He, Li Wang, Jian-Jun Li, Jian Gao, Jian-Wei Guo
  • Patent number: 9030822
    Abstract: A cooling system is operable to facilitate cooling a power module or other electronic assembly. The cooling system may be configured to facilitate cooling a DC/AC inverter or other electronic assembly where two power modules may be arranged in an opposing relationship relative to a coolant passageway. The opposing relationship may be suitable to minimizing a packaging size and footprint required to facilitate interacting both power modules with the coolant flow.
    Type: Grant
    Filed: August 15, 2011
    Date of Patent: May 12, 2015
    Assignee: Lear Corporation
    Inventors: Nadir Sharaf, Yu Qin, Reshma Rathod, Richard J. Hampo
  • Patent number: 9013869
    Abstract: A low profile heat removal system suitable for removing excess heat generated by an integrated circuit operating in a compact computing environment is disclosed.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: April 21, 2015
    Assignee: Apple Inc.
    Inventors: Brett W. Degner, Gregory Tice
  • Publication number: 20150077941
    Abstract: An electronic device comprises a power module comprising a first main surface and a second main surface opposite to the first main surface, wherein at least a portion of the first main surface is configured as a heat dissipating surface without electrical power terminal functionality. The electronic device comprises a porous metal layer arranged on the portion of the first main surface.
    Type: Application
    Filed: September 18, 2013
    Publication date: March 19, 2015
    Inventors: Khalil Hosseini, Joachim Mahler, Ivan Nikitin
  • Patent number: 8982563
    Abstract: A chip package includes a processor, an interposer chip and a voltage regulator module (VRM). The interposer chip is electrically coupled to the processor by first electrical connectors proximate to a surface of the interposer chip. Moreover, the interposer chip includes second electrical connectors proximate to another surface of the interposer chip, which are electrically coupled to the first electrical connectors by through-substrate vias (TSVs) in the interposer chip. Note that the second electrical connectors can electrically couple the interposer chip to a circuit board. Furthermore, the VRM is electrically coupled to the processor by the interposer chip, and is proximate to the processor in the chip package, thereby reducing voltage droop. For example, the VRM may be electrically coupled to the surface of the interposer chip, and may be adjacent to the processor. Alternatively, the VRM may be electrically coupled to the other surface of the interposer chip.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: March 17, 2015
    Assignee: Oracle International Corporation
    Inventors: Kannan Raj, Ivan Shubin, John E. Cunningham
  • Publication number: 20150062820
    Abstract: An apparatus is provided that includes a planar heat conducting material that comprises a first heat sink conduction portion configured to conduct heat between a first integrated circuit and a first heat sink, a second heat sink conduction portion configured to conduct heat between a second integrated circuit and a second heat sink, and a thermal bridge portion configured to conduct heat between the first heat sink conduction portion and the second heat sink conduction portion, such that the thermal bridge portion allows for flexural compensation for a height difference between the first integrated circuit and the second integrated circuit.
    Type: Application
    Filed: September 4, 2013
    Publication date: March 5, 2015
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: Mandy Hin Lam, Hong Tran Huynh, M. Baris Dogruoz
  • Patent number: 8964393
    Abstract: The present invention provides a display device comprising a display panel, a driving chip and a heatsink. The driving chip is used to drive the display panel. The heatsink is thermally connected with the driving chip to dissipate the heat generated by the driving chip. Through the said method, the display device according to the present invention is provided with the heatsink connected with the driving chip to dissipate the heat generated by the driving chip, which improves the stability and reliability of the driving chip.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: February 24, 2015
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventors: Yu-chun Hsiao, Quan Li
  • Patent number: 8934257
    Abstract: In some embodiments, an apparatus includes a first substrate, a second substrate, a first coupler, and a second coupler. The first substrate is formed from a first material and includes an electrical pad. The second substrate is formed from a second material and includes an electrical pad. The first coupler is configured to mechanically couple the first substrate to the second substrate without a soldered connection. The second coupler includes a first end portion, configured to be soldered to the electrical pad of the first substrate, and a second end portion, configured to be soldered to the electrical pad of the second substrate. The second coupler configured to electrically couple the first substrate to the second substrate.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: January 13, 2015
    Assignee: Juniper Networks, Inc.
    Inventors: Boris Reynov, Jack Kohn, Victor Mei, Shreeram Siddhaye, Ben Nitzan, Venkata Penmetsa
  • Patent number: 8934235
    Abstract: A heat transfer device is described. In one or more implementations, a heat transfer device includes a heat sink and a thermal storage enclosure disposed proximal to at least a portion of the heat sink. The thermal storage enclosure configured to be disposed proximal to a heat-generating component of a device. The thermal storage enclosure includes a phase change material configured to have a melting temperature that is below a temperature at which a cooling fan of the device is set to operate to cool the heat-generating device.
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: January 13, 2015
    Assignee: Microsoft Corporation
    Inventors: Brandon A. Rubenstein, Jeffrey Taylor Stellman
  • Patent number: 8929078
    Abstract: The invention relates to an electronic control device (10) having electronic components (160, 162) on a circuit board (110) which are shielded from electrical and/or magnetic interference fields. According to the invention, an electrically conductive sheet metal part (170) is arranged on the circuit board (110) which forms a Faraday cage for the electronic components (160, 162) with the circuit board. The electrically conductive sheet metal part (170) is furthermore in thermal contact to the electronic components (160, 162) and in thermal contact to the housing (100) of the control device (10) and thereby deflects heat from the electronic components (160, 162) into the housing (100).
    Type: Grant
    Filed: November 25, 2010
    Date of Patent: January 6, 2015
    Assignee: Robert Bosch GmbH
    Inventors: Volker Weeber, Heinrich Barth, Ralph Schertlen
  • Patent number: 8900927
    Abstract: A multi-chip electronic package and methods of manufacture are provided. The method includes contacting pistons of a lid with respective ones of chips on a chip carrier. The method further includes separating the lid and the chip carrier and placing at least one seal shim on one of the lid and chip carrier. The at least one seal shim has a thickness that results in a gap between the pistons with the respective ones of the chips on the chip carrier. The method further includes dispensing thermal interface material within the gap and in contact with the chips. The method further includes sealing the lid to the chip carrier with the at least one seal shim between the lid and the chip carrier.
    Type: Grant
    Filed: August 16, 2010
    Date of Patent: December 2, 2014
    Assignee: International Business Machines Corporation
    Inventors: Martin M. Beaumier, Steven P. Ostrander, Kamal K. Sikka, Hilton T. Toy, Jeffrey A. Zitz
  • Patent number: 8897015
    Abstract: The present disclosure relates to a base plate, for example, for a power module, including a matrix formed of metal, for example, aluminum, wherein at least two reinforcements are provided in the matrix next to each other, and wherein the reinforcements are spaced apart from each other.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: November 25, 2014
    Assignee: ABB Technology AG
    Inventors: Lydia Feller, Samuel Hartmann
  • Patent number: 8897016
    Abstract: A low profile heat removal system suitable for removing excess heat generated by a component operating in a compact computing environment is disclosed.
    Type: Grant
    Filed: October 2, 2012
    Date of Patent: November 25, 2014
    Inventors: Brett W. Degner, Peteris K. Augenbergs, Frank Liang, Amaury J. Heresztyn, Dinesh Mathew, Thomas W. Wilson
  • Patent number: 8891240
    Abstract: An apparatus and method for cooling a semiconductor device. The apparatus comprises a chamber configured for receiving a cooling fluid; and a plurality of contact elements comprising respective first ends disposed within the chamber; wherein, during operation, respective second ends of contact elements contact a surface of the semiconductor device for transferring heat generated in the semiconductor device to the cooling fluid.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: November 18, 2014
    Assignee: Semicaps Pte Ltd
    Inventors: Choon Meng Chua, Lian Ser Koh, Sze Wei Choong, Jacob Chee Hong Phang
  • Publication number: 20140334106
    Abstract: Embodiments herein relate to a heat sink having nano- and/or micro-replication directly embossed in a bulk solidifying amorphous alloy comprising a metal alloy, wherein the heat sink is configured to transfer heat out of the heat sink by natural convection by air or forced convection by air, or by fluid phase change of a fluid and/or liquid cooling by a liquid. Other embodiments relate apparatus having the heat sink. Yet other embodiments relate to methods of manufacturing the heat sink and apparatus having the heat sink.
    Type: Application
    Filed: October 20, 2011
    Publication date: November 13, 2014
    Inventors: Christopher D. Prest, Joseph Poole, Joseph W. Stevick, Quoc Tran PHAM, Theodore Andrew Waniuk