Abstract: A component carrier includes a layer body with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a component embedded in the layer body, and at least one galvanic connection stack at least partially on at least part of at least one main surface of the layer body. At least one of a bottom main surface and a top main surface of the embedded component is electrically connected to the at least one galvanic connection stack.

Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.

Abstract: Fabric may include one or more conductive strands. An insertion tool may insert an electrical component into the fabric during formation of the fabric. The electrical component may include an electrical device mounted to a substrate and encapsulated by a protective structure. An interconnect structure such as a metal via or printed circuit layers may pass through an opening in the protective structure and may be used to couple a conductive strand to a contact pad on the substrate. The protective structure may be transparent or may include an opening so that light can be detected by or emitted from an optical device on the substrate. The protective structure may be formed using a molding tool that provides the protective structure with grooves or may be molded around a hollow conductive structure to create grooves. An electrical component mounted to the fabric may be embedded within printed circuit layers.

Abstract: In a coil component, the pressure resistance is improved by main surfaces and of a main body portion being covered with an insulating layer. The main body portion has a surface part, the resin ratio of the surface part is higher than the internal resin ratio, and insulation is enhanced at the surface part. As a result, the pressure resistance on the surface of the main body portion is further improved and the pressure resistance of the entire coil component is further improved.

Abstract: A computer-implemented method includes identifying a plurality of adapter modules of a particular adapter module type that are installed in a plurality of slots of a single host computer, and identifying, for each of the identified adapter modules, a slot of the plurality of slots in which the adapter module is installed. The method may further includes accessing, for each identified slot, a predetermined relative thermal efficiency value for operation of an adapter module of the particular adapter module type in a particular slot, and controlling, for one or more of the identified adapter modules, the operation of the identified adapter module based on the predetermined relative thermal efficiency value for the slot in which the identified adapter module is installed. A computer program product may also include program instructions that are executable by a processor to cause the processor to perform the method.

Abstract: A semiconductor package includes a first redistribution substrate, a connection substrate on the first redistribution substrate and having a first opening and a second opening that penetrate the connection substrate, a semiconductor chip on the first redistribution substrate and in the first opening of the connection substrate, a chip module on the first redistribution substrate and in the second opening of the connection substrate, and a molding layer that covers the semiconductor chip, the chip module, and the connection substrate. The chip module includes an inner substrate and a first passive device on the inner substrate. In the second opening, the molding layer covers the first passive device on the inner substrate.

Abstract: Disclosed is a manufacturing method for an embedded structure. The method includes: preparing a temporary carrier board; preparing a second circuit layer on at least one of the upper surface and the lower surface of the temporary carrier board, and preparing a first dielectric layer to cover the second circuit layer; patterning and curing the first dielectric layer to form a cavity, mounting a device in the cavity, and performing hot-curing, wherein a surface of the device provided with a terminal faces an opening of the cavity; and preparing a second dielectric layer, wherein the device is embedded in the second dielectric layer, and a surface of the second dielectric layer is higher than a surface of the terminal by a preset value.

Abstract: A method of forming an elongate electrical connection feature that traverses at least one step on or in a substrate is disclosed. A metallic nanoparticle composition is extruded from a capillary tube while the capillary tube is displaced relative to the substrate. The method includes: (1) continuously extruding the composition from the capillary tube while displacing the capillary tube by a height increment during a displacement period; (2) continuously extruding the composition from the capillary tube while the capillary tube is stationary during a stationary period; and (3) repeatedly executing (1) and (2) until the capillary tube is displaced from a position at a step bottom portion to another position at a height not lower than a step top portion.

Abstract: It is highly desirable in electronic systems to conserve space on printed circuit boards (PCB). This disclosure describes voltage regulation in electronic systems, and more specifically to integrating voltage regulators and associated passive components into semiconductor packages with at least a portion of the circuits whose voltage(s) they are regulating.

Abstract: Fabric may include one or more conductive strands. An insertion tool may insert an electrical component into the fabric during formation of the fabric. The electrical component may include an electrical device mounted to a substrate and encapsulated by a protective structure. An interconnect structure such as a metal via or printed circuit layers may pass through an opening in the protective structure and may be used to couple a conductive strand to a contact pad on the substrate. The protective structure may be transparent or may include an opening so that light can be detected by or emitted from an optical device on the substrate. The protective structure may be formed using a molding tool that provides the protective structure with grooves or may be molded around a hollow conductive structure to create grooves. An electrical component mounted to the fabric may be embedded within printed circuit layers.

Abstract: A printed circuit board includes: a first insulating layer including a first cavity and a second cavity; a first electronic component disposed in the first cavity and including a first pad disposed in a first surface direction of the first insulating layer; a second electronic component disposed in the second cavity and including a second pad disposed in a second surface direction, facing the first surface direction, of the first insulating layer; a second insulating layer disposed on each of first and second surfaces of the first insulating layer and in the first cavity to cover the first electronic component; and a third insulating layer disposed on the first surface of the first insulating layer and in the second cavity to cover the second electronic component.

Abstract: An assembly structure and a method for manufacturing the same are provided. The method for manufacturing the assembly structure includes providing a substrate defining an active region and a side rail surrounding the active region; and forming a frame structure on the side rail.

Abstract: A component built-in wiring substrate includes a first insulating layer, a first conductor layer formed on a first surface of the first insulating layer and including a component mounting pad, a second conductor layer formed on a second surface of the first insulating layer on the opposite side with respect to the first surface, via conductors formed in the first insulating layer such that the via conductors are connecting the second conductor layer and the component mounting pad of the first conductor layer, a second insulating layer formed on the first insulating layer and having a component accommodating portion penetrating through the second insulating layer such that the component mounting pad is positioned at bottom of the accommodating portion, and an electronic component positioned in the accommodating portion of the second insulating layer such that the electronic component is mounted on the component mounting pad of the first conductor layer.

Abstract: A display apparatus includes a substrate including a display area, a peripheral area outside the display area, and a bending area bendable along a bending axis, and an anti-crack projection disposed in the peripheral area and extending along at least a part of an edge of the substrate. A portion of the anti-crack projection in the bending area is a bending portion. A preset area including the bending portion on the substrate is a first area. A preset area of the substrate disposed outside the first area, having substantially the same area as that of the first area, and including a part of the anti-crack projection is a second area. A portion of the anti-crack projection belonging to the second area is a flat portion. The area occupied by the bending portion in the first area is greater than the area occupied by the flat portion in the second area.

Abstract: A semiconductor device includes: a first substrate; a multilayer wiring layer formed on the first substrate; a first inductor formed into a meander shape on the multilayer wiring layer in a plan view; and a second inductor formed into a meander shape on the multilayer wiring layer in a plain view, and arranged so as to be close to the first inductor in a plan view and not to overlap with the first inductor. A transformer is configured by the first inductor and the second inductor and, in a plan view, the first inductor and the second inductor extend along a first direction in which one side of the first substrate extends.

Abstract: The disclosed apparatus, systems and methods relate to interventional magnetic resonance imaging (iMRI). More specifically, clinical applications of the disclosed include magnetic resonance (MR) guided procedures such as endovascular interventions, percutaneous biopsies or deep brain stimulation.

Abstract: A printed circuit board (PCB) comprises a blind via and a discrete component vertically embedded within the blind via.

Abstract: A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a component including a terminal made of a first electrically conductive material and being embedded in the stack, a recess in the stack exposing at least a part of the terminal, an interface structure on the at least partially exposed terminal and an electrically conductive structure on the interface structure made of a second electrically conductive material.

Abstract: Examples herein provide more integrated circuit packages that allow direct bonding of semiconductor chips to the package, smaller line/spacing of traces, and uniform vias with no capture or cover pads. For example, an integrated circuit (IC) package may include a plurality of pads and a plurality of traces on a substrate with at least two of the plurality of traces located between two of the plurality of pads, and a dielectric layer that completely covers the plurality of traces and partially covers the plurality of pads.

Abstract: A foil-based package and a method for manufacturing a foil-based package includes, among other things, a first and a second foil substrate. An electronic component is arranged between the two foil substrates in a sandwich-like manner. Due to the component thickness, there is a distance difference between the two foil substrates between the mounting area of the component and ears outside of the mounting area. The foil-based package and the method provides means for reducing and/or compensating a distance difference between the first foil substrate and the second foil substrate caused by the component thickness.

Abstract: Fabric may include one or more conductive strands. An insertion tool may insert an electrical component into the fabric during formation of the fabric. The electrical component may include an electrical device mounted to a substrate and encapsulated by a protective structure. An interconnect structure such as a metal via or printed circuit layers may pass through an opening in the protective structure and may be used to couple a conductive strand to a contact pad on the substrate. The protective structure may be transparent or may include an opening so that light can be detected by or emitted from an optical device on the substrate. The protective structure may be formed using a molding tool that provides the protective structure with grooves or may be molded around a hollow conductive structure to create grooves. An electrical component mounted to the fabric may be embedded within printed circuit layers.

Abstract: A radio frequency module including a module substrate including a first principal surface and a second principal surface; a power amplifier; an inductor disposed on the second principal surface and connected to the power amplifier; and an external connection terminal configured to receive a power supply voltage. The first external connection terminal is disposed on the second principal surface and connected to the power amplifier via the inductor.

Abstract: Certain aspects of the present disclosure generally relate to an embedded trace substrate (ETS) with one or more passive components embedded therein. Such an ETS may provide shorter routing, smaller loop area, and lower parasitics between a semiconductor die and a land-side passive component embedded in the ETS. One example embedded trace substrate generally includes a core, a first insulating material disposed above the core and having a first metal pattern embedded therein, a second insulating material disposed below the core and having a second metal pattern embedded therein, and one or more passive components embedded in the core.

Abstract: A package that includes a substrate and an integrated device. The substrate includes a core portion, a first substrate portion and a second substrate portion. The core portion includes a core layer and core interconnects. The first substrate portion is coupled to the core portion. The first substrate portion includes at least one first dielectric layer coupled to the core layer, and a first plurality of interconnects located in the at least one first dielectric layer. The second substrate portion is coupled to the core portion. The second substrate includes at least one second dielectric layer coupled to the core layer, and a second plurality of interconnects located in the at least one second dielectric layer. The core portion and the second substrate portion include a cavity. The integrated device is coupled to the first substrate portion through the cavity of the second substrate portion and the core portion.

Abstract: In one aspect, a system component includes a printed circuit (PC) board on which plural conductive ink segments are disposed. The system component also includes a sealed housing that houses the PC board. The plural conductive ink segments define a bit pattern to establish a key.

Abstract: A manufacturing method of an integrated driving module with energy conversion function includes providing a carrier board and forming an integrated electromagnetic induction component layer having a first dielectric layer, a plurality of conductive coil layers and a plurality of conductive connecting components on a surface of the carrier board. A patterned conductive circuit layer is formed on the integrated electromagnetic induction component layer, and electrically connecting to each other through the conductive connecting components. An embedded electrical component is patterned on the patterned conductive circuit layer. A conductive component is disposed on the patterned conductive circuit layer. Thereafter, the method forms a second dielectric layer to cover the embedded electrical component and the conductive component and removes the carrier board to form a plurality of integrated driving modules.

Abstract: A PCB, printed circuit board, structure for forming at least one embedded electronic component. The structure comprises a multi-layer PCB board comprising at least one through-hole via, the via comprising a plurality of electrodes vertically aligned within the via, each electrode comprising a plated ring; and an isolation section separating each of the electrodes.

Abstract: A semiconductor package structure and a method of manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a conductive base, a first semiconductor die, a first conductive pillar, and a first encapsulant. The conductive base has a first surface. The first semiconductor die is disposed on the first surface of the conductive base. The first conductive pillar is disposed on the first semiconductor die. The first encapsulant is disposed on the first surface of the conductive base. The first encapsulant encapsulates the first semiconductor die. The first encapsulant includes an opening defined by the first conductive pillar.

Abstract: The disclosure relates to a universal holder assembly for mobile terminal equipment, for both physically holding and supporting same and for electrically recharging said mobile terminal equipment. This is achieved by a holder assembly comprising either a housing designed with a base surface, said housing having an interior designed to hold mobile terminal equipment, or an adapter element designed with a base surface that can be mechanically and physically connected to a mobile device, the inner and outer faces of the base surface being provided with electrical contact means which are designed and arranged such that an electrical connection can be established between mobile terminal equipment that can be positioned against or on the base surface and the contact means designed on the outer face. The outer face of the base surface is also provided with at least two recesses or depressions, each designed to physically receive an engagement means.

Abstract: A device includes a base substrate with a sensor component arranged thereon; a spacer layer on the base substrate, wherein the spacer layer is structured in order to predefine a cavity region, in which the sensor component is arranged in an exposed fashion on the base substrate, and a DAF tape element (DAF=Die-Attach-Film) on a stack element, wherein the DAF tape element mechanically fixedly connects the stack element to the spacer layer arranged on the base substrate and to obtain the cavity region.

Abstract: An apparatus is provided which comprises: a plurality of dielectric layers forming a substrate, a plurality of first conductive contacts on a first surface of the substrate, a cavity in the first surface of the substrate defining a second surface parallel to the first surface, a plurality of second conductive contacts on the second surface of the substrate, one or more integrated circuit die(s) coupled with the second conductive contacts, and mold material at least partially covering the one or more integrated circuit die(s) and the first conductive contacts. Other embodiments are also disclosed and claimed.

Abstract: Mechanisms for forming a semiconductor device are provided. The semiconductor device includes a contact pad over a substrate. The semiconductor device also includes a passivation layer over the substrate and a first portion of the contact pad, and a second portion of the contact pad is exposed through an opening. The semiconductor device further includes a post-passivation interconnect layer over the passivation layer and coupled to the second portion of the contact pad. In addition, the semiconductor device includes a bump over the post-passivation interconnect layer and outside of the opening. The semiconductor device also includes a diffusion barrier layer physically insulating the bump from the post-passivation interconnect layer while electrically connecting the bump to the post-passivation interconnect layer.

Abstract: A package structure is provided comprising a die, a redistribution layer, at least one integrated passive device (IPD), a plurality of solder balls and a molding compound. The die comprises a substrate and a plurality of conductive pads. The redistribution layer is disposed on the die, wherein the redistribution layer comprises first connection structures and second connection structures. The IPD is disposed on the redistribution layer, wherein the IPD is connected to the first connection structures of the redistribution layer. The plurality of solder balls is disposed on the redistribution layer, wherein the solder balls are disposed and connected to the second connection structures of the redistribution layer. The molding compound is disposed on the redistribution layer, and partially encapsulating the IPD and the plurality of solder balls, wherein top portions of the solder balls and a top surface of the IPD are exposed from the molding compound.

Abstract: Various embodiments provide a light emitting diode (LED) module, an LED lighting device comprising an LED module, and methods for manufacturing an LED module and/or an LED lighting device. In one embodiment, the LED lighting device comprises a housing comprising a metal shell and defining a central opening; and an LED module having one or more LEDs mounted about a periphery of a first surface of the LED module. The LED module is oriented and retained within the central opening of the housing such that the first surface faces out of the central opening. Furthermore, the LED module is secured to the housing via the metal shell.

Abstract: A coil component includes a magnetic section containing a resin material and a filler component containing a magnetic metal, a coil conductor embedded in the magnetic section, and outer plating electrodes electrically connected to the coil conductor. At least one end portion of the magnetic section has a concave indentation. The surface of the indentation is overlaid with a hydrophobic insulating film. The surface of the magnetic section except for the indentation and extended end surfaces of the coil conductor are overlaid with an insulating protective film. The magnetic section, the coil conductor, and the protective film form a component body. The outer electrodes are placed on both end portions of the component body that exclude the indentation.

Abstract: A voltage regulator module includes a circuit board assembly, a magnetic core assembly and a molding compound layer. The circuit board assembly includes a printed circuit board and at least one switch element. The switch element is disposed on a first surface of the printed circuit board. Moreover, at least one first copper post, at least one second copper post, at least one third copper post and the magnetic core assembly are disposed on a second surface of the printed circuit board. The magnetic core assembly includes at least one opening. The at least one first copper post is penetrated through the corresponding opening, so that at least one inductor is defined by the at least one first copper post and the magnetic core assembly collaboratively. The molding compound layer encapsulates the printed circuit board and the magnetic core assembly in a double-sided molding manner.

Abstract: A display apparatus includes a substrate including a display area, a peripheral area outside the display area, and a bending area bendable along a bending axis, and an anti-crack projection disposed in the peripheral area and extending along at least a part of an edge of the substrate. A portion of the anti-crack projection in the bending area is a bending portion. A preset area including the bending portion on the substrate is a first area. A preset area of the substrate disposed outside the first area, having substantially the same area as that of the first area, and including a part of the anti-crack projection is a second area. A portion of the anti-crack projection belonging to the second area is a flat portion. The area occupied by the bending portion in the first area is greater than the area occupied by the flat portion in the second area.

Abstract: A connector device that includes a circuit board; a connector attached to the circuit board; and a molded resin that covers the entire circuit board and part of the connector, wherein: a housing of the connector contains a resin material and fibrous inorganic fillers, a groove is formed in a region of a surface of the housing that is covered with the molded resin, the groove being formed by removing the resin material with the inorganic fillers remaining, and extending in a direction that intersects a mounting direction in which a counterpart connector is to be mounted to the connector, the groove has a depth and a width in a range from 50 ?m to 150 ?m inclusive, and the groove is filled with the molded resin.

Abstract: A semiconductor package includes a semiconductor chip including a chip pad and an external bump pad electrically connected to the chip pad of the semiconductor chip. The external bump pad may include a trench portion extending from a perimeter surface of the external bump pad toward a center of the external bump pad. The semiconductor package includes an external connector on the external bump pad, with the external connector including a portion that is in the trench portion of the external bump pad.

Abstract: An interposer for a processor includes: an electrically insulating material having a first main side and a second main side opposite the first main side; a plurality of electrically conductive structures embedded in the electrically insulating material and configured to provide an electrical interface for a processor substrate at the first main side of the electrically insulating material and to provide electrical connections from the electrical interface to the second main side of the electrically insulating material; and a power device module embedded in the electrically insulating material and configured to convert a voltage provided at the second main side of the electrically insulating material to a lower voltage at the first main side of the electrically insulating material.

Abstract: A generator including a power combiner is provided. The power combiner includes a plurality of inputs, each input connectable to a respective power amplifier for receiving a respective power signal. A plurality of impedance matching circuit branches is connected to a respective one of the plurality of inputs. Each impedance matching circuit branch includes at least one high pass filter section and at least one low pass filter section through which the respective power signal passes. The impedance matching circuit branches are connected so as to combine the power signals from each power amplifier. An output is provided for outputting the combined power signal.

Abstract: A 3D printable feedstock ink is disclosed for use in a 3D printing process where the ink is flowed through a printing nozzle. The ink may be made up of a non-conductive flowable material and a plurality of chiplets contained in the non-conductive flowable material in random orientations. The chiplets may form a plurality of percolating chiplet networks within the non-conductive flowable material as ones of the chiplets contact one another. Each one of the chiplets has a predetermined circuit characteristic which is responsive to a predetermined electrical signal, and which becomes electrically conductive when the predetermined electrical signal is applied to the ink, to thus form at least one conductive signal path through the ink.

Abstract: A package module includes a core structure including a dummy member, one or more electronic components disposed around the dummy member, and an insulating material covering at least a portion of each of the dummy member and the electronic components, the core structure including a first penetration hole passing through the dummy member and the insulating material, a semiconductor chip disposed in the first penetration hole and having an active surface on which a connection pad is disposed and an inactive surface, an encapsulant covering at least a portion of each of the core structure and the semiconductor chip and filling at least a portion of the first penetration hole, and a connection structure disposed on the core structure and the active surface and including a redistribution layer electrically connected to the electronic components and the connection pad.

Abstract: In accordance with the embodiments described herein, there is provided an enclosure system including an enclosure formed of an insulating material, and at least one heatsink arrangement formed of a thermally-conductive material. The heatsink arrangement includes a heat conductive surface configured as one of a pyramid, an inverted pyramid, a plateau, a spherical segment, and an inverted spherical segment. The heatsink arrangement in the enclosure system can be integrally formed from the enclosure such that a demarcation between the heatsink arrangement and the enclosure is water-tight. The enclosure and the heatsink arrangement can also be simultaneously integrally formed and enmeshed using additive manufacturing processes.

Abstract: A surface-mountable component is disclosed. The surface-mountable component may include a substrate having a side surface and a top surface that is perpendicular to the side surface. The component may include an element layer formed on the top surface of the substrate. The element layer may include a thin-film element and a contact pad electrically connected with the thin-film element. The contact pad may extend to the side surface of the substrate. The component may include a terminal that is electrically connected with the contact pad at a connection area. The connection area may be parallel with the top surface of the substrate. The terminal may have a visible edge surface that is approximately aligned with the side surface of the substrate. The visible edge surface may be visible for inspection when the surface-mountable component is mounted to a mounting surface.

Abstract: A method for producing a semiconductor device of the present invention includes: step (I) of disposing one or more semiconductor elements each having an active surface, on a thermosetting resin film containing a thermosetting resin composition, such that the thermosetting resin film and the active surfaces of the semiconductor elements come into contact; step (II) of encapsulating the semiconductor elements disposed on the thermosetting resin film with a member for semiconductor encapsulation; step (III) of providing openings in the thermosetting resin film or a cured product thereof after step (II), the openings extending to the active surfaces of the semiconductor elements; and step (IV) of filling the openings with a conductor or forming a conductor layer inside the openings.

Abstract: A leadless integrated circuit (IC) package includes a spaced apart plurality of lead terminals on at least two sides of the leadless IC package, and an IC die including a substrate having at least a semiconductor surface including circuitry coupled to bond pads with the bond pads having bonding features thereon. The bonding features are flip chip bonded to the plurality of lead terminals. Mold compound is above the IC die and between adjacent lead terminals. The lead terminals and the substrate both extend out to have exposed surfaces at edges of the leadless IC package, and the lead terminals also provide a back side bondable contact.

Abstract: A board includes: a core structure; one or more first passive components embedded in the core structure; a first build-up structure disposed on one side of the core structure and including first build-up layers and first wiring layers; and a second build-up structure disposed on the other side of the core structure and including second build-up layers and second wiring layers. One surface of a first core layer contacting a first insulating layer is coplanar with one surface of each of the one or more first passive components contacting a first insulating layer, the other surface of each of the one or more first passive components covered with a second insulating layer is spaced apart from a second core layer, and the one or more first passive components are electrically connected to at least one of the plurality of first wiring layers and the plurality of second wiring layers.

Abstract: A method, system, and apparatus for fabricating a three-dimensional circuit is provided. In an embodiment, a method for fabricating a three-dimensional circuit by an additive manufacturing process includes determining a shape, location, and spatial orientation of a number of components, a number of dielectrics, and a number of metal interconnects for the three dimensional circuit. The method also includes obtaining fused filament fabrication (FFF) specific actions for a number of dielectric materials and the metal interconnects. The method also includes separating tool paths of the dielectric material and the metal interconnects into individual tool paths for each of the dielectric materials and the metal interconnects. The method also includes removing specific actions for one of the individual toolpaths from an FFF specific action. The method also includes rewriting the one of the individual toolpaths into micro-dispensing actions to control a tool for micro-dispensing ink.

Abstract: The disclosure relates to systems, methods and compositions for direct printing of printed circuit boards with embedded integrated chips. Specifically, the disclosure relates to systems methods and compositions for the direct, top-down inkjet printing of printed circuit board with embedded chip and/or chip packages using a combination of print heads with conductive and dielectric ink compositions, creating predetermined dedicated compartments for locating the chips and/or chip packages and covering these with an encapsulating layer while maintaining interconnectedness among the embedded chips. Placing of the chips can be done automatically using robotic arms.