Component Within Printed Circuit Board Patents (Class 361/761)
  • Patent number: 8946562
    Abstract: A printed circuit board includes a first layer stack and a second layer stack coupled to the first layer stack. The first layer stack includes a first electrically-insulating layer, a first electrically-conductive layer, and a cut-out area defining a void that extends therethrough. The first electrically-insulating layer includes a first surface and an opposite second surface. The first electrically-conductive layer is disposed on the first surface of the first electrically-insulating layer. The second layer stack includes a second electrically-insulating layer. The second electrically-insulating layer includes a first surface and an opposite second surface. One or more electrically-conductive traces are disposed on the first surface of the second electrically-insulating layer. The printed circuit board further includes a device at least partially disposed within the cut-out area.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: February 3, 2015
    Assignee: Covidien LP
    Inventors: Wayne L. Moul, Robert J. Behnke, II, Scott E. M. Frushour, Jeffrey L. Jensen
  • Patent number: 8942003
    Abstract: A multilayered printed wiring board includes a plurality of insulating layers; a plurality of wiring layers which are located between the corresponding adjacent insulating layers; and a plurality of interlayer connection conductors for electrically connecting the wiring layers through the insulating layers; wherein a cavity is formed through one or more of the insulating layers so as to insert a first electric/electronic component and an area for embedding a second electric/electronic component is defined for the insulating layers.
    Type: Grant
    Filed: February 14, 2013
    Date of Patent: January 27, 2015
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Takahiro Sahara, Atsushi Kobayashi, Kiyoshi Takeuchi, Masahiko Igaue
  • Patent number: 8942002
    Abstract: Stacked arrays of components are disclosed. In one embodiment, a first and a second layer of components are electrically and mechanically coupled to a thin interposer disposed between the first and second layers. The first layer can be configured to attach the stacked array to a host printed circuit board. The interposer can insulate the components from one another and also couple signals between the components on the first and second layers. In one embodiment, the components in the first and second layers are passive components.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: January 27, 2015
    Inventors: Shawn X. Arnold, Douglas P. Kidd, Sean A. Mayo, Scott P. Mullins, Dennis R. Pyper, Jeffrey M. Thoma, Kenyu Tojima
  • Patent number: 8941016
    Abstract: A laminated wiring board, includes: a first substrate in which a conductor circuit is formed on one surface of an insulating layer and an adhesive layer is formed on an other surface of the insulating layer, and conductors are formed in via holes that pass through the insulating layer and the adhesive layer so that the conductor circuit is partially exposed therefrom; an electronic component electrically connected to the conductor circuit by allowing electrodes of the electronic component to be connected to the conductors; an embedding member arranged around the electronic components so that the electronic component is embedded therein; and a second substrate having an adhesive layer laminated to face the adhesive layer of the first substrate and sandwich the electronic component and the embedding member, wherein each of the electrodes of the electronic component is continuous with the conductor circuit through two or more of the conductors.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: January 27, 2015
    Assignee: Fujikura Ltd.
    Inventor: Masahiro Okamoto
  • Publication number: 20150022982
    Abstract: A wiring board includes a substrate having an opening portion, electronic components positioned in the opening portion of the substrate and including first and second electronic components, and an insulation layer formed over the substrate and the first and second components. The first component has first and second electrodes having side portions on side surfaces of the first component, the second component has first and second electrodes having side portions on side surfaces of the second component, the first electrode of the first component and the first electrode of the second component are set to have substantially the same electric potential, and the first component and the second component are positioned in the opening portion of the substrate such that the side portion of the first electrode of the first component is beside the side portion of the first electrode of the second component.
    Type: Application
    Filed: October 9, 2014
    Publication date: January 22, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Yukinobu MIKADO, Shunsuke Sakai, Takashi Kariya, Toshiki Furutani
  • Publication number: 20150022985
    Abstract: A package substrate includes a core layer having a core top surface and a core bottom surface, and a build-up layer having a stacked structure in which a plurality of interconnection layers and a plurality of insulating layers are alternately stacked on the core top surface. The core bottom surface includes a board connecting area. A surface of the build-up layer includes a chip mounting area. The core layer includes at least one cavity defined by recess sidewalls extending upward from the core bottom surface and a recessed surface located at a higher level than or the same level as the core top surface, at least one device mounted in the at least one cavity, and through-electrodes electrically connecting the core top surface and the core bottom surface.
    Type: Application
    Filed: July 15, 2014
    Publication date: January 22, 2015
    Inventors: KYUNG-TAE NA, CHUL-WOO KIM, BOK-SIK MYUNG, SEUNG-HWAN LEE
  • Patent number: 8937257
    Abstract: An electronic module includes a substrate, a built-in electronic component and a surface mount electronic component. A suckable region is provided on a front surface of the substrate. When viewed in a see-through manner in a direction perpendicular or substantially perpendicular to the front surface of the substrate, the suckable region is inside of a region in which one built-in electronic component is built in and a center of gravity of the electronic module is located inside of the suckable region. A protective layer is not provided on the front surface of the substrate on which the surface mount electronic component is mounted.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: January 20, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Shigeru Tago
  • Patent number: 8937255
    Abstract: A method for electrically interconnecting two substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: January 20, 2015
    Assignee: Hypres Inc.
    Inventor: Vladimir V. Dotsenko
  • Patent number: 8934258
    Abstract: A motor controller comprising multiple types of interfaces assigned automatically, including a mother circuit board and a daughter circuit board. The daughter circuit board is plugged into the mother circuit board to form electric connection. The mother circuit board has a power circuit, a microprocessor unit of the mother circuit board, a rotor position sensing unit, a power inverter unit, and an analog sensing unit. The daughter circuit board includes a signal interface circuit. The mother circuit board further has a serial digital communication unit. The signal interface circuit includes a microprocessor of the daughter circuit board, and a serial digital communication unit of the daughter circuit board. The microprocessor unit of the mother circuit board communicates with the microprocessor of the daughter circuit board via the serial digital communication unit of the mother circuit board and the serial digital communication unit of the daughter circuit board.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: January 13, 2015
    Assignee: Zhongshan Broad-Ocean Motor Co., Ltd.
    Inventor: Yong Zhao
  • Patent number: 8929090
    Abstract: An object of the present invention is to propose a functional element built-in substrate which enables an electrode terminal of a functional element to be well connected to the back surface on the side opposite to the electrode terminal of the functional element, and which can be miniaturized.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: January 6, 2015
    Assignee: NEC Corporation
    Inventors: Yoshiki Nakashima, Shintaro Yamamichi, Katsumi Kikuchi, Kentaro Mori, Hideya Murai
  • Patent number: 8923007
    Abstract: In at least one embodiment, a circuit board assembly that includes a printed circuit board is provided. The printed circuit board includes a top surface and a bottom surface for supporting at least one through-hole electrical component. The printed circuit board defines at least one component hole extending from the top surface to the bottom surface for receiving the at least one through-hole electrical component. The at least one component hole includes a first section having a first diameter and a second section having a second diameter. The first diameter is different from the second diameter. Each of the first and the second sections are configured to receive solder paste for forming a solder joint with the at least one through-hole electrical component.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: December 30, 2014
    Assignee: Oracle America, Inc.
    Inventors: Michael Francis Sweeney, Jorge Eduardo Martinez-Vargas, Jr., Michael Clifford Freda
  • Patent number: 8923004
    Abstract: Several embodiments of stacked-die microelectronic packages with small footprints and associated methods of manufacturing are disclosed herein. In one embodiment, the package includes a substrate, a first die carried by the substrate, and a second die between the first die and the substrate. The first die has a first footprint, and the second die has a second footprint that is smaller than the first footprint of the first die. The package further includes an adhesive having a first portion adjacent to a second portion. The first portion is between the first die and the second die, and the second portion being between the first die and the substrate.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: December 30, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Peng Wang Low, Leng Cher Kuah, Hong Wan Ng, Seng Kim Ye, Chye Lin Toh
  • Patent number: 8921706
    Abstract: A component-embedded substrate includes an electrically insulating base (11) of resin, an electric or electronic embedded component (8) and a dummy embedded component (7) both embedded in the insulating base (11), a conductor pattern (18) formed on at least one side of the insulating base (11) and connected directly to or indirectly via a connection layer (6) to the embedded component (8) and the dummy embedded component (7), and a mark (10) formed on a surface of the dummy embedded component (7) and used as a reference when the conductor pattern (18) is formed, whereby positional accuracy of the conductor pattern (18) relative to the embedded component (8) can be improved.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: December 30, 2014
    Assignee: Meiko Electronics Co., Ltd.
    Inventors: Mitsuaki Toda, Yoshio Imamura, Takuya Hasegawa
  • Patent number: 8923008
    Abstract: A circuit board includes an insulation layer having a first surface and a second surface on the opposite side of the first surface, an electronic component positioned in the insulation layer and having a terminal, a conductive pattern formed on the second surface of the insulation layer and electrically connected to the terminal, and an insulative film formed on the second surface of the insulation layer and on the conductive pattern. The terminal of the electronic component has a protruding portion which protrudes from the second surface of the insulation layer.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: December 30, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Kazuhiro Yoshikawa, Toshiki Furutani
  • Patent number: 8923009
    Abstract: In a first conductive layer and a third conductive layer that are respectively closest to a core layer having a storage portion that penetrates therethrough, four first penetrating holes and four first penetrating holes are formed so as to overlap part of an opening edge of the storage portion that is projected onto the first conductive layer and the third conductive layer, respectively.
    Type: Grant
    Filed: June 4, 2013
    Date of Patent: December 30, 2014
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Tatsuro Sawatari, Yuichi Sugiyama, Hiroshi Nakamura, Masaki Naganuma, Tetsuo Saji
  • Patent number: 8923003
    Abstract: An electronic device may contain components such as flexible printed circuits and rigid printed circuits. Electrical contact pads on a flexible printed circuit may be coupled electrical contact pads on a rigid printed circuit using a coupling member. The coupling member may be configured to electrically couple contact pads on a top surface of the flexible circuit to contact pads on a top surface of the rigid circuit. The coupling member may be configured to bear against a top surface of the flexible circuit so that pads on a bottom surface of the flexible circuit rest against pads on a top surface of the rigid circuit. The coupling member may bear against the top surface of the flexible circuit. The coupling member may include protrusions that extend into openings in the rigid printed circuit. The protrusions may be engaged with engagement members in the openings.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: December 30, 2014
    Assignee: Apple Inc.
    Inventors: Alexander D. Schlaupitz, Joshua G. Wurzel
  • Patent number: 8916780
    Abstract: A Z-directed signal delay line component for insertion into a printed circuit board while allowing electrical connection to internal conductive planes contained with the PCB. In one embodiment the Z-directed delay line component is housed within the thickness of the PCB allowing other components to be mounted over it. The delay line embodiments include a W-like line and a plurality of spaced apart, semi-circular line segment connected such that current flow direction alternates in direction between adjacent semi-circular line segments, each of which in other embodiments can be varied by use of shorting bars. Several Z-directed delay line components may be mounted into a PCB and serially connected to provide for longer delays. The body may contain one or more conductors and may include one or more surface channels or wells extending along at least a portion of the length of the body.
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: December 23, 2014
    Assignee: Lexmark International, Inc.
    Inventors: Keith Bryan Hardin, John Thomas Fessler, Paul Kevin Hall, Brian Lee Nally, Robert Lee Oglesbee
  • Patent number: 8917520
    Abstract: A circuit substrate includes: a laminate substrate in which a conductive layer and an insulating layer are laminated; a filter chip that has an acoustic wave filter and is provided inside of the laminate substrate; and a chip component that is provided on a surface of the laminate substrate and is connected to the filter chip, at least a part of the chip component overlapping with a projected region that is a region of the filter chip projected in a thickness direction of the laminate substrate.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: December 23, 2014
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Sachiko Tanaka, Naoyuki Tasaka, Gohki Nishimura
  • Publication number: 20140369014
    Abstract: A wiring board comprises a base substrate that is a metal core substrate, and including an opening in which an interior component that is an electric component or an electronic component is to be mounted, and a terminal placement section on which a terminal of the interior component is to be mounted, the terminal placement section being formed around the opening of the base substrate, and inwardly recessed from a surface of the base substrate so that a part of the interior component is to be placed within the opening.
    Type: Application
    Filed: August 22, 2012
    Publication date: December 18, 2014
    Applicant: YAZAKI CORPORATION
    Inventor: Yusuke Takagi
  • Publication number: 20140369013
    Abstract: The electronic device is provided with a wiring board, a piezoelectric element (electronic component) which is mounted on an upper surface (front surface) of the wiring board so as to make its functional surface (major surface) face the upper surface, and a resin part which is adhered to a side surfaces of the piezoelectric element and to the wiring board and seals a facing space between the upper surface of the wiring board and the functional surface of the piezoelectric element. Further, the resin part is recessed in shape relative to the facing space.
    Type: Application
    Filed: September 13, 2012
    Publication date: December 18, 2014
    Applicant: KYOCERA CORPORATION
    Inventor: Akira Oikawa
  • Patent number: 8912639
    Abstract: Aspects of a method and system for configuring a transformer embedded in a multi-layer integrated circuit package are provided. In this regard, a windings ratio of a transformer embedded in a multi-layer IC package bonded to an IC may be configured, via logic, circuitry, and/or code in the IC, based on signal levels at one or more terminals of the transformer. The transformer may comprise a plurality of inductive loops fabricated in transmission line media. The integrated circuit may be flip-chip bonded to the multi-layer package. The IC may comprise a signal strength indicator enabled to measure signal levels input to or output by the transformer. The windings ratio may be configured via one or more switches in the IC and/or in the multi-layer package. The IC and/or the multi-layer package may comprise ferromagnetic material which may improve magnetic coupling of the transformer.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: December 16, 2014
    Assignee: Broadcom Corporation
    Inventor: Ahmadreza Rofougaran
  • Patent number: 8913402
    Abstract: This interposer provides interconnections between stacked layers of circuits, which may include integrated circuits, PC boards, and hybrid substrates. Fabricated as an integrated circuit itself using readily available process steps, this interposer uses single and dual-damascene layers to increase the density of usable interconnections on both its top and bottom surfaces. Access from a top surface to a bottom surface is provided by conductive through-vias that may be placed at a high density. For even greater density, interconnections may be routed within silicon trenches, while damascene processing reduces the total number of steps required for fabrication. The described techniques may be used to create double-sided integrated circuits.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: December 16, 2014
    Assignee: American Semiconductor, Inc.
    Inventors: John E. Berg, Douglas R. Hackler, Sr.
  • Publication number: 20140362535
    Abstract: A transmission control module includes a printed circuit board. The circuit board has conductor tracks routed on at least one layer of the circuit board and configured to electrically connect a carrier substrate to electrical components. The circuit board has an inner conductor track layer arranged between two insulating layers. A first outer insulating layer, at least on a first side of the circuit board, has a recess. Surfaces of conductor track sections of conductor tracks of the at least one inner conductor track layer are arranged at the bottom of the recess. The carrier substrate is inserted into the recess and makes electrical contact with the surfaces of the conductor track sections. The recess is filled with a moulding compound which covers at least the carrier substrate and the conductor track sections to protect the carrier substrate and the conductor track sections from transmission fluid.
    Type: Application
    Filed: October 30, 2012
    Publication date: December 11, 2014
    Inventors: Thomas Meier, Ingo Mueller-Vogt
  • Patent number: 8908377
    Abstract: A wiring board has a first rigid wiring board having an accommodation portion, a second rigid wiring board accommodated in the accommodation portion, an insulation layer formed over the first rigid wiring board and the second rigid wiring board, and a joint conductor extending in a direction from a first surface of the first rigid wiring board to a second surface of the first rigid wiring board on the opposite side of the first surface of the first rigid wiring board such that the joint conductor is penetrating through the boundary between the first rigid wiring board and the second rigid wiring board and joining the first rigid wiring board and the second rigid wiring board.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: December 9, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Nobuyuki Naganuma, Michimasa Takahashi
  • Patent number: 8908385
    Abstract: An interface module has an integrated component for replacing a component on a circuit board, the terminal contacts on the bottom side of the interface module being designed as provided for the contacts of the component on the circuit board, the interface module being divided into an adaptor part as a base module and a protocol converter part as a tool access module.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: December 9, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Claus Moessner, Burkhard Triess, Gert Maier, Peter Bach
  • Patent number: 8907227
    Abstract: The present invention relates to a device with portions of the device on plural substrate surfaces. The device includes a low resistivity substrate having first and second surfaces with a first electrically-conductive device component disposed over a first surface. An intermediate electrically-insulating layer may be disposed between the electrically-conductive component and the low resistivity substrate. A second electrically-conductive component is disposed over the second surface of the low resistivity substrate. A cavity formed in the low resistivity substrate is at least partially filled with a high resistivity material. One or more electrically-conducting pathways are formed in the high resistivity material electrically connecting the first electrically conductive component and the second electrically-conductive component to form a device. Exemplary devices include inductors, capacitors, antennas and active or passive devices incorporating such devices.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: December 9, 2014
    Assignee: Hong Kong Science and Technology Research Institute Company Limited
    Inventors: Ruonan Wang, Yan Liu, Song He, Tingting Wang
  • Publication number: 20140355232
    Abstract: A substrate with built-in electronic component includes: a core layer that includes a core material and a cavity formed in the core material and containing an insulating material; an insulating layer that includes a ground wiring and a signal wiring and is formed on the core layer; and a plurality of electronic components that each include a first terminal and a second terminal and are stored in the cavity, the plurality of electronic components each having one end portion and the other end portion, the first terminal being formed at the one end portion and connected to the ground wiring, the second terminal being formed at the other end portion and connected to the signal wiring, the plurality of electronic components having at least one of arrangements in which the first terminals face each other and in which the second terminals face each other.
    Type: Application
    Filed: August 15, 2014
    Publication date: December 4, 2014
    Inventors: Tatsuro SAWATARI, Yuichi SUGIYAMA
  • Patent number: 8902607
    Abstract: A testing apparatus and method of extending the life of a testing apparatus may comprise a chassis including a case having a testing module receptacle receiving a plurality of testing modules comprising at least one processor module and a plurality of test modules, each having the same physical footprint, including respective racking mechanisms and inter-module interface connectors; and a backplane with connectors connecting with a respective inter-module connector, and bus-work interconnecting the respective modules through the inter-module interface connectors and the backplane connectors. The backplane may comprise a battery and display connector. The chassis may comprise a display mounting receptacle configured to receive a display unit having a display connector configured to interface with the backplane display connector. A battery receptacle may receive a battery unit, such as a rechargeable battery.
    Type: Grant
    Filed: November 3, 2011
    Date of Patent: December 2, 2014
    Assignee: VeEX Inc.
    Inventors: Paul Ker Chin Chang, Cyrille Morelle
  • Patent number: 8902603
    Abstract: An electronic circuit contains a circuit board with conducting tracks to which one or more electronic components with conducting contacts are positioned overlying portions of the conducting tracks and each such electronic component is held in place by a clamp that covers and is contact with the top surface of the electronic components so as to hold their conducting contacts in electrical contact with the conducting tracks of the circuit board. The clamp can include a resilient layer held between the top surface of electronic components and a rigid clamping sheet.
    Type: Grant
    Filed: August 15, 2011
    Date of Patent: December 2, 2014
    Inventor: Carmen Rapisarda
  • Patent number: 8902604
    Abstract: A component support allows cost-effective, space-saving and low-stress packaging of MEMS components having a sensitive structure. The component support is suited, in particular, for MEMS components, which are mounted in the cavity of a housing and are intended to be electrically contacted. The component support is produced as a composite part in the form of a hollow body open on one side, the composite part being made essentially of a three-dimensionally shaped carrier foil flexible in its shaping, and an encasing material. The encasing material is molded onto one side of the carrier foil, so that the carrier foil is situated on the inner wall of the component support. At least one mounting surface for at least one component is formed on the inner wall having the carrier foil. The carrier foil is also provided with contact surfaces and insulated conductive paths for electrically contacting the at least one component.
    Type: Grant
    Filed: February 22, 2012
    Date of Patent: December 2, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Jochen Zoellin, Ricardo Ehrenpfordt, Ulrike Scholz
  • Publication number: 20140347833
    Abstract: An electronic component device, includes, a plurality of wiring layers including a component connection pad in a center part and an external connection pad in a periphery, an insulating layer formed on the wiring layers, and the insulating layer in which the component connection pad and the external connection pad are exposed, a frame member arranged on the insulating layer, and the frame member in which an opening portion is provided in an area of the center part in which the component connection pad is arranged, and a connection hole is provided on the external connection pad, an electronic component arranged in the opening portion of the frame member and connected to the component connection pad, a sealing resin formed in the opening portion of the frame member and sealing the electronic component, and a metal bonding material formed on the external connection pad in the connection hole.
    Type: Application
    Filed: April 24, 2014
    Publication date: November 27, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio HORIUCHI, Ryo FUKASAWA, Yuichi MATSUDA, Yasue TOKUTAKE
  • Publication number: 20140347834
    Abstract: An electronic component embedded printed circuit board and a method for manufacturing the same. The printed circuit board includes: a core having a cavity formed therein; an electronic component unit embedded in the cavity, including a plurality of electronic components, and having a coating layer formed on an outer peripheral surface of the electronic component unit to fix the plurality of electronic components; and an insulating layer laminated at least on the top of the core. An outer layer circuit pattern may be formed on the insulating layer.
    Type: Application
    Filed: May 23, 2014
    Publication date: November 27, 2014
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seok Kyu LEE, Takayuki HAZE, Soon Jin CHO
  • Patent number: 8897028
    Abstract: In a circuit module, a conductive partition is defined by a plurality of conductive chips provided on a component mounting surface. The component mounting surface is divided into a first block and a second block by the conductive partition. The shape of the conductive partition can be freely changed in accordance with the size of a circuit board and the arrangement of electronic components in the first block and the second block by changing the positions of the conductive chips and the number of conductive chips. Electromagnetic interference between the first block and the second block is prevented by the conductive partition.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: November 25, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Tadaji Takemura
  • Patent number: 8895863
    Abstract: A multilayer printed circuit board includes an insulating substrate, circuit layers arranged in the insulating substrate, an electronic component, an electrode disposed on the circuit layer exposed from a surface of the insulating substrate and including a soldered portion at which a terminal of the electronic component is soldered, an internal layer conductor disposed on the circuit layer located inside the insulating substrate and defining through holes in a radial manner centering on the soldered portion, a heat releasing conductor disposed on the circuit layer next to the circuit layer on which the internal layer conductor is disposed, and connection vias inserted in the through holes and coupling the electrode and the heat releasing conductor so as to enable a heat transfer between the electrode and the heat releasing conductor. The internal layer conductor and the heat releasing conductor overlap a whole area of the soldered portion.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: November 25, 2014
    Assignee: DENSO CORPORATION
    Inventors: Masashi Inaba, Akito Itou
  • Publication number: 20140334120
    Abstract: An electronic module includes a substrate, which includes a dielectric material having multiple sides, including first and second sides, and first and second cavities indented respectively within the first and second sides. First and second conductive contacts within the first and second cavities are configured for contact with at least first and second electronic components that are mounted respectively in the first and second cavities. Conductive traces within the substrate are in electrical communication with the first and second conductive contacts.
    Type: Application
    Filed: July 24, 2014
    Publication date: November 13, 2014
    Inventors: Michael Dakhiya, Eran Shaked
  • Publication number: 20140328038
    Abstract: An electronic component-embedded module mountable on a motherboard has a multilayer board wherein a cavity is formed in order to place an electronic component. The multilayer board includes a board-side resin layer with external electrodes for mounting onto the motherboard and board-side via-conductors connected thereto, an intermediate resin layer with intermediate via-conductors connected to the board-side via-conductors, and a component-side resin layer stacked on the intermediate resin layer and having component-side via-conductors. The component-side via-conductors include first component-side via-conductors connected to the intermediate via-conductors and second component-side via-conductors bonded to the electronic component and connected to the first component-side via-conductors.
    Type: Application
    Filed: July 17, 2014
    Publication date: November 6, 2014
    Inventor: Noboru Kato
  • Patent number: 8879276
    Abstract: An embedded device 105 is assembled within a flexible circuit assembly 30 with the embedded device mid-plane intentionally located in proximity to the flexible circuit assembly central plane 115 to minimize stress effects on the embedded device. The opening 18, for the embedded device, is enlarged in an intermediate layer 10 to enhance flexibility of the flexible circuit assembly.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: November 4, 2014
    Assignee: Power Gold LLC
    Inventor: James Jen-Ho Wang
  • Publication number: 20140321084
    Abstract: Disclosed herein are a printed circuit board including an electronic component embedded therein and a method for manufacturing the same. The printed circuit board including an electronic component embedded therein includes: a core formed with a cavity which is formed of a through hole and has a side wall formed with an inclined surface having a top and bottom symmetrically formed based on a central portion thereof; an electronic component embedded in the cavity; insulating layers stacked on upper and lower portions of the core including the electronic component; and external circuit layers formed on the insulating layers.
    Type: Application
    Filed: October 23, 2013
    Publication date: October 30, 2014
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seung Eun LEE, Yul Kyo CHUNG, Yee Na SHIN, Doo Hwan LEE
  • Patent number: 8873245
    Abstract: An embedded chip-on-chip package includes a printed circuit board having a recessed semiconductor chip mounting unit constituted by a recess in the printed circuit board and a circuit pattern at the bottom of the recess, a first semiconductor chip embedded in the recessed semiconductor chip mounting unit and electrically connected to the circuit pattern at the bottom of the recess, and a second semiconductor chip mounted to the recessed semiconductor chip mounting unit and electrically connected to the first semiconductor chip and the printed circuit board independently of each other.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: October 28, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-hoon Kim, Hee-seok Lee
  • Patent number: 8872041
    Abstract: A multilayer laminate package and a method of manufacturing the same are provided. The multilayer laminate package includes a cavity layer, a non-cavity layer, an electronic component, and a metalized blind via. The cavity layer includes a first adhesive layer and two first circuit layers, which are stacked with the first adhesive layer between, and an opening. The non-cavity layer includes a second adhesive layer and a second circuit layer. The non-cavity layer is bonded to the cavity layer with the second adhesive layer so as to close one side of the opening. The electronic component is mounted in the opening and is electrically connected to the non-cavity layer exposed through the opening. The metalized blind via electrically connects the non-cavity layer to one of the circuit layers of the cavity layer.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: October 28, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Baik-Woo Lee, Ji-Hyuk Lim, Seong-Woon Booh
  • Patent number: 8867226
    Abstract: A MMIC having: a substrate; a plurality of active and passive electrical elements disposed on a top surface of the substrate; a plurality of coplanar waveguide transmission line sections disposed on the top surface of the substrate for electrically interconnecting the active and passive electrical elements; an electrical conductor disposed on a bottom surface of the substrate under the coplanar waveguide section. Edges of ground plane conductors of the coplanar waveguide (CPW) sections have slots therein in regions thereof connected to the active and passive devices. The design of such circuit includes mathematical models of the CPW with the pair of local ground planes and the strip conductor thereof have relatively narrow connectable ports.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: October 21, 2014
    Assignee: Raytheon Company
    Inventors: Matthew C. Tyhach, Francois Y. Colomb
  • Patent number: 8867225
    Abstract: A wiring board includes: a core layer having a through hole therethrough and comprising a first surface and a second surface opposite to the first surface; a first wiring layer formed on the first surface of the core layer and having a first opening which is communicated with the through hole, wherein an opening area of the first opening is larger than that of the through hole in a plan view; an electronic component disposed in the through hole and the first opening and having a first surface, and a second surface opposite to the first surface, the electronic component further having a pair of terminal on the first surface thereof; and a first resin layer filled in the through hole, the first opening and a gap between the pair of terminals so as to cover the second surface and the side surface of the electronic component.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: October 21, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Junji Sato
  • Publication number: 20140307391
    Abstract: Representative implementations of devices and techniques provide a printed circuit board (PCB) arranged to at least partly surround an electrical component having a plurality of non-coplanar outer surfaces. The PCB is arranged to fold at one or more predetermined boundaries.
    Type: Application
    Filed: April 13, 2013
    Publication date: October 16, 2014
    Applicant: Infineon Technologies AG
    Inventor: Martin STANDING
  • Publication number: 20140307403
    Abstract: This publication discloses a circuit-board construction and a method for manufacturing an electronic module, in which method at least one component (6) is embedded inside an insulating-material layer (1) and contacts (14) are made to connect the component (6) electrically to the conductor structures (14, 19) contained in the electronic module. According to the invention, at least one thermal via (22), which boosts the conducting of heat away from the component (6) is manufactured in the insulating-material layer (1) in the vicinity of the component (6).
    Type: Application
    Filed: June 25, 2014
    Publication date: October 16, 2014
    Inventors: Günther Weichslberger, Arno Kriechbaum, Mike Morianz, Nikolai Haslebner, Johannes Stahr, Fritz Haring, Gerhard Freydl, Andrea Koertvelyessy, Mark Beesley, Andreas Zluc, Wolfgang Schrittwieser
  • Publication number: 20140307402
    Abstract: Provided is a substrate with built-in electronic component including a component storage layer and two buildup layers. The component storage layer includes an electronic component and a cover portion having an insulating property. The electronic component includes a terminal surface and a main body. The cover portion includes a first surface formed to be flush with the terminal surface, covers the main body of the electronic component, and has a first linear expansion coefficient. The two buildup layers each include an insulating layer and a via portion. The insulating layer is adjacent to the cover portion and has a second linear expansion coefficient larger than the first linear expansion coefficient. The via portion is provided in the insulating layer and connected to the terminal surface. The insulating layer of one of the two buildup layers is formed to be in contact with the terminal surface and the first surface.
    Type: Application
    Filed: December 18, 2013
    Publication date: October 16, 2014
    Applicant: Taiyo Yuden Co., Ltd.
    Inventors: Yuichi SUGIYAMA, Tatsuro SAWATARI, Yusuke INOUE, Masashi MIYAZAKI
  • Patent number: 8861215
    Abstract: A device includes: a wiring board having first and second surfaces opposing each other; and a plurality of memory packages on the first surface. The wiring board includes: a first set of terminals on the first surface; a plurality of second sets of terminals on the first surface; and a plurality of first signal lines. The terminals of the first set receive respective ones of a plurality of first signals supplied from a control device. Each of the second sets is provided for a corresponding one of the memory packages. The terminals of each of the second sets contact the corresponding one of the memory packages. The first signal lines extend from respective ones of the terminals of the first set while coupling respective ones of the terminals of each of the second sets. The first signal lines extend on the first surface without extending in the wiring board.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: October 14, 2014
    Assignee: PS4 Luxco S.a.r.l.
    Inventors: Miho Nomoto, Yukitoshi Hirose
  • Publication number: 20140300001
    Abstract: A printed circuit board, a manufacturing method thereof, and a semiconductor package including the printed circuit board. The printed circuit board includes a base substrate including a plurality of circuit patterns, a cavity formed above the base substrate, a pad embedded in the base substrate and being exposed through the substrate bottom surface of the cavity, and an electronic component mounted in the cavity and electrically connected to the pad. A cavity having a predetermined depth is formed in a base substrate of a printed circuit board so as to mount an electronic component therein, such that a gap between an upper semiconductor package and a lower semiconductor package may be obtained even if pitches between the balls are decreased for high density and high performance of the upper semiconductor package in the manufacturing of a semiconductor package having a PoP structure.
    Type: Application
    Filed: October 31, 2013
    Publication date: October 9, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seong Ryul Choi, Suk Chang HONG, Sang Kab PARK, Kwang Seop YOUM
  • Publication number: 20140301054
    Abstract: To provide a light emitting element mounting wiring substrate having a light emitting element mounting section on a substrate main body having a front surface and a back surface, and a confined component electrically connected to the light emitting element, such that the confine component does not obstruct the optical path of the light emitted from the light emitting element, resulting in uniform distribution of light intensity.
    Type: Application
    Filed: November 22, 2012
    Publication date: October 9, 2014
    Inventors: Makoto Nagai, Kenzo Kawaguchi
  • Patent number: 8853559
    Abstract: The invention relates to a high-voltage insulation circuit board which is used in an electric power apparatus such as an electric power converter or the like such as power semiconductor device, inverter module, or the like and provides an insulation circuit board in which electric field concentration at the end sections of a wiring pattern is reduced, partial discharging is suppressed, and a reliability is high. According to the invention, there is provided an insulation circuit board having: a metal base substrate; and wiring patterns which are formed onto at least one of the surfaces of the metal base substrate through an insulation layer, characterized in that between two adjacent wiring patterns in which an electric potential difference exists among the wiring patterns, at least one or more wiring patterns or conductors which are in contact with the insulation layer and have an electric potential in a range of the electric potential difference between the adjacent wiring patterns are arranged.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: October 7, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Hironori Matsumoto, Jumpei Kusukawa
  • Publication number: 20140293561
    Abstract: A wiring board or an electronic component embedded substrate includes a substrate that includes a resin containing a plurality of fillers; and a via that is electrically connected to at least one interconnect provided to the substrate, wherein the via includes a mix area in which metal is provided between the fillers on an inner radial side with respect to the substrate. A method of manufacturing a wiring board or an electronic component embedded substrate includes preparing a substrate that includes a resin containing a plurality of fillers; forming a via formation hole in the substrate; performing an ashing process on at least an inner wall of the via formation hole; and performing electroless plating on the inner wall of the via formation hole.
    Type: Application
    Filed: June 12, 2014
    Publication date: October 2, 2014
    Applicant: TDK Corporation
    Inventors: Hiroyuki UEMATSU, Kenichi KAWABATA