Abstract: A circuit board, which is formed with bump patterns subject to a narrow variation in height on the surface of the circuit board, and which permits high-density packaging of a semiconductor component thereon. In this circuit board, conductor circuits formed by electroplating are embedded in an insulating base that is formed of a resist layer and an insulating substrate, and bumps are exposed in the surface of the insulating base. The bumps and the conductor circuits are connected electrically with one another by means of pillar-shaped conductors that are formed by electroplating. Each bump is a multilayer structure in two or more layers formed by successively depositing different electrically conductive materials by electroplating.

Abstract: A backing plate facilitates electrical probing of VLSI IC signals in an array of signal via pads on the back side of a printed circuit board and which correspond to an LGA of socket pads on the front side of the printed circuit board. The backing plate is constructed of electrically non conductive mechanically stiff material that already has drilled therein a hole for each signal via pad that might be probed. Polyamide is a suitable material for such a backing plate. Special symbols, legends and suitable grid identification axes can be silk screened onto the side of the backing plate that remains visible when installed. The drilled insulative backing plate can be equipped with captive threaded studs, if desired. Alternatively, it may simply have holes to receive fasteners, or have captive female threaded fasteners in lieu of holes.

Abstract: An apparatus and method for connecting and interconnecting spherical ICs. The apparatus includes an enclosure which is used to hold and secure one or more spherical ICs or to connect to a device such as a printed circuit board. The enclosure includes two groups of electrical contact points. These contact points may be solder bumps, pads, leads, or any other type of connector. One group of contact points on the enclosure aligns and connects with a corresponding set of contact points on the first spherical shaped IC and the other group of contact points on the enclosure aligns and connects with a corresponding set of contact points on the other device. The two groups of enclosure contact points are interconnected with each other through a circuit located inside the enclosure. As a result, alignment is no longer required by the contact points on the spherical shaped IC and the other device.

Abstract: A semiconductor device comprises a plurality of bump electrodes at least to one surface. A circuit substrate is formed with a laminate structure having an inner layer circuit and a mounting pad is formed on the substrate. The mounting pad has a concave portion and the bottom of the concave portion is in contact with the inner layer circuit. Further, an sealing resin is provided on the substrate. The bump electrode and the concave portion of the mounting pad are opposed, and the bump electrode is pressed to the bottom of the concave portion of the mounting pad, thereby deforming the pointed shape portion at the top end of the bump electrode. By the deformation the pointed shape portion, the contact portion between the bump electrode and the mounting pad is gradually enlarged from a point to a plane. After deforming the bump electrode by a predetermined amount, the sealing resin is hardened and the semiconductor device is mounted on a substrate.

Abstract: A metal carrier has a dielectric material with a thickness of less than 0.004 inch and electrical voltage insulation characteristics of at least 2500 volts formed on a surface. A donut configured land defines at least one via or opening for removing dielectric material selectively. Reflow solder is used to form electrical interconnections, and the vias provide thermal dissipation sufficient to conform to safety requirements.

Abstract: An electronic circuit apparatus has first and second pad electrodes arranged on a substrate to be separated by a first interval, first and second chip electrodes to be separated by a second interval smaller than the first interval, a first solder for fixedly attaching the first chip electrode to the first pad electrode and a second solder for fixedly attaching the second chip electrode to the second pad electrode. Because the first interval is longer than the second interval, any constricted portion does not exist in each of the first and second solders. Therefore, because any stress is not concentrated on any portion of each of the first and second solders, the occurrence of a crack in each of the first and second solders can be prevented.

Abstract: A technique is provided for correcting miswiring on a chip for test purposes. When an IC chip has been formed during a prototype operation, often I/O wiring is found to be deficient. This deficiency can be corrected by providing an interposer which has pads on one surface corresponding to the pads on the IC chip and pads on the opposite surface of the interposer corresponding to the desired output connections. Vias are formed through the interposer and the miswired connections on the chip surface are wired through the vias to the proper connections for the output of the chip as well as the proper connections on the chip being wired to the proper connections for the output connection on the opposite surface of the interposer.

Abstract: There is disclosed herein a leadless electronic component (LEC) which avoids solder joint crack initiation. A preferred embodiment of the LEC 110 comprises a body portion 112 having terminations 114 arranged thereabout, each termination having a bottom portion 124 with an interior edge 126, wherein the interior edge has a substantially meniscus-like shape oriented so as to be concave with respect to a centroid of the LEC.

Abstract: A connector for microelectronic elements includes a sheet-like body having a plurality of holes, desirably arranged in a regular grid pattern. Each hole is provided with a resilient laminar contact such as a ring of a sheet metal having a plurality of projections extending inwardly over the hole of a first major surface of the body. Terminals on a second surface of the connector body are electrically connected to the contacts. The connector can be attached to a substrate such a multi-layer circuit panel so that the terminals on the connector are electrically connected to the leads within the substrate. Microelectronic elements having bump leads thereon may be engaged with the connector and hence connected to the substrate, by advancing the bump leads into the holes of the connector to engage the bump leads with the contacts. The assembly can be tested, and if found acceptable, the bump leads can be permanently bonded to the contacts.

Abstract: The present invention relates generally to an apparatus for securely retaining a small battery or electric cell on a printed circuit board, and for providing electrical contacts which engage the battery for use in an electronic circuit. The present invention provides an improved mechanical attachment of the battery retention apparatus to the circuit board by means of a plurality of tabs which extend through and engage the printed circuit board. These tabs are separate and apart from the electrical connections to the circuit board.The apparatus of the present invention provides a lightweight, low-profile, rugged battery retention mechanism capable of withstanding impulse forces. The apparatus is low-cost, easily manufactured, and facilitates easy installation, and is particularly well suited for remote control devices and other hand-held or portable units.

Abstract: A technique for applying uniform force to an IC chip module, urging the module into electrical contact with one face of a circuit board, is provided. One face of the board has contact pads, and the module has contact members on one surface corresponding to the contact pads. A first clamping member is provided having a pressure applying section and a reaction section mounted for movement toward and away from each other. A second clamping member having a pressure applying section is provided. The module is interposed between the pressure applying element of one of the clamping members and the substrate with the contact members on the module in electrical contact with the pads on the board. Several pins interconnect the reaction section of the first clamping member and the second clamping member to restrain movement of the reaction section of the first clamping member away from the second clamping member.

Abstract: An arrangement of mounting pads on a substrate having segments, at least one of which has a plurality of mounting pads in a first row. Mounting pads of the first row are in connection with a corresponding offset through-hole oriented outwardly in the same general direction as a bisector definable for that segment, or oriented outwardly in the same general direction as a diagonal of the arrangement's outer shape. The segment defined can have a second and third row of mounting pads. The arrangement could include second, third, fourth, and so on, segments each with a plurality of mounting pads. Also included is an arrangement of Ball Grid Array (BGA) mounting pads on a circuit board for connection with electrical contacts of a BGA package, having: a first segment of a plurality of mounting pads in a first row with each mounting pad of the first row in connection with an offset through-hole oriented outwardly in the same general direction as a bisector definable for that first segment.

Abstract: A technique is disclosed for forming a chip cube from a plurality of chips laminated together in front-to-back relationship, the edges of the chip forming a cube face having a set of connectors for each chip thereon. A number "X" of functional chips is required for the operation, and "X+Y" is the number of chips provided in the stack such that there is Y number of chips greater than the number of functional chips required. If any number of chips equal to Y or less are found to be defective, there are enough chips remaining to perform the required function. Thereafter X number of good chips are connected to output circuitry through an interposer. Electrical connectors are provided on all of the IC chips. Contact pads for all of the connectors are provided on one face, and outlet pads are provided on the opposite face of the interposer for at least Y number of outlets. The interposer has vias at least equal to the number of outlet pads.

Abstract: A self-supporting redistribution structure for directly mounting a semi-conductor chip to a multilayer electronic substrate is separately fabricated and then laminated to the multilayer substrate. The redistribution structure comprises a dielectric layer having plated vias communicating between its two major surfaces, redistribution lines and input/output pads on its upper major surface and joining patterns on its lower margin surface for electrical connection with the multilayer substrate. The metal plating in the plated vias of the redistribution device connects respective input/output pads on the upper surface of the redistribution structures with the joining patterns on its lower major surface. Input/output pads define an even (planar) topography with the redistribution lines to facilitate flip chip joining.

Abstract: A printed circuit board (PCB) having an epoxy barrier disposed around its throughout slot in a semiconductor chip mounting region, and a BGA semiconductor package using such a PCB, thereby exhibiting a high moisture discharge characteristic. The epoxy barrier includes a copper layer and a solder resist layer both disposed around the throughout slot and is defined by a groove which is disposed around the throughout slot while spacing apart from the periphery of the throughout slot by a desired distance. Alternatively, the epoxy barrier includes a solder resist layer formed to a desired width around the throughout slot on the uppermost layer laminated on the PCB. By virtue of the epoxy barrier, the throughout slot is not closed by epoxy resin coated over the PCB. As a result, it is possible to externally discharge moisture which expands in the PCB upon carrying out a series of processes for the fabrication of the package at a high temperature or mounting the package on a mother board.

Abstract: A method for mounting an integrated circuit includes a plurality of solder balls arrayed on the bottom surface of a package of the integrated circuit on a circuit board. These solder balls provide for surface mounting of the integrated circuit to a circuit board by solder reflow. The array of solder balls can be planarized so that each of the plural solder balls participate in defining a truly planar solder ball contact array for the integrated circuit package. Methods of manufacturing the integrated circuit with a package having planarized solder balls in an array dependent from a bottom surface thereof are set forth. The truly planarized solder ball contact array of the integrated circuit package affords nearly absolute reliability in forming of surface-mount electrical connections between the integrated circuit package and the circuit board on which the package is to mount.

Abstract: A socket/adapter assembly includes a insulative support member for supporting terminals soldered to connection regions of a leadless integrated circuit (IC) package, a printed circuit board, or another intercoupling component. The insulative support member is removable/replaceable from the terminals to allow visual inspection of the solder connections between the terminals and connection regions. The terminals of the socket/adapter assembly are retained by the insulative support member before the connections soldered. The insulative support member is then removed so that the individual solder connections can be examined for defective solder joints and repaired, if necessary.

Abstract: A method and structure for controlling solder height of a surface mount device on a substrate uses electrical connection pads (105, 105') disposed onto a substrate (101). A height control pad (111) is also disposed onto the substrate (101) positioned apart from the electrical connection pads (105, 105'). Solder fillets (107, 107', 113) are disposed onto both the electrical connection pads (105, 105') and the height control pad (111). A component (103) having an electrical termination portion (109, 109') in contact with the solder fillets (107, 107') associated with the electrical connection pads (105, 105 ') and a body portion (115) in contact with the solder fillet (113) associated with the height control pad (111).

Abstract: An electrical interconnection method, where two substrates are interconnected by an electrical connection medium, includes the steps of: depositing conductive particles on the connection surface of one of two substrates which are to be interconnected; depositing paste on the connection surface of another substrate; and interconnecting the connection surfaces of the two substrates. Also, the interconnection method according to another embodiment embodiment includes the steps of: depositing conductive particles on the connection surface of one of two substrates which are to be interconnected; contacting the connection surfaces of the two substrates; and injecting paste into a gap between the two substrates to interconnect the two substrates.

Abstract: A multi-terminal surface-mounted electronic device with contact surfaces placed entirely or partly around several sides, as well as to a method for manufacturing it. The parts according to the invention allow assembly on a circuit board such as p.c.b. and foil in forward, backward and sideward direction. Previous multi-terminal surface-mounted electronic devices could as a rule be mounted in one direction only. For all other directions such as backwards and sidewards costly special constructions or fundamental changes to the circuit board (printed-circuit board, foil) were necessary. In accordance with the invention, an electronic component is located in a housing and both the electronic component and the housing are joined to a base strip. The base strip provides the terminals whose contact surfaces are so formed that they can embrace the entire housing either completely or partially.

Abstract: A device and method for mounting a surface mount package onto a printed circuit board includes inserting a pin through a printed circuit board feedthrough for providing movement of the pin within the feedthrough. One end of the pin is soldered to conductive surfaces on the bottom side of the printed circuit board while the other end of the pin id soldered to a surface mount package pad. The package is mounted in a spaced relation with a printed circuit board top surface. The pin is soldered to the board conductive surface using a high temperature solder for forming a solder joint which remains solid during subsequent soldering using a low temperature solder such as a lead tin solder type. The pin is then soldered to the pad of the surface mount package using the low temperature lead tin solder for forming a solder joint between the pad and pin.

Abstract: An electronic circuit device comprising a printed wiring board having a major surface and pads provided on the major surface of the printed wiring board, a plurality of electrodes provided partly on at least one major surface of the leadless component and partly on sides of the leadless component, a plurality of bumps provided on the pads, providing a gap between the major surface of the printed wiring board and the major surface of the leadless component, and electrically connecting those parts of the electrodes which are provided on the major surface of the leadless component to the pads, and a plurality of electrically conductive members integral with the bumps, extending from the bumps to those parts of the electrodes which are provided on the sides of the leadless component.

Abstract: A printed circuit board includes a multi-component mounting footprint for mounting one of several possible differently sized discrete component packages on the circuit board. The multi-component mounting footprint includes a first mounting pad which has two connection points for mounting a connector on one of two different sized components. The footprint also includes a second mounting pad which is symmetric to the first mounting pad. About the mounting pads are cut outs which prevent solder buildup when either one of two different sized components are mounted thereon.

Abstract: A ceramic circuit board wherein a copper circuit plate is directly bonded at a predetermined position on a ceramic substrate and heat is applied; or the copper circuit plate is integrally bonded through a brazing material containing an active metal, such as Ti, Zr and Hf; and a semiconductor element is bonded onto a semiconductor element mounting portion of the copper circuit plate through a solder layer. The copper plate element is formed with grooves or holes thereon and is bonded on the semiconductor element mounting portion of the copper circuit plate, and the semiconductor element is integrally bonded onto a surface of a grooved or holed side of the copper plate element through a solder layer.

Abstract: Conductive thermoplastic adhesive masses are formed on conductor lines on a substrate. A chip has an integrated circuit, first and second chip surfaces, and conductor bumps connected to the integrated circuit and protruded from the first chip surface. The conductor bumps are glued to the conductor lines by the conductive thermoplastic adhesive masses. A thermoplastic adhesive layer is formed on the second chip surface. A sealing thermoplastic adhesive mass is formed on the substrate. A sealing cap has an under end surface, an internal wall surface, and an internal upper surface. The internal wall and upper surfaces define a hole which receives the chip with the internal upper surface glued to the second chip surface by the thermoplastic adhesive layer and with the under end surface glued to the substrate by the sealing thermoplastic adhesive mass.

Abstract: The present method employs a first plating resist for forming circuit lines on a carrier substrate. While the plating resist is still in place a metal, such as nickel, is deposited on top of the circuit lines. A second plating resist is employed for plating solder on the circuit lines at solder sites. At this stage additional solder can be deposited at each solder site to provide or supplement the necessary low melt solder required for forming a solder joint. The first and second resists along with solder thereon are then stripped and copper foil on the carrier substrate is etched away around the circuit lines. A soldermask is then formed on the carrier substrate over the circuit lines except for circuit lines in the chip sites. The soldermask has a single large opening at each chip site which has lateral dimensions which are slightly larger than the lateral dimensions of the chip to be connected at the chip site.

Abstract: Method and circuit board structure for leveling the tops of solder balls of a BGA semiconductor package is disclosed. In order to level the solder balls, the sizes of solder ball lands used for welding the solder balls to the circuit board are controlled in accordance with portions of the circuit board. The invention thus achieves the coplanarity of the solder balls regardless of thermal bending of the plastic body and circuit board of the BGA semiconductor package. In an embodiment, a plurality of solder ball lands having different sizes are formed on the circuit board prior to forming the solder balls on the lands. In another embodiment, a plurality of solder ball lands having the same size are formed on the circuit board prior to forming an insulating mask on the circuit board in order to form differently-sized exposed inside portions of solder ball lands.

Abstract: A button contact and array of button contacts are provided for surface mounting a leadless IC device to a circuit board. The button contacts of the button contact array have a substantially flat body lying in a plane and oppositedly directed contact points protruding from resiliently deflectable contact support arms of said body. The button contacts of the invention, which provide a low profile contact between surface mounted components, are suitable for high frequency applications, and particularly high frequency test and burn-in applications, and are relatively durable.

Abstract: An adapter (1, FIG. 1) is provided for the connection of an optoelectronic component such as an LED (light emitting diode) (2) to a circuit board (8) that lies in a case (34), wherein the adaptor positions the LED close to a window (32) in the top wall (30) of the case. The adapter has a pair of passages (4, 5) for holding conductors (11, 12) that connect terminals of the LED to SMD (surface mount device) contacts (6) that connect to the circuit board. The adapter holds the LED high enough above the circuit board, for the upper face (36) of the LED to lie in or close to the level of the window, so light from the LED can be readily seen from outside the case.

Abstract: An opening is formed in a region of a circuit board opposite a vibration region E of a piezoelectric element. The piezoelectric element is mounted to the circuit board, and electrical connections extend between and support the piezoelectric element from the circuit board by a solder. The soldered connection portions are surrounded by a bonding agent. An opening in the circuit board prevents any excess bonding agent from invading the vibration region E of the piezoelectric element, and the bonding agent assists in dispersing stresses exerted on the circuit board thereby minimizing the stresses transferred to the piezoelectric element.

Abstract: A method of interconnecting circuit modules (30) to mother boards (50) each having a plurality of mating solder pads (32, 52) is available. The solder pads (32, 52) have respective pairs of arms (40, 42) and (54, 56) with a venting channel (36, 58) formed between each pair of arms to vent solder medium when the solder pads are reflowed to interconnect the circuit modules and mother boards.

Abstract: High melting temperature Pb/Sn 95/5 solder balls are connected to copper pads on the bottom of a ceramic chip carrier substrate by low melting temperature eutectic Pb/Sn solder. The connection is made by quick reflow to prevent dissolving Pb into the eutectic solder and raising its melting temperature. Then the module is placed on a fiberglass-epoxy circuit board with the solder balls on eutectic Pb/Sn solder bumps on copper pads of the board. The structure is reflowed to simultaneously melt the solder on both sides of the balls to allow each ball to center between the carrier pad and circuit board pad to form a more symmetric joint. This process results in structure that are more reliable under high temperature cycling.

Abstract: A simple process for card assembly by Direct Chip Attachment (DCA) uses electrically conductive adhesives. Two methods create the same intermediate wafer product with a layer of insulative thermoplastic and conductive thermoplastic bumps. After sawing or dicing the wafer to form the chips, the chips are adhered to chip carriers with conductive pads which match the conductive thermoplastic bumps, using heat and pressure. Chips may be easily removed and replaced using heat.

Abstract: An array of closely spaced uniform solder balls located on a substrate of an electronic module and electrically connected with terminals of circuitry, to connect the module to a complementary array of terminals as on a printed circuit board. The array is fabricated by preparing an array of terminal pads on the substrate, perforating a sheet of dielectric tape to create precise and uniform holes, and thereafter fusing the tape onto the substrate so that the holes are aligned over the substrate's terminal pads. Solder balls, each having a uniformly larger diameter than the respective hole, are then placed in the holes and heated to reflow them, so that a small part of each solder ball fills the volume defined by a hole in the dielectric tape and bonds to the terminal pad of the substrate within the hole, while the remainder of the solder ball remains generally spherical above the dielectric tape.

Abstract: A semiconductor memory module is formed of semiconductor packages respectively having at least one defect data line combined to be mounted to a module substrate which has two rows of auxiliary pads for excluding the defect data line of the mounted semiconductor packages from overall data lines of the module to thus attain more than a required memory capacity. By connecting the auxiliary pads with coupling units of resistors or jumper cables to isolate the defect data lines, the semiconductor memory module achieves the required memory capacity and utilizes defective semiconductor packages to reduce manufacturing costs, to attain excellent compatibility resulting from employing all kinds of semiconductor packages, and to simplify the data line connection process. Further, reworking semiconductor package is easy which improves yield, and humid air is prevented from permeating into the interior of the molding resin thereby preventing failures such as disconnection of wires and improving reliability.

Abstract: A module substrate consists of a substrate mounting electronic parts on one surface thereof, a conductor for electrically conducting the electronic parts mounted on the substrate to the other surface of the substrate, a conductive solder for attaching the conductor to a base substrate movably contacting the other surface of the substrate to electrically connect the electronic parts with the base substrate, and a deformable bushing for holding the conductor to maintain the attachment of the conductor to the base substrate regardless of whether the base substrate is moved.

Abstract: A method of mounting an electronic part with bumps on a circuit board is disclosed which enables bumps to be bonded to electrodes of the circuit board with certainty and which enables the judgement of the quality of bonding with precision. By making an area of the electrodes of the circuit board larger than those of the electrodes of the electronic part, the bumps heated and molten in the reflow soldering are spread over the electrodes of the circuit board to make its vertical cross-sectional configuration in a trapezoidal form. Therefore, the height dispersion of the bumps and the curvature of the circuit board are effectively absorbed whereby all the bumps can be bonded to the electrodes of the circuit board. Further, by measuring the planar area of the bumps, the judgement of the quality of bonding can be made with precision.

Abstract: A ceramic substrate is provided at a planar side surface thereof with a group of metallized layers which constitute terminals for connection with a mounting article such as an integrated circuit chip. The metallized layers each have an elongated shape such as an oblong or oval shape and are elongated in radial direction extending from a point which is located on the planar side surface of the ceramic substrate and which is substantially at the center of the group of the metallized layers.

Abstract: An electronic device (11) has on one surface a first ball grid array (12) having a first area. The first ball grid array is bonded to a first intermediate interconnection member (13) having on an opposite surface a second ball grid array having the same number of solder balls (23) as the first array, but of a significantly larger area than that of the first array. Each of the solder balls (23) of the second ball grid array is connected by a connection comprising a conductive via ( 18, 19) extending through the first interconnection member (13) to one of the solder balls of the first ball grid array.

Abstract: An electrical assembly 100 is provided which includes a land grid array integrated circuit package 103, a socket 104, a printed circuit board 106 and a clamping lid 101. Socket 104 and clamping lid 101 have major surface dimensions no greater than the major surface dimensions of the LGA integrated circuit package 103 in order to limit board space requirements to the minimum required by the circuit package 103. Alignment means associated with integrated circuit package 103, socket 104 and printed circuit board 106 are provided to maintain alignment between contact pads 120 on circuit package 103 and first ends of compressible conductors 111 on socket 104 and between contact pads 122 on circuit board 106 and second ends of compressible conductors 111. In the completed assembly, clamping lid 101 applies pressure to an adjacent surface of integrated circuit package 103 thereby compressing compressible conductors 111 against contact pads 120 and contact pads 122.

Abstract: A direct chip attach module (DCAM) 10, comprises of one or more electronic components 30, electrically bonded to a printed circuit 40, on a substrate 20. The DCAM 10, is bonded to an electronic circuit assembly by connection pads 50, formed on the edge of the DCAM substrate 10. This enables easy visual inspection of solder joints between the DCAM and the assembly. DCAM substrates 10, are initially formed in a panel form 70, and vias 50, are drilled and filled with electrically conductive media 55, at predetermined connection points. The DCAM 10, is then excised from the parent panel 70, and the cut vias provide connection pads 55, along the edge of the substrate 10.

Abstract: A printed circuit board device comprises bar-like connectors made of a metal material and having a predetermined length and a predetermined width. Each bar-like connector has a plating of a highly electrically conductive, anti-corrosion metal coated over the side surface(s) thereof but not the end surfaces. Each bar-like connector may be more smooth on the side surface(s) than on the end surfaces. Each bar-like connector is fixedly connected at both ends by an electrically conductive bonding agent to a pair of lands on a printed circuit board, respectively, to provide electrical conduction between the two lands. Accordingly, connection faults caused by the Manhattan phenomenon are eliminated and the cost of SMT production is reduced.

Abstract: A pad arrangement (100) for aligning and attaching a surface mount component (402) with other circuitry includes a substrate (102) upon which opposing pads (108) are attached. Each of the pads occupies a substantially rectangular area (110) having four sides. In order to facilitate alignment of the surface mount component the substantially rectangular area has two opposing flat sides an outwardly extending arcuate area (112) along at least one of the other two sides.

Abstract: A chip carrier (20) includes a substrate (11) having a first copper pattern (12) deposited on a first surface (13), and a second copper pattern (14) deposited on a second surface (16). The second copper pattern (14) is plated with a metallic material to form wire bondable areas (18) on the second copper pattern (14), however, the first copper pattern (12) is substantially devoid of the metallic material. A device (21) is wire bonded to the wire bondable areas (18) of the second copper pattern (14), and a protective covering (23) covers the wire bondable areas (18).

Abstract: A component is mounted to a circuit board using two spaced apart conductive pad portions that make electrical contact with a terminal of the component. The space between the conductive pad portions provides an additional path through which a cleaning solution and debris can flow.

Abstract: An electric circuit board module includes a substrate with electric components mounted on one side thereof and electrodes provided on the other side thereof for the electric connection with the mounted electrical components. The electric circuit board module further includes conductor columns adhered to the electrodes and an adhesion layer provided on the other side of the substrate and around the conductor columns such that the conductor columns extrude from the adhesion layer by a predetermined length. By pressing the electric circuit board module against a separate circuit board to mount thereon, the electric components are electrically connected with electrodes of the sperate circuit board through conductor columns. Since conductor columns are made of a resinous paste with metallic powders dispersed therein, no heating operation as required in conventional module using a solder flow is necessary, resulting in that electric components are kept from the degradation caused by the heat.

Abstract: Electric elements such as a resistance chip, a capacitor chip, a semiconductor device package, and a connector are mounted on a printed circuit board by using at least two methods selected from the re-flow method using cream solder, the chip-on board method using bonding wires, the outer lead bonding method, and the thermal pressing method using heat-seal. The printed circuit board is provided with lands having surface layers of a non-electrolysis Ni--Au plate, a soft Au plate and an electrolysis solder plate, each corresponding to a selected mounting method.

Abstract: A printed circuit board includes an array of conductive pads including component-mounting holes disposed on first and second surfaces thereon. An array of conductive attachment lands arranged in pairs of first and second attachment lands are disposed on the first and second surfaces. The first and second attachment lands are insulated from one another and separated by a distance selected to allow attachment of standard sized components therebetween on the first and second surfaces of said circuit board. First and second conductive power distribution planes are disposed on the first and second surfaces and are insulated from the conductive pads and the second attachment lands disposed thereon.

Abstract: A multilayer substrate is constituted by laminating a plurality of sheet substrates, the respective sheet substrates are constituted by forming conductive layers of a refractory metal such as tungsten (W) on ceramic green sheets composed mainly of an alumina ceramic, and the ceramic green sheets are laminated and sintered to constitute the multilayer substrate. Conductive material layers are formed on the surface of the multilayer substrate so as to be selectively connected to the conductive layers, and copper-plated layers are formed on the conductive material layers. Thick film conductor layers are formed on the copper-plated layers, to constitute terminal conductors, and, a thick film resistor layer for example is connected to the terminal conductors.

Abstract: A mounting pad arrangement (FIG. 5) improves reliability of placement of a surface mount component. A first pad array is disposed throughout an area on the surface (308) of a substrate (202), the area having four outside corners. The first pad array includes contact pads (502) arranged in a first linear grid pattern, and eight aligning pads (504,506,510,514,518), larger than the contact pads (502). Two aligning pads (504,506,510,514,518) are near each of the four outside corners. Each aligning pad (504,506,510,514,518) is positioned off center with respect to the first linear grid pattern such that a tangential line (608,610,612,614) can be drawn between an innermost point of the aligning pad (504,506,510,514,518) and corresponding innermost points of the contact pads (502) that are collinear on the first linear grid pattern. A second pad array (406) is disposed on the surface mount component and arranged in a second linear grid pattern that aligns with the first linear grid pattern.