Abstract: Apparatus for electrically connecting two substrates using a land grid array (LGA) connector provided with a frame structure having power distribution elements. In an embodiment, the frame structure includes a frame having one or more conductive layers sandwiched between non-conductive layers. The frame may, for example, be a printed wire board (PWB) having power planes that distribute power from a first substrate (e.g., a system PWB) and/or a power cable to a second substrate (e.g., an electronic module). The frame includes one or more apertures configured to receive an LGA interposer for electrically connecting the two substrates. Preferably, the frame includes four apertures arranged in quadrants that each receive an interposer, and at least one power plane extends between two quadrants and/or adjacent to a peripheral edge of one or more quadrants in the form of stacked and/or parallel bus bars each defining a power domain.

Abstract: Provided are a spacer capable of avoiding a poor connection due to the suction of solder when the clearance width between a soldered semiconductor device and a printed circuit board is made constant, and a manufacturing method for the spacer. The spacer includes an electrically insulating base member, and at least one solder guiding terminal. The base member has a bottom face, a top face and at least one side face, of which the bottom face and the top face are out of contact with each other whereas the side face contacts one or both the bottom face and the top face. The solder guiding terminal covers the bottom face partially, the top face partially, and the side face partially or wholly. A solder guiding face as the surface of a portion of the solder guiding terminal covering the side face is not normal to the bottom face.

Abstract: A fastener includes a cylinder and a draw hook. The cylinder includes a main body, two resilient arms extending from an end of the main body, and a flange extending from a circumference of an opposite end of the main body. A number of protrusions spaced in the axial direction of the main body extends from an inside surface of each of the resilient arms. The draw hook includes a post slidably received in the cylinder, a taper-shaped engaging portion extending from an end of the post and exposed out of distal ends of the resilient arms, and a handle extending from an opposite end of the post. A diameter of the engaging portion gradually grows larger along a direction away from the post.

Abstract: Relay substrate (1) connecting between at least a first circuit board and a second circuit board, including housing (10) having recess (10a) provided in the outer circumference and hole (22) provided in the inner circumference; plural connecting terminal electrodes (12a, 12c) connecting between the top and bottom surfaces of housing (10); shield electrode (11) provided in recess (10a); and ground electrode (13) provided on a part of the top and bottom surfaces of housing (10).

Abstract: A method and apparatus for active line interface isolation have been described.

Abstract: A circuit board fixing element is provided. The circuit board fixing element is used for fixing a circuit board on a sheet, and includes a fixing portion, a buckling portion, and a connecting portion. The buckling portion is made of a resilient material. The connecting portion is connected between the fixing portion and the buckling portion, and has two opposite ends and a side surface connected to the ends. The fixing portion and the buckling portion are respectively located on the ends and protrude from the side surface.

Abstract: An integral impedence is formed on or within a lead frame pin of a semiconductor package and receives a connection from an electrode of a semiconductor die within the package to eliminate the need for adjustment and protective impedences external of the package. The impedence comprises passives such as resistors, capacitors, diodes or inductors which modify the performance of the package for new semiconductor device characteristics. The impedences may have positive or negative temperature coefficients and are in close thermal communication with the semiconductor die.

Abstract: An electronic device is disclosed. One embodiment provides a metallic body. A first electrically insulating layer is applied over the metallic body and having a thickness of less than 100 ?m. A first thermally conductive layer is applied over the first electrically insulating layer and having a thermal conductivity of more than 50 W/(m·K). A second electrically insulating layer is applied over the first thermally conductive layer and having a thickness of less than 100 ?m.

Abstract: An electronic board including an area forming a BGA type electronic component backing, and an electric heating resistor which supplies an amount of heat for soldering the component onto the plate is disclosed. The board includes a plurality of conductive layers alternating with electrically insulating layers, the resistor forming one of the conductive layers immediately underlying the surface layer. The board may also include a thermal drain. A facility for implementing the method is also disclosed. It allows for an electronic board to be repaired through replacing defective members without risking to unsolder or to damage adjacent members.

Abstract: An electronic apparatus includes: a circuit board that is disposed inside a case that is formed by coupling first and second case halves, the circuit board being interposed between first and second boss portions; first and second conductive members that are disposed between a gap formed between the first boss portion and the circuit board; a third conductive member that is disposed between the first boss portion and the first conductive member and between the first boss portion and the second conductive member to electrically connect the first conductive member to the second conductive member; and a measurement circuit that is electrically connected to a first wiring and a second wiring, which are respectively connected to the first conductive member and the second conductive member, and measures an electrical characteristic value of at least one of the first conductive member and the second conductive member.

Abstract: An integrated circuit package system includes: providing a flexible circuit substrate having a fold; mounting an integrated circuit or an integrated circuit package over the flexible circuit substrate and connected to the flexible circuit substrate with interconnects; and encapsulating the integrated circuit or integrated circuit package with a recessed encapsulation having a first level and a second level, the second level having the flexible circuit substrate folded thereover.

Abstract: A semiconductor device comprising a flat wiring board, a first LSI disposed on one surface of the wiring board, a sealing resin for covering the one surface and a side face of the first semiconductor element, and a second LSI disposed on another surface of the wiring board. The wiring board has conductive wiring as a wiring layer, an insulation resin as a support layer for the wiring layer, and a conductive through-hole that passes through the wiring layer and the support layer. Connection points between lands disposed in positions in which the external peripheral edges of the semiconductor elements transverse the interior of the lands as viewed vertically from above, which lands are selected from land portions on which the external connection terminals are formed, and the wiring board formed in the same plane as the lands, are unevenly distributed toward one side of the wiring board.

Abstract: A compliant circuit element spacing system comprises a circuit board, a dummy spacer component, and a compliant circuit element. One or more active components are mounted to the circuit board. The dummy spacer component is also mounted to the circuit board, such that the dummy spacer component is electrically isolated from each active component mounted to the circuit board. The compliant circuit element is positionable proximate the circuit board, and spaced from the circuit board by the dummy spacer component. The spacing component isolates the compliant circuit element from each active component mounted to the circuit board.

Abstract: The present invention is an electrode 10 so provided as to be soldered to an electronic component 12 and, when the electronic component 12 is mounted on a substrate 13, soldered to the substrate 13. The electrode 10 includes a column-like electrode body 11 soldered to the electronic component 12 and to the substrate 13. The electrode has grooves as an air discharging device discharging the air 15a in air voids 15 generated within the solder 14 between joint surfaces 11a, 11b of the electrode body 11 and the electronic component 12 or the substrate 13 when the electrode body 11 is soldered to the electronic component 12 or the substrate 13.

Abstract: An integrated circuit package system includes: providing a flexible circuit substrate; mounting an integrated circuit or an integrated circuit package over the flexible circuit substrate and connected to the flexible circuit substrate with interconnects; and encapsulating the integrated circuit or integrated circuit package with a mounded encapsulation having a first level and a second level, the second level having the flexible circuit substrate folded thereover.

Abstract: A circuit assembly (34) resistant to high-temperature and high g centrifugal force is disclosed. A printed circuit board (42) is first fabricated from alumina and has conductive traces of said circuit formed thereon by the use of a thick film gold paste. Active and passive components of the circuit assembly are attached to the printed circuit board by means of gold powder diffused under high temperature. Gold wire is used for bonding between the circuit traces and the active components in order to complete the circuit assembly (34). Also, a method for manufacturing a circuit assembly resistant to elevated temperature is disclosed.

Abstract: A meter spacer unit includes a dial spacer, a lateral spacer flexibly connected to the dial spacer by a joint, and a rear connecting member flexibly connected to the lateral spacer by a joint. The lateral spacer includes a connection member adapted to connect to a printed circuit board.

Abstract: Interconnect substrate (1) that connects at least the first circuit board and the second circuit board. Interconnect substrate (1) includes housing (1) and connecting terminal electrodes for connecting the top and bottom faces of housing (10). Housing (10) has protrusion (11) on its outer periphery and opening (13) in its inner periphery.

Abstract: In one embodiment, a circuit substrate comprises a substrate; and a warpage preventing pattern disposed on the substrate. The warpage preventing pattern comprises a first pattern at a first corner of the substrate and a second pattern at a second corner of the substrate. The first corner and the second corner are disposed adjacent to each other. An overall orientation of the first pattern is different from an overall orientation of the second pattern with respect to the substrate. The warping of a semiconductor package can be significantly reduced by cutting off stress lines in the corners of the circuit substrate. Various configurations and orientations of the warpage preventing pattern are provided in order to effectively block stress concentration in the corners of the circuit substrate.

Abstract: A circuit board mounting system has a mounting plate and standoffs. The mounting plate has several parallel slits. The standoffs have a base with an elongated slot and an upright post. Fasteners through the slot mount the standoffs anywhere along the slits. The standoffs can rotate around the fasteners and translate relative to the fasteners before the fasteners are tightened, so that a post can be located anywhere on the mounting plate. Circuit boards are mounted to the tops of the standoff posts.

Abstract: The present disclosure generally pertains to wireless communication modules that can be used for enabling wireless communication in various applications. A wireless communication module in accordance with one embodiment may be interfaced with other devices, such as nodes of a wireless sensor network (WSN). The module has rows of male integrated circuit (IC) pins that may be interfaced with female pin receptacles of another device. The module receives wireless signals and provides the data of such wireless signals to the other device. The module also receives data from the other devices and packetizes such data for wireless communication.

Abstract: A first insulating layer is formed on a suspension body, and a write wiring trace and a read wiring trace are formed on the first insulating layer. A second insulating layer is formed on the first insulating layer so as to cover the wiring traces. A write wiring trace and a read wiring trace are formed on the second insulating layer. A third insulating layer is formed on the second insulating layer so as to cover the wiring traces. The width of the wiring trace is larger than the width of the wiring trace, and the width of the wiring trace is larger than the width of the wiring trace.

Abstract: In an example embodiment, an integrated circuit comprises an on-chip electronic component. The on-chip electronic component has an active surface in a hermetically sealed cavity and a cover to hermetically seal the cavity. There is an additional electronic component wherein the additional electronic component is fixed on the cover.

Abstract: Provided are a spacer capable of avoiding a poor connection due to the suction of solder when the clearance width between a soldered semiconductor device and a printed circuit board is made constant, and a manufacturing method for the spacer. The spacer includes an electrically insulating base member, and at least one solder guiding terminal. The base member has a bottom face, a top face and at least one side face, of which the bottom face and the top face are out of contact with each other whereas the side face contacts one or both the bottom face and the top face. The solder guiding terminal covers the bottom face partially, the top face partially, and the side face partially or wholly. A solder guiding face as the surface of a portion of the solder guiding terminal covering the side face is not normal to the bottom face.

Abstract: A guide module is provided for connecting a primary circuit board and a secondary circuit board to a common backplane circuit board. The primary and secondary boards are in a tiered arrangement with both the primary and secondary circuit boards having interface connections on the backplane circuit board. The guide module includes a body having a height between opposite top and bottom surfaces. The height of the body establishes a stack height between the primary and secondary boards. Locating elements are formed on the top and bottom surfaces to locate and align the primary and secondary boards with respect to one another.

Abstract: A semiconductor device comprising a flat wiring board, a first LSI disposed on one surface of the wiring board, a sealing resin for covering the one surface and a side face of the first semiconductor element, and a second LSI disposed on another surface of the wiring board. The wiring board has conductive wiring as a wiring layer, an insulation resin as a support layer for the wiring layer, and a conductive through-hole that passes through the wiring layer and the support layer. Connection points between lands disposed in positions in which the external peripheral edges of the semiconductor elements transverse the interior of the lands as viewed vertically from above, which lands are selected from land portions on which the external connection terminals are formed, and the wiring board formed in the same plane as the lands, are unevenly distributed toward one side of the wiring board.

Abstract: An apparatus and method is disclosed that allows for the arranging in a three dimensional array semiconductor chips on a circuit board. A unique chip carrier is disclosed on which any IC chip can be positioned on above the other on a circuit board. Additionally, the carrier allows for the testing of IC chips on the carrier and underneath it without having to remove the carrier and chips from the system even if they are of the BGA or CSP type. The carrier includes exposed test points to allow an on site test.

Abstract: A stacked mounting structure includes a first substrate, a second substrate, and an intermediate substrate which has a space accommodating therein components to be mounted. A first contact (connecting) terminal and a second contact (connecting) terminal are formed on the first substrate and the second substrate, and have a wire which is formed on a side surface of the intermediate substrate. By formation of the intermediate substrate to be on an inner side than an edge surface of the substrates, a part of the two contact terminals respectively are exposed. One end of the wire is connected to an exposed portion of the first contact terminal, and the other end of the wire is connected to an exposed portion of the second contact terminal.

Abstract: An electronic part having mounting terminals made of a thermally-meltable bonding material is mounted on a mounting board. A structural part is used for moving a height-adjusting member to a position under the electronic part in a process of heating and melting the thermally-meltable bonding material so as to maintain a predetermined distance between the electronic part and the mounting board.

Abstract: According to one embodiment, there is provided a printed-wiring board with a component in which an electronic component is mounted on a pattern-forming surface of a base material. In the printed-wiring board, a guiding path for guiding, to the outside, a void formed in mounting the electronic component is formed on the pattern-forming surface.

Abstract: A printed circuit board assembly includes a first printed circuit board having a plurality of electrical traces that is attached to a second printed circuit board having a plurality of electrical traces in a substantially perpendicular fashion. The first printed circuit board has a plurality of male terminal tabs that fit into a plurality of female terminal slots of the second printed circuit board to make a plurality of electrical connections between the electrical traces of the first printed circuit board and the electrical traces of the second printed circuit board. The assembly has at least two mechanical connections between the first printed circuit board and the second printed circuit board comprising connector blades that are substantially perpendicular to the first printed circuit board and to the second printed circuit board. The connector blades may also make electrical connections between electrical traces of the first and second printed circuit boards.

Abstract: A package structure includes a substrate; a die over and flip bonded on the substrate; a heat sink over the die; and one or more spacer separating the heat sink from the substrate.

Abstract: For a multi-terminal semiconductor package, such as a BGA or a CSP, that handles high-speed differential signals, a high-speed signal is assigned to the innermost located electrode pad on an interposer substrate, and the electrode pad is connected to the outermost located ball pad on the interposer substrate. With this arrangement, the length of a plating stub can be considerably reduced, and the adverse affect on a signal waveform can be minimized. This arrangement is especially effective for differential signal lines.

Abstract: Provided is a circuit board including: a circuit board body with at least one surface having a plurality of electrically connecting pads; an insulating protection layer formed on the circuit board body and formed with an opening corresponding in position to one of the electrically connecting pads, being larger than the electrically connecting pad, and not being in contact with the periphery of the electrically connecting pad; and a soldering material formed on, and confined to, the electrically connecting pad; thus allowing an electrically conductive element limited in the opening formed in the insulating protection layer to be fabricated from the soldering material by a reflow process with a view to forming a fine-pitch electrically connecting structure.

Abstract: There is provided a control apparatus capable of simply supporting/fixing a board by a board support, reducing a number of integrating steps, reducing cost and downsizing a board size. In a control apparatus constituted by attaching a board to a board support provided at a base attachably and detachably, the board support is constituted by a resin, and includes a guide having a section in an L-like shape provided at one side end portion of the board support, a hook having a section in an L-like shape provided at other side end portion of the board support, and a board mounting portion provided between the guide and the hook for supporting a lower face of the board. The guide includes an engaging portion engaged with one side end portion of the board mounted to the board mounting portion at an upper portion thereof.

Abstract: An interconnect structure, an interconnect structure for interconnecting first and second components, an interconnect structure for interconnecting a multiple component stack and a substrate, and a method of fabricating an interconnect structure. The interconnect structure comprising a base portion formed on a mounting surface of a first component; a pillar portion extending from the base portion and substantially perpendicularly to the mounting surface; and a head portion formed on the pillar portion and having larger lateral dimensions than the pillar portion; wherein the base portion and the pillar portion are integrally formed of a homogeneous material.

Abstract: An apparatus and method is disclosed that allows for the arranging in a three dimensional array semiconductor chips on a circuit board. A unique chip carrier is disclosed on which any IC chip can be positioned on above the other on a circuit board. Additionally, the carrier allows for the testing of IC chips on the carrier and underneath it without having to remove the carrier and chips from the system even if they are of the BGA or CSP type. The carrier includes exposed test points to allow an on site test.

Abstract: Embodiments of the present invention provide a fastening support assembly configured to securely connect a first panel above a second panel. The fastening support assembly includes a shaft having a cap at a first end and a distal tip at a second end. The shaft defines an internal chamber. The distal tip is configured to secure to the first panel. A pin is positioned within the internal chamber, wherein movement of the pin into the internal chamber radially expands the shaft. A portion of the shaft and the pin proximate the cap are configured to substantially fill a hole formed through the second panel when the second panel is secured to the fastening support assembly.

Abstract: A hybrid integrated circuit device includes: an insulating substrate (1) having a lower surface formed with wiring patterns including ends arranged along ends of the lower surface at a predetermined pitch (P); electronic components (3) mounted on the surfaces of the insulating substrate to be connected to the wiring patterns; a pair of insulating legs (2) arranged at the ends of the lower surface of the substrate (1), each insulating leg extending in parallel to the lower surface of the substrate (1); and a plurality of terminal electrodes (5) formed on each leg at the pitch and extending perpendicularly to the substrate, where the plurality of terminal electrodes are connected to the wiring patterns on the lower surface of the substrate (1). Each leg has a surface bonded to the substrate and formed with electrode films connected to the terminal electrodes.

Abstract: One design aspect in electronic systems, such as communication systems, is noise suppression. More particularly, this relates to microphonics suppression in high-speed communication systems, such as microwave wireless radio systems. The present invention contemplates system design for substantially eliminating microphonic behavior created by mechanical stimulus such as vibrations and the drum effect. A preferred approach includes isolating the motherboard from its mounting harnesses (mechanical interconnection) and adding an echo damping and shock absorption pad to the underside of the enclosure cover to stiffen the enclosure cover while maintaining its light weight. Preferably also, this approach isolates the entire motherboard rather than a particular component. A design using this approach is particularly useful in an outdoor unit (ODU) of a split-mount microwave radio system.

Abstract: A spacing device for adapting electronic modules for insertion into a system is disclosed. In one embodiment, the spacing device includes a body and guide features configured to align the body with mating guide features of electronic modules. The spacing device also includes a coupling portion having coupling arms, which is configured to secure the electronic modules to the body.

Abstract: A stack structure of circuit boards embedded with semiconductor chips is proposed. At least two circuit boards are provided. Each of the circuit boards includes circuit layers formed on surfaces thereof and at least one opening embedded with a semiconductor chip, wherein, the circuit layers have a plurality of conductive structures and electrically conductive pads, and the semiconductor chip has a plurality of electrode pads, and the conductive structures of the circuit layers are electrically conductive to the electrode pads of the semiconductor chip. At least one adhesive layer is formed between the two circuit boards and disposed with a conductive material corresponding in position to the electrically conductive pads of the circuit boards. Thus, a conductive path can be formed by the conductive material between the electrically conductive pads of the circuit boards, thereby establishing electrical connection between the two circuit boards.

Abstract: A stand-off having a flange and a projecting portion extending from the flange is integrated with a first substrate, for example, a printed circuit board (PCB), by forming a hole in the PCB, inserting the projecting portion of the stand-off through the hole, and attaching a second substrate to the first substrate with the flange therebetween. The flange can be at least partially received by a relief formed in one of the substrates or in an aperture in an adhesive layer between the two substrates. The stand-off can be further secured to the PCB using one or more of adhesives, interference fit techniques, snap-assembly features, and other applicable techniques. Alternatively, the stand-off can be attached to a substrate using a sliding snap feature or sliding interference fit. An attachable component can be attached to the projecting portion of the stand-off.

Abstract: A receiving apparatus according to the present invention comprises: a first board including a mount surface whose outer edge is substantially quadrilateral; and a board installation member including a plate portion that has an installation surface whose outer edge is substantially quadrilateral, the first board is installed on the installation surface (called a front surface) side and the surface (called a rear surface) of the rear side of the installation surface is installed on a given second board, the apparatus applies a predetermined processing to a received broadcast signal using a circuit disposed on the first board, and the board installation member includes a connecting terminal to electrically connect the first board with the second board and a leg portion used for the installation on the second board, the connecting terminal protrudes from the plate portion in the direction substantially perpendicular to the plate portion on the front surface side and on the rear surface side, and comes into contac

Abstract: In a multilayer ceramic electronic component, a pedestal portion is provided on a region of a first main surface of a multilayer ceramic body and includes a non-metallic inorganic powder and a resin so that the pedestal portion is fixed to the first main surface with at least the resin, the multilayer ceramic body being formed by stacking a ceramic base material layer and a shrinkage-inhibiting layer having a predetermined conductor pattern. Also, a via hole conductor is disposed in the pedestal portion so that one of the end surfaces is exposed in a surface of the pedestal portion, and a surface mounting-type electronic component such as a semiconductor element is connected, through a conductive binder, to the one of the end surfaces of the via hole conductor exposed in the surface of the pedestal portion. A resin is provided between the surface mounting-type electronic component and the pedestal portion, the resin having the same composition as in the resin of the pedestal portion.

Abstract: Polyimide is used as a spacer that also bonds together the elements that it is spacing apart. This is achieved by constructing the spacer on at least one of the wafers as is conventionally done, except that prior to performing the final curing of the polyimide precursor to form the final polyimide, the elements are aligned in a bonder and placed in contact with a pressure of 40 grams per square millimeter at a temperature slightly higher than the soft-bake temperature, as specified by the manufacturer of the polyimide precursor, for few minutes to promote tackiness. This holds the elements together, and the combined structure is then baked to fully cure the polyimide precursor into polyimide and complete the bonding.

Abstract: An optoelectronic system includes a printed circuit board having a ground pad and a bond pad as well as an optoelectronic element. The optoelectronic element is electrically connected to the bond pad via a bonding wire and is additionally fastened to the ground pad by a soldering connection. The ground pad is arranged such that one part of the space between the printed circuit board and the optoelectronic element is not filled with solder. Furthermore, a method is for manufacturing such an optoelectronic system.

Abstract: A device for coupling a printed circuit board assembly to a computer chassis is described. The device may include a base. The device may include at least two posts. The posts may be located on opposite sides of the base. The posts may couple the device to the computer chassis. The device may include at least one prong. The prong may extend upward from the base. The prong may couple the device to the printed circuit board assembly.

Abstract: For a multi-terminal semiconductor package, such as a BGA or a CSP, that handles high-speed differential signals, a high-speed signal is assigned to the innermost located electrode pad on an interposer substrate, and the electrode pad is connected to the outermost located ball pad on the interposer substrate. With this arrangement, the length of a plating stub can be considerably reduced, and the adverse affect on a signal waveform can be minimized. This arrangement is especially effective for differential signal lines.

Abstract: An exemplary ball grid array package for a semiconductor device includes an integrated circuit on a substrate, and a first bus on the substrate, the first bus including first portions that extend substantially parallel to the integrated circuit, interleaved with second portions that extend substantially toward the integrated circuit, each second portion having an end contiguous with a first portion and another end contiguous with a another first portion. A first set of wires connects the first bus with a first plurality of nodes on the integrated circuit. The package also includes a second bus and a second set of wires.