Interconnection Details Patents (Class 361/803)
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Patent number: 8154882Abstract: A first terminal of a first switch, a first idling pin, a third idling pin, and a power pin are connected together. A second terminal of the first switch, a first ground pin, a second ground pin, and a third ground pin are electrically connected together. A first terminal of the second switch, a second idling pin, a fourth idling pin, and a reset pin are electrically connected together. A second terminal of the second switch, a first ground pin, a second ground pin, and a third ground pin are electrically connected together. The first switch controls the motherboard to power on or power off, and the second switch controls the motherboard to reset.Type: GrantFiled: November 3, 2009Date of Patent: April 10, 2012Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.Inventor: Yi-Hong Liu
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Patent number: 8154880Abstract: A method and apparatus for active line interface isolation have been described.Type: GrantFiled: October 17, 2008Date of Patent: April 10, 2012Assignee: Integrated Device Technology, Inc.Inventor: Jeremy Bicknell
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Publication number: 20120081873Abstract: Some embodiments of the inventive subject matter are directed to a first circuit board configured to include an electronic component. The electronic component includes a plurality of leads. The first circuit board includes first wires configured to connect to a first portion of the plurality of leads. The second circuit board is affixed to the first circuit board. The second circuit board includes second wires. The second circuit board is smaller in size than the first circuit board. A plurality of electrical connectors extend through a thickness of the first circuit board and are configured to connect a second portion of the plurality of leads to the second wires.Type: ApplicationFiled: September 30, 2010Publication date: April 5, 2012Applicant: International Business Machines CorporationInventors: Douglas A. Baska, Daniel M. Dreps, Rohan U. Mandrekar, Roger D. Weekly
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Patent number: 8149581Abstract: An electronic device includes separate housings, one includes a keyboard and the other includes a display screen, a pair of cam assemblies and a pair of actuator arms. Each cam assembly has first and second connection parts that are rotationally connected, and are configured so that the first and second connection parts tilt relative to each other responsive to rotation of one relative to the other. The first connection parts of both cam assemblies are connected to spaced apart locations on the first housing. The actuator arms are connected on one end to spaced apart locations on the second housing and are connected on the other end to different ones of the second connection parts of both cam assemblies. Relative movement of the first and second housings rotates the first connection part relative to the second connection part of both cam assemblies and tilts the first housing relative to the second housing.Type: GrantFiled: December 18, 2009Date of Patent: April 3, 2012Assignee: Sony Ericssom Mobile Communications ABInventors: Yawei Ma, Ichiro Yamada
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Patent number: 8139374Abstract: An electronic device is provided which makes it possible to reduce noise generated from a signal line around a connecting portion connecting a first body and a second body. The connecting portion has a first metallic portion. A first circuit board provided in the first body and a second circuit board provided in the second body. The signal line that electrically connects the first circuit board and the second circuit board via the connecting portion, in which the signal line is wound around the first metallic portion.Type: GrantFiled: March 26, 2009Date of Patent: March 20, 2012Assignee: Kyocera CorporationInventor: Yoshiaki Hiraoka
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Publication number: 20120063109Abstract: The adhesive composition of the invention comprises a thermoplastic resin, a radical polymerizing compound, a radical polymerization initiator and a radical polymerization regulator. According to the present invention it is possible to provide an adhesive composition, a circuit connecting material, a connection structure for a circuit member and a semiconductor device whereby curing treatment can be carried out with sufficient speed at low temperature, curing treatment can be carried out with a wide process margin, and adequately stable adhesive strength can be obtained.Type: ApplicationFiled: November 17, 2011Publication date: March 15, 2012Inventors: Shigeki KATOGI, Houko SUTOU, Hiroyuki IZAWA, Toshiaki SHIRASAKA, Masami YUSA, Takanobu KOBAYASHI
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Publication number: 20120063110Abstract: A module board has a configuration in which a first circuit board, a first composite sheet, a second circuit board, a second composite sheet, and a third circuit board are laminated in this order. Inspection terminals are arranged in a matrix shape in a predetermined region on an upper surface of the third circuit board. Electronic components are mounted on the first and second circuit boards. The inspection terminals are electrically connected to the electronic components mounted on the first and second circuit boards through vias and wiring patterns.Type: ApplicationFiled: November 18, 2011Publication date: March 15, 2012Applicant: PANASONIC CORPORATIONInventors: Masahiro TAKATORI, Yukihiro ISHIMARU
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Patent number: 8134842Abstract: A method for converting a computer rear transition input/output (I/O) to front panel I/O is described. The method includes providing a main board having a first main connector having a first set of pins, and affixing a second main connector having a second set of pins to the main board, where a direction of lengths of the first set of pins is other than parallel to a direction of lengths of the second set of pins.Type: GrantFiled: December 29, 2006Date of Patent: March 13, 2012Assignee: GE Intellgent Platforms Embedded Systems, Inc.Inventor: Chris Erwin Orr
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Patent number: 8130514Abstract: A mounting structure includes: a first substrate; a second substrate; a first terminal being formed on the first substrate and having a plurality of terminal portions arranged with a gap therebetween; a different terminal being formed on the first substrate and being adjacent to the first terminal; and a second terminal being formed on the second substrate and being electrically connected to at least one of the terminal portions of the first terminal. Here, the first terminal is supplied with a potential higher than that supplied to the different terminal.Type: GrantFiled: March 9, 2009Date of Patent: March 6, 2012Assignee: Sony CorporationInventor: Hiroyuki Onodera
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Patent number: 8125786Abstract: Memory card includes a circuit board, a component mounted on a main face of the circuit board, casing covering at least the main face of the circuit board and the component, and bittering agent retained in a roughened area provided on casing or an exposed part of the circuit board.Type: GrantFiled: January 26, 2007Date of Patent: February 28, 2012Assignee: Panasonic CorporationInventors: Hidenobu Nishikawa, Daido Komyoji, Hiroyuki Yamada, Yutaka Nakamura, Shuichi Takeda, Yasuharu Kikuchi
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Patent number: 8120929Abstract: An electrical or electronic level indicator is positioned in a plug-in housing 24. The plug-in housing 24 is closed with a cover 10. This cover 10 is furnished with a handle bar 11, which serves as an aid for removing the cover 10. Positioned inside the cover 10 are rotating cylindrical pins 12, 13 which allow the potentiometers 32 and/or switches 33 to be adjusted. The electrical components 32, 33 are positioned on a circuit board 30, which lies inside the cover 10.Type: GrantFiled: May 15, 2009Date of Patent: February 21, 2012Assignee: Vega Grieshaber KGInventors: Frank Becherer, Winfried Rauer, Ralf Koernle
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Patent number: 8119928Abstract: In a multi-layered wiring substrate according to an exemplary aspect of the present invention, a conductor formed in an edge face area functions as a pad for mounting a connector.Type: GrantFiled: December 24, 2008Date of Patent: February 21, 2012Assignee: NEC CorporationInventor: Isao Matsui
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Patent number: 8121752Abstract: A flight recorder includes an information input device, heat sensitive memory device electrically connected to the information input device, and housing enclosing the heat sensitive memory device. The housing is made with a first material and having a plurality of openings made through the housing. A sacrificial material is disposed between the housing and heat sensitive memory device. The sacrificial material having a lower melting temperature than the first material such that the sacrificial material changes state and egresses through the openings in the housing when exposed to heat to create an air gap between the housing and heat sensitive memory device. The first material includes nickel and the sacrificial material includes aluminum. A heat insulating layer is disposed between the sacrificial material and heat sensitive memory device. A second sacrificial material is disposed between the heat insulating layer and heat sensitive memory device.Type: GrantFiled: May 8, 2008Date of Patent: February 21, 2012Assignee: L-3 Communications CoporationInventors: Michael Winterhalter, Endre Berecz
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Patent number: 8116098Abstract: A base element having a first and a second surface, the first surface being designed to receive a module housing and the second surface being designed to be mounted on a carrier element, and in addition an angle between 0 and 90 degrees being provided between a first face normal of the first surface and a second face normal of the second surface.Type: GrantFiled: November 12, 2008Date of Patent: February 14, 2012Assignee: Robert Bosch GmbHInventors: Michael Hortig, Peter Kunert
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Patent number: 8116099Abstract: Provided is a circuit board device, wherein degrees of freedom are provided for a GND connecting position among plural printed boards, and noise shield and/or heat sink effects are provided. An electronic device provided with the circuit board device and a GND connecting method are also provided. Circuit board device (100) includes a pair of printed boards (110, 120), noise generating component (112) and/or heat generating component (122), and metal plate (140). Printed boards (110, 120) include mounting surfaces and GND connecting terminals (111, 121) arranged on the respective mounting surfaces, and the mounting surfaces are arranged to face each other. Noise generating component (112) and/or heat generating component (122) is mounted on the mounting surface of at least one of a pair of printed boards (110, 120).Type: GrantFiled: July 18, 2007Date of Patent: February 14, 2012Assignee: NEC CorporationInventor: Akihito Kubota
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Patent number: 8116097Abstract: An apparatus for coupling an integrated circuit (IC) package to a printed circuit board. The apparatus includes an interposer an interposer having a plurality of connections suitable for surface mounting on corresponding pads of a printed circuit board (PCB). The plurality of connections is arranged in a grid array. The interposer further includes a plurality of plated through holes. The apparatus further includes a substrate having a plurality of pins. The substrate is coupled to the interposer by inserting each of the plurality of pins into a corresponding one of the plurality of plated through holes of the interposer. An IC package including an IC is mounted on the substrate.Type: GrantFiled: November 2, 2007Date of Patent: February 14, 2012Assignee: Oracle America, Inc.Inventors: David G. Love, Bidyut K. Sen
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Patent number: 8116100Abstract: Traffic between logic LSIs and memory is increasing year by year and there is demand for increase of capacity of communication between them and reduction of power consumption in the communication. Communication distances between LSIs can be reduced by stacking the LSIs. However, in a simple stack of logic LSIs and memory LSIs, it is difficult to ensure heat dissipation to cope with increasing heat densities and ensure transmission characteristics for fast communication with the outside of the stacked package. Also required is a connection topology that improves the performance of communication among the stacked LSIs while ensuring the versatility of the LSIs. An external-communication LSI, a memory LSI, and a logic LSI are stacked in this order in a semiconductor package and are interconnected by through silicon vias.Type: GrantFiled: May 14, 2009Date of Patent: February 14, 2012Assignee: Hitachi, Ltd.Inventors: Makoto Saen, Kenichi Osada
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Patent number: 8116091Abstract: A printed circuit board has a core substrate including a resin substrate having an opening, a capacitor formed in the opening and having a first electrode structure having a portion facing to the upper surface of the core substrate and a second electrode structure having a portion facing to the lower surface of the core substrate, an upper insulating layer formed over the upper surface of the core substrate and having a conductive circuit formed over the upper insulating layer and a via hole electrically connecting the portion of the first electrode structure and the conductive circuit of the upper insulating layer, and a lower insulating layer formed over the lower surface of the core substrate and having a conductive circuit formed over the lower insulating layer and a via hole electrically connecting the portion of the second electrode structure and the conductive circuit of the lower insulating layer.Type: GrantFiled: September 1, 2010Date of Patent: February 14, 2012Assignee: Ibiden Co., Ltd.Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
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Patent number: 8111519Abstract: A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.Type: GrantFiled: January 28, 2011Date of Patent: February 7, 2012Assignee: Princo Corp.Inventor: Chih-kuang Yang
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Publication number: 20120026710Abstract: A riser card is used for connecting at least one power supply to a motherboard in an electronic device. The riser card includes a first printed circuit board (PCB) and a second PCB. The first PCB includes at least one power connector for laterally receiving the at least one power supply. The second PCB is located parallel to the first PCB. The second PCB includes an insert terminal for connecting to the motherboard. The first PCB is spaced from the second PCB, and the first PCB and the second PCB are electrically connected.Type: ApplicationFiled: March 24, 2011Publication date: February 2, 2012Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD .Inventor: ZHAN-YANG LI
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Publication number: 20120026709Abstract: A PCI-E module includes a circuit board, an insulated housing and a plurality of connection terminals. Each connection terminal has a connection end and a welding end away from the connection end. The connection terminals are alternately and parallelly arranged in the housing to form a structure of the PCI-E module. The circuit board has a plurality of gold fingers on both sides of one end thereof, and each connection end of the connection terminals is electronically connected to the gold fingers. Each welding end of the connection terminals is bent down through and extends out of the housing. Therefore, the PCI-E module can be welded directly on a main board of a computer through the welding ends of the connection terminals.Type: ApplicationFiled: August 2, 2010Publication date: February 2, 2012Inventor: Yi-Fang CHUANG
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Patent number: 8107253Abstract: A printed circuit board includes a chip capacitor having electrodes and a metal film formed on one or more of the electrodes, an accommodating layer accommodating the chip capacitor inside the accommodating layer, a connection layer formed over the accommodating layer and having a via hole opening extending to the metal film, and a first via hole structure formed in the via hole opening of the connection layer and connected to the metal film on the one or more of the electrodes of the chip capacitor.Type: GrantFiled: February 20, 2008Date of Patent: January 31, 2012Assignee: Ibiden Co., Ltd.Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
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Patent number: 8107255Abstract: Provided is a circuit device that allows a plurality of circuit boards, which are stacked each other and arranged in a case member, to be sealed with a resin effectively, and a method of manufacturing the same. In a hybrid integrated circuit device, a first circuit board is overlaid with the second circuit board and both of the boards are fitted into the case member. A first circuit element is arranged on the upper surface of the first circuit board and a second circuit element is arranged on the upper surface of the second circuit board. Furthermore, an opening is provided in a side wall part of the case member, and an internal space of the case member communicates with the outside through this opening. Accordingly, in the resin sealing step, a sealing resin can be injected into the internal space of the case member from the outside through this opening.Type: GrantFiled: September 26, 2008Date of Patent: January 31, 2012Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLCInventors: Hideyuki Sakamoto, Hidefumi Saito, Yasuhiro Koike, Masao Tsukizawa
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Patent number: 8102663Abstract: A “sombrero” bridge transports signal communication between a processor and one or more cache memories. The bridge surrounds the processor's perimeter, and includes an aperture opposite the processor through which power and data can be provided to the processor from another device. The bridge exchanges signals with the cache memories via capacitively coupled proximity connections. The bridge communicates with the processor via conductive (e.g. wire) connections and optionally proximity connections. Spacing between opposing pads of the proximity connection(s) between the bridge and the cache memories can be provided by recesses in a surface of the cache memory, corresponding recesses in an opposing surface of the bridge, and a ball for each matching pair of corresponding cache memory and bridge recesses. The ball fits in and between the recesses of the matching pair. The recess depths and ball diameter(s) constrain a minimum distance between opposing pads of the proximity connection(s).Type: GrantFiled: September 28, 2007Date of Patent: January 24, 2012Assignee: Oracle America, Inc.Inventors: John E. Cunningham, Ashok V. Krishnamoorthy, Anders Landin
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Patent number: 8102671Abstract: A first riser card of an apparatus in an example substantially axially connects with a first serial connection external interface of a printed circuit board (PCB) and at least in part laterally connects with a parallel connection external interface of a first memory module. The first riser card supports the first memory module with avoidance of abutment of the first memory module with a second memory module supported by a second riser card that is adjacent to the first riser card.Type: GrantFiled: April 25, 2007Date of Patent: January 24, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Martin Goldstein, Hau Jiun Chen, Mun Hoong Tai, Choon Pheng Tan
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Publication number: 20120008298Abstract: A device interconnects two circuit boards each comprising electrical connection pads, and which are respectively placed in two cavities. The device includes intercavity microwave screening means. The device also comprises several electrical conductors that pass through the device from end to end and that are not soldered, the two ends of which conductors are respectively intended to make direct contact with the connection pads of the two circuit boards; and mechanical means for holding the two circuit boards against the device, at either end of the latter. The screening means are provided by a microwave absorber in contact with each conductor and surrounding it over all or some of its length.Type: ApplicationFiled: July 1, 2011Publication date: January 12, 2012Applicant: THALESInventors: Laurent COURSELLE, Serge Tonus, Céline Frinault, Cécile Debarge-Caille, Abdelmounaim Riad, Philippe Monfraix
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Publication number: 20120002389Abstract: A printed circuit board unit usable with a computer device includes a main board on which a first component and a second component are mounted on an upper surface, and a routing unit mounted on at least one of the upper surface and a lower surface of the main board and including a sub-wire forming at least part of a wire to transmit a data between the first component and the second component.Type: ApplicationFiled: January 24, 2011Publication date: January 5, 2012Applicant: Samsung Electronics Co., Ltd.Inventor: Do-kyun Lee
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Patent number: 8089778Abstract: A hand-held electronic device including a body, a touch-sensing display area, and a holding area is provided. The touch-sensing display area located at a surface of the body is divided into several sub-touch-sensing areas disposed at a part of a surrounding region of the touch-sensing display area. The sub-touch-sensing areas have at least one access-sensing region. The access-sensing region is used for sensing a touch-control action so as to render the hand-held electronic device to perform a function corresponding to the touch-control action. The holding area is disposed outside the sub-touch-sensing areas. When a user only intends to hold the hand-held electronic device, the user's hands can put on the holding area and the hand-held electronic device would not perform any corresponding function.Type: GrantFiled: June 16, 2008Date of Patent: January 3, 2012Assignee: HTC CorporationInventors: Yi-Shen Wang, Yi-Chi Lin
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Patent number: 8089774Abstract: A semiconductor memory module includes a printed circuit board (PCB) including a rigid PCB part and a flexible PCB part including an overlap portion, a non-overlap portion, and memory components mounted on the PCB. The rigid PCB part includes a first surface and a second surface facing the first surface. The overlap portion of the flexible PCB part overlaps the rigid PCB part, and the non-overlap portion does not overlap the rigid PCB part. The flexible PCB part may include an overlap stacked structure including at least one doubling portion.Type: GrantFiled: December 19, 2007Date of Patent: January 3, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun-Seok Choi, Yong-Hyun Kim, Jung-Chan Cho, Hyung-Mo Hwang
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Publication number: 20110317386Abstract: To provide a connecting structure which can effectively suppress the generation of a crack and an exfoliation of a terminal.Type: ApplicationFiled: December 8, 2009Publication date: December 29, 2011Applicant: PANASONIC CORPORATIONInventor: Masahito Kawabata
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Patent number: 8081489Abstract: Electronic assemblies are described. One embodiment includes a circuit board, a socket coupled to the circuit board, and a device positioned in the socket. The embodiment also includes a load mechanism including first and second components, the first component pivotally coupled to the circuit board, the first component including first and second lever arms and an axle region therebetween, the first component also including a load arm region extending from the axle region and adapted to transmit a load when a force is applied to the first component lever arms. The load mechanism also includes a second component pivotally coupled to the circuit board, the second component including first and second lever arms and an axle region therebetween, the second wire component also including a load arm region extending from the axle region and adapted to transmit a load when a force is applied to the second wire component lever arms.Type: GrantFiled: December 24, 2008Date of Patent: December 20, 2011Assignee: Intel CorporationInventors: David J. Llapitan, Christopher S. Beall
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Patent number: 8072772Abstract: An apparatus includes a two-dimensional array of single-chip modules (SCMs) and at least one component. A respective SCM in the array includes at least a semiconductor die that is configured to communicate data signals by capacitive coupling using one or more proximity connectors in a first set of proximity connectors. The first set of proximity connectors are coupled to the semiconductor die. A second set of proximity connectors is coupled to at least the one component. At least the one component is coupled to semiconductor dies in two or more SCMs using one or more proximity connectors in the second set of proximity connectors thereby enabling communication of the data signals by capacitive coupling.Type: GrantFiled: February 22, 2006Date of Patent: December 6, 2011Assignee: Oracle America, Inc.Inventor: Arthur R. Zingher
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Patent number: 8072771Abstract: An improved upright circuit board assembly structure includes: an electronic component to be mounted on an external device so as for electrical functions of the electronic component to be used; and at least one circuit board including at least one first electrical connection portion and at least one second electrical connection portion. The first electrical connection portion and the second electrical connection portion are coupled to the external device by soldering with a solder paste. By soldering the circuit board to the external device in a double-sided, multi-point manner, the electronic component is mounted securely on the external device, and electric connection between the electronic component and the external device is enhanced.Type: GrantFiled: September 7, 2009Date of Patent: December 6, 2011Assignee: KINGBRIGNT ELECTRONICS Co. Ltd.Inventor: Wen-Joe Song
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Publication number: 20110292629Abstract: A receiving apparatus includes two electronic boards having flat surfaces that are disposed substantially-parallel to each other and that at least partially overlap each other, and an antenna that is mounted on the two electronic boards. The antenna includes a first metal line that is mounted along the flat surface of a first electronic board out of the two electronic boards, and a second metal line that is disposed substantially-perpendicular to the flat surfaces of the two electronic boards, a first end of the second metal line electrically connected to the first metal line and a second end of the second metal line electrically connected to a circuit on a second electronic board out of the two electronic boards. This enables the antenna to be integrated with the two electronic boards. As a result, it is possible to reduce the production cost while higher performance in receiving a radio wave is provided.Type: ApplicationFiled: May 26, 2011Publication date: December 1, 2011Applicant: FUJITSU TEN LIMITEDInventors: Minoru Kidena, Shinichi Tanaka
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Publication number: 20110286193Abstract: An assembly of at least two electric boards, and in particular two printed circuit boards, the two boards being welded to one another, wherein at least one of the two boards comprises at least one orifice which shows a trace of the welding.Type: ApplicationFiled: May 20, 2011Publication date: November 24, 2011Applicant: VALEO VISIONInventors: Marc DUARTE, Benjamin THIERRY, Benjamin TOUZET
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Publication number: 20110286194Abstract: To provide a connection structure in which terminals having different functions can be connected separately in an insulation state while suppressing the generation of problems such as a crack or an exfoliation of the terminal, a circuit device having the connection structure and an electronic equipment having the circuit device. A connection structure 30 for electrically and mechanically connecting between a connector board 20 and a circuit board 10, includes a frame 31 which at least has a first connection surface 31A connected to the connector board 20.Type: ApplicationFiled: November 17, 2009Publication date: November 24, 2011Applicant: PANASONIC CORPORATIONInventor: Masahito Kawabata
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Patent number: 8064221Abstract: Electronic devices are disclosed that allow for surface-mounting using solder while preventing solder from overflowing between external terminals of the electronic device, or between pads on a circuit board to which the external terminals are soldered. An exemplary electronic device has a base board made of an insulating material and having an outer surface comprising at least one external terminal for surface mounting of the device to the circuit board. A groove is defined at least part way around the external terminal on the outer surface. The groove accommodates overflowed solder and thus prevents unintended spread flow of the solder to locations that otherwise could cause short circuits and the like. The electronic device can include a resin board containing a thermoset resin, wherein the groove is formed by thermal or mechanical processing.Type: GrantFiled: April 10, 2008Date of Patent: November 22, 2011Assignee: Nihon Dempa Kogyo Co., Ltd.Inventor: Tomotaka Kuroda
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Patent number: 8063316Abstract: In accordance with a first embodiment, the present invention provides a circuit substrate comprising a first surface; a second surface; a first via having a first end near said first surface and a second end near said second surface; a second via having a first end near said first surface and a second end near said second surface; a first conductive element electrically coupling said first end of said first via and said first end of said second via; a second conductive element electrically coupling said second end of said first via and said second end of said second via; an input signal line coupled to said first via; and an output signal line coupled to said second via.Type: GrantFiled: June 14, 2007Date of Patent: November 22, 2011Assignee: Flextronics AP LLCInventor: Dan Gorcea
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Patent number: 8064222Abstract: A COC DRAM including a plurality of stacked DRAM chips is mounted on a motherboard by using an interposer. The interposer includes a Si unit and a PCB. The Si unit includes a Si substrate and an insulating-layer unit in which wiring is installed. The PCB includes a reference plane for the wiring in the Si unit. The wiring topology between a chip set and the COC DRAM is the same for every signal. Accordingly, a memory system enabling a high-speed operation, low power consumption, and large capacity is provided.Type: GrantFiled: May 1, 2008Date of Patent: November 22, 2011Assignee: Elpida Memory, Inc.Inventors: Yoji Nishio, Seiji Funaba
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Publication number: 20110273858Abstract: Various circuit board sockets and methods of manufacturing and using the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a socket that is operable to receive a circuit board. The socket includes a surface for seating a first portion of a circuit board, a floor and a first support structure projecting away from the floor to support a second portion of the circuit board. The support structure includes a plurality of nested frames.Type: ApplicationFiled: May 6, 2010Publication date: November 10, 2011Inventors: Stephen Heng, Mahesh S. Hardjkar
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Publication number: 20110273859Abstract: A first connector has a plurality of terminals arranged in the direction along a first pattern, and the first pattern is connected to a terminal disposed far from an image sensor in the plurality of terminals of the first connector. A second connector has a plurality of terminals arranged in the direction along a second pattern, and the second pattern is connected to a terminal disposed closer to an image processing circuit in the plurality of terminals of the second connector.Type: ApplicationFiled: April 27, 2011Publication date: November 10, 2011Applicant: CANON KABUSHIKI KAISHAInventor: Shigeaki Sotsu
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Patent number: 8054647Abstract: An electronic device mounting structure includes an electronic device, a busbar, and a solder. The electronic device has a body and a lead protruding from the body. The busbar has a flat portion and a wall portion rising from a periphery of the flat portion. The flat portion of the busbar extends parallel to a tip portion of the lead and is in contact with a back surface of the tip portion. The wall portion of the busbar faces a side surface of the tip portion with a predetermined space. The solder is located in the space and joins the side surface of the tip portion and the wall portion of the busbar.Type: GrantFiled: September 3, 2008Date of Patent: November 8, 2011Assignee: Denso CorporationInventors: Akio Yasuda, Mutsumi Yoshino
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Patent number: 8054643Abstract: A semiconductor module includes a plurality of rectangular shaped semiconductor devices which are arranged in two rows such that each pair of adjacent semiconductor devices is in orientations differed by 90 degrees from each other. A plurality of wirings connect the semiconductor devices included in one of the two rows to the semiconductor devices included in the other row such that the semiconductor devices arranged in the same orientations are connected to each other.Type: GrantFiled: January 30, 2009Date of Patent: November 8, 2011Assignee: Elpida Memory, Inc.Inventor: Wataru Tsukada
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Patent number: 8054646Abstract: The present invention provides a circuit board connecting structure enabled to obtain the reliable connection between circuit patterns by restricting the elongation of a flexible base material even when connecting portions are arranged in a face-to-face configuration and are press-contacted with each other. A circuit board connecting structure 10 includes a first circuit board 11, and a second circuit board 12. The circuit board connecting structure 10 is configured so that when a first connecting portion 13 and a second connecting portion 14 are sandwiched by a pair of pressing jigs 18, 19 and are press-contacted with each other, one 23 of first outer dummy terminals is accommodated between columns of ones 33, 33 of second outer dummy terminals, while the other first outer dummy terminal 24 is accommodated between columns of the other ones 34, 34 of the second outer dummy terminals.Type: GrantFiled: February 20, 2006Date of Patent: November 8, 2011Assignee: Panasonic CorporationInventors: Masahito Kawabata, Yoshihito Fujiwara
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Patent number: 8050042Abstract: The terminating module and method include integrated circuits and a termination circuit which receive clock signals from the integrated circuit. The integrated circuit includes at least one memory integrated circuit mounted on a printed circuit board. An electrical connector is configured to couple the terminating module to a motherboard. Additionally, the termination circuit includes a resistor. In another embodiment, the terminating module provides a printed circuit board, a memory integrated circuit mounted on the circuit board, a terminator circuit which includes a resistor, and an electrical connector. The electrical connector couples the terminating module to a motherboard.Type: GrantFiled: July 26, 2005Date of Patent: November 1, 2011Assignee: Rambus Inc.Inventors: Ravindranath T. Kollipara, David Nguyen, Belgacem Haba
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Patent number: 8050053Abstract: The electronic circuit arrangement for controlling a process device comprises a process interface circuitry and a processing circuitry, wherein the process interface circuitry is designed for receiving process signals from the process device and converting the process signals into converted signals and/or digital data, which converted signals and/or digital data are transmitted to the processing circuitry, and wherein the processing circuitry is designed for processing the converted signals and/or digital data and for outputting processed signals and/or digital data, which processed signals and/or digital data are transmitted to the process interface circuitry, and wherein the process interface circuitry is designed for converting the processed signals and/or digital data into control signals, which control signals are transmitted to the process device.Type: GrantFiled: October 29, 2007Date of Patent: November 1, 2011Assignee: ABB Research LtdInventors: Bernhard Deck, Ernst Johansen, Bernhard Loher, Franz Zurfluh, Hans-Peter Zueger, Paul Rudolf
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Patent number: 8045337Abstract: A lock for a housing may have a protrusion, an opening, a receptacle, and a ramp. The protrusion is formed in a first side wall of a first member of the housing, and the opening is defined in the first side wall. The receptacle extends from a second side wall of a second member of the housing, and is in some ways complementary in shape and in dimensions to the protrusion. The ramp is formed in the second side wall. When the first member and the second member are assembled, the protrusion and the receptacle are mated to form a water-tight seal therebetween, while the ramp is received within the opening.Type: GrantFiled: April 3, 2008Date of Patent: October 25, 2011Assignee: Delphi Technologies, Inc.Inventors: Jesus R. Morales, Juan I. Banzo
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Publication number: 20110255250Abstract: Electronic devices may be provided that include mechanical and electronic components. Connectors may be used to interconnect printed circuits and devices mounted to printed circuits. Printed circuits may include rigid printed circuit boards and flexible printed circuit boards. Cosmetic structures such as cowlings may be used to improve device aesthetics. Bumpers may be mounted over rough edges of printed circuit boards to protect flex circuits that are routed over the printed circuit boards. Fasteners may be soldered to solder pad structures on printed circuit boards.Type: ApplicationFiled: June 4, 2010Publication date: October 20, 2011Inventors: Richard Hung Minh Dinh, Tang Yew Tan, Nicholaus Ian Lubinski, Jason Sloey, Shayan Malek, Scott Myers, Wyeman Chen, Dennis R. Pyper, Douglas P. Kidd, Joshua G. Wurzel, David A. Pakula
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Publication number: 20110255257Abstract: The auxiliary board joining structure further includes a plurality of positioning holes 6 formed in the main board 1, a plurality of positioning pins 20 formed on the main board 1, wherein the plurality of positioning pins 20 extend through the corresponding positioning holes 6 so as to be oriented parallel to the axial direction of the joint pins 17. Each of the positioning pins 20 has a height regulating face 23 for regulating a distance that the positioning pins are extended through the corresponding positioning hole 6. Each of the positioning pins 20 is formed long enough to be extended through the corresponding positioning hole 6 before the joint pins 17 are extended through the corresponding through-holes 5, when the main board 1 and the auxiliary board 10 are engaged.Type: ApplicationFiled: March 29, 2011Publication date: October 20, 2011Applicant: HONDA MOTOR CO., LTD.Inventors: Makoto Ogawa, Masanori Ueno
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Patent number: RE43112Abstract: A stackable FBGA package is configured such that conductive elements are placed along the outside perimeter of an integrated circuit (IC) device mounted to the FBGA. The conductive elements also are of sufficient size so that they extend beyond the bottom or top surface of the IC device, including the wiring interconnect and encapsulate material, as the conductive elements make contact with the FBGA positioned below or above to form a stack. The IC device, such as a memory chip, is mounted upon a first surface of a printed circuit board substrate forming part of the FBGA. Lead wires are used to attach the IC device to the printed board substrate and encapsulant is used to contain the IC device and wires within and below the matrix and profile of the conductive elements.Type: GrantFiled: May 18, 2006Date of Patent: January 17, 2012Assignee: Round Rock Research, LLCInventors: David J. Corisis, Jerry M. Brooks, Walter L. Moden