Abstract: An anisotropic conductive film includes an adhesive layer formed of a polymer resin, conductive particles dispersed in the adhesive layer, a support layer disposed at one side of the adhesive layer and maintaining the adhesive layer in a film shape, and a releasing sheet disposed at one side of the support layer.

Abstract: Disclosed herein is a substrate strip including: a substrate region having a plurality of substrate units formed therein; a dummy region enclosing the substrate region; a plurality of metal patterns formed at a predetermined size in the dummy region; and rib patterns formed between the metal patterns.

Abstract: The present invention provides an electric circuit device in which it is possible to achieve simultaneously the improvement of cooling performance and reduction in operating loss due to line inductance. The above object can be attained by constructing multiple plate-like conductors so that each of these conductors electrically connected to multiple semiconductor chips is also thermally connected to both chip surfaces of each such semiconductor chip to release heat from the chip surfaces of each semiconductor chip, and so that among the above conductors, a DC positive-polarity plate-like conductor and a DC negative-polarity plate-like conductor are opposed to each other at the respective conductor surfaces.

Abstract: A circuit package includes: electronic circuitry, electrically conductive material forming multiple leads, and multiple connections between the electronic circuitry and the multiple leads. A portion of the electrically conductive material associated with the multiple leads (e.g., low impedance leads supporting high current throughput) is removed to accommodate placement of the electronic circuitry. Each of the multiple leads can support high current. The multiple connections between the, the multiple leads provide connectivity between circuit nodes on the electronic circuitry and pads disposed on a planar surface of the electronic circuit package.

Abstract: A positive-electrode connecting plate (66) that connects positive-electrode terminals (28, 36, 48) of a plurality of power converter circuits is provided with slits (100, 102). The positive-electrode connecting plate has a positive-electrode bus bar portion (78) on which a first inverter corresponding region (94) that is connected to the positive-electrode terminal (36) of a first inverter as one of the power converter circuits via a positive-electrode connecting piece (80a), a second inverter corresponding region (96) that is connected to the positive-electrode terminal (48) of a second inverter as one of the power converter circuits via a positive-electrode connecting piece (80b) and a boost converter corresponding region (98) that is connected to the positive-electrode terminal (28) of a boost converter as one of the power converter circuits via a positive-electrode connecting piece (80c) are defined.

Abstract: A power conversion apparatus includes at least one semiconductor module including a main electrode terminal, a capacitor including at least one capacitor terminal member connected to the main electrode terminal of the semiconductor module, and an apparatus case housing the semiconductor module and the capacitor. The capacitor includes a capacitor body disposed in a capacitor case and shielded by a potting resin, the capacitor terminal member projecting from a potting surface of the capacitor body. The capacitor is fixed to the capacitor case such that the potting surface faces the semiconductor module. The capacitor terminal member is supported by and fixed to a fixing/supporting member fixed to the apparatus case.

Abstract: A power semiconductor module includes a first package having an upper arm circuit section, a second package having a lower arm circuit section, a metal case having a storage space to store the first package and the second package and an opening connecting with the storage space, and an intermediate connecting conductor to couple the upper arm circuit section with the lower arm circuit section; the case includes a first radiating section and a second radiating section facing the first radiating section through the storage space; the first package is arranged so that the arrangement direction of the first and second packages may be parallel to the respective surfaces facing the first and second radiating sections; and the intermediate connecting conductor couples an emitter side terminal extending from the first package with a collector side terminal extending from the second package in the storage space.

Abstract: The described embodiments relate generally to ultrasonic welding and more particularly to performing an ultrasonic welding operation while rotating one part relative to a mating part. A non-uniform energy director can be disposed along a mating surface of a first part. The energy director can maintain a constant cross-sectional area while having a smaller height near a pivot point for the rotation and a larger height away from the pivot point. The varying height of the energy director can allow the tip of the energy director to come in contact with a second part rotating relative to the first part at approximately the same time during the ultrasonic welding process.

Abstract: An electronic assembly includes a processor die assembly, a first die assembly, and a second die assembly. The first die assembly is positioned on a first side of the processor die assembly. The second die assembly is positioned on a second side of the processor die assembly opposite the first side of the processor die assembly. Through-die vias couple the first and second die assemblies to the processor die assembly.

Abstract: A housing for a personal electronic device includes a first housing portion, a second housing portion, and a pivoting member pivotally attached to the second housing portion. The first housing portion defines a first plane and has a first support member arranged thereon at a first angle to the first plane. The first support member includes at least one through hole for engaging a fastener. The second housing portion defines a second plane and has a second support member arranged thereon at a second angle to the second plane. The second support member includes at least one retaining hole configured to align with the at least one through hole and retain the fastener. The pivoting member is configured to pivot between at least two positions to obscure the fastener.

Abstract: A shielding device for shielding an electronic component (102) to be mounted on a printed circuit board (132). The shielding device exhibiting a top shielding (110) and a bottom shielding (120; 140; 160; 180) separable from each other, wherein the top shielding includes an electrically and/or magnetically conductive material and the bottom shielding is multilayered. The bottom shielding exhibits at least one electrically and/or magnetically conductive metal sheet layer (122; 162; 164) embedded between at least two insulating layers (126; 124) and includes at least two electrically conductive transmission lines (172; 174; 176) for conducting electric current to the electronic component. The top shielding and the conductive metal sheet layer are electrically isolated from the electronic component. The bottom shielding integrated into the printed circuit board and the top shielding and the bottom shielding designed such when they are attached to each other, they completely envelope the electronic component.

Abstract: An electronic control unit (ECU) assembly is provided, which includes a covering part, one or more metal oxide semiconductor field effect transistors (MOSFETs) (1), a substrate and an ECU main body. The covering part includes a lid element (3) having latch parts (6); the lid element (3) is secured onto the ECU main body via the latch parts (6); and the MOSFETs (1) are arranged between the lid element (3) and the substrate (9). The covering part further includes a middle element, which is in tight contact with and is elastically pressed against the MOSFETs (1), such that the MOSFETs (1) are brought into tight contact with the substrate. Thereby, the MOSFETs (1) are reliably fixed in the ECU assembly. A vehicle including the ECU assembly is also provided.

Abstract: This present invention provides a high power electronic device which is used for transforming the alternating current into the direct current, or transforming the direct current into the alternating current: a thyristor valve module, there are two same thyristor valve segments in the whole thyristor valve module; each segment includes saturated reactor, thyristor valve unit, direct current equalizing resistor unit, acquiring energy unit, damped resistor unit, damped capacitor unit, gate series unit and water cooling system. This device series connects the thyristor valves to meet different transmission powers and different voltage ranks. This device is the key element of the high voltage direct current transmission. It can be used for different voltage ranks AD transmission system and can also be used for different voltage ranks DC system, including the ultra-high voltage 800 kV and above system.

Abstract: A surface mount packaging structure that yields improved thermo-mechanical reliability and more robust second-level package interconnections is disclosed. The surface mount packaging structure includes a sub-module having a dielectric layer, semiconductor devices attached to the dielectric layer, a first level metal interconnect structure electrically coupled to the semiconductor devices, and a second level I/O connection electrically coupled to the first level interconnect and formed on the dielectric layer on a side opposite the semiconductor devices, with the second level I/O connection configured to connect the sub-module to an external circuit. The semiconductor devices of the sub-module are attached to the first surface of a multi-layer substrate structure, with a dielectric material positioned between the dielectric layer and the multi-layer substrate structure to fill in gaps in the surface-mount structure and provide additional structural integrity thereto.

Abstract: Provided are a thin film condenser for high-density packaging, a method for manufacturing the same and a high-density package substrate. The thin film condenser for high-density packaging, includes: a support substrate; a lower electrode formed on the support substrate; a dielectric thin film formed on the lower electrode; and an upper electrode formed on the dielectric thin film. Provided also is a method for manufacturing the same. The high-density package substrate, includes: at least two stacked substrates; thin film condensers embedded in the stacked substrates; an internal connection electrode formed in the stacked substrates and connecting the thin film condensers in series or in parallel; a surface electrode formed on the surface of the outermost substrate among the stacked substrates and connected to the internal connection electrode; and an integrated circuit connected to the surface electrode via a bump.

Abstract: A power semiconductor module is provided in which power semiconductor chips with an aluminum-based chip metallization and power semiconductor chips with a copper-based chip metallization are included in the same module, and operated at different barrier-layer temperatures during use.

Abstract: A rectifier assembly includes a diode pack. A bus bar includes a first layer electrically connected to the diode pack. The first layer has a first yield strength and a first coefficient of thermal expansion. A second layer of copper is joined to the first layer and includes a second yield strength less than the first yield strength. In one example, the second layer has a second coefficient of thermal expansion within 5% of the first coefficient of thermal expansion.

Abstract: A semiconductor component and a method of manufacturing the semiconductor component that reduces parasitic elements. A semiconductor chip is coupled to a semiconductor chip receiving area of a support structure. The semiconductor chip has at least two power semiconductor devices. A drain contact of a first power semiconductor device is coupled to a source contact of a second power semiconductor device and the drain and source contacts of the first and second power semiconductor devices are joined to the semiconductor chip receiving area. Another semiconductor chip may be bonded to a second semiconductor chip receiving area of the support structure. An energy storage element may be coupled between the source contact of the first power semiconductor device and the drain contact of the second semiconductor device. A protective structure may be formed over the semiconductor chips and the energy storage element.

Abstract: A group III-N nanowire is disposed on a substrate. A longitudinal length of the nanowire is defined into a channel region of a first group III-N material, a source region electrically coupled with a first end of the channel region, and a drain region electrically coupled with a second end of the channel region. A second group III-N material on the first group III-N material serves as a charge inducing layer, and/or barrier layer on surfaces of nanowire. A gate insulator and/or gate conductor coaxially wraps completely around the nanowire within the channel region. Drain and source contacts may similarly coaxially wrap completely around the drain and source regions.

Abstract: Various circuit board lids and methods and using the same are disclosed. In one aspect, an apparatus is provided that includes a lid adapted to cover a semiconductor chip mounted on a circuit board. The lid has a top plate, a first support leg and a second support leg opposite the first support leg adapted to support the lid. The first and second support legs and the top plate define a recess to accommodate the semiconductor chip. The recess has a first opening and a second opening. At least one of the first and second openings extends from the first support leg to the second support leg.

Abstract: An electronic device includes a housing defining an opening, a signal receiving unit received in the housing, a sensor window cover secured to the opening and corresponding to the signal receiving unit, and a stopping mechanism. The stopping mechanism includes a resisting member secured to the sensor window cover, a first stopping member and a second stopping member arranged on opposite sides of the opening. The resisting member defines a receiving portion. The receiving portion receives the first stopping member to allow the sensor window cover to be secured to the opening, and abuts the second stopping member to prevent the sensor window cover from being secured to the opening when the sensor window is installed reversely.

Abstract: A semiconductor device includes a semiconductor mounting substrate, a mother case having an opening and housing the semiconductor mounting substrate, a plurality of securing members provided along a rim of the mother case, a screw terminal, and a lid member. The screw terminal has a flat plate portion, an insertion portion extending from the flat plate portion, and a terminal bottom portion, is secured to the securing members by insertion of the insertion portion between adjacent securing members, and is electrically connected to the semiconductor mounting substrate on the terminal bottom portion side. The lid member closes the opening with the screw terminal secured to the securing members. The screw terminal is bent such that the flat plate portion faces an upper surface of the lid member closing the opening. The semiconductor device that can achieve reduction in size of the entire device is obtained.

Abstract: A chip package comprising a glass substrate, wherein a first opening in the glass substrate passes vertically through the glass substrate, a semiconductor chip, a wiring structure comprising a first portion in the first opening and a second portion over the glass substrate, wherein the first portion is connected to the semiconductor chip, wherein the wiring structure comprises a passive device, wherein the wiring structure comprises copper, and a dielectric layer over the glass substrate and on the wiring structure, wherein a second opening in the dielectric layer is over a contact point of the wiring structure, and the contact point is at a bottom of the second opening.

Abstract: A micro-fabricated atomic clock structure is thermally insulated so that the atomic clock structure can operate with very little power in an environment where the external temperature can drop to ?40° C., while at the same time maintaining the temperature required for the proper operation of the VCSEL and the gas within the vapor cell.

Abstract: A modified TO-can assembly is provided that has greater versatility with respect to spatial constraints than known TO-can assemblies and that is suitable for use in a wider range of applications than known TO-can assemblies. The modified TO-can assembly has a receptacle that has been modified to receive an optical fiber through its side instead of through its end. Within the TO-can assembly, the optical path is folded in order to couple the light between the optoelectronic component of the TOSA or ROSA and the end of the optical fiber. The combination of these features provides the modified TO-can assembly with a compact profile that makes it more versatile with respect to spatial constraints and therefore suitable for use in a wider range of applications.

Abstract: Disclosed herein is an improved relay for replacing an electro-mechanical relay and converting the original electro-mechanical relay to a solid state relay. The improved relay includes a housing module having an interior. The interior includes a plurality of existing relay tabs and wires. The wires electrically connect the tabs to a connection member. The invention also includes a solid state relay member having a solid state relay module. The module includes a plurality of solid state relay contacts, each corresponding to the existing tabs. The plurality of solid state relay contacts are mounted on, for example, a PC board and adapted for connection to the housing module connection member. Additionally, the existing relay includes a power tab and the wires and connection member are adapted to provide power to the solid relay module for powering each of the solid state relay contacts.

Abstract: A lithium battery includes a cathode, an anode including a component made of silicon, a separator element disposed between the cathode and the anode, an electrolyte, and a substrate. The anode is disposed over the substrate or the anode is integrally formed with the substrate.

Abstract: In some examples, a semiconductor package can be configured to electrically couple to a printed circuit board. The semiconductor package can include: (a) a lid having one or more first electrically conductive leads; (b) a base having a top, a bottom and one or more sides between the top and the bottom, the base having one or more second electrically conductive leads electrically coupled to the one or more first electrically conductive leads; (c) one or more first semiconductor devices mechanically coupled to the lid and electrically coupled to the one or more first electrically conductive leads; and (d) one or more first micro-electrical-mechanical system devices mechanically coupled to the lid and electrically coupled to the one or more first electrically conductive leads. The lid can be coupled to the base and at least one of the lid or the base has at least one port hole.

Abstract: A device housing package includes a base body (1) including, at its upper surface, a placement portion (1a) of a semiconductor device (9); a frame body (2) disposed on the base body (1) surrounding the placement portion (1a), including a notch (2b) formed by cutting a side wall thereof; an input-output terminal (3) attached to the notch (2b), including a wiring conductor layer (3a) electrically connected to the semiconductor device (9); and a sealing ring (5) disposed on an upper portion of the frame body (2). Moreover, side walls of the frame body (2) have, when seen in a plan view, an outer corner (2c) of adjacent side walls having a curved surface, the outer corner (2c) lying within a region overlapping the sealing ring (5) as seen in a plan view.

Abstract: According to an exemplary embodiment, a bondwireless power module includes a common output pad coupling an emitter/anode node of a high side device to a collector/cathode node of a low side device. The bondwireless power module also includes a high side conductive clip connecting a collector of the high side device to a cathode of the high side device, and causing current to traverse through the high side conductive clip to another high side conductive clip in another power module. The bondwireless power module further includes a low side conductive clip connecting an emitter of the low side device to an anode of the low side device, and causing current to traverse through the low side conductive clip to another low side conductive clip in the another power module. The bondwireless power module can be a motor drive inverter module.

Abstract: Packaged optoelectronic device include a first barrier layer having a plurality of feedthrough apertures communicating with at least one electrode layer of the device, and a plurality of conductive patches disposed on at least one of the plurality of feedthrough apertures for electrically connecting the device to a power supply. Each conductive patch includes a conductive metal surface layer and a non-conducting surface layer having an opening exposing the metal surface layer.

Abstract: A system and method for detecting a rotor fault condition in an AC induction machine is disclosed. The system includes a processor programmed to receive voltage and current data from an AC induction machine, generate a current frequency spectrum from the current data, and identify rotor-fault related harmonics in the current frequency spectrum. The processor is also programmed to calculate a fault severity indicator using the voltage and current data, identified rotor-fault related harmonics, and motor specifications, analyze the fault severity indicator to determine a possibility of rotor fault. The processor generates an alert based on the possibility of rotor fault.

Abstract: An electronic component includes: a substrate; a functional element located on the substrate; a wiring located on the substrate and electrically connected to the functional element; a metal ceiling located above the functional element so that a space is formed between the metal ceiling and the functional element; and a sealing portion located on the metal ceiling, wherein the metal ceiling is electrically connected to a signal wiring that is included in the wiring and transmits a high-frequency signal.

Abstract: A power converter equipped with a semiconductor stack made up of semiconductor modules, bus bars coupled to power terminals of the semiconductor modules, a capacitor, and an input terminal table. The capacitor is disposed in alignment with a first direction in which the semiconductor modules are stacked. The capacitor has a first end and a second end opposed to the first end in a second direction in which the power terminals extend from the semiconductor modules. The first end faces in the second direction. The input terminal table is located near the second end of the capacitor. This structure permits the power converter to be reduced in size and produced at a decreased cost.

Abstract: An IC system includes low-power chips, e.g., memory chips, located proximate one or more higher power chips, e.g., logic chips, without suffering the effects of overheating. The IC system may include a high-power chip disposed on a packaging substrate and a low-power chip embedded in the packaging substrate to form a stack. Because portions of the packaging substrate thermally insulate the low-power chip from the high-power chip, the low-power chip can be embedded in the IC system in close proximity to the high-power chip without being over heated by the high-power chip. Such close proximity between the low-power chip and the high-power chip advantageously shortens the path length of interconnects therebetween, which improves device performance and reduces interconnect parasitics in the IC system.

Abstract: A housing for a portable electronic device is transparent and U-shaped. The housing includes a first section, a second section opposite to the first section, and a connection portion connecting the first section to the second section.

Abstract: An electronic component mounting substrate including a support layer made of resin with first and second surfaces, an organic insulation layer on the first surface of the support layer with a first surface on opposite side of the first surface of the support layer and a second surface in contact with the first surface of the support layer, an inorganic insulation layer on the first surface of the organic layer, a conductor on the second surface of the support layer, and a first conductive circuit on the second surface of the organic layer. The inorganic layer has a second conductive circuit and a pad for mounting an electronic component inside the inorganic layer. The organic layer has a via conductor inside the organic layer and connecting the first and second circuits. The support layer has a conductive post inside the support layer and connecting the first circuit and the conductor.

Abstract: An exemplary electrical device includes a first main body; a second main body; and a rotatable mechanism pivotally connected the first main body and the second main body. The rotatable mechanism includes a first rotation unit and a second rotation unit. The first rotation unit is capable of making the first main body rotate around a second rotation axis in a plane perpendicular to the second rotation axis. The second rotation unit is capable of making the first main body rotate relative to the second main body around a first rotation axis.

Abstract: System and method for embedded passive integration relating to a multi-chip packaged device. The packaged device includes a capacitance layer that is configured for electrical coupling to a power supply and to a reference power supply. Further, the capacitance layer is configured for filtering the power supply and providing a filtered power supply. A semiconductor layer including a logic device is configured for electrical coupling to the filtered power supply.

Abstract: A dual-axis hinge structure and electric device having the same are provided, and the dual-axis hinge structure includes a hinge base having a pushed portion, a first pivot portion having a first cam and a first shaft, a second pivot portion having a second cam and a second shaft, and a restoring member connected both the first pivot portion and the second pivot portion. The first shaft is pivoted on the hinge base, and the first cam is fixed on the first shaft, and the first cam is contacted with one lateral side of the pushed portion. The second shaft is parallel to the first shaft, and is pivoted on the hinge base, and the second cam is fixed on the second shaft, and the second cam is contacted with another lateral side of the pushed portion.

Abstract: A package enclosing at least one microelectronic element (60) such as a sensor die and having electrically conductive connection pads (31) for electric connection of the package to another device is manufactured by providing a sacrificial carrier; applying an electrically conductive pattern (30) to one side of the carrier; bending the carrier in order to create a shape of the carrier in which the carrier has an elevated portion and recessed portions; forming a body member (45) on the carrier at the side where the electrically conductive pattern (30) is present; removing the sacrificial carrier; and placing a microelectronic element (60) in a recess (47) which has been created in the body member (45) at the position where the elevated portion of the carrier has been, and connecting the microelectronic element (60) to the electrically conductive pattern (30). Furthermore, a hole (41) is arranged in the package for providing access to a sensitive surface of the microelectronic element (60).

Abstract: A chip package includes a processor, an interposer chip and a voltage regulator module (VRM). The interposer chip is electrically coupled to the processor by first electrical connectors proximate to a surface of the interposer chip. Moreover, the interposer chip includes second electrical connectors proximate to another surface of the interposer chip, which are electrically coupled to the first electrical connectors by through-substrate vias (TSVs) in the interposer chip. Note that the second electrical connectors can electrically couple the interposer chip to a circuit board. Furthermore, the VRM is electrically coupled to the processor by the interposer chip, and is proximate to the processor in the chip package, thereby reducing voltage droop. For example, the VRM may be electrically coupled to the surface of the interposer chip, and may be adjacent to the processor. Alternatively, the VRM may be electrically coupled to the other surface of the interposer chip.

Abstract: A manufacturing method of a package structure is provided. A substrate having an upper surface and a lower surface opposite to each other and an opening communicating the surfaces is provided. An electronic device is configured in the opening. An adhesive layer and a patterned metal layer located on the adhesive layer are laminated on the lower surface and expose a bottom surface of the electronic device. A heat-dissipating column is formed on the bottom surface exposed by the adhesive layer and the patterned metal layer and connects the patterned metal layer and the bottom surface. A first and a second laminated structures are laminated on the upper surface of the substrate and the patterned metal layer, respectively. The first laminated structure covers the upper surface of the substrate and a top surface of the electronic device. The second laminated structure covers the heat-dissipating column and the patterned metal layer.

Abstract: Controller assemblies and packaging for electronic control systems of electric motors utilized in utility vehicles or other power equipment are disclosed. The controller assemblies are packaged for robust design and heat dissipation, while collectively housing the controllers, switches and sensors needed to operate multiple motors performing different functions, or the same function in serial.

Abstract: According to an exemplary embodiment, a bondwireless power module includes a common output pad coupling an emitter/anode node of a high side device to a collector/cathode node of a low side device. The bondwireless power module also includes a high side conductive clip connecting a collector of the high side device to a cathode of the high side device, and causing current to traverse through the high side conductive clip to another high side conductive clip in another power module. The bondwireless power module further includes a low side conductive clip connecting an emitter of the low side device to an anode of the low side device, and causing current to traverse through the low side conductive clip to another low side conductive clip in the another power module. The bondwireless power module can be a motor drive inverter module.

Abstract: A two-beam semiconductor laser device 10 includes: a two-beam semiconductor element LDC having a first and a second semiconductor laser elements LD1 and LD2 that can be driven independently and that are formed integrally on a substrate; and a submount 63 having, mounted on a front part thereof, the two-beam semiconductor laser element LDC with the light-emitting face thereof directed forward and having a first and a second electrode pads 64 and 65 connected to electrodes 61 and 62 of the first and second semiconductor laser element LD1 and LD2 by being kept in contact therewith. The first and second electrode pads 64 and 65 are formed to extend farther behind the two-beam semiconductor laser element LDC, and wires 14 and 16 are wire-bonded behind the two-beam semiconductor laser element LDC.

Abstract: Flip chip packages having warpage control and methods for fabricating such packages are described. In one embodiment, the flip chip package comprises a package substrate; a chip coupled to the package substrate; and a ring structure coupled to the package substrate and positioned laterally around the periphery of the chip so that a surface of the chip is exposed, wherein the ring structure comprises one or more compressive members, each of the one or more compressive members compressively opposed to a surface of the package substrate to counter or absorb stresses in the package substrate.

Abstract: A package structure includes a plurality of die carriers identical to each other. The respective features in each of the plurality of die carriers vertically overlap corresponding features in other ones of the plurality of die carriers. Each of the plurality of die carriers includes a plurality of through-substrate vias (TSVs) including a plurality of data buses. The plurality of die carriers is stacked and electrically connected to each other through the plurality of TSVs. The package structure further includes a plurality of device dies. Each of the plurality of device dies is bonded to one of the plurality of die carriers. Each of the plurality of data buses is configured to dedicate to data transmission of one of the plurality of device dies.

Abstract: A sensor assembly includes an outer housing and at least one high-impedance sensing device positioned within the outer housing. The sensor assembly also includes a buffering circuit comprising at least one wide bandgap semiconductor device positioned within the outer housing. The buffering circuit is operatively coupled to the at least one high-impedance sensing device.

Abstract: The present invention involves a method of providing an integrated circuit package having a substrate with a vent opening. The integrated circuit package includes a substrate having an opening and an integrated circuit mounted to the substrate. An underfill material is dispensed between the substrate and the integrated circuit.