Abstract: An image sensor assembly is mounted in an optical system having a plurality of reference locators. The image sensor assembly includes an image sensing device having photolithographically generated elements, such as image sensing sites, and a carrier package for enclosing the image sensing device. The carrier package has externally accessible reference features that are optically aligned with respect to the photolithographically generated elements on the image sensing device. Moreover, the externally accessible reference features are used to exactly constrain the image sensor assembly relative to the reference locators. Referencing the image sensing device to the same features that are used for exact constraint removes the effect of material variations that may cause dimensional changes and eliminates the need to activate the sensor for alignment of the sensor assembly in the optical system.

Abstract: A method and structure for routing electrically conductive interconnect paths through a printed circuit board. The printed circuit board includes a plurality of insulating layers and conductive layers, including at least one electrically conductive voltage supply layer for receiving a first supply voltage. A plurality of voltage supply pad patterns are located at the upper surface of the printed circuit board. Each voltage supply pad pattern includes two or more electrically conductive pads which are coupled by one or more electrically conductive traces. Electrically conductive via plugs extend through the printed circuit board to connect the voltage supply layer to the voltage supply pad patterns. Each via plug is connected to one corresponding voltage supply pad pattern, thereby allowing each via plug to provide the first supply voltage to a plurality of pads at the upper surface of the printed circuit board.

Abstract: Improved edge terminals for electronic circuit modules such as single- or multi-chip modules and hybrid circuits, and methods of making the edge terminals are disclosed. The improved edge terminals are formed on the edges of the modules, where they do not take up appreciable surface area from the module, and are formed of heat resisting metal and are of larger size as compared to conventional surface terminal pads which simplifies making connections to the module. In one embodiment, ends of pins are inserted in holes in a substrate along lines which will be the edges of the finished modules. After encapsulating in epoxy, the substrate is cut along the lines to bisect the pins, leaving the halves of the pins as embedded terminals flush with the edge of the module. In another embodiment, terminals are formed by attaching the terminal pieces to pads on the substrate, either in the form of widened zones in a grid structure, or an array of terminal plates.

Abstract: A package for an electronic component includes a metal base plate and a body of an insulating material, such as glass or ceramic, on and bonded to a surface of the base plate. The body is formed of a plurality of layers of the insulating material stacked and bonded to each other and has at least one opening extending therethrough to the base plate. Strips of a conductive material, such as a metal, are on the surface of various layers of the body. An electronic component is mounted in the opening in the body and has terminals which are electrically connected to the conductive strips on the body, preferably by wires. Vias of a conductive material may extend through some of the layers of the body to connect the conductive strips to terminals on the surface of the body. A cover plate of an insulating material may extend over the body and the opening therein to enclose the electronic component in the body.

Abstract: Disclosed is an optical package which is economical to manufacture. An optical component, such as a PIN photodiode, is bonded to a substrate such as silicon with no metallization on its side surfaces. The resulting assembly is solder bonded to the bottom surface of the package so that a side surface of the substrate is adjacent to the bottom surface with essentially no solder therebetween.

Abstract: An IC socket comprises a socket body including a plurality of contacts for interconnecting an IC and a wiring board. Each of the contacts comprises a contacting arm including an upper end contact portion for a lead of an IC to overlie and contact, and a lower end contact portion including a downwardly facing projection capable of abutting with a wiring portion of the wiring board, and a pressing element projecting backwardly of the contacting arm from an area in the vicinity of a connecting portion between the projection and the contacting arm. The projection forming the lower end contact portion is received in an upwardly and downwardly open through-hole formed in the socket body, so as to be subjected to abutment with the wiring portion.

Abstract: A module houses electronic circuitry that comprises a first electrically conductive surface area and a second electrically conductive surface. The first and second electrically conductive surfaces combine to form a substantially token-shaped body. The body has a groove positioned around its perimeter. A probe that has a first end and a second end. A conductive, approximately pointed tip that extends from the first end of the probe and a conductive sleeve extends outward from pointed tip from a location proximate to said first end to a second distance. A first electrical connection contacts the tip and extends from the first end through the probe out the second end. A second electrical connection contacts the sleeve and extends from the first end through the probe out from the second end. A housing that holds an electronic module. The electronic module has a first surface and a second surface.

Abstract: An integrated circuit device package of this invention includes a flexible substrate having an upper patterned insulative layer, and a lower patterned conductive layer including a plurality of package leads. An integrated circuit die is fixed within a void of the upper surface of the flexible substrate. Electrical connections between the integrated circuit die and the package leads are provided. A rigid upper protective layer is present. The rigid upper protective layer encloses the integrated circuit die, and at least partially covers the top surface of the upper insulative layer. The semiconductor device package further comprises a rigid or semi-rigid metal lower protective layer opposite the upper protective layer including a ground plane proximal to the electrical leads and a power plane distal to the leads. Methods of production are also given.

Abstract: The present invention is characterized by providing leads not contributing to actual connection outside the corner leads to prevent the deformation of the corner leads and improve the yield of tape carriers. A device hole is made in a near-central place of an insulating resin film. Around the device hole, outer-lead holes are made. On the insulating resin film, a plurality of wiring patterns are provided and forced to project into the device hole. The plurality of wiring patterns are formed into a plurality of inner leads, of which the outermost ones are determined to be corner leads. On each corner of the device hole, an aligning mark is provided. Dummy leads are provided closer to the aligning marks. The dummy leads are made shorter than the inner leads and corner leads.

Abstract: The present invention is to provide an electronic part mounting device including: a lamination body composed of a circuit board and a structural member; an electronic part attached in an opening formed in the lamination body; and an encapsulant layer to encapsulate the electronic part, wherein an outer circumferential line of the opening is arranged inside an outer circumferential line of the encapsulant layer. Due to the foregoing arrangement, in the electronic part mounting device of the present invention, even if the device is bent, the encapsulant layer to encapsulate the electronic part is engaged with the circuit board or the structural member arranged inside the outer circumferential line of the encapsulant layer, so that electronic parts are prevented from coming off. Further, the manufacturing process is simple. Therefore, the cost of the electronic part mounting device can be greatly reduced.

Abstract: Arrangement for the protection of electrical and electronic components against electrostatic discharge, where a printed circuit board on which the components are mounted is physically connected to a metal plate via an insulating layer with the insulating layer having at least one conductor track of the printed circuit board opening over which at least one track is placed to form a first spark gap between the track and the metal plate and with the metal plate being connected to a fixed potential.

Abstract: A semiconductor device which includes a ceramic package main body, a semiconductor element and a closure for sealing the semiconductor element in the package. A capacitor is formed on an upper or lower surface of the closure. The capacitor has a dielectric film interposed between a pair of electrode films. The dielectric film includes a ceramic filler and an amorphous glass. The closure and the package main body are sealed. A terminal formed in the package main body and the electrode film of the capacitor are connected electrically. High-density packaging on a substrate can be achieved. High strength of the closure itself can be maintained. Thermal stress developed in the closure itself, or the conjugated portion between the closure and the package main body, can be suppressed. Reliability of a sealed structure in the semiconductor device for a long period of time can be increased.

Abstract: A single leadframe package having stacked integrated chips mounted therein provides multiple electrical functions. The leadframe package construction includes a leadframe die having a substantially smaller outer peripheral dimension than a first integrated circuit chip mounted face down thereon for supporting from below the first integrated chip without obstructing its bond pads. A second integrated circuit is supported from below in a backside to backside configuration by the first integrated circuit without obstructing the bond pads of the second integrated circuit. A plurality of substantially short conductive wires interconnect electrically the first and second integrated circuit chips with selective ones of a plurality of leadframe conductors. An encapsulating material molds the construction into the single leadframe package.

Abstract: A lead frame includes a base member having a device hole for accommodating a semiconductor chip therein, a plurality of inner lead portions extended outward from respective sides of the device hole, outer lead portions electrically connected to the inner lead portions, respectively, an adhesion area to which the inner lead portions formed on the base member are adhered, and a plurality of dummy leads disposed on a portion of the adhesion area where a density of the inner lead portions is low.

Abstract: A multichip package having individual chips which can be tested at the package level. A first pattern of conductive wires is formed on an upper surface of the circuit board for electrically connecting the individual chips. A second pattern of conductive wires is formed on the upper surface of the circuit board for providing data connections between the individual chips. Common pads formed in the circuit board extend from the upper surface to a lower surface of the circuit board, and the second patten of conductive wires is connected via the common pads. A molding compound is formed over the upper surface of the circuit board, embedding the individual chips and the first and second conductive patterns, while leaving the lower surface of the circuit board and a lower surface of the common pads exposed. A test socket having pad contact pins corresponding to the locations of the common pads, is placed at the lower surface of the circuit board so that signals may be applied and detected at common pads.

Abstract: A ceramic case includes a plurality of stitches divided into a central sub-group shared between different kinds of semiconductor chips and side sub-groups selectively used for the different kinds of semiconductor chip, and the side sub-groups enhance the compatibility of the ceramic case.

Abstract: Many circuit boards include conventional sockets for receiving optional ICs. Such sockets are soldered to the circuit board during the manufacturing process. However, many of such sockets are wasted because they are never used. Such waste can be eliminated by using a clip-on IC retaining apparatus. It includes a housing, a retaining clip, and four registration holes arranged at the comers of a trace pad on a circuit board. The housing includes a shallow, open cavity on a bottom side for receiving a SMD. Four registration fingers projecting from the bottom of the housing mate with the registration holes on the circuit board to align the pins of the SMD with the trace pad. Ribs on the walls of the cavity slide between the pins to separate and straighten any bent pins. The retaining clip includes four downwardly bent flat springs connected in a rectangular pattern. Four slots in the housing extend vertically between the top thereof and the bottom of the fingers.

Abstract: SIP or ZIP packages are provided with locking elements of snap fasteners, or have package alignment tabs to combine several IC packages into an IC package assembly. Using a DIP printed circuit board socket, a high density DIP module, for example, a high capacity memory chip, is assembled. The leads of the module are inserted into a motherboard that carries the external conductors to be connected with the inner circuits of the package assembly, and soldered to the motherboard. To make the IC package assembly compatible with a conventional DIP socket, a plastic spacer can be provided between the IC packages. A retaining clip may be used to allow the IC package assembly to be repeatedly inserted and removed to and from the socket without the risk of falling apart.

Abstract: A plurality of leads are formed on a wiring board which is adhered onto a light transmitting member for transmitting a light beam. A plurality of electrode pads are formed, corresponding to the leads, on a photoelectric converting device. An anisotropically conductive film is formed between each of the leads and each of the corresponding electrode pads.

Abstract: Integrated circuit (IC) packages having leads projecting in the vertical direction are provided with male and female locking elements of snap fasteners that allow a pair of IC packages to be stacked into a module so as to align the leads of one package with the leads of another package. The leads of the packages are soldered to a PCB that carries the external conductors to be connected with the inner circuits of the packages. The male locking element on one of the IC packages is tightly engaged with the female locking element on another IC package to prevent the soldered leads of one package from touching the leads of another package. Multiple modules are positioned on the PCB to double the packaging density of the PCB.

Abstract: A charge coupled device (CCD) semiconductor chip package includes a body having a hole formed in the center thereof and a projection extending inwardly from the inner wall of the body. A plurality of outleads are embedded in the projection, and a plate is attached to the upper surface of the projection. A glass lid is attached to the upper surface of the body for covering the upper portion of the hole. A chip has a light receiving area and a plurality of solder balls, and a bottom cover fills the lower portion of the hole and supports the chip. The CCD package chip employs a direct connection technique of outleads to solder balls formed on chip pads, instead of a wire bonding process, which demands a high temperature environment. By using a price competitive plastic body, material cost is reduced compared to a costly material, such as a ceramic body, when fabricating a semiconductor package. Further, package reliability is enhanced.

Abstract: The invention relates to a packing element, which can be used for packing and arranging one or more electric components of an appliance, depending on the case together with the same or similar packing elements; the packing element (1,3,4) has at least one current-conducting or light-conducting conducting track (10,11,12,17,18,43,44). Moreover, the invention relates to a device such as a Personal Computer in which this packing element is used.

Abstract: Proposed is a connecting socket used for electric connection between electrode terminals of a semiconductor package and electrode terminals of a circuit board by being interposed therebetween. The socket is an assembly consisting of a base body in the form of a frame made from an insulating material, in which a semiconductor package is put and secured in the position, and an anisotropically electroconductive elastic sheet member bonded to the bottom surface of the base body. When the socket holding the semiconductor package is mounted on a circuit board, electric conduction is established between the electrode terminals of the semiconductor package and the electrode terminals of the circuit board through the anisotropically electroconductive elastic sheet member.

Abstract: Latches are pivotally provided on opposite sides of an IC device stored in the pocked of an IC carrier. Connecting arms of the latches are engaged in engagement holes formed in actuator members which are biased upwardly by springs. The top surface of the IC carrier, except the IC pocket, is covered by an actuating plate. The positioning pins of an IC set/removal mechanism are inserted into holes of the IC carrier so as to cause the mounting plate to which the pins are secured to press the actuating plate down against the top face of the IC carrier causing the actuator members to pivot the latches, whereby the hold-down lugs of the latches are retracted from the top of the IC. The IC is now ready to be picked up by a suction pad.

Abstract: In a semiconductor device comprising an IC chip (8) mounted on a circuit substrate (7) and sealed with a molding resin (11), corner resist films (6a, 6b, 6c, 6d) are formed at positions corresponding to a corner A of the IC chip (8) on the circuit substrate (7), and the corner A of the IC chip (8) is bonded to these corner resist films by using a die bond (9). A die pattern (3a) is exposed outside the corner resist films, and a power supply pattern (3b) is so formed to encompass their periphery. The power supply terminal, the die pattern (3a) and the power supply pattern (3b) are connected to the IC chip (8) of the corners of the IC chip is improved and peel is prevented. Furthermore, bonding of a large number of bonding wires for supplying power can be freely made.

Abstract: A method in which several high voltage chips may be packaged within a single, typically low voltage plastic package. The high voltage chips are packaged to remain electrically isolated from each other to avoid undesirable side effects such as arcing between the chips but able to share electronic data and communicate with each other electronically through their input and ouput nodes. Due to the unique packaging method, the typically low voltage plastic packaging can be made to withstand operating voltages up to 35 times greater than previously attained by such low voltage plastic packaging.

Abstract: A personal data storage device for storing information and a system for storing and reading such information from the storage device. A programmable memory is encapsulated in a potting compound which includes a plurality of channels enclosing leads of the memory package. The channels extend to the outside of the encapsulated memory to permit exterior contact with the memory leads. A conductive sealant placed in the channels for sealing the channels of the encapsulated flash memory makes electrical contact with the leads. A device for reading the information from the data storage device includes a PCMCIA interface which can read and write data to and from the personal data storage device and a computer. The computer further includes programming for compressing and decompressing data which is stored and read from the personal data storage device.

Abstract: A bus pattern for an integrated circuit package. The package has a first conductive bus and a second conductive bus that are located on a bond shelf. The first conductive bus has a plurality of interconnected tab portions that are separated by a plurality of non-conductive slots. The second conductive bus has a plurality of interconnected tab portions that are located within the non-conductive slots of the first bus. The tab portions of each bus are wire bonded to a plurality of die pads located on an integrated circuit that is mounted to the package.

Abstract: A surface mount component which can be mounted to a surface of a printed circuit board having a plurality of bonding pads connected to circuitry provided on the printed circuit board, which includes a puck having first and second wiring patterns, and a plurality of electrical connectors, a first set of electrical connectors being connected to the first wiring pattern, and a second set of the electrical connectors connected to the second wiring pattern. During the process of manufacturing a product which incorporates the printed circuit board, a production line worker can mount the puck to the surface of the printed circuit board in a selected one of a plurality of different possible positions, with at least selected ones of the first and second sets of electrical connectors being connected to respective ones of said bonding pads, to thereby achieve a selected one of a plurality of different selectable circuit configurations.

Abstract: An integrated electro-optical package including a semiconductor chip with a large array of light emitting devices formed thereon and cooperating to generate a complete real image. The light emitting devices are positioned in rows and columns and connected to pads adjacent outer edges of the chip. A window frame substrate having a central opening therethrough coextensive with the real image generated by the chip and mounting pads, bump bonded to the pads on the chip. A plurality of driver circuits connected to the light emitting devices through terminals on the window frame substrate. A lens mounted to the substrate over the opening and on a side opposite the chip to magnify the real image and produce an easily viewable virtual image.

Abstract: An integrated circuit (IC) device package that includes permanent identification regarding the device characteristics, wherein the permanent identification are at or below the surface of the package and may indicate the operating frequency of an IC die within the package, as well as voltage requirements, etc.

Abstract: An integrated circuit (IC) device package that includes permanent identification regarding the device characteristics, wherein the permanent identification are at or below the surface of the package and may indicate the operating frequency of an IC die within the package, as well as voltage requirements, etc.

Abstract: A combination axial and surface mounted cylindrically-shaped package containing at least one electronic component and being surface mountable to a printed circuit board with electrical lands by the use of conventional axial component through hole mounting machinery that includes a hollow, electrically-insulated, and generally circular-cylindrically-shaped housing, at least one electronic component that is contained in the hollow, electrically-insulated, and generally circular-cylindrically-shaped housing, a pair of electrically-conductive axial leads that are in electrical communication with the at least one electronic component, and at least one circumferentially-disposed, laterally-oriented, and electrically-conductive ring also in electrical communication with the at least one electronic component.

Abstract: A semiconductor substrate layer is provided which includes a plurality of severed through holes (or metallized half vias) along an edge portion of the substrate layer. The bonding fingers of a leadframe are then formed into a down set (or up set) format and soldered to the substrate at the severed, plated through holes. This technique increases the contact area between the leadframe and the substrate. In addition, the down set (or up set) format of the leadframe bonding fingers decreases the stress built up due to CTE mismatch between the substrate and the leadframe.

Abstract: A substrate, an alignment plate, a heat sink, a back plate, a plurality of spacers, and a plurality of nuts are used to removably package one or more semiconductor package into a single module. The semiconductor dies are packaged with tape automated bonding (TAB) packages having land grid array (LGA) outer lead bumps. The substrate comprises a number of land patterns, a number of alignment cavities, and a number of join cavities. The alignment plate is fabricated with a number of alignment pins, a number of housing cavities, and a number of join cavities. The heat sink is fabricated with a number of stems and a number of join cavities. The back plate is fabricated with a number of extrusions having threaded ends. The spacers are fabricated with ranged openings at both ends, and each spacer is loaded with a number of spring washers. The nuts are fabricated with stepped heads.

Abstract: A semiconductor package has a guide in the form of a lug only at least two diagonally opposite corners on the upper surface thereof. A cap to be adhered to the package is configured to mate with the inside surfaces of the guides. The package is, therefore, surely seated and held in close adhesion to the cap.

Abstract: A system for packaging integrated circuit components including a ball grid array substrate with a plurality of solder balls coupled to the substrate. A semiconductor device is mounted on the substrate and electrically coupled to the solder balls. One or more terminals are coupled to the substrate and electrically coupled to said semiconductor device. A detachable module contains auxiliary component. The module comprises a body portion for containing the component and one or more electrical connectors for mating with respective terminals to hold the module to the substrate and to electrically couple the component with the semiconductor device. The terminals may also be connected to the solder balls such that a component may be optionally provided either on the circuit board or in the detachable module.

Abstract: The radiation shielded and packaged integrated circuit semiconductor device includes a lid secured to a base to enclose the integrated circuit die within, wherein the lid and the base are each constructed from a high-Z material to prevent radiation from penetrating therethrough. Another embodiment includes a die attach slug constructed from a high-Z material disposed between the integrated circuit die and a base, in combination with a high-Z material lid to substantially block incident radiation.

Abstract: An electronic circuit structure having a reduced size includes a circuit substrate, an aperture extending through the circuit substrate, and an electronic component suspended within the aperture. The suspension of the electronic component within the aperture significantly reduces the profile of the overall electronic circuit structure. The aperture further enables electronic components to be mounted in a partially overlapping fashion to reduce the surface area of the electronic circuit structure. The electronic circuit structure can make use of standard FR-4, G-10, or ceramic circuit substrates or multilayer flex circuits, as well as electronic components in the form of standard leaded integrated circuit packages. The mounting of the electronic component within the aperture of the circuit substrate provides an advantage of assisting in heat dissipation. The incorporation of mesh-like voltage and ground planes can further aid in heat dissipation and provide electrical isolation and capacitive filtering.

Abstract: A semiconductor device comprising a semiconductor chip, a sheet-like metal member electrically connected to a major surface of the semiconductor chip and serving as a ground electrode for the chip, and input/output electrodes electrically connected to the semiconductor chip and situated in the same plane as that of the sheet-like metal member, the chip, the metal member, and the input/output electrodes being encapsulated in an electrically insulating member having a bottom surface and adapted to be mounted on a surface of a circuit board. The sheet-like metal member is brought out from inside the electrically insulating member without being bent and has its one end face situated in substantially the same plane as the bottom surface of the electrically insulating member which faces to the surface of the circuit board when the metal member is mounted on the circuit board and the major surface of the chip is approximately prependicular to the end face of the sheet-like metal member.

Abstract: Power bus bars are provided for a semiconductor die. Power bus bars are thick electrical conductors that extend the length of the die in an electrically isolated array of stripes. The electrical stripes are divided into two or more interdigitated groups, each group connected to a power supply, or connected to a ground supply. This arrangement of alternate power and ground stripes minimizes inductance and resistance, and brings power and ground close to every transistor in the semiconductor die with minimized voltage variations.

Abstract: A multi-layered, high performance integrated circuit package is disclosed having a number of design features which increase the performance and manufacturability of the integrated circuit package, and reduce the effects of parasitic noise generated within the package. The metallic layers connecting contact fingers formed on ledges around the periphery of a die cavity area, to their respective package pins are organized such that a ground metallic layer is interposed between each pair of input/output signal metallic layers, and each input/output signal metallic layer is sandwiched between a pair of metallic layers wherein one layer of the pair is connected to a voltage supply and the other layer of the pair is connected to a corresponding ground reference.

Abstract: SIP or ZIP packages are provided with locking elements of snap fasteners that allow several packages to be attached to each other to produce an IC package assembly. Using a DIP printed circuit board socket, a high density DIP module, for example, a high capacity memory chip, is assembled. The leads of the module are inserted into a motherboard that carries the external conductors to be connected with the inner circuits of the package assembly, and soldered to the motherboard. To make the IC package assembly compatible with a conventional DIP socket, a plastic spacer can be provided between the IC packages. A retaining clip may be used to allow the IC package assembly to be repeatedly inserted and removed to and from the socket without the risk of falling apart.

Abstract: A thin and flat integrated circuit assembly (10, 40) may be achieved by using a thin carrier (20) with shallow cavities (22, 24) for holding the integrated circuits (16) and/or discrete circuit components (14). The integrated circuits (16) and/or circuit components (14) may be friction fitted in the cavities (22, 24) or they may be secured therein by the use of adhesives and/or solder. Electrical connection between the integrated circuits (16) and circuit components (14) may be done with wire bonding, ribbon bonding, tape-automated bonding, lead frames, flip chip bonding, and/or conductive gluing of leads. The circuit assembly may then be accommodated into a credit card-sized packaging with standard dimensions set by the International Standards Organization.

Abstract: Disclosed is a printed wiring board and memory card assembly comprising a pair of opposed cover plates, a printed wiring board interposed between the opposed cover plates, an electrical battery positioned adjacent the printed wiring board and between the opposed covers, a positive terminal connecting the printed wiring board with the battery and a negative terminal connecting the printed wiring board with the battery and both of the cover plates. A method of grounding the printed wiring board by this assembly is also disclosed.

Abstract: Disclosed herein is a semiconductor device package including a ground frame formed of a metal plate. The ground frame has a rectangular central portion, four legs integrally extending outward from the four corners of the central portion, and four grounding lead terminals formed integrally with the outer ends of the four legs. The width of each grounding lead terminal including a grounding portion is set to about three to five times the width of each lead terminal. The outer end of each grounding lead terminal is slightly projected outward from the outer end of each lead terminal. Accordingly, a stable ground potential can be ensured, and deformation of each lead terminal can be reliably prevented.

Abstract: There is disclosed a cover for protecting the leads extending between a silicon chip device and an associated printed circuit board and their electrical connections with the board. The cover is formed out of clear plastic allowing inspection of the chip device and has several legs for securing and maintaining the cover on the board and has openings that allow for cooling of the chip device.

Abstract: A connector for protecting an IC comprising a connector body, a closed plate, and an annular air-tight sealing material. An air-tight chamber is formed centrally of the annular air-tight sealing material by compressing the annular air-tight sealing material between the connector main body and the closed plate. The IC is received in the air-tight chamber so as to be electrically contacted with the connector body.

Abstract: A shielded semiconductor package and a method for manufacturing the package is provided. The shielded semiconductor package comprises a metal coating (19) applied over an encapsulated semiconductor device (16). The device may be transfer molded or encapsulated by glob top technology. The metal coating (19) serves as a barrier to the transmission of electromagnetic or radio frequency energy, thereby shielding the semiconductor device (16). The shielded semiconductor package is manufactured by providing a metallization pattern (12 and 14) on a substrate (10) and mechanically attaching and electrically interconnecting a semiconductor device (16) to the metallization pattern. A resin (18) is transfer molded about the semiconductor device, the electrical interconnections (17), and the metallization pattern so as to form an assembly, and a metal coating (19) is applied via vacuum deposition or plating to interconnect with a portion of the metallization pattern.

Abstract: An electronic device (10) includes a package (16) having two posts (30) suitable for insertion in PCB holes. Package (16) presents a lengthwise molding plane (32) along which the upper portion (42) and bottom portion (44) of package (16) are mated during the molding process. Posts (30) are disposed substantially exclusively in bottom portion (44) so that posts (30) are asymmetric about lengthwise molding plane (32). Thus, even if a top mold (42a) and a bottom mold (44a) are misaligned there will be no effect on the dimensional tolerance of posts (30) and thus the tolerance of post (30) can be closely matched with a PCB hole (20) tolerance to insure a snug fit. Thus, device (10) is mounted edgewise on a PCB (18) by insertion of posts (30) into PCB holes (20) so that tips (24) of lead fingers (4 14) can be connected to PCB (18) by surfacing-mounting techniques or the like.