Abstract: Disclosed is a process to manufacture an interposer which includes an interposer socket assembly to use in probing dense pad arrays that minimizes the associated extraneous pin loading and cross-talk caused by a probe tip. The process comprises the steps of: mounting a number of resistors onto a number of predetermined positions in a pad array on an interposer board; inserting a number of interposer pins of a pin socket into the pads of the pad array on the interposer board, wherein the ends of the interposer pins protrude through the interposer board; placing a solder preform around the ends of the interposer pins; and, heating the solder preforms in a solder re-flow oven to solder the interposer pins to the respective pads of the pad array.

Abstract: A method and apparatus are provided for mounting a Very Large Scale Integration (VLSI) chip such as a microprocessor on the back plane of a computer chassis. In one embodiment, the mounting on the computer chassis is configured to provide a current supply connection for delivering a high level of current to the microprocessor from a current source through the computer chassis. Also provided are a method and apparatus for mounting a VLSI chip such as a microprocessor on the chassis of a computer system in order to dissipate heat from the VLSI chip to the ambient outside the computer system through the computer chassis. Also provided are a method and apparatus for signal interconnections among one or several VLSI chips such as microprocessors mounted on the chassis of a computer to provide signal capacity with strong integrity. Also provided are a method and apparatus for mounting a power supply for a VLSI chip package on the back chassis of a computer.

Abstract: An aluminum heat sink bridge (1), mounted overlying a transistor unit (5) on a circuit board (12), has affixed to its underside, along two lateral edges, a pair of resilient plastic or rubber members (4), which, when the bridge is screwed down into place, exert continuous vertical pressure on the collector tab (8) and the base tab (7) keeping them in electrical contact with their underlying electrical contact points on the circuit board (12) while permitting horizontal movement of the tabs due to variations in temperature. One embodiment of the invention has resilient members extending the entire length of the bridge to exert vertical pressure on grounding tabs (9) extending laterally from the ends of the transistor unit.

Abstract: A ceramic base plate of aluminum nitride ceramics, for example, as a power module board has a metal layer on a surface of the ceramic base plate at a fixing portion at which the ceramic base plate is fixed onto a heat radiating plate. Further, a metal film is provided entirely on the rear surface of the ceramic base plate. An IGBT chip or the like is fixed onto the ceramic base plate with a conductive layer interposed therebetween, to form a power module board. Therefore, it is possible to avoid the generation of cracks when the ceramic base plate is mechanically fixed onto the heat radiating plate without using solder, and heat radiation from the ceramic base plate to the heat radiating plate can be improved.

Abstract: A method of manufacturing a semiconductor device including two semiconductor chips having mutually different element forming face areas on respective surfaces of a die pad of a lead frame prepared by sealing the semiconductor chips with resin by setting the lead frame in a resin sealing use mold having an injection gate for injecting therethrough a sealing resin, includes the steps of: (a) mounting the semiconductor chips on respective surfaces of the die pad in such a manner that when setting the lead frame in the resin sealing use mold, a distance between a side face of the semiconductor chip having a larger element forming face area on the injection gate side and a side face of the semiconductor chip having a smaller element forming face area on the injection gate side becomes shorter than a distance when these semiconductor chips are mounted at a center on respective surfaces of the die pad; (b) setting the lead frame in the resin sealing use mold so that the above side faces of the semiconductor chips ar

Abstract: An electronic assembly (1) having at least one semiconductor die (2) with external electrodes (3) has a foldable electrically insulating substrate (4) supporting a plurality of conductive leads (5) connected and mounted to respective ones of the electrodes (3). A plurality of external connectors (11) supported by the substrate (4) are electrically coupled to respective ones of the leads (5). The substrate (4) is folded at least once into a folded position to form at least two opposite facing surfaces (8, 9) with an adhesive and the die (2) at least partially sandwiched therebetween. The adhesive bonding the substrate (4) to the die (2) maintains the substrate (4) in the folded position.

Abstract: A semiconductor device according to the invention of the present application comprises a base material having a surface on which conductive circuits are formed, a resist film for covering the base material in a state in which peripheral portions of the base material and portions of the conductive circuits are bare, a semiconductor elemental device mounted on the base material and connected to the bare portions of the conductive circuits and electrodes thereof, and a sealing body for sealing the semiconductor elemental device in an area including a range from the resist film for covering the base material to the bare portions. Owing to the provision of the resist in the exposed state of the portions of the base material, the sealing body and the base material are firmly bonded to one another therebetween so that they can be restrained from peeling.

Abstract: A structure in which an electronic part is mounted on a substrate via mount resin and has electrodes thereof connected to electrodes arranged on the substrate for wire bonding by conductors is disclosed. A frame for preventing the mount resin from flowing out is formed on the substrate between a portion for mounting the electronic part and the electrodes for wire bonding. The structure prevents the mount resin from flowing out with a relatively simple scheme at low cost, and allows the number of semiconductor chips or similar electronic parts to be increased in order to implement high-density buildup wiring.

Abstract: An interposer for evaluating an electrical characteristic of a ball grid array package or of a semiconductor die thereof. The interposer includes electrically conductive vias positioned correspondingly to bond pads of the semiconductor die and to the electrical contacts or terminals of a carrier substrate of the ball grid array package. Test pads, or contact pads, are disposed proximate an outer periphery of the interposer. Each of the test pads is in electrical communication, preferably by means of electrical traces, with a corresponding electrically conductive via of the interposer. In use, the interposer is aligned with and disposed between the semiconductor die and the carrier substrate such that the test pads of the interposer are at least partially located outside of a periphery of the semiconductor die. Thus, the test pads are exposed around the ball grid array semiconductor die and are, therefore, accessible to electrical testing equipment.

Abstract: A pin-less retainer for mounting a press-pack device, which includes circumscribing fins for preventing arc formation between terminal faces thereof, onto the rods of a clamping mechanism used to stack a plurality of such devices and heat sinks together. The retainer is constructed out of a semi-flexible sheet having two mirrored sections, each section having a void therein and at least two extending tabs. The voids are sized such that the retainer may be press-fitted into interstices between the fins, and the tabs are shaped and sized to suspend the press-pack device from the rods and axially align the press-pack device with other elements of the stack. The retainer, being a pin-less mount, facilitates the easy and rapid removal of a press-pack device from a stack without having to completely disassemble it.

Abstract: A pressure assembled power module is provided with first and second die, the first and second die being stacked atop one another and sandwiched between first and second conductive sheets, where the die are separated by a relatively flat central conductive lead. Integral to the central conductive lead are spring elements which bias the die against both the conductive sheets and the central conductive lead. Consequently, electrical and thermal interconnections are achieved between semiconductor devices and between the semiconductor devices and a heat sink or substrate.

Abstract: Aspects for supporting a package and a device coupled to the package at a device frontside during package removal at a package backside are described. In an exemplary aspect, a support structure includes a support frame supporting the package substantially near end portions of the package, and a set of support braces supporting the package substantially near the device. The structure further includes a block support positioned within the set of support braces and substantially underneath the device at a predetermined distance from the device. Support material is provided between the support frame and the set of support braces and between the block support and the device, wherein breakage of the package during grinding removal of the package is reduced.

Abstract: An active integrated circuit socket includes plural pin sockets receiving corresponding pins of an integrated circuit and plural socket pins making electrical contact with a printed circuit board. At least one active electronic component requiring electrical power for operation connects a pin sockets to a corresponding socket pin. The active electronic component may be a single ended input to differential output driver, a differential input to single ended output driver, a single ended to differential input/output transceiver or a voltage level shifter. These active components may include passive termination resistors. The single ended to differential transceiver may further include an enable input determining the direction of data transmission. This invention may be employed as an electronic system upgrade product including at least two active integrated circuit sockets connected via a flexible sheet including a plurality of electrical conductors connecting differential signal lines.

Abstract: A vertical interconnect package for electronic components and a method to manufacture same.The invention provides a tripartite lead frame-based Vertical Interconnect Package (VIP) which provides integrated feedthrough and integrated shielding in a non-ceramic package. One frame functions as the substrate for coupling the IC device, the second lead frame and third lead frames form shielding and feedthroughs, with the third also providing a lid whereby an airtight chamber around the IC is formed. The invention provides a ground button (the shortest path to the die) divided into n sections providing additional RF and separate ground paths; lead frame connections are used for DC. A method for assembling includes batch lead frame assembly and test prior to singulation.The VIP provides improved performance at lower manufacturing cost and provides easy interfaces to the printed circuit board in surface mount technology manufacturing and is compatible with die mount technologies such as flip-chip.

Abstract: An inventive Leads-Over-Chip (LOC) lead frame includes an assembly of interdigitated leads constructed to overlie double-sided adhesive tape on the front-side surface of an integrated circuit (IC) die. An attachment surface of each lead is adhesively attachable to the tape, and at least some of the leads are constructed to extend across the front-side surface of the die from one edge substantially to another edge, such as an adjacent or opposing edge. As a result, a substantial area of the front-side surface of the die is adhesively attachable to the leads through the tape, so the die is supportable in an IC package in an improved manner, and the heat may be conducted away from the die through the lead frame in an improved manner.

Abstract: In the manufacturing process of electronic modules a problem could arise when the modules have non-flat top surface. This is due to the fact that most of the automatic picking tools uses a vacuum nozzle to pick and place the module. According to the present invention a flat feature (a cap or a stud) is added to the module. This flat feature can be either fixed on the module or removable after the manufacture in order to reduce the dimensions.

Abstract: A stacked circuit assembly is provided for mounting memory modules in close proximity to an integrated circuit. The assembly includes an integrated circuit mounted on a printed circuit board and at least one stacked printed circuit board mounted in substantially parallel arrangement with respect to the printed circuit board on which the integrated circuit is mounted. A memory module is mounted for electrical connection on a surface of the stacked printed circuit board and an interface connector is mounted on facing surfaces of the printed circuit board and the stacked printed circuit board, thereby providing means for both mechanical and electrical connection between the boards. The integrated circuit and the memory module are mounted in parallel relationship with respect to one another for electrical interconnection through the boards and the interface connectors, thereby reducing the physical distance between the integrated circuit and the memory module.

Abstract: A component package includes a case with a bond shelf and a conductive layer formed on the bond shelf. The bond shelf is characterized by an inward edge and an outward edge and at least one reticulation, each reticulation being characterized by an outward edge and an inward edge. The reticulation inward edge is co-linear with the bond shelf inward edge. The conductive layer includes a mounting pad for each reticulation and a serpentine conductor connecting the mounting pads, the mounting pad being disposed between the inward edge of the reticulation and the outward edge of the reticulation. The component package further includes a chip transistor mounted on a first mounting pad and a chip resistor mounted in a first reticulation. A semiconductor circuit mounted in the component package includes a bonding pad connected to a pad on the chip transistor and one end of the chip resistor.

Abstract: A hydrosilylation curable electrically conductive silicone elastomer composition containing an acrylic functional group containing organopolysiloxane such that when the compositon is used to adhere a semiconductor chip to a substrate and the composition is then irradiated with a high energy beam, the exposed periphery of the composition cures to the extent that migration of low molecular weight silicone species from the compositon, both before and during the hydrosilyation reaction, is minimized.A method for manufacturing a semiconductor device having improved reliability in which, during adhesion of a semiconductor chip to the substrate, package, etc., by means of this composition, decreases in wire bondability to the semiconductor chip or lead frame and adhesion defects between the semiconductor chip, substrate, package, or lead frame and the sealing resin can be inhibited.A semiconductor device manufactured by this method which has improved reliability.

Abstract: A telecommunications protection unit includes a voltage unit having an electrically insulating base configured to house a diode module assembly and a voltage limiting cell therein. The voltage limiting cell and diode module assembly are retained within the housing by a bus clip. The housing includes structure for preventing damage to the voltage limiting cell and diode module assembly during placement of the bus clip thereon. The diode module assembly is a one-piece article including a bus bar and several diodes and terminals which can be used by itself or in a voltage unit to provide desired electrical effects and facilitate assembly of an electrical system such as a telecommunications protection unit.

Abstract: An integrated circuit package for direct mounting of an integrated circuit die to a printed circuit board is disclosed. The integrated circuit die includes a silicon sensor that detects changes in external variables, such as providing an image of a human fingerprint. The integrated circuit die has wire bond pads formed along only one side thereof to provide maximum exposure of the top surface area of the silicon sensor. The die is affixed to the printed circuit board and an adhesive surface coating, such as epoxy, is applied to the die and the printed circuit board for sealing the die thereto. The adhesive surface coating is formed from a first bead applied to the printed circuit board to cover at least the ends of the wires bonded to the board and a second bead applied to the first bead and the die to enclose the sides of the die and partially overlap the wire band pads and wires on top surface thereof.

Abstract: A leadframe having individual bond fingers incorporating two or more alternate bonding areas. In one embodiment, conventional bond fingers having bonding areas in an outer row are augmented to include an additional conductive trace or intermediate portion terminating in a bonding area that is in general alignment with an inner row of bonding areas. Likewise, bond fingers having bonding areas in an inner row are enlarged to include an alternate bonding area that is in general alignment with the outer row of bonding areas. In another embodiment, bond fingers are arranged to provide multiple rows of closely-spaced staggered bonding areas to reduce bonding pitches. By providing alternate bonding areas in individual bond fingers, the manufacturing rules addressing staggered bond wire placement can be followed more readily, while simultaneously permitting the most convenient bond fingers to be utilized.

Abstract: An inventive Leads-Over-Chip (LOC) lead frame includes an assembly of interdigitated leads constructed to overlie double-sided adhesive tape on the front-side surface of an integrated circuit (IC) die. An attachment surface of each lead is adhesively attachable to the tape, and at least some of the leads are constructed to extend across the front-side surface of the die from one edge substantially to another edge, such as an adjacent or opposing edge. As a result, a substantial area of the front-side surface of the die is adhesively attachable to the leads through the tape, so the die is supportable in an IC package in an improved manner, and the heat may be conducted away from the die through the lead frame in an improved manner.

Abstract: The invention in one particular embodiment is a bracket including a base having an opening shaped to accommodate a socket for an integrated circuit device; and at least one containment member rigidly extending from the base to define a void shaped to accommodate the integrated circuit. In another embodiment, a method for mounting an integrated circuit device to a printed circuit board comprises affixing a bracket to the printed circuit board; mounting a socket to the printed circuit board; and coupling the integrated circuit to the socket, the integrated circuit being vertically and laterally constrained by the bracket.

Abstract: The heat tolerance of an LED alphanumeric display device having a clear epoxy encapsulation can be improved by matching the coefficient of thermal expansion (CTE) of the inner circuit board to the high CTE of the epoxy. When heat is applied to fix the device to a circuit board, the components will expand at a nearly equal rate, avoiding cracking and failure.

Abstract: A circuit configuration includes a planar carrier which has at least two contact lugs. A semiconductor chip which is disposed on the carrier is electrically conductively connected to the insulated contact lugs of the carrier. At least two of the contact lugs are used to connect the semiconductor chip to two ends of a coil. The two contact lugs have different lengths, so that none of the coil ends has to cross the coil winding.

Abstract: A circuit board mounted with a semiconductor device is fabricated by forming on a silicon substrate at least one first metal layer, overlaying a second metal layer to completely cover the first metal layer, covering the whole surface of the second metal layer with an insulating material, etching the insulating material to open a window at a prescribed region of the surface of the second metal layer, selectively imparting adhesiveness to the portion at the window, adhering solder powder to the adhesive portion, melting the solder powder by heating to form a solder bump, selectively imparting adhesiveness to at least one electrode portion of a wiring board, adhering solder powder to the adhesive portion, melting the adhered solder powder by heating to form a solder bump on the electrode portion, and contacting and fusing the solder bump of the silicon substrate and the solder bump of the wiring board so as to form and maintain a prescribed gap between the silicon substrate and the wiring board.

Abstract: An inventive Leads-Over-Chip (LOC) lead frame includes an assembly of interdigitated leads constructed to overlie double-sided adhesive tape on the front-side surface of an integrated circuit (IC) die. An attachment surface of each lead is adhesively attachable to the tape, and at least some of the leads are constructed to extend across the front-side surface of the die from one edge substantially to another edge, such as an adjacent or opposing edge. As a result, a substantial area of the front-side surface of the die is adhesively attachable to the leads through the tape, so the die is supportable in an IC package in an improved manner, and the heat may be conducted away from the die through the lead frame in an improved manner.

Abstract: An electronic cartridge. The cartridge may include a first cover and a second cover that are adjacent to a substrate. One or more integrated circuit packages may be mounted to the substrate. The cartridge may include a pin that extends from the first cover and which has a barb that is embedded into the second cover. The embedded barb will damage the second cover if the cover is removed from the cartridge. The present invention thus prevents the removal and re-installation of the cover from the cartridge.

Abstract: A method for manufacturing a chip card comprising a multi-layer plastic card body; an integrated circuit arranged within a chip module; at least one coil which serves for the energy supply and/or the data exchange between the integrated circuit with external devices, with the chip module having at least two metallic contacts for an electrically conducting connection of the integrated circuit with the terminals of the coil arranged on a coil carrier layer, comprising the steps of: providing the coil carrier layer with the coil and the coil terminals being arranged on same; providing a cover layer to be applied onto the coil carrier layer on the side of the coil terminals, with the cover layer comprising recesses which correspond to the coil terminals; providing at least one thickness compensation layer to be applied onto the cover layer; stacking of the card layers in registered relationship, with the cover layer being positioned in such a manner that each of the recesses in the cover layer comes to lie in the

Abstract: There is provided a printed circuit board including (a) at least one dielectric layer, (b) at least two metal layers one of which acts as a ground layer, another one of which acts as a power-supplying layer, and the others of which, if any, act as a wiring layer in which a signal pattern is formed, the dielectric layer and the metal layers being alternately formed one on another, and (c) at least one resistor disposed at a marginal end of the printed circuit board between the ground layer and the power-supplying layer, the resistor having a function of disallowing current communication between the ground layer and the power-supplying layer. The above-mentioned printed circuit board prevents fluctuation in a voltage between ground and a power-supply, and further prevents unintentional electromagnetic interference and circuit malfunction caused by invasion of external electromagnetic field thereinto.

Abstract: An injection-molded part (1) includes elevations (2) and/or depressions (12) arranged between integrated printed conductors (4). If the elevations (2) or depressions (12) are uncoated and thus electrically insulating, they increase the effective voltage clearances between the printed conductors (4) and the components (3) arranged next to the printed conductors (4). The geometric distances can then be reduced. Alternatively, by electroconductively coating the elevations (2), electric and magnetic shielding is achieved in a simple manner. A cover (6) is provided as a top of a box which uses elevations (2) as side walls. A tapering portion (5) connects coatings (7,7') of the cover (6) and elevations (2) via a printed conductor (8) running diagonally across the tapering portion (5).

Abstract: Chip-support arrangement (23) with a chip support (23) for the manufacture of a chip casing, said chip support being provided on a support foil (20) with conducting paths (21) which are connected on the front side of the support foil facing a chip (39) to contact-surface metallizations (40) of the chip and which with their free ends form a connection-surface arrangement (42) distributed in planar manner for the purpose of connection to an electronic component or a substrate, whereby the conducting paths (21) are arranged on the reverse side of the support foil (20), recesses (28) in the support foil (20) are provided in the region of the contact-surface metallizations (40), the conducting paths for forming the connection-surface arrangement (42) are covered with a perforated mask (36) and the thickness (s) of the support foil is smaller than or substantially equal to the height (h) of the contact-surface metallizations (40) on the surface of the chip.

Abstract: A semiconductor device in which a plurality of semiconductor elements are bonded onto at least one electrode pattern on an insulator substrate formed a plurality of electrode patterns on the main surface, each of the electrodes of the semiconductor element being electrically connected to the electrode pattern, the other surface of the insulator substrate being bonded to a heat dissipating base, the upper surface of the heat dissipating base being covered with a member for cutting off the semiconductor elements from the outer environment, terminals electrically connecting the electrodes on said insulator substrate and the electrode placed outside the cutoff member being provided, wherein the material of the heat dissipating base has a linear expanding coefficient larger than the linear expansion coefficient of the semiconductor element and smaller than three times of the linear expansion coefficient of the semiconductor element, and a thermal conductivity larger than 100 W/mK, the semiconductor elements being

Abstract: An oscillator in which organic substances derived from an active element fixing adhesive do not deposit on an oscillating element and in which when the active element or the oscillating element is damaged, other good parts that are not defective can be reused. In the oscillator, an active element 2 is mounted inside a first container 1 whose upper surface is opened, and not only the opening of the first container 1 is closed by an oscillating unit 3 having an oscillating element 6 incorporated therein, but also the oscillating unit 3 is attached onto the opening of the first container 1, so that second connecting electrodes 11a to 11d of a second container 5 of the oscillating unit 3 are electrically connected to first connecting electrodes 14a to 14d of the first container 1.

Abstract: A mounting for a flip chip integrated circuit device having a light sensitive cell is disclosed. The mounting includes an insulating substrate having an aperture between its first and second surfaces. A flip chip integrated circuit device is placed on the first surface of the substrate. A light sensitive cell of the integrated circuit device faces the aperture. Solder bumps on the integrated circuit are electrically connected to corresponding conductive metallizations on the first surface of the substrate. A transparent aperture cover is affixed to the second surface of the substrate with an adhesive bead. The aperture cover extends over the aperture, allowing light to be transmitted through the aperture cover to the light sensitive cell. The side surfaces of the aperture cover include features for locking the adhesive bead to the aperture cover.

Abstract: A system for supporting integrated circuit packages to prevent mechanical failure of the packages at their connection to a printed circuit board or card involves bracing the packages to the board or card. The packages may also be braced against one another. The structure is particularly well adapted to supporting vertical surface mount packages at a point spaced from the point where they connect to a printed circuit board or card.

Abstract: An electronic module to be installed in a data carrier is described, the electronic module having an integrated circuit disposed on a carrier of the module and connected electrically with a coil for noncontacting data exchange. To make such electronic modules easy to produce and more cost-effective, the inventive module dispenses completely with an additional separate substrate for receiving the integrated circuit and coil.

Abstract: A printed circuit board with a metal layer (15) arranged on its lower side and HF components (11, 12) arranged on its upper side, which components are connected by their input and/or output sides to HF sources, HF loads, or other HF components via microribbon lines (13, 14) and can be connected to a DC current source (21) via a separate connection line (20). To render possible a current-saving series arrangement of at least two HF components (11, 12),the metal layer (15) is electrically separated from the surrounding metal layer (15) by a gap (16) in the connection region of at least one HF component (11), andthe metal island (17) thus formed in the region below the microribbon connection line (13) associated with the HF component (11) has an HF coupling to the adjoining metal layer (15).

Abstract: A semiconductor device including bond pads disposed proximate an edge thereof, and an overcoat layer. The overcoat layer defines notches around each of the bond pads. The overcoat layer may be formed from a photoimageable material such as a photoimageable epoxy. The invention also includes an alignment device that secures the semiconductor device perpendicularly upon a carrier substrate. The alignment device includes intermediate conductive elements which correspond to the bond pads of the semiconductor device. Upon insertion of the semiconductor device into the alignment device, the notches facilitate alignment of the bond pads with their corresponding intermediate conductive elements. The intermediate conductive elements establish an electrical connection between the semiconductor device and the carrier substrate.

Abstract: An inverter device includes plural modules, each module being formed by a series circuit having a parallel circuit of a switching device and a first diode, and a parallel circuit of a second switching device and a second diode, allowing a reduced size, high reliability, high frequency switching and low noise. Each of the semiconductor modules includes a plurality of switching device chips and at least one diode chip formed on a metal substrate. Electrode plates are provided in locations of the module adjacent to the switching device chips and the diode chips to facilitate connection of the electrodes of the respective chips to one another and to the outside of the module.

Abstract: A lattice of a plurality of individual lead frames allows concurrent or simultaneous molding of a plurality of integrated chips formed in a wafer. The lattice includes a plurality of lead supporting bars arranged in rows and columns and a plurality of leads attached to corresponding ones of the plurality of supporting bars. The plurality of lead supporting bars align with chip partition lines defining each individual integrated chip formed in the wafer. During fabrication, a plurality of individual lead frames is correspondingly attached to a plurality of individual integrated chips formed in a wafer. A plurality of wires are bonded between the plurality of chip pads and the plurality of leads. The wafer is molded such that the plurality of individual lead frames, the plurality of wires, the first surface of the plurality of individual integrated chips and the plurality of chip pads are molded with an epoxy compound with portions of the plurality of leads exposed.

Abstract: A semiconductor device has an electrical circuit and a grounding terminal. A multilayer substrate has a plurality of insulator layers and conductor layers in a stacked arrangement and a surface with first and second regions, the conductor layers making electrical contact with the electrical circuit and the grounding terminal of the semiconductor device. The first region generally surrounds the semiconductor device and has first connecting conductors penetrating at least a part of the multilayer substrate so that each of the first conductors makes contact with one or a plurality of corresponding conductor layers. The second region generally surrounds the first region and has second connecting conductors penetrating at least a part of the multilayer substrate and only making contact with one or a plurality of conductor layers coupled to the grounding terminal of the semiconductor device.

Abstract: A Tape-Automated-Bonding (TAB) package includes a resilient polyimide layer that supports a metal leadframe. A microelectronic circuit die is mounted in a hole in the polyimide layer and interconnected with inner leads of the leadframe. The TAB package is adhered to a support member having spacers that abut against the surface of a printed circuit board (PCB) on which the package is to be mounted and provide a predetermined spacing between the leadframe and the surface. Outer leads that protrude from the leadframe are bent into a shape so as extend, in their free state, toward the surface at least as far as the spacers. The package and support member assembly is placed on the PCB surface, and the combination of the weight of the assembly, the resilience of the leads and the preset standoff height enable the leads to resiliently deform so that the spacers abut against the surface and the leads conformably engage with the surface for soldering or other ohmic connection to conjugate bonding pads on the surface.

Abstract: An apparatus and method for packaging a microelectronic device to be connectable to a distribution circuit. The apparatus is in the form of a microelectronic package including a microelectronic device having first and second oppositely facing surfaces and a plurality of Input/Output pads on the first surface capable of being electrically interconnected to a distribution circuit, a base adapted to support the microelectronic device in a predetermined operative relationship to a distribution circuit, and a first layer of elastomer gel sandwiched between the first surface and the base. The first surface of the microelectronic device overlays the base so as to allow an electrical interconnection through the base between the microelectronic device and a distribution circuit.

Abstract: An inventive Leads-Over-Chip (LOC) lead frame includes an assembly of interdigitated leads constructed to overlie double-sided adhesive tape on the front-side surface of an integrated circuit (IC) die. An attachment surface of each lead is adhesively attachable to the tape, and at least some of the leads are constructed to extend across the front-side surface of the die from one edge substantially to another edge, such as an adjacent or opposing edge. As a result, a substantial area of the front-side surface of the die is adhesively attachable to the leads through the tape, so the die is supportable in an IC package in an improved manner, and the heat may be conducted away from the die through the lead frame in an improved manner.

Abstract: In a wired base plate for an electronic part, an infinite number of metallic posts made of copper are provided to a lid joining section of a plural wire layer portion, which section includes a lid joining surface area to which a lid is joined. The metallic posts supports a pressure applied thereto from a lid at the time of mounting of the wired base plate on a circuit board and prevent the plural wire layer portion having a plurality of conductor wire layers and a plurality of resinous insulation layers, from being deformed by compression. A package for an electronic part having such a wired base plate is also provided.

Abstract: A ball grid array (BGA) integrated circuit package which has an outer two-dimensional array of solder balls and a center two-dimensional array of solder balls located on a bottom surface of a package substrate. The solder balls are typically reflowed to mount the package to a printed circuit board. Mounted to an opposite surface of the substrate is an integrated circuit that is electrically coupled to the solder balls by internal routing within the package. The outer array of solder balls are located the dimensional profile of the integrated circuit to reduce solder stresses induced by the differential thermal expansion between the integrated circuit and the substrate. The center solder balls are typically routed directly to ground and power pads of the package to provide a direct thermal and electrical path from the integrated circuit to the printed circuit board.

Abstract: The invention relates to a data carrier comprising a card body and an integrated circuit connected electroconductively via contact elements with at least one coil serving the purpose of power supply and/or data exchange of the integrated circuit with external devices. The invention is characterized in that the integrated circuit and the contact elements form a separate module known in the art and the coil is disposed on a card body constructed from one or more layers in known fashion. The coil is preferably formed as a flat coil.

Abstract: A mounting for a semiconductor integrated circuit device, such as a charge coupled device ("CCD") or an erasable programmable read only memory device ("EPROM"), includes an insulating substrate having an aperture between its first and second surfaces. A first surface of the integrated circuit device is placed adjacent to and facing the first surface of the substrate. Light sensitive circuitry on the first surface of the integrated circuit device is aligned with the aperture. Solder bumps on the periphery of the first surface of the integrated circuit are electrically connected to corresponding conductive metallizations on the first surface of the substrate. A aperture cover transparent to light is affixed to the second surface of the substrate and extends over the aperture, so that light may be transmitted through the aperture cover and aperture to the light sensitive circuitry on the first surface of the integrated circuit device. The substrate may be a printed circuit board.