Abstract: There are provided magnetic storage elements capable of performing a high-reliability write operation by inhibiting erroneous reversal of data of the magnetic storage element put in a semi-selected state, and a magnetic storage device using this. A recording layer having an easy axis and a hard axis overlaps at least one of a first or second conductive layer at the entire region thereof in plan view. First endpoints of a first line segment along the easy axis and maximum in dimension overlapping the recording layer in plan view don't overlap the second conductive layer in plan view. At least one of second endpoints of a pair of endpoints of a second line segment passing through the middle point of the first line segment, orthogonal to the first line segment in plan view, and overlapping the recording layer in plan view doesn't overlap the first conductive layer in plan view.

Abstract: An MRAM array structure and a method of its operation that is not subject to accidental writing on half-selected elements. Each element of the MRAM is an MTJ (magnetic tunneling junction) cell operating in accord with an STT (spin torque transfer) scheme for changing its free layer magnetization state and each cell is patterned to have a C-shape in the horizontal plane. The cell thereby operates by C-mode switching to provide stability against accidental writing by half-selection. During operation, switching of a cell's magnetization is accomplished with the assist of the pulsed magnetic fields of additional word lines that are formed either orthogonal to or parallel to the existing bit lines and that can carry currents in either direction as required to provide the assist.

Abstract: Method and apparatus for writing data to a magnetic memory element, such as a spin-torque transfer random access memory (STRAM) memory cell. In accordance with various embodiments, a write current is applied through a magnetic memory element to initiate magnetic precession of the element to a desired magnetic state. A flow of a field assist current is subsequently initiated adjacent the magnetic memory element during continued application of the write current to induce a magnetic field upon the element. The field assist current persists after the write current is terminated to provide field assisted precession to the desired magnetic state.

Abstract: Spin-transfer torque memory includes a composite free magnetic element, a reference magnetic element having a magnetization orientation that is pinned in a reference direction, and an electrically insulating and non-magnetic tunneling barrier layer separating the composite free magnetic element from the magnetic reference element. The free magnetic element includes a hard magnetic layer exchanged coupled to a soft magnetic layer. The composite free magnetic element has a magnetization orientation that can change direction due to spin-torque transfer when a write current passes through the spin-transfer torque memory unit.

Abstract: A control circuit applies a first voltage to selected one of first lines and applies a second voltage having a voltage value smaller than that of the first voltage to selected one of second lines, such that a certain potential difference is applied across a memory cell disposed at an intersection of the selected one of the first lines and the selected one of the second lines. A current limiting circuit sets a compliance current defining an upper limit of a cell current flowing in the memory cell, and controls such that the cell current flowing in the memory cell does not exceed the compliance current. The current limiting circuit comprises a current generating circuit and a first current mirror circuit. The current generating circuit generates a first current having a current value equal to a current value of the cell current at a certain timing multiplied by a certain constant. The first current mirror circuit mirrors the first current to a current path supplying the first voltage to the first lines.

Abstract: A spin-torque transfer memory random access memory (STTMRAM) element is disclosed and has a fixed layer, a barrier layer formed upon the fixed layer, and a free layer comprised of a low-crystallization temperature alloy of CoFeB—Z where Z is below 25 atomic percent of one or more of titanium, (Ti), yittrium (Y), zirconium (Zr), and vanadium (V), wherein during a write operation, a bidirectional electric current is applied across the STTMRAM element to switch the magnetization of the free layer between parallel and anti-parallel states relative to the magnetization of the fixed layer.

Abstract: An exemplary embodiment of a magnetic random access memory (MRAM) device includes a magnetic tunnel junction having a free layer, a first electrode (first magnetic field generating means) having a first portion that covers a surface of the free layer, and an electric power source connected to the first electrode via a connection that covers less than half of the first portion of the first electrode. Another exemplary embodiment of an MRAM device includes a magnetic tunnel junction, first and second electrodes (first and second magnetic field generating means) directly connected to the magnetic tunnel junction on opposite sides of the magnetic tunnel junction, and an electric power source having one pole connected to the first electrode via a first connection and having a second pole connected to the second electrode via a second connection, wherein the first and second connections are laterally offset from the connections between the first and second electrodes and the magnetic tunnel junction.

Abstract: One embodiment of the present invention includes a three dimensional memory array having a plurality of memory elements coupled to form the array through a single top lead and a single bottom lead, each memory element including a magnetic free layer in which non-volatile data can be stored, wherein each memory element possesses unique resonant frequencies associated with each digital memory state, thereby enabling frequency addressing during parallel write and read operations, each memory element further including a fixed layer and a spacer formed between the free layer and the fixed layer.

Abstract: Methods are presented for fabricating an MTJ element having a uniform vertical distance between its free layer and a bit line and, in addition, having a protective spacer layer formed abutting the lateral sides of the MTJ element to eliminate leakage currents between MTJ layers and the bit line. Each method forms a dielectric spacer layer on the lateral sides of the MTJ element and, depending on the method, includes an additional layer that protects the spacer layer during etching processes used to form a Cu damascene bit line. At various stages in the process, a dielectric layer is also formed to act as a CMP stop layer so that the capping layer on the MTJ element is not thinned by the CMP process that planarizes the surrounding insulation. Subsequent to planarization, the stop layer is removed by an anisotropic etch of such precision that the MTJ element capping layer is not reduced in thickness and serves to maintain uniform vertical distance between the bit line and the MTJ free layer.

Abstract: A method and system for providing a magnetic junction usable in a magnetic memory are described. The magnetic junction includes first and second pinned layers, first and second nonmagnetic spacer layers, and a free layer. The pinned layers are nonmagnetic layer-free and self-pinned. In some aspects, the magnetic junction is configured to allow the free and second pinned layers to be switched between stable magnetic states when write currents are passed therethrough. The magnetic junction has greater than two stable states. In other aspects, the magnetic junction includes at least third and fourth spacer layers, a second free layer therebetween, and a third pinned layer having a pinned layer magnetic moment, being nonmagnetic layer-free, and being coupled to the second pinned layer. The magnetic junction is configured to allow the free layers to be switched between stable magnetic states when write currents are passed therethrough.

Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.

Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.

Abstract: The invention relates to a writable magnetic element comprising a stack of layers presenting a write magnetic layer, wherein the stack has a central layer of at least one magnetic material presenting a direction of magnetization that is parallel or perpendicular to the plane of the central layer, said central layer being sandwiched between first and second outer layers of non-magnetic materials, the first outer layer comprising a first non-magnetic material and the second outer layer comprising a second non-magnetic material that is different from the first non-magnetic material, at least the second non-magnetic material being electrically conductive, wherein it includes a device for causing current to flow through the second outer layer and the central layer in a current flow direction parallel to the plane of the central layer, and a device for applying a magnetic field having a component along a magnetic field direction that is either parallel or perpendicular to the plane of the central layer and the curr

Abstract: A transmission gate-based spin-transfer torque memory unit is described. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. A NMOS transistor is in parallel electrical connection with a PMOS transistor and they are electrically connected with the source line and the magnetic tunnel junction data cell. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. The PMOS transistor and the NMOS transistor are separately addressable so that a first write current in a first direction flows through the PMOS transistor and a second write current in a second direction flows through the NMOS transistor.

Abstract: A magnetoresistance effect element includes: a magnetization free layer; a spacer layer provided adjacent to the magnetization free layer; a first magnetization fixed layer provided adjacent to the spacer layer on a side opposite to the magnetization free layer; and at least two second magnetization fixed layers provided adjacent to the magnetization free layer. The magnetization free layer, the first magnetization fixed layer, and the second magnetization free layers respectively have magnetization components in a direction substantially perpendicular to film surfaces thereof. The magnetization free layer includes: two magnetization fixed portions; and a domain wall motion portion arranged between the two magnetization fixed portions. Magnetizations of the two magnetization fixed portions constituting the magnetization free layer are fixed substantially antiparallel to each other in directions substantially perpendicular to the film surface.

Abstract: A magnetic tunnel junction having a ferromagnetic free layer and a ferromagnetic pinned reference layer, each having an out-of-plane magnetic anisotropy and an out-of-plane magnetization orientation, the ferromagnetic free layer switchable by spin torque. The magnetic tunnel junction includes a ferromagnetic assist layer proximate the free layer, the assist layer having a low magnetic anisotropy less than 700 Oe and positioned to apply a magnetic field on the free layer.

Abstract: A method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage. The magnetic tunnel junction data cell has a first resistance state. Then the method includes applying a second read current thorough the magnetic tunnel junction data cell having the first resistance state. The first read current is less than the second read current. Then the first bit line read voltage is compared with the second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state.

Abstract: A memory includes: memory devices that each store data of one bit; and a read unit that, by using one predetermined memory device of the memory devices that are included in a memory block having a predetermined unit number of the memory devices as an inversion flag device, reads out data of (the predetermined unit number ?1) bits that is written in the other memory devices with the bits being inverted in a case where the data of one bit written in the inversion flag device is a first value representing any one of “0” and “1” and directly reads out the data of (the predetermined unit number ?1) bits that is written in the other memory devices in a case where the data of one bit written in the inversion flag device is a second value other than the first value.

Abstract: A magnetoresistive bridge nonvolatile memory device having a flat, continuous folded closed magnetic loop, the magnetic loop having a side for holding four sense metal terminated magnetic shunts, and four planar central parallel rectangular giant magnetoresistive GMR resistors, each of the four central parallel rectangular giant magnetoresistive GMR resistors being located on the side of the continuous folded closed magnetic loop between each of two of the sense metal terminated magnetic shunts, each two of the four sense metal terminated magnetic shunts electrically connected to adjacent ends of a central parallel rectangular giant magnetoresistive GMR resistor.

Abstract: A magnetic memory unit includes a tunneling barrier separating a free magnetic element and a reference magnetic element. A first phonon glass electron crystal layer is disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element. A second phonon glass electron crystal layer also be disposed on a side opposing the tunneling barrier of either the free magnetic element or the reference magnetic element to provide a Peltier effect on the free magnetic element and the reference magnetic element.

Abstract: A magnetic memory includes a first magnetic line, an electrode, a write-in portion, a second magnetic line, and a spin-wave generator. The first magnetic line has a plurality of magnetic domains and domain walls, the domain wall separating the magnetic domain. The electrode is provided to both ends of the first magnetic line. The write-in portion is provided adjacent to the first magnetic line. The second magnetic line is provided so that the second magnetic line intersects with the first magnetic line. The spin-wave generator provided to one end of the second magnetic line. The spin-wave detector provided to the other end of the second magnetic line.

Abstract: The present disclosure concerns a magnetic element to be written using a thermally-assisted switching write operation comprising a magnetic tunnel junction formed from a tunnel barrier being disposed between first and second magnetic layers, said second magnetic layer having a second magnetization which direction can be adjusted during a write operation when the magnetic tunnel junction is heated at a high threshold temperature; an upper current line connected at the upper end of the magnetic tunnel junction; and a strap portion extending laterally and connected to the bottom end of the magnetic tunnel junction; the magnetic device further comprising a bottom thermal insulating layer extending substantially parallel to the strap portion and arranged such that the strap portion is between the magnetic tunnel junction and the bottom thermal insulating layer. The magnetic element allows for reducing heat losses during the write operation and has reduced power consumption.

Abstract: A method and system for providing a magnetic memory are described. The method and system include providing magnetic storage cells, bit lines coupled with the magnetic storage cells, preset lines, and word lines coupled with the magnetic storage cells. Each magnetic storage cell includes magnetic element(s). The bit lines drive write current(s) through selected storage cell(s) of the magnetic storage cells to write to the selected storage cell(s). The preset lines drive preset current(s) in proximity to but not through the selected storage cell(s). The preset current(s) generate magnetic field(s) to orient the magnetic element(s) of the selected storage cell(s) in a direction. The word lines enable the selected storage cell(s) for writing. Either the bit lines reside between the preset lines and the storage cells or the preset lines reside between the storage cells and on a storage cell side of the bit lines.

Abstract: Perpendicular magnetic tunnel junction (MTJ) devices, methods of fabricating a perpendicular MTJ device, electronic devices including a perpendicular MTJ device and methods of fabricating the electronic device are provided, the perpendicular MTJ devices include a pinned layer, a tunneling layer and a free layer. At least one of the pinned layer and the free layer includes a multi-layered structure including an amorphous perpendicular magnetic anisotropy (PMA) material.

Abstract: A spin-transfer torque memory apparatus and self-reference read schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage, the magnetic tunnel junction data cell having a first resistance state and storing the first bit line read voltage in a first voltage storage device. Then applying a low resistance state polarized write current through the magnetic tunnel junction data cell, forming a low second resistance state magnetic tunnel junction data cell. A second read current is applied through the low second resistance state magnetic tunnel junction data cell to forming a second bit line read voltage. The second bit line read voltage is stored in a second voltage storage device.

Abstract: [Object] To provide a recording method for a magnetic memory device including a recording layer that is capable of changing a magnetization direction and holds information as a magnetization direction of a magnetic body and a magnetization reference layer that is provided with respect to the recording layer with an insulation layer interposed therebetween and becomes a reference of the magnetization direction, the magnetic memory device being recorded with information by a current flowing between the recording layer and the magnetization reference layer via the insulation layer, the recording method being capable of maintaining, even when a write pulse considerably higher than an inversion threshold value is applied, a write error rate of 10?25 or less that is obtained when a write pulse a little larger than the inversion threshold value is applied. [Solving Means] While taking time of 2 ns or more, write power injected at a time a write pulse falls is reduced gradually.

Abstract: In an information storage device, a writing magnetic layer is formed on a substrate and has a magnetic domain wall. A connecting magnetic layer is formed on the writing magnetic layer, and an information storing magnetic layer is formed on an upper portion of side surfaces of the connecting magnetic layer. A reader reads information stored in the information storing magnetic layer.

Abstract: One embodiment of a magnetic random access memory includes a transistor formed on a substrate and having a gate width, a plurality of magnetoresistive elements disposed above the transistor and jointly electrically coupled to the transistor at their first terminals, a plurality of parallel conductive lines formed above magnetoresistive elements and independently electrically coupled to their second terminals. A magnetoresistive element includes, a pinned layer having a fixed magnetization direction, a free layer having a reversible magnetization direction, a tunnel barrier layer disposed between the free and pinned layers, and an element width that is substantially smaller than the gate width. The magnetization directions of the pinned and free layers are directed substantially perpendicular to the substrate. The magnetization direction of the free layer is reversed by a joint effect of a bias magnetic field and a spin-polarized current applied to the magnetoresistive element.

Abstract: A magnetic memory device comprises a magnetic wire extending in a first direction, a pair of first electrodes operable to pass a current through the magnetic wire in the first direction or in an opposite direction to the first direction, a first insulating layer provided on the magnetic wire in a second direction being substantially perpendicular to the first direction, a plurality of second electrodes provided on the first insulating layer and provided at specified interval in the second direction, and a third electrode electrically connected to the plurality of second electrodes.

Abstract: A magnetic tunnel junction stack including a pinned magnetic layer, a tunnel barrier layer formed of magnesium oxide (MgO), a free magnetic layer adjacent to the tunnel barrier layer, and a layer of vanadium (V) adjacent to the free magnetic layer.

Abstract: A dual spin filter that minimizes spin-transfer magnetization switching current (Jc) while achieving a high dR/R in STT-RAM devices is disclosed. The bottom spin valve has a MgO tunnel barrier layer formed with a natural oxidation process to achieve low RA, a CoFe/Ru/CoFeB—CoFe pinned layer, and a CoFeB/FeSiO/CoFeB composite free layer with a middle nanocurrent channel (NCC) layer to minimize Jc0. The NCC layer may have be a composite wherein conductive M(Si) grains are magnetically coupled with adjacent ferromagnetic layers and are formed in an oxide, nitride, or oxynitride insulator matrix. The upper spin valve has a Cu spacer to lower the free layer damping constant. A high annealing temperature of 360° C. is used to increase the MR ratio above 100%. A Jc0 of less than 1×106 A/cm2 is expected based on quasistatic measurements of a MTJ with a similar MgO tunnel barrier and composite free layer.

Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.

Abstract: Techniques and magnetic devices associated with a magnetic element are described that includes a presetting fixed layer having a presetting fixed layer magnetization, a free layer having a changeable free layer magnetization, and a fixed layer having a fixed layer magnetization, where a presetting current pulse applied between the presetting fixed layer and free layer operates to preset the free layer magnetization in advance of a write pulse. Techniques and magnetic devices associated with a magnetic element are described that includes a first terminal, a first magnetic tunnel junction, a second terminal, a second magnetic tunnel junction, and a third terminal, where a current pulse applied between the first and second terminal operate to switch the state of the first magnetic tunnel junction and a current applied between the second and third terminal operate to switch the state of the second magnetic tunnel junction.

Abstract: One embodiment of a magnetic memory cell comprises a magnetoresistive element including a free layer comprising a reversible magnetization direction directed substantially perpendicular to a film plane, a pinned layer comprising a fixed magnetization direction directed substantially perpendicular to the film plane, and a tunnel barrier layer disposed between the free and pinned layers; means for providing a bias magnetic field pulse along magnetic hard axis of both the free and pinned layers, means for providing a spin-polarized current pulse through the magnetoresistive element along magnetic easy axis of both the free layer and the pinned layer, wherein the magnetization direction in the free layer is reversed by a collective effect of the bias magnetic field pulse and the spin-polarizing current pulse. Other embodiments are described and shown.

Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.

Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.

Abstract: Memory units that have a magnetic tunnel junction cell that utilizes spin torque and a current induced magnetic field to assist in the switching of the magnetization orientation of the free layer of the magnetic tunnel junction cell. The memory unit includes a spin torque current source for passing a current through the magnetic tunnel junction cell, the spin torque current source having a direction perpendicular to the magnetization orientations, and also includes a magnetic ampere field current source is oriented in a direction orthogonal or at some angles to the magnetization orientations.

Abstract: A current driving mechanism for a magnetic memory device, comprising: a) a current driver circuit; and b) a current decoding block coupled to the current driver circuit, wherein the current decoding block comprises a transistor (M18) to control driver currents from the current driver circuit, and wherein the transistor (M18) has a smaller form factor then otherwise possible by virtue of maintaining a gate thereof at a negative voltage.

Abstract: A magnetic cell structure including a nonmagnetic filament contact, and methods of fabricating the structure are provided. The magnetic cell structure includes a free layer, a pinned layer, an insulative layer between the free and pinned layers, and a nonmagnetic filament contact in the insulative layer which electrically connects the free and pinned layers. The nonmagnetic filament contact is formed from a nonmagnetic source layer, also between the free and pinned layers. The filament contact directs a programming current through the magnetic cell structure such that the cross sectional area of the programming current in the free layer is less than the cross section of the structure. The decrease in the cross sectional area of the programming current in the free layer enables a lower programming current to reach a critical switching current density in the free layer and switch the magnetization of the free layer, programming the magnetic cell.

Abstract: A magnetic memory cell including a piezoelectric material, and methods of operating the memory cell are provided. The memory cell includes a stack, and the piezoelectric material may be formed as a layer in the stack or adjacent the layers of the cell stack. The piezoelectric material may be used to induce a transient stress during programming of the memory cell to reduce the critical switching current of the memory cell.

Abstract: A non-volatile memory device and a method for programming the same are disclosed. The method for programming the non-volatile memory device includes generating a simultaneous write current based on a program address in such a manner that bit line write cells corresponding to memory cells coupled to the same bit line from among memory cells to be programmed can be simultaneously programmed, and providing the simultaneous write current to the bit line write cells by simultaneously enabling the bit line write cells.

Abstract: A programmable memory array is disclosed in which the phase change memory cells are self-aligned at the access devices and at the cross-points of the bit lines and the word lines. A method for making the array employs one line mask to define the bit lines and another line mask to define the word lines. The front end of line (FEOL) memory cell elements are in the same layer as the polysilicon gates. The bit lines and the word lines intersect over the devices, and the memory cell elements are formed at the intersections of the bit lines and the word line.

Abstract: An optimum forming method of performing a forming for a variable resistance element to maximize an operation window of the variable resistance element is provided. The forming method is used to initialize a variable resistance element (100). The forming method includes: a determination step (S35) of determining whether or not a current resistance value of the variable resistance element (100) is lower than a resistance value in a high resistance state; and a voltage application step (S36) of applying a voltage pulse having a voltage not exceeding a sum of a forming voltage and a forming margin when the determination is made that the current resistance value is not lower than the resistance value in the high resistance state (No at S35). The determination step (S35) and the voltage application step (S36) are repeated to process all memory cells in a memory array (202) (S34 to S37).

Abstract: An information recording/reproducing device includes a first electrode layer, a second electrode layer, a recording layer as a variable resistance between the first and second electrode layer, and a circuit which supplies a voltage to the recording layer to change a resistance of the recording layer. Each of the first and second electrode layers is comprised of IV or III-V semiconductor doped with p-type carrier or n-type carrier.

Abstract: A flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die. The non-volatile RAM is formed of stacks of magnetic memory cells arranged in three-dimensional form for higher density and lower costs.

Abstract: A magnetic random access memory (MRAM) cell with a thermally assisted switching (TAS) writing procedure, comprising a magnetic tunnel junction formed from a ferromagnetic storage layer having a first magnetization adjustable at a high temperature threshold, a ferromagnetic reference layer having a fixed second magnetization direction, and an insulating layer, said insulating layer being disposed between the ferromagnetic storage and reference layers; a select transistor being electrically connected to said magnetic tunnel junction and controllable via a word line; a current line electrically connected to said magnetic tunnel junction; characterized in that the magnetocrystalline anisotropy of the ferromagnetic storage layer is essentially orthogonal with the magnetocrystalline anisotropy of the ferromagnetic reference layer. The TAS-MRAM cell of the invention can be written with a smaller magnetic field than the one used in conventional TAS-MRAM cells and has low power consumption.

Abstract: A multi-state current-switching magnetic memory element includes a stack of magnetic tunneling junction (MTJ) separated by a non-magnetic layer for storing more than one bit of information, wherein different levels of current applied to the memory element cause switching to different states.

Abstract: A magnetic memory device includes a magnetic tunnel junction having a free magnetic layer having a magnetization orientation that is switchable between a high resistance state magnetization orientation and a low resistance state magnetization orientation and a memristor solid state element electrically coupled to the magnetic tunnel junction. The memristor has a device response that is an integrated voltage versus an integrated current.

Abstract: The present invention provides a magnetic memory device capable of providing high-speed access without increasing an array area. Gate word lines are respectively linearly disposed between source impurity regions and drain impurity regions within a memory cell array area. Gate word line protrusions are respectively provided at boundary regions of memory cell forming regions. Contacts relative to the gate word line protrusions are respectively provided at boundary regions of memory cells at adjacent columns. The drain impurity regions are respectively disposed with being shifted from the centers of the memory cell forming regions in such a manner that spaces between the drain impurity regions become large in the regions in which the protrusions are disposed.

Abstract: The invention relates to a writable magnetic element comprising a stack of layers presenting a write magnetic layer, wherein the stack has a central layer of at least one magnetic material presenting magnetization having a magnetization direction that is parallel to the plane of the central layer, which layer is sandwiched between first and second outer layers of non-magnetic materials, the first outer layer comprising a first non-magnetic material and the second outer layer comprising a second non-magnetic material that is different from the first non-magnetic material, at least the second non-magnetic material being electrically conductive, and wherein it includes a device to cause a write current to pass through the second outer layer and the central layer in a current flow direction parallel to the plane of the central layer at an angle ? lying in the range 90°±60°, in particular 90°±30°, and more particularly 90°±15° relative to said magnetization direction in order to generate an effective magnetic fiel