Abstract: A memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a word line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a unipolar voltage across the magnetic tunnel junction data cell. A diode is electrically coupled between the magnetic tunnel junction data cell and the word line or bit line. A voltage source provides the unipolar voltage across the magnetic tunnel junction data cell that writes the high resistance state and the low resistance state.

Abstract: A spin-torque transfer memory random access memory (STTMRAM) element, employed in a STTMRAM array, receives electric current for storage of digital information, the STTMRAM element has a magnetic tunnel junction (MTJ). The MTJ includes an anti-ferromagnetic (AF) layer, a fixed layer having a magnetization that is substantially fixed in one direction and that comprises a first magnetic layer, an AF coupling layer and a second magnetic layer, a barrier layer formed upon the fixed layer, and a free layer. The free layer is synthetic and has a high-polarization magnetic layer, a low-crystallization magnetic layer, a non-magnetic separation layer, and a magnetic layer, wherein during a write operation, a bidirectional electric current is applied across the STTMRAM element to switch the magnetization of the free layer between parallel and anti-parallel states relative to the magnetization of the fixed layer.

Abstract: A Spin-Transfer-Torque Magnetic Random Access Memory includes a dual-voltage row decoder with charge sharing for read operations. The dual-voltage row decoder with charge sharing for read operations reduces read-disturbance failure rates and provides a robust macro design with improved yields. Voltage from one of the power supplies can be applied during a write operation.

Abstract: A compound magnetic data storage cell, applicable to spin-torque random access memory (ST-RAM), is disclosed. A magnetic data storage cell includes a magnetic storage element and two terminals communicatively connected to the magnetic storage element. The magnetic storage element is configured to yield any of at least three distinct magnetoresistance output levels, corresponding to stable magnetic configurations, in response to spin-momentum transfer inputs via the terminals.

Abstract: An electronic circuit such as a latch or a sequencer includes a plurality of transistors, all of the transistors being either NMOS transistors or PMOS transistors, and dissipates less than or approximately the same amount of power as an equivalent CMOS circuit.

Abstract: A method of operating a phase change random access memory (PRAM) device includes performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.

Abstract: An MRAM array of MTJ memory cells is provided wherein each such cell is a layered MTJ structure located at an intersection of a word and bit line and has a small circular horizontal cross-section of 1.0 microns or less in diameter and wherein the ferromagnetic free layer of each such cell has a magnetic anisotropy produced by a magnetic coupling with a thin antiferromagnetic layer that is formed on the free layer. The array of MTJ memory cells so provided is far less sensitive to shape irregularities and edge defects of individual cells than arrays of the prior art.

Abstract: A magnetic random access memory according to the present invention is provided with: a magnetic recording layer including a magnetization free region having a reversible magnetization, wherein a write current is flown through the magnetic recording layer in an in-plane direction; a magnetization fixed layer having a fixed magnetization; a non-magnetic layer provided between the magnetization free region and the magnetization fixed layer; and a heat sink structure provided to be opposed to the magnetic recording layer and having a function of receiving and radiating heat generated in the magnetic recording layer. The magnetic random access memory thus-structured radiates heat generated in the magnetic recording layer by using the heat sink structure, suppressing the temperature increase caused by the write current flown in the in-plane direction.

Abstract: Magnetic memory having separate read and write paths is disclosed. The magnetic memory unit includes a ferromagnetic strip having a first end portion with a first magnetization orientation, an opposing second end portion with a second magnetization orientation, and a middle portion between the first end portion and the second end portion, the middle portion having a free magnetization orientation. The first magnetization orientation opposes the second magnetization orientation. A tunneling barrier separates a magnetic reference layer from the middle portion forming a magnetic tunnel junction. A bit line is electrically coupled to the second end portion. A source line is electrically coupled to the first end portion and a read line is electrically coupled to the magnetic tunnel junction.

Abstract: A spin-transfer torque magnetic random access memory (STTMRAM) element is configured to store a state when electrical current is applied thereto. The STTMRAM element includes first and second free layers, each of which having an associated direction of magnetization defining the state of the STTMRAM element. Prior to the application of electrical current to the STTMRAM element, the direction of the magnetization of the first and second free layers each is in-plane and after the application of electrical current to the STTMRAM element, the direction of magnetization of the second free layer becomes substantially titled out-of-plane and the direction of magnetization of the first free layer switches. Upon electrical current being discontinued, the direction of magnetization of the second free layer remains in a direction that is substantially opposite to that of the first free layer.

Abstract: A magnetic storage device stable in write characteristic is provided. A first nonmagnetic film is provided over a recording layer. A first ferromagnetic film is provided over the first nonmagnetic film and has a first magnetization and a first film thickness. A second nonmagnetic film is provided over the first ferromagnetic film. A second ferromagnetic film is provided over the second nonmagnetic film, is coupled in antiparallel with the first ferromagnetic film, and has a second magnetization and a second film thickness. An antiferromagnetic film is provided over the second ferromagnetic film. The sum of the product of the first magnetization and the first film thickness and the product of the second magnetization and the second film thickness is smaller than the product of the magnetization of the recording layer and the film thickness of the recording layer.

Abstract: A magnetoresistive element according to an embodiment includes a first magnetic layer, a second magnetic layer, and a first nonmagnetic layer provided between the first magnetic layer and the second magnetic layer, at least one of the first magnetic layer and the second magnetic layer including a magnetic film of MnxAlyGez (10 atm %?x?44 atm %, 10 atm %?y?65 atm %, 10 atm %?z?80 atm %, x+y+z=100 atm %).

Abstract: According to one embodiment, a magnetic memory includes a magnetoresistive element includes a fixed layer whose magnetization direction is fixed, a recording layer whose magnetization direction is variable and a nonmagnetic layer disposed between the fixed layer and the recording layer. A direction of a read current is set to a first direction in a case where an expression of MR ratio ?|Ic+/Ic?|?1 is satisfied if a critical current of the first direction used to write the magnetoresistive element to the parallel state is set to Ic? and a critical current of a second direction used to write the magnetoresistive element to the anti-parallel state is set to Ic+.

Abstract: The present disclosure concerns a magnetic random access memory MRAM cell comprising a tunnel magnetic junction formed from a first ferromagnetic layer, a second ferromagnetic layer having a second magnetization that can be oriented relative to an anisotropy axis of the second ferromagnetic layer at a predetermined high temperature threshold, and a tunnel barrier; a first current line extending along a first direction and in communication with the magnetic tunnel junction; the first current line being configured to provide an magnetic field for orienting the second magnetization when carrying a field current; wherein the MRAM cell is configured with respect to the first current line such that when providing the magnetic field, at least a component of the magnetic field is substantially perpendicular to said anisotropy axis. The MRAM cell has an improved switching efficiency, lower power consumption and improved dispersion of the switching field compared to conventional MRAM cells.

Abstract: A resistive sense memory apparatus includes a bipolar select device having a semiconductor substrate, a plurality of collector contacts disposed in a first side of the of the semiconductor substrate, an emitter contact layer disposed in a second side of the semiconductor substrate, and a base layer separating the plurality of collector contacts from the emitter contact layer. Each collector contact is electrically isolated from each other. A resistive sense memory cells is electrically coupled to each collector contacts and a bit line. The base layer and the emitter contact layer provide an electrical path for the plurality of collector contacts.

Abstract: A magnetic memory device includes: a free layer for storing information; and a reference layer disposed on a first surface of the free layer. The reference layer includes at least two magnetic domains and a magnetic domain wall between the at least two magnetic domains. The reference layer extends past both ends of the free layer. The magnetic memory device further includes a switching element connected to a second surface of the free layer. Another magnetic memory device includes: a first reference layer having a first magnetic domain wall; a second reference layer having a second magnetic domain wall; and a memory structure between the first and second reference layers. The memory structure includes: a first free layer adjacent to the first reference layer; a second free layer adjacent to the second reference layer; and a switching element between the first and second free layers.

Abstract: A memory unit includes a magnetic tunnel junction data cell is electrically coupled to a bit line and a source line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a write current through the magnetic tunnel junction data cell. A first diode is electrically between the magnetic tunnel junction data cell and the source line and a second diode is electrically between the magnetic tunnel junction data cell and the source line. The first diode and second diode are in parallel electrical connection, and having opposing forward bias directions. The memory unit is configured to be precharged to a specified precharge voltage level and the precharge voltage is less than a threshold voltage of the first diode and second diode.

Abstract: A magnetic memory element capable of maintaining high thermal stability (retention characteristics) while reducing a writing current. The magnetic memory element includes a magnetic tunnel junction having a first magnetic body including a perpendicular magnetization film, an insulating layer, and a second magnetic body serving as a storage layer including a perpendicular magnetization film, which are sequentially stacked. A thermal expansion layer is disposed in contact with the magnetic tunnel junction portion. The second magnetic body is deformed in a direction in which the cross section thereof increases or decreases by the thermal expansion or contraction of the thermal expansion layer due to the flow of a current, thereby reducing a switching current threshold value required to change the magnetization direction.

Abstract: An apparatus and method of programming a spin-torque magnetoresistive memory array includes a conductive reset line positioned near each of a plurality of magnetoresistive bits and configured to set the plurality of magnetoresistive memory elements to a known state having magnetization perpendicular to the film plane of the magnetoresistive bits by generating a magnetic field when an electrical current flows therethrough. The conductive reset line is positioned such that the magnetic field is applied with a predominant component perpendicular to the film plane when an electrical current of predetermined magnitude, duration, and direction flows through the first conductive reset line. Another conductive reset line may be positioned wherein the magnetic field is created between the two conductive reset lines.

Abstract: A magnetoresistive effect element includes: a magnetization free layer; a non-magnetic insertion layer provided adjacent to the magnetization free layer; a magnetic insertion layer provided adjacent to the non-magnetic insertion layer and opposite to the magnetization free layer with respect to the non-magnetic insertion layer; a spacer layer provided adjacent to the magnetic insertion layer and opposite to the non-magnetic insertion layer with respect to the magnetic insertion layer; and a first magnetization fixed layer provided adjacent to the spacer layer and opposite to the magnetic insertion layer with respect to the spacer layer. The magnetization free layer and the first magnetization fixed layer have magnetization components in directions approximately perpendicular to a film surface. The magnetization free layer includes two magnetization fixed portions and a domain wall motion portion arranged between the two magnetization fixed portions.

Abstract: A write disturbance margin of reference cells that generate reference current during read is improved. A bit line forms a clad interconnect structure in the normal cell region where normal cells are disposed, and a partially clad or non-clad interconnect structure in the reference cell region where a reference cell is disposed. Thus, a writing magnetic field intensity applied to the reference cell is smaller than the write magnetic field intensity applied to a normal memory cell during identical write currents.

Abstract: A spin-transfer torque memory unit includes a free magnetic layer having a magnetic easy axis; a reference magnetic element having a magnetization orientation that is pinned in a reference direction; an electrically insulating and non-magnetic tunneling barrier layer separating the free magnetic layer from the magnetic reference element; and a compensation element adjacent to the free magnetic layer. The compensation element applies a bias field on the magnetization orientation of the free magnetic layer. The bias field is formed of a first vector component parallel to the easy axis of the free magnetic layer and a second vector component orthogonal to the easy axis of the free magnetic layer. The bias field reduces a write current magnitude required to switch the direction of the magnetization orientation of the free magnetic layer.

Abstract: Variable resistive punchthrough access methods are described. The methods include switching a variable resistive data cell from a high resistance state to a low resistance state by passing a write current through the magnetic tunnel junction data cell in a first direction. The write current is provided by a transistor being electrically coupled to the variable resistive data cell and a source line. The write current passes through the transistor in punchthrough mode.

Abstract: A non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, and a free layer formed on top of the barrier layer, wherein the electrical resistivity of the barrier layer is reduced by placing said barrier layer under compressive stress. Compressive stress is induced by either using a compressive stress inducing layer, or by using inert gases at low pressure during the sputtering process as the barrier layer is deposited, or by introducing compressive stress inducing molecules into the molecular lattice of the barrier layer.

Abstract: The present invention is directed to align crystal c-axes in magnetic layers near two opposed junction wall surfaces of a magnetoresistive element so as to be almost perpendicular to the junction wall surfaces. A magnetic sensor stack body has, on sides of opposed junction wall surfaces of a magnetoresistive element, field regions for applying a bias magnetic field to the element. The field region has first and second magnetic layers having magnetic particles having crystal c-axes, the first magnetic layer is disposed adjacent to the junction wall surface in the field region, the crystal c-axes in the first magnetic layer are aligned and oriented along an ABS in a film plane, the second magnetic layer is disposed adjacent to the first magnetic layer in the field region, and the crystal c-axis directions in the second magnetic layer are distributed at random in a plane.

Abstract: A multi-free layer magnetic tunnel junction (MTJ) cell includes a bottom electrode layer, an anti-ferromagnetic layer on the bottom electrode layer, a fixed magnetization layer on the anti-ferromagnetic layer and a barrier layer on the fixed magnetization layer. A first free magnetization layer is on a first area of the barrier layer, and a capping layer is on the first free magnetization layer. A free magnetization layer is on a second area of the barrier layer, laterally displaced from the first area, and a capping layer is on the second free magnetization layer. Optionally current switches establish a read current path including the first free magnetization layer concurrent with not establishing a read current path including the second free magnetization layer. Optionally current switches establishing a read current path including the first and second free magnetization layer.

Abstract: A two-dimensional array of switching devices comprises a plurality of crossbar tiles. Each crossbar tile has a plurality of row wire segments intersecting a plurality of column wire segments, and a plurality of switching devices each formed at an intersection of a row wire segment and a column wire segment. The array has a plurality of lateral latches disposed in a plane of the switching devices. Each lateral latch is linked to a first wire segment of a first crossbar tile and a second wire segment of a second crossbar tile opposing the first wire segment. The lateral latch is operable to close or open to form or break an electric connection between the first and second wire segments.

Abstract: The semiconductor industry seeks to replace traditional volatile memory devices with improved non-volatile memory devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated Giant-Magneto-resistive (GMR) structures. The present teachings relates to integrated latch memory and logic devices and, in particular, concerns a spin dependent logic device that may be integrated with conventional semiconductor-based logic devices to construct high-speed non-volatile static random access memory (SRAM) cells.

Abstract: In a memory, the MTJ elements respectively have a first end electrically connected to any one of a source and a drain of one of the cell transistors. First bit lines each of which is electrically connected to the other one of the source and the drain of one of the cell transistors. Second bit lines each of which is electrically connected to a second end of one of the MTJ elements. Word lines each of which is electrically connected to a gate of one of the cell transistors or functions as a gate of one of the cell transistors. A plurality of the second bit lines correspond to one of the first bit lines. A plurality of the MTJ elements share the same word line and the same active area. The active area is continuously formed in an extending direction of the first and second bit lines.

Abstract: A memory cell including magnetic materials and heating materials, and methods of programming the memory cell are provided. The memory cell includes a free region, a pinned region, and a heating region configured to generate and transfer heat to the free region when a programming current is directed to the cell. The heat transferred from the heating region increases the temperature of the free region, which decreases the magnetization and the critical switching current density of the free region. In some embodiments, the heating region may also provide a current path to the free region, and the magnetization of the free region may be switched according to the spin polarity of the programming current, programming the memory cell to a high resistance state or a low resistance state.

Abstract: Method for writing and reading more than two data bits to a MRAM cell comprising a magnetic tunnel junction formed from a read magnetic layer having a read magnetization, and a storage layer comprising a first storage ferromagnetic layer having a first storage magnetization, a second storage ferromagnetic layer having a second storage magnetization; the method comprising: heating the magnetic tunnel junction above a high temperature threshold; and orienting the first storage magnetization at an angle with respect to the second storage magnetization such that the magnetic tunnel junction reaches a resistance state level determined by the orientation of the first storage magnetization relative to that of the read magnetization. The method allows for storing at least four distinct state levels in the MRAM cell using only one current line to generate a writing field.

Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.

Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.

Abstract: A magnetic memory device including a memory layer having a vertical magnetization on the layer surface, of which the direction of magnetization is changed according to information; and a reference layer provided against the memory layer, and being a basis of information while having a vertical magnetization on the layer surface, wherein the memory device memorizes the information by reversing the magnetization of the memory layer by a spin torque generated when a current flows between layers made from the memory layer, the nonmagnetization layer and the reference layer, and a coercive force of the memory layer at a memorization temperature is 0.7 times or less than a coercive force at room temperature, and a heat conductivity of a center portion of an electrode formed on one side of the memory layer in the direction of the layer surface is lower than a heat conductivity of surroundings thereof.

Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.

Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.

Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.

Abstract: A STTMRAM element includes a magnetization layer made of a first free layer and a second free layer, separated by a non-magnetic separation layer (NMSL), with the first and second free layers each having in-plane magnetizations that act on each other through anti-parallel coupling. The direction of the magnetization of the first and second free layers each is in-plane prior to the application of electrical current to the STTMRAM element and thereafter, the direction of magnetization of the second free layer becomes substantially titled out-of-plane and the direction of magnetization of the first free layer switches. Upon electrical current being discontinued to the STTMRAM element, the direction of magnetization of the second free layer remains in a direction that is substantially opposite to that of the first free layer.

Abstract: A magnetic storage device which enables stable operation at the time of recording information into MRAM and the stable retention of recorded information. The die of the magnetic storage device has a substrate, first and second wirings, a magnetic storage element and a first magnetic shielding structure. The first magnetic shielding structure is formed to cover the magnetic storage element in a plan view. Second and third magnetic shielding structures sandwich the die in a thickness direction. A lead frame member has the die mounted thereon and contains a ferromagnetic material. The lead frame member overlaps with only part of the die in a plan view.

Abstract: A random number generator device that utilizes a magnetic tunnel junction. An AC current source is in electrical connection to the magnetic tunnel junction to provide an AC current having an amplitude and a frequency through the free layer of the magnetic tunnel junction, the AC current configured to switch the magnetization orientation of the free layer via thermal magnetization. A read circuit is used to determine the relative orientation of the free layer magnetization in relation to the reference layer magnetization orientation.

Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.

Abstract: A non-volatile current-switching magnetic memory element includes a bottom electrode, a pinning layer formed on top of the bottom electrode, and a fixed layer formed on top of the pinning layer. The non-volatile current-switching magnetic memory element further includes a tunnel layer formed on top of the pinning layer, a first free layer with a perpendicular anisotropy that is formed on top of the tunnel layer, a granular film layer formed on top of the free layer, a second free layer formed on top of the granular film layer, a cap layer formed on top of the second layer, and a top electrode formed on top of the cap layer.

Abstract: A magnetic tunnel junction (MTJ) includes first and second magnetic layers; a tunnel barrier located between the first and second magnetic layers; a first spacer layer located between the first magnetic layer and the tunnel barrier, the first spacer layer comprising a non-magnetic material; and a first interfacial layer located between the first spacer layer and the tunnel barrier.

Abstract: An integrated circuit memory device includes a memory cell array comprising memory cells having respective data storage regions therein, a plurality of pass transistors having different channel widths and/or channel lengths, and a plurality of conductive lines. Each of the conductive lines electrically couple a respective one of the pass transistors to ones of the memory cells. Each of the memory cells has a line resistance defined by a portion of the corresponding one of the conductive lines extending between the memory cell and the pass transistor coupled thereto. Ones of the memory cells having greater line resistances are coupled to ones of the pass transistors having greater channel widths and/or shorter channel lengths than ones of the memory cells having smaller line resistances. Each of the memory cells may also include a diode therein, and ones of the memory cells having greater line resistances may include diodes having lower resistances. Related devices are also discussed.

Abstract: It is made possible to provide a spin MOSFET that can minimize the increase in production costs and can perform both spin injection writing and reading. A spin MOSFET includes: a substrate that has a semiconductor region of a first conductivity type; first and second ferromagnetic stacked films that are formed at a distance from each other on the semiconductor region, and each have the same stacked structure comprising a first ferromagnetic layer, a nonmagnetic layer, and a second ferromagnetic layer stacked in this order, the second ferromagnetic stacked film having a film-plane area different from that of the first ferromagnetic stacked film; a gate insulating film that is formed on a portion of the semiconductor region, the portion being located between the first ferromagnetic stacked film and the second ferromagnetic stacked film; and a gate that is formed on the gate insulating film.

Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.

Abstract: A magnetic random access memory (MRAM) cell includes a storage layer, a sense layer, and a spacer layer between the storage layer and the sense layer. A field line is magnetically coupled to the MRAM cell to induce a magnetic field along a magnetic field axis, and at least one of the storage layer and the sense layer has a magnetic anisotropy axis that is tilted relative to the magnetic field axis. During a write operation, a storage magnetization direction is switchable between m directions to store data corresponding to one of m logic states, with m>2, where at least one of the m directions is aligned relative to the magnetic anisotropy axis, and at least another one of the m directions is aligned relative to the magnetic field axis. During a read operation, a sense magnetization direction is varied, relative to the storage magnetization direction, to determine the data stored by the storage layer.

Abstract: According to one embodiment, a magnetic recording element includes a stacked body including a first stacked unit and a second stacked unit. The first stacked unit includes a first ferromagnetic layer, a second ferromagnetic layer and a first nonmagnetic layer. Magnetization of the first ferromagnetic layer is substantially fixed in a first direction being perpendicular to a first ferromagnetic layer surface. The second stacked unit includes a third ferromagnetic layer, a fourth ferromagnetic layer and a second nonmagnetic layer. Magnetization of the fourth ferromagnetic layer is substantially fixed in a second direction being perpendicular to a fourth ferromagnetic layer surface. The first direction is opposite to the second direction.

Abstract: A spin transfer (torque) oscillator (STO) with a non-magnetic spacer formed between a spin injection layer (SIL) and a field generation layer (FGL), and with an interfacial layer comprised of Fe(100-V)CoV where v is from 5 to 100 atomic % formed between the SIL and non-magnetic spacer is disclosed. A composite seed layer made of Ta and a metal layer having a fcc(111) or hcp(001) texture is used to enhance perpendicular magnetic anisotropy (PMA) in the STO device. The interfacial layer quenches SIL oscillations and thereby stabilizes the SIL against FGL oscillations. The interfacial layer preferably has a thickness from 5 to 50 Angstroms and enhances amplitude (dR/R) in the STO device. The STO device may have a top SIL or bottom SIL configuration. The SIL is typically a laminated structure such as (Co/Ni)X where x is between 5 and 50.

Abstract: A magnetic memory element that has a stress-induced magnetic anisotropy. The memory element has a ferromagnetic free layer having a switchable magnetization orientation switchable, a ferromagnetic reference layer having a pinned magnetization orientation, and a non-magnetic spacer layer therebetween. The free layer may be circular, essentially circular or nearly circular.