Particular Confinement Layer Patents (Class 372/45.01)
  • Patent number: 11908678
    Abstract: Processing methods may be performed to form a filled contact hole in a mirror layer of a semiconductor substrate. The method may include forming a contact hole through a mirror layer of the semiconductor substrate by an etch process. The method may include filling the contact hole with a fill material. A portion of the fill material may overlie the mirror layer. The method may also include removing a portion of the fill material external to the contact hole by chemical mechanical polishing landing on the mirror layer.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: February 20, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Lan Yu, Benjamin D. Briggs, Tyler Sherwood, Raghav Sreenivasan, Joseph Salfelder
  • Patent number: 11908972
    Abstract: A semiconductor light-emitting device includes a substrate having a first energy bandgap, a first semiconductor layers on the substrate, an active layer on the first semiconductor layer, and a second semiconductor layer on the active layer. The active layer includes a quantum well layer, and a first barrier layer between the first semiconductor layer and the quantum well layer. The first semiconductor layer has a second energy bandgap wider than the first energy bandgap. The quantum well layer has a third energy bandgap narrower than the first and second energy bandgaps. The second semiconductor layer has a fourth energy bandgap wider than the third energy bandgap. The substrate has a refractive index greater than a refractive index of the first semiconductor layer. The refractive index of the first semiconductor layer is not less than a refractive index of the first barrier layer.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: February 20, 2024
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Akira Tanaka, Hideto Sugawara, Katsufumi Kondo, Masanobu Iwamoto, Kenji Isomoto, Hiroaki Ootsuka
  • Patent number: 11898078
    Abstract: A semiconductor phosphor configured to exhibit photoluminescence upon irradiation with excitation light, including: at least one active layer made of a compound semiconductor and containing an n-type or p-type dopant; and at least two barrier layers made of a compound semiconductor and having a larger band gap than the active layer. The active layer and the barrier layers are alternately stacked. This provides a semiconductor phosphor which allows easy wavelength adjustment, high efficiency and stability.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: February 13, 2024
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Susumu Higuchi, Kenji Sakai, Masato Yamada, Masanobu Takahashi, Junya Ishizaki
  • Patent number: 11886003
    Abstract: A core and a slab layer that are formed on a lower clad layer are provided. The lower clad layer is formed on a substrate. The core is comprised of a semiconductor and has a rectangular shape in a cross-sectional view. The slab layer is comprised of a semiconductor. The core and the slab layer have a thickness that allows only up to a secondary mode of light to be present. Further, the core and the slab layer are laminated on the lower clad layer. Further, the core and the slab layer are disposed to be optically coupled to each other.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: January 30, 2024
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Koji Takeda, Shinji Matsuo, Hidetaka Nishi
  • Patent number: 11879828
    Abstract: A flow cytometer of a blood analyzer including a transverse-electric (TE) laser diode, a flow cell, a quarter wave plate (QWP), a plurality of lenses, and a side scatter detector. The TE laser diode is configured to output a laser beam along an optical axis and has a fast axis full width at half maximum (FWHM) divergence of from about 16 degrees to about 25 degrees. The QWP is disposed along the optical axis between the TE laser diode and the flow cell and configured to circularly polarize the laser beam. The plurality of lenses is disposed between the TE laser diode and the flow cell and configured to focus the laser beam at the flow cell.
    Type: Grant
    Filed: December 21, 2022
    Date of Patent: January 23, 2024
    Assignee: IDEXX LABORATORIES INC.
    Inventors: Garland Christian Misener, Michael Ryan Moon, Spencer Franklin McElwain
  • Patent number: 11881674
    Abstract: A surface-emitting semiconductor light-emitting device includes a first semiconductor layers, an active layer on the first semiconductor layer, a photonic crystal layer on the active layer and a second semiconductor layer on the photonic crystal layer. The photonic crystal layer include first protrusions in a first region and second protrusions in a second region. A spacing of adjacent first protrusions is greater than a spacing of adjacent second protrusions. The second semiconductor layer includes a first layer and a second layer on the first layer. The first layer covers first and second protrusions so that a first space remains between the adjacent first protrusions. The first layer includes a first portion provided between the adjacent second protrusions. The second layer includes a second portion provided between the adjacent first protrusions. The first space between the adjacent first protrusions is filled with the second portion of the second layer.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: January 23, 2024
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kei Kaneko, Tsutomu Kakuno, Rei Hashimoto, Shinji Saito
  • Patent number: 11876349
    Abstract: To provide a semiconductor device, a semiconductor laser, and a method of producing a semiconductor device that are capable of sufficiently ensuring electrical connection between a transparent conductive layer and a semiconductor layer. [Solving Means] A semiconductor device according to the present technology includes: a first semiconductor layer; a second semiconductor layer; an active layer; and a transparent conductive layer. The first semiconductor layer has a first conductivity type, a stripe-shaped ridge being formed on a surface of the first semiconductor layer. A second width is not less than 0.99 and not more than 1.0 times a first width, a third width is not less than 0.96 and not more than 1.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: January 16, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Masahiro Murayama
  • Patent number: 11870220
    Abstract: A semiconductor layer stack, a component made therefrom, a component module, and a production method is provided. The semiconductor layer stack has at least two layers (A, B), which, as individual layers, each have an energy position of the Fermi level in the semiconductor band gap, E F - E V < E G 2 applying to the layer (A) and E L - E F < E G 2 applying to the layer (B), with EF the energy position of the Fermi level, EV the energy position of the valence band, EL the energy position of a conduction band and EL?EV the energy difference of the semiconductor band gap EG, the thickness of the layers (A, B) being selected in such a way that a continuous space charge zone region over the layers (A, B) results.
    Type: Grant
    Filed: July 19, 2022
    Date of Patent: January 9, 2024
    Assignees: Otto-von-Guericke-Universitaet Magdeburg, AZUR SPACE Solar Power GmbH
    Inventors: Armin Dadgar, André Strittmatter
  • Patent number: 11862938
    Abstract: Provided is a semiconductor laser diode, including a GaAs/In P substrate and a multi-layer structure on the GaAs/InP substrate. The multi-layer structure includes a lower epitaxial region, an active region and an upper epitaxial region. The active region comprises a first active layer, an epitaxial region and a second active layer, the epitaxial region is disposed between the first active layer and the second active layer, the first active layer comprises one or more quantum well structures or one or more quantum dot structures, and the second active layer comprises one or more quantum well structures or one or more quantum dot structures.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: January 2, 2024
    Assignee: VISUAL PHOTONICS EPITAXY CO., LTD.
    Inventors: Chao-Hsing Huang, Yu-Chung Chin, Van-Truong Dai, Jhao-Hang He, Hung-Chi Hsiao
  • Patent number: 11852951
    Abstract: There is described a terahertz illumination source for terahertz imaging.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: December 26, 2023
    Assignee: INSTITUT NATIONAL D'OPTIQUE
    Inventors: Michel Jacob, Michel Doucet, André Fougeres
  • Patent number: 11855413
    Abstract: A vertical-cavity surface-emitting laser (VCSEL) array may include an n-type substrate layer and an n-type metal on a bottom surface of the n-type substrate layer. The n-type metal may form a common anode for a group of VCSEL. The VCSEL array may include a bottom mirror structure on a top surface of the n-type substrate layer. The bottom mirror structure may include one or more bottom mirror sections and a tunnel junction to reverse a carrier type within the bottom mirror structure. The VCSEL array may include an active region on the bottom mirror structure and an oxidation layer to provide optical and electrical confinement. The VCSEL array may include an n-type top mirror on the active region, a top contact layer over the n-type top mirror, and a top metal on the top contact layer. The top metal may form an isolated cathode for the VCSEL array.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: December 26, 2023
    Assignee: Lumentum Operations LLC
    Inventors: Guowei Zhao, Matthew Glenn Peters, Jun Yang, Eric R. Hegblom
  • Patent number: 11855238
    Abstract: A light emitting element includes: a semiconductor structure including: a substrate, an n-side nitride semiconductor layer located on the substrate, and a p-side nitride semiconductor layer located on the n-side nitride semiconductor layer, wherein a p-side nitride semiconductor side of the semiconductor structure is a light extraction face side, and an n-side nitride semiconductor side of the semiconductor structure is a mounting face side; a first protective layer located on and in direct contact with an upper face of the p-side nitride semiconductor layer in a region corresponding to the peripheral portion of the p-side nitride semiconductor layer; and a current diffusion layer located on and in direct contact with an upper face of the p-side nitride semiconductor layer in a region corresponding to the area inside of the peripheral portion. The current diffusion layer does not overlap the first protective layer in a top view.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: December 26, 2023
    Assignee: NICHIA CORPORATION
    Inventors: Shun Kitahama, Yoshiki Inoue, Kazuhiro Nagamine, Junya Narita
  • Patent number: 11848540
    Abstract: A semiconductor laser element includes: a first nitride semiconductor layer of a first conductivity-type; a second nitride semiconductor layer of a second conductivity-type; and an active region disposed between the first nitride semiconductor layer and the second nitride semiconductor layer, the active region having a single quantum well structure. The active region comprises a first barrier layer, an intermediate layer, a well layer, and a second barrier layer, in this order in a direction from the first nitride semiconductor layer toward the second nitride semiconductor layer. The thickness of the first barrier layer is 20 nm or less. A lattice constant of the intermediate layer is greater than a lattice constant of each of the first barrier layer and the second barrier layer, and smaller than a lattice constant of the well layer. A thickness of the intermediate layer is greater than a thickness of the well layer.
    Type: Grant
    Filed: January 24, 2023
    Date of Patent: December 19, 2023
    Assignee: NICHIA CORPORATION
    Inventor: Yoji Nagao
  • Patent number: 11843224
    Abstract: A quantum cascade laser includes a substrate having a group III-V compound semiconductor and a core region that is provided on the substrate and that includes a group III-V compound semiconductor. The core region includes a plurality of unit structures that are stacked on top of one another. Each of the plurality of unit structures includes an active layer and an injection layer. The injection layer includes at least one strain-compensated layer including a first well layer and a first barrier layer and at least one lattice-matched layer including a second well layer and a second barrier layer. The first well layer has a lattice constant larger than a lattice constant of the substrate. The first barrier layer has a lattice constant smaller than the lattice constant of the substrate. The second well layer and the second barrier layer each have a lattice constant that is lattice-matched to the substrate.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: December 12, 2023
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takashi Kato
  • Patent number: 11841532
    Abstract: The disclosed structures and methods are directed to a chip for an optical gyroscope and methods of manufacturing of the chip for the optical gyroscope. The chip comprises a substrate, a waveguide having a first waveguide cladding layer and a waveguide core; and a ring resonator having a first ring cladding layer and a ring resonator core attached to the first ring cladding layer. A side wall of the ring resonator core forms an obtuse angle with an upper surface of the substrate. The method comprises depositing a first cladding layer on an upper surface of a silicon substrate; depositing a core layer; depositing a resist mask pattern to define a form of a ring resonator core and a form of a waveguide core; etching the core layer outside of the resist mask pattern; and stripping the resist mask pattern off.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: December 12, 2023
    Assignee: OSCPS MOTION SENSING INC.
    Inventors: Kazem Zandi, Yoann Jestin
  • Patent number: 11843223
    Abstract: According to one embodiment, the first process of forming a first light-reflecting structure including forming a patterned dielectric layer on a substrate, forming a first high refractive index layer on the substrate and the dielectric layer, planarizing the first high refractive index layer, forming a mask layer on the first high refractive index layer, forming a periodic structure in the mask layer and the first high refractive index layer, the periodic structure having openings separated at a constant period, forming a low refractive index layer on the mask layer and filling the periodic structure with the low refractive index layer, and performing chemical mechanical polishing to cause the mask layer and the low refractive index layer to form substantially the same plane.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: December 12, 2023
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuya Ohira, Hideto Furuyama
  • Patent number: 11843068
    Abstract: A photoelectric conversion element includes a first reflecting mirror provided on a substrate, a resonator provided on the first reflecting mirror, and a second reflecting mirror provided on the resonator. The first reflecting mirror includes a distributed Bragg reflector (DBR) including a plurality of semiconductor layers. A photoelectric conversion layer is provided in at least one layer of the plurality of semiconductor layers.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: December 12, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takako Suga, Takeshi Uchida
  • Patent number: 11833488
    Abstract: In one embodiment, a product includes a nanoporous gold structure comprising a plurality of ligaments, and a plurality of oxide particles deposited on the nanoporous gold structure; the oxide particles are characterized by a crystalline phase.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: December 5, 2023
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Juergen Biener, Arne Wittstock, Monika M. Biener, Michael Bagge-Hansen, Marcus Baeumer, Andre Wichmann, Bjoern Neuman
  • Patent number: 11831125
    Abstract: A structure of Vertical Cavity Surface-Emitting Laser (VCSEL) comprises an ion-implanted region with gas-furnace configuration arranged in the second mirror layer around a laser light output window, in order to retain several conductive passages between the inner and outer rims of the ion-implanted region, so as to let the aperture of the inner rim of the metal layer (that is, the aperture of the output window) be expanded without loss of resistance. Not only the shading effect can be removed, the spectrum width suppression function can be preserved, but also various photoelectric characteristics such as transmission eye diagram and photoelectric curve linearity can be improved, in addition, high-speed transmission characteristics can also be optimized.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: November 28, 2023
    Assignee: TrueLight Corporation
    Inventors: Yen Hsiang Wu, Jia-Yu Lin, Chih-Cheng Chen
  • Patent number: 11824326
    Abstract: A semiconductor laser element that includes a semiconductor layer including a waveguide formed in an intra-layer direction of the semiconductor layer and a window region formed in a front-side end face of the waveguide, has a current-laser optical output characteristic in which, at an operating temperature of 25° C.±3° C., a laser optical output has a maximum value at a first driving current value and the laser optical output is at most 20% of the maximum value at a second driving current value greater than the first driving current value, and is not damaged at the second driving current value.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: November 21, 2023
    Assignee: NUVOTON TECHNOLOGY CORPORATION JAPAN
    Inventors: Kazumasa Nagano, Hiroki Nagai
  • Patent number: 11817678
    Abstract: A semiconductor laser includes an active layer which emits laser light and cladding layers being formed so as to sandwich the active layer. The active layer includes a quantum dot layer including a plurality of quantum dots, which respectively confine movements of carriers in the three-dimensional directions. The laser radar device includes a light projection part which projects laser light and a light receiving part which receives reflected light of the laser light. The light projection part includes the semiconductor laser and a scanner which reflects the laser light, emitted from the semiconductor laser, to form a scanning laser light.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: November 14, 2023
    Assignee: SAE Magnetics (H.K.) Ltd.
    Inventors: Seiichi Takayama, Kang Gao, Ryo Hosoi, Ryuji Fujii
  • Patent number: 11807791
    Abstract: A phosphor plate including a base material, and a plate-shaped composite including phosphors dispersed in the base material, in which a main component of the base material is alumina, the phosphor includes an ?-type sialon phosphor, and L* value satisfies 73.5 or more and 85.0 or less, a* value satisfies 4.4 or more and 8.0 or less, and b* value satisfies 10.8 or more and 13.0 or less in L*a*b* color coordinates of the phosphor plate in a case of being measured in accordance with JIS Z 8781-4.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: November 7, 2023
    Assignee: DENKA COMPANY LIMITED
    Inventors: Taiyo Yamaura, Yuki Kubota, Kazuhiro Ito, Hideyuki Emoto
  • Patent number: 11804691
    Abstract: Methods for designing a mode-selective optical device including one or more optical interfaces defining an optical cavity include: defining a loss function within a simulation space encompassing the optical device, the loss function corresponding to an electromagnetic field having an operative wavelength within the optical device resulting from an interaction between an input electromagnetic field at the operative wavelength and the one or more optical interfaces of the optical device; defining an initial structure for each of the one or more optical interfaces, each initial structure being defined using a plurality of voxels; determining values for at least one structural parameter and/or at least one functional parameter of the one or more optical interfaces by solving Maxwell's equations; and defining a final structure of the one or more optical interfaces based on the values for the one or more structural and/or functional parameters.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: October 31, 2023
    Assignee: X Development LLC
    Inventors: Martin Friedrich Schubert, Brian John Adolf, Jesse Lu
  • Patent number: 11796829
    Abstract: A near-eye optical device includes a transparent layer, an in-field illuminator, and a diffractive optical element (DOE). The in-field illuminator is configured to emit near-infrared light centered around a first wavelength. The diffractive optical element is configured to be illuminated by the near-infrared light emitted by the in-field illuminator. The DOE generates a structured light projection that includes dots that expand as the structured light projection propagates farther from the DOE. The structured light projection is directed to illuminate an eyebox.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: October 24, 2023
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Robin Sharma, Karol Constantine Hatzilias, Christopher Yuan-Ting Liao
  • Patent number: 11796888
    Abstract: Methods and systems for a vertical junction high-speed phase modulator are disclosed and may include a semiconductor device having a semiconductor waveguide including a slab section, a rib section extending above the slab section, and raised ridges extending above the slab section on both sides of the rib section. The semiconductor device has a vertical pn junction with p-doped material and n-doped material arranged vertically with respect to each other in the rib and slab sections. The rib section may be either fully n-doped or p-doped in each cross-section along the semiconductor waveguide. Electrical connection to the p-doped and n-doped material may be enabled by forming contacts on the raised ridges, and electrical connection may be provided to the rib section from one of the contacts via periodically arranged sections of the semiconductor waveguide, where a cross-section of both the rib section and the slab section in the periodically arranged sections may be fully n-doped or fully p-doped.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: October 24, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Attila Mekis, Subal Sahni, Yannick De Koninck, Gianlorenzo Masini, Faezeh Gholami
  • Patent number: 11789147
    Abstract: A semiconductor optical amplifier includes: a substrate; a light source unit formed on the substrate; and an optical amplification part that amplifies light propagating in a predetermined direction from the light source unit and emits the amplified light in an emission direction intersecting with the substrate surface. The optical amplification part includes a conductive region extending in the predetermined direction along the substrate surface from the light source unit, and a nonconductive region formed around the conductive region. The conductive region includes a first region extending from the light source unit and having a predetermined width as seen from a direction perpendicular to the substrate surface, and a second region connected to the first region and having a width widened relative to the predetermined width of the first region, the second region being configured to expand the propagation light in a direction intersecting with the predetermined direction.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: October 17, 2023
    Assignees: FUJIFILM BUSINESS INNOVATION CORP., TOKYO INSTITUTE OF TECHNOLOGY
    Inventors: Junichiro Hayakawa, Daiki Tominaga, Akemi Murakami, Fumio Koyama
  • Patent number: 11788956
    Abstract: The present application provides a terahertz spectrum measurement system and a method for analyzing a terahertz spectrum of a substance, wherein the terahertz spectrum measurement system comprises: two terahertz quantum cascade lasers with their emission ports arranged oppositely; and a vacuum hood arranged between the emission ports of two terahertz quantum cascade lasers. The terahertz spectrum measurement system and the method for analyzing a terahertz spectrum of a substance realize a separate terahertz dual frequency comb while retaining the advantages of the on-chip dual frequency comb system, which solves the problem that the on-chip dual frequency comb cannot directly measure the terahertz spectra of substances.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: October 17, 2023
    Assignee: Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
    Inventors: Hua Li, Ziping Li, Wenjian Wan, Juncheng Cao
  • Patent number: 11777278
    Abstract: An apparatus is configured to operate in a single fundamental transverse mode and the apparatus includes a waveguide layer between an n-doped cladding layer and a p-doped cladding layer. The waveguide layer includes a first waveguide part, and an active layer located between the first waveguide part and the p-doped cladding layer, the active layer being asymmetrically within the waveguide layer closer to the p-doped cladding layer than the n-doped cladding layer. The refractive index of the n-doped cladding layer being equal to or larger than the p-doped cladding layer. A first end of the first waveguide part is adjacent to the n-doped cladding layer. A second end of the first waveguide part is adjacent to a first end of the active layer. A desired donor density is doped in the first waveguide part for controlling the carrier density dependent internal optical loss in the first waveguide part at high injection levels.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: October 3, 2023
    Assignee: OULUN YLIOPISTO
    Inventors: Boris Ryvkin, Eugene A. Avrutin, Juha Kostamovaara
  • Patent number: 11757254
    Abstract: An optoelectronic semiconductor device comprises a plurality of laser devices. Each of the laser devices is configured to emit electromagnetic radiation. The laser devices are horizontally arranged. A first laser device of the plurality of laser devices is configured to emit electromagnetic radiation having a first wavelength different from the wavelength of a further laser device of the plurality of laser devices. A difference between the first wavelength and the wavelength of the further laser device is less than 20 nm.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: September 12, 2023
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Peter Fuchs, Ann Russell, Thomas Falck, Hubert Halbritter, Bruno Jentzsch, Christian Lauer
  • Patent number: 11721953
    Abstract: Disclosed is an electrically pumped vertical cavity laser structure operating in the mid-infrared region, which has demonstrated room-temperature continuous wave operation. This structure uses an interband cascade gain region, two distributed mirrors, and a low-loss refractive index waveguide. A preferred embodiment includes at least one wafer bonded GaAs-based mirror.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: August 8, 2023
    Assignees: Thorlabs, Inc., Praevium Research, Inc.
    Inventors: Vijaysekhar Jayaraman, Stephen Segal, Kevin Lascola
  • Patent number: 11710941
    Abstract: A semiconductor laser element includes: an n-type cladding layer disposed above an n-type semiconductor substrate (a chip-like substrate); an active layer disposed above the n-type cladding layer; and a p-type cladding layer disposed above the active layer, in which the active layer includes a well layer and a barrier layer, an energy band gap of the barrier layer is larger than an energy band gap of the n-type cladding layer, and a refractive index of the barrier layer is higher than a refractive index of the n-type cladding layer.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: July 25, 2023
    Assignee: NUVOTON TECHNOLOGY CORPORATION JAPAN
    Inventors: Tougo Nakatani, Masayuki Hata
  • Patent number: 11699893
    Abstract: Systems and methods disclosed herein include a vertical cavity surface emitting laser (VCSEL) device that includes an anode, a cathode, and one or more curved apertures located in an epitaxial layer between the anode and the cathode, each of the one or more curved apertures having an aperture edge and one or more oxidation bridges crossing the curved aperture that allow current to flow inside the curved aperture, in which when a current signal is applied to the VCSEL, current flow between the anode and the cathode is distributed along the aperture edge of the one or more curved apertures.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: July 11, 2023
    Assignee: Vixar, Inc.
    Inventors: Randolph Schueller, Sara Rothwell
  • Patent number: 11664643
    Abstract: Gallium and nitrogen containing optical devices operable as laser diodes and methods of forming the same are disclosed. The devices include a gallium and nitrogen containing substrate member, which may be semipolar or non-polar. The devices include a chip formed from the gallium and nitrogen substrate member. The chip has a width and a length, a dimension of less than 150 microns characterizing the width of the chip. The devices have a cavity oriented substantially parallel to the length of the chip.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: May 30, 2023
    Assignee: KYOCERA SLD Laser, Inc.
    Inventors: James W. Raring, Hua Huang
  • Patent number: 11646367
    Abstract: A high electron mobility transistor includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer. The composition of the first III-V compound layer and the second III-V compound layer are different from each other. A shallow recess, a first deep recess and a second deep recess are disposed in the second III-V compound layer. The first deep recess and the second deep recess are respectively disposed at two sides of the shallow recess. The source electrode fills in the first deep recess and contacts the top surface of the first III-V compound layer. A drain electrode fills in the second deep recess and contacts the top surface of the first III-V compound layer. The shape of the source electrode and the shape of the drain electrode are different from each other. A gate electrode is disposed on the shallow recess.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: May 9, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Kuang Hsieh, Shih-Hung Tsai
  • Patent number: 11631967
    Abstract: Integrated-optics systems are presented in which an optically active device is optically coupled with a silicon waveguide via a passive compound-semiconductor waveguide. In a first region, the passive waveguide and the optically active device collectively define a composite waveguide structure, where the optically active device functions as the central ridge portion of a rib-waveguide structure. The optically active device is configured to control the vertical position of an optical mode in the composite waveguide along its length such that the optical mode is optically coupled into the passive waveguide with low loss. The passive waveguide and the silicon waveguide collectively define a vertical coupler in a second region, where the passive and silicon waveguides are configured to control the distribution of the optical mode along the length of the coupler, thereby enabling the entire mode to transition between the passive and silicon waveguides with low loss.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: April 18, 2023
    Assignee: Quintessent Inc.
    Inventors: Brian Koch, Michael Davenport, Alan Liu, Justin Colby Norman
  • Patent number: 11626709
    Abstract: The embodiment relates to a light-emitting device in which a positional relationship between a modified refractive index region's gravity-center position and the associated lattice point differs from a conventional device, and a production method. In this device, a stacked body including a light-emitting portion and a phase modulation layer optically coupled to the light-emitting portion is on a substrate. The phase modulation layer includes a base layer and plural modified refractive index regions in the base layer. Each modified refractive index region's gravity-center position locates on a virtual straight line passing through a corresponding reference lattice point among lattice points of a virtual square lattice on the base layer's design plane. A distance between the reference lattice point and the modified refractive index region's gravity center along the virtual straight line is individually set such that this device outputs light forming an optical image.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: April 11, 2023
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Kazuyoshi Hirose, Yoshitaka Kurosaka, Yuu Takiguchi, Takahiro Sugiyama
  • Patent number: 11619871
    Abstract: The present invention is directed to display technologies. More specifically, various embodiments of the present invention provide projection display systems where one or more laser diodes are used as a light source.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: April 4, 2023
    Assignee: KYOCERA SLD Laser, Inc.
    Inventors: James W. Raring, Paul Rudy
  • Patent number: 11611195
    Abstract: Several VCSEL devices for long wavelength applications in wavelength range of 1200-1600 nm are described. These devices include an active region between a semiconductor DBR on a GaAs wafer and a dielectric DBR regrown on the active region. The active region includes multi-quantum layers (MQLs) confined between the active n-InP and p-InAlAs layers and a tunnel junction layer above the MQLs. The semiconductor DBR is fused to the bottom of the active region by a wafer bonding process. The design simplifies integrating the reflectors and the active region stack by having only one wafer bonding followed by regrowth of the other layers including the dielectric DBR. An air gap is fabricated either in an n-InP layer of the active region or in an air gap spacer layer on top of the semiconductor DBR. The air gap enhances optical confinement of the VCSEL. The air gap may also contain a grating.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: March 21, 2023
    Assignee: Mellanox Technologies, Ltd.
    Inventors: Yuri Berk, Vladimir Iakovlev, Tamir Sharkaz, Elad Mentovich, Matan Galanty, Itshak Kalifa
  • Patent number: 11611196
    Abstract: A light emitting element according to the present disclosure includes a first light reflecting layer 41, a laminated structure 20, and a second light reflecting layer 42 laminated to each other. The laminated structure 20 includes a first compound semiconductor layer 21, a light emitting layer 23, and a second compound semiconductor layer 22 laminated to each other from a side of the first light reflecting layer. Light from the laminated structure 20 is emitted to an outside via the first light reflecting layer 41 or the second light reflecting layer 42. The first light reflecting layer 41 has a structure in which at least two types of thin films 41A and 41B are alternately laminated to each other in plural numbers. A film thickness modulating layer 80 is provided between the laminated structure 20 and the first light reflecting layer 41.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: March 21, 2023
    Assignee: Sony Corporation
    Inventors: Tatsushi Hamaguchi, Jugo Mitomo, Hiroshi Nakajima, Masamichi Ito, Susumu Sato
  • Patent number: 11605935
    Abstract: An optical semiconductor device outputting a predetermined wavelength of laser light includes a quantum well active layer positioned between a p-type cladding layer and an n-type cladding layer in thickness direction. The optical semiconductor device includes a separate confinement heterostructure layer positioned between the quantum well active layer and the n-type cladding layer. The optical semiconductor device further includes an electric-field-distribution-control layer positioned between the separate confinement heterostructure layer and the n-type cladding layer and configured by at least two semiconductor layers having band gap energy greater than band gap energy of a barrier layer constituting the quantum well active layer. The optical semiconductor device is applied to a ridge-stripe type laser.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: March 14, 2023
    Assignee: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Junji Yoshida, Hirokazu Itoh, Satoshi Irino, Yuichiro Irie, Taketsugu Sawamura
  • Patent number: 11605930
    Abstract: A Distributed Feedback Laser (DFB) mounted on a Silicon Photonic Integrated Circuit (Si PIC), the DFB having a longitudinal length which extends from a first end of the DFB laser to a second end of the DFB laser, the DFB laser comprising: an epi stack, the epi stack comprising: one or more active material layers; a layer comprising a partial grating, the partial grating extending from the second end of the DFB laser, only partially along the longitudinal length of the DFB laser such that it does not extend to the first end of the DFB laser; a highly reflective medium located at the first end of the DFB laser; and a back facet located at the second end of the DFB laser.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: March 14, 2023
    Assignee: Rockley Photonics Limited
    Inventors: Mazin Alalusi, Kevin Masuda, Pradeep Srinivasan
  • Patent number: 11594861
    Abstract: A semiconductor laser element includes: a first nitride semiconductor layer of a first conductivity-type; a second nitride semiconductor layer of a second conductivity-type; and an active region disposed between the first nitride semiconductor layer and the second nitride semiconductor layer, the active region having a single quantum well structure. The active region comprises a first barrier layer, an intermediate layer, a well layer, and a second barrier layer, in this order in a direction from the first nitride semiconductor layer toward the second nitride semiconductor layer. The well layer is composed of InGaN. The second barrier layer is undoped. A lattice constant of the intermediate layer is greater than a lattice constant of each of the first barrier layer and the second barrier layer, and smaller than a lattice constant of the well layer. A thickness of the intermediate layer is greater than a thickness of the well layer.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: February 28, 2023
    Assignee: NICHIA CORPORATION
    Inventor: Yoji Nagao
  • Patent number: 11588301
    Abstract: A VCSEL device includes an N-type metal substrate and laser-emitting units on the N-type metal substrate. Each laser-emitting unit includes an N-type contact layer in contact with the N-type metal substrate; an N-type Bragg reflector layer in contact with the N-type contact layer; a P-type Bragg reflector layer above the N-type Bragg reflector layer; an active emitter layer between the P-type Bragg reflector layer and the N-type Bragg reflector layer; a current restriction layer between the active emitter layer and the P-type Bragg reflector layer; a P-type contact layer in contact with the P-type Bragg reflector layer; and an insulation sidewall surrounding all edges of the N-type and P-type Bragg reflector layers, the N-type and P-type contact layers, the active emitter layer and the current restriction layer. A P-type metal substrate has through holes each aligned with a current restriction hole of a corresponding laser-emitting unit.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: February 21, 2023
    Assignee: Lextar Electronics Corporation
    Inventors: Chung-Yu Hong, Yu-Chen Lin, Gang-Wei Fan
  • Patent number: 11581706
    Abstract: An optical semiconductor device outputting a predetermined wavelength of laser light includes a quantum well active layer positioned between a p-type cladding layer and an n-type cladding layer in thickness direction. The optical semiconductor device includes a separate confinement heterostructure layer positioned between the quantum well active layer and the n-type cladding layer. The optical semiconductor device further includes an electric-field-distribution-control layer positioned between the separate confinement heterostructure layer and the n-type cladding layer and configured by at least two semiconductor layers having band gap energy greater than band gap energy of a barrier layer constituting the quantum well active layer. The quantum well active layer is doped with 0.3 to 1×1018/cm3 of n-type impurity.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: February 14, 2023
    Assignee: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Junji Yoshida, Hirokazu Itoh, Satoshi Irino, Yuichiro Irie, Taketsugu Sawamura
  • Patent number: 11573178
    Abstract: Building blocks are provided for on-chip chemical sensors and other highly-compact photonic integrated circuits combining interband or quantum cascade lasers and detectors with passive waveguides and other components integrated on a III-V or silicon. A MWIR or LWIR laser source is evanescently coupled into a passive extended or resonant-cavity waveguide that provides evanescent coupling to a sample gas (or liquid) for spectroscopic chemical sensing. In the case of an ICL, the uppermost layer of this passive waveguide has a relatively high index of refraction that enables it to form the core of the waveguide, while the ambient air, consisting of the sample gas, functions as the top cladding layer. A fraction of the propagating light beam is absorbed by the sample gas if it contains a chemical species having a fingerprint absorption feature within the spectral linewidth of the laser emission.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: February 7, 2023
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Jerry R. Meyer, Igor Vurgaftman, Chadwick Lawrence Canedy, William W. Bewley, Chul Soo Kim, Charles D. Merritt, Michael V. Warren, R. Joseph Weiblen, Mijin Kim
  • Patent number: 11563306
    Abstract: A VCSEL device includes a first electrical contact, a substrate, a second electrical contact, and an optical resonator arranged on a first side of the substrate. The optical resonator includes a first reflecting structure comprising a first distributed Bragg reflector, a second reflecting structure comprising a second distributed Bragg reflector, an active layer arranged between the first and second reflecting structures, and a guiding structure. The guiding structure is configured to define a first relative intensity maximum of an intensity distribution within the active layer at a first lateral position such that a first light emitting area is provided, to define at least a second relative intensity maximum of the intensity distribution within the active layer at a second lateral position such that a second light emitting area is provided, and to reduce an intensity in between the at least two light-emitting areas during operation.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: January 24, 2023
    Assignee: TRUMPF PHOTONIC COMPONENTS GMBH
    Inventors: Holger Joachim Moench, Stephan Gronenborn
  • Patent number: 11557880
    Abstract: A method of fabricating a gain medium includes growing a p-type layer doped with zinc on a substrate, growing an undoped layer including one or both of InP or InGaAsP on the p-type layer, growing a region that includes multiple quantum wells (MQWs) on the undoped layer, and growing an n-type layer on the region. The undoped layer has a thickness that is sufficient to prevent Zn diffusion from the p-type layer into the region during subsequent growth or wafer fabrication steps.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: January 17, 2023
    Inventors: John Y. Spann, John Zyskind
  • Patent number: 11552448
    Abstract: A semiconductor optical amplifier integrated laser includes a semiconductor laser oscillator portion that oscillates laser light having a wavelength included in a gain band and a semiconductor optical amplifier portion that amplifies laser light output from the semiconductor laser oscillator portion. The semiconductor laser oscillator portion and the semiconductor optical amplifier portion have one common p-i-n structure, the common p-i-n structure includes an active layer, a cladding layer provided apart from the active layer, and a common functional layer formed in the cladding layer, and the common functional layer includes a first portion that reflects light having a wavelength within the gain band in the semiconductor laser oscillator portion and a second portion that transmits light having a wavelength within the gain band in the semiconductor optical amplifier portion.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: January 10, 2023
    Assignee: Lumentum Japan, Inc.
    Inventors: Atsushi Nakamura, Kaoru Okamoto, Masatoshi Arasawa, Tetsuya Nishida, Yasushi Sakuma, Shigetaka Hamada, Ryosuke Nakajima
  • Patent number: 11543342
    Abstract: A flow cytometer of a blood analyzer including a transverse-electric (TE) laser diode, a flow cell, a quarter wave plate (QWP), a plurality of lenses, and a side scatter detector. The TE laser diode is configured to output a laser beam along an optical axis and has a fast axis full width at half maximum (FWHM) divergence of from about 16 degrees to about 25 degrees. The QWP is disposed along the optical axis between the TE laser diode and the flow cell and configured to circularly polarize the laser beam. The plurality of lenses is disposed between the TE laser diode and the flow cell and configured to focus the laser beam at the flow cell.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: January 3, 2023
    Assignee: IDEXX Laboratories, Inc.
    Inventors: Garland Christian Misener, Michael Ryan Moon, Spencer Franklin McElwain
  • Patent number: 11539188
    Abstract: A surface emitting laser includes a lower reflector layer, an active layer , an upper reflector layer , and a wiring. The lower reflector layer, the active layer, and the upper reflector layer form a mesa, a terrace, and a connecting portion. A first groove is provided between the mesa and the terrace. The connecting portion connects the mesa and the terrace, and extends in a direction inclined from <011> direction of the substrate. A high-resistance region is formed in the terrace, in the connecting portion, and in a peripheral portion of the mesa. The wiring is provided on top surfaces of the terrace, the connecting portion, and the mesa. The mesa includes an oxide region extending from a side surface of the mesa and a current confinement structure including an aperture surrounded by the oxide region.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: December 27, 2022
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Tetsuya Kumano