Particular Confinement Layer Patents (Class 372/45.01)
  • Patent number: 11563306
    Abstract: A VCSEL device includes a first electrical contact, a substrate, a second electrical contact, and an optical resonator arranged on a first side of the substrate. The optical resonator includes a first reflecting structure comprising a first distributed Bragg reflector, a second reflecting structure comprising a second distributed Bragg reflector, an active layer arranged between the first and second reflecting structures, and a guiding structure. The guiding structure is configured to define a first relative intensity maximum of an intensity distribution within the active layer at a first lateral position such that a first light emitting area is provided, to define at least a second relative intensity maximum of the intensity distribution within the active layer at a second lateral position such that a second light emitting area is provided, and to reduce an intensity in between the at least two light-emitting areas during operation.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: January 24, 2023
    Assignee: TRUMPF PHOTONIC COMPONENTS GMBH
    Inventors: Holger Joachim Moench, Stephan Gronenborn
  • Patent number: 11557880
    Abstract: A method of fabricating a gain medium includes growing a p-type layer doped with zinc on a substrate, growing an undoped layer including one or both of InP or InGaAsP on the p-type layer, growing a region that includes multiple quantum wells (MQWs) on the undoped layer, and growing an n-type layer on the region. The undoped layer has a thickness that is sufficient to prevent Zn diffusion from the p-type layer into the region during subsequent growth or wafer fabrication steps.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: January 17, 2023
    Inventors: John Y. Spann, John Zyskind
  • Patent number: 11552448
    Abstract: A semiconductor optical amplifier integrated laser includes a semiconductor laser oscillator portion that oscillates laser light having a wavelength included in a gain band and a semiconductor optical amplifier portion that amplifies laser light output from the semiconductor laser oscillator portion. The semiconductor laser oscillator portion and the semiconductor optical amplifier portion have one common p-i-n structure, the common p-i-n structure includes an active layer, a cladding layer provided apart from the active layer, and a common functional layer formed in the cladding layer, and the common functional layer includes a first portion that reflects light having a wavelength within the gain band in the semiconductor laser oscillator portion and a second portion that transmits light having a wavelength within the gain band in the semiconductor optical amplifier portion.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: January 10, 2023
    Assignee: Lumentum Japan, Inc.
    Inventors: Atsushi Nakamura, Kaoru Okamoto, Masatoshi Arasawa, Tetsuya Nishida, Yasushi Sakuma, Shigetaka Hamada, Ryosuke Nakajima
  • Patent number: 11543342
    Abstract: A flow cytometer of a blood analyzer including a transverse-electric (TE) laser diode, a flow cell, a quarter wave plate (QWP), a plurality of lenses, and a side scatter detector. The TE laser diode is configured to output a laser beam along an optical axis and has a fast axis full width at half maximum (FWHM) divergence of from about 16 degrees to about 25 degrees. The QWP is disposed along the optical axis between the TE laser diode and the flow cell and configured to circularly polarize the laser beam. The plurality of lenses is disposed between the TE laser diode and the flow cell and configured to focus the laser beam at the flow cell.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: January 3, 2023
    Assignee: IDEXX Laboratories, Inc.
    Inventors: Garland Christian Misener, Michael Ryan Moon, Spencer Franklin McElwain
  • Patent number: 11539188
    Abstract: A surface emitting laser includes a lower reflector layer, an active layer , an upper reflector layer , and a wiring. The lower reflector layer, the active layer, and the upper reflector layer form a mesa, a terrace, and a connecting portion. A first groove is provided between the mesa and the terrace. The connecting portion connects the mesa and the terrace, and extends in a direction inclined from <011> direction of the substrate. A high-resistance region is formed in the terrace, in the connecting portion, and in a peripheral portion of the mesa. The wiring is provided on top surfaces of the terrace, the connecting portion, and the mesa. The mesa includes an oxide region extending from a side surface of the mesa and a current confinement structure including an aperture surrounded by the oxide region.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: December 27, 2022
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Tetsuya Kumano
  • Patent number: 11532923
    Abstract: A vertical-cavity surface emitting laser includes a substrate, a first reflector, an active region, an oxide layer, a second reflector, and a circular metal electrode. The first reflector is formed above the substrate. The active region is formed above the first reflector, and includes at least one quantum well. The at least one quantum well generates a laser beam with a plurality of modes. The oxide layer is formed above the active region and includes an oxide aperture. The second reflector is formed above the oxide layer. The circular metal electrode is formed in a circular concave in the second reflector. The circular metal electrode reflects other modes of the laser beam with the plurality of modes except for a fundamental mode and receive an operational voltage. A window exists between the circular concave and lets the laser beam with the fundamental mode pass.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: December 20, 2022
    Assignee: National Taiwan University
    Inventors: Chao-Hsin Wu, Szu-Yu Min, Hao-Tien Cheng
  • Patent number: 11522342
    Abstract: A VCSEL device includes a first electrical contact, a substrate, a second electrical contact, and an optical resonator arranged on a first side of the substrate. The optical resonator includes a first reflecting structure comprising a first distributed Bragg reflector, a second reflecting structure comprising a second distributed Bragg reflector, an active layer arranged between the first and second reflecting structures, and a guiding structure. The guiding structure is configured to define a first relative intensity maximum of an intensity distribution within the active layer at a first lateral position such that a first light emitting area is provided, to define at least a second relative intensity maximum of the intensity distribution within the active layer at a second lateral position such that a second light emitting area is provided, and to reduce an intensity in between the at least two light-emitting areas during operation.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: December 6, 2022
    Assignee: TRUMPF PHOTONIC COMPONENTS GMBH
    Inventors: Holger Joachim Moench, Stephan Gronenborn
  • Patent number: 11515686
    Abstract: A method is for making a QCL having an InP spacer within a laser core, the QCL to provide a CW output in a high quality beam. The method may include selectively setting parameters for the QCL. The parameters may include a number of the InP spacer, a thickness for each InP spacer, a number of stages in the laser core, and a dopant concentration value in the laser core. The method may include forming the QCL based upon the parameters so that a figure of merit comprises a greatest value for a fundamental mode of operation for the QCL.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: November 29, 2022
    Assignee: UNIVERSITY OF CENTRAL FLORIDA RESEARCH FOUNDATION, INC.
    Inventors: Arkadiy Lyakh, Matthew Suttinger
  • Patent number: 11489314
    Abstract: A light-emitting element includes: a laminated structure body 20 which is formed from a GaN-based compound semiconductor and in which a first compound semiconductor layer 21 including a first surface 21a and a second surface 21b that is opposed to the first surface 21a, an active layer 23 that faces the second surface 21b of the first compound semiconductor layer 21, and a second compound semiconductor layer 22 including a first surface 22a that faces the active layer 23 and a second surface 22b that is opposed to the first surface 22a are laminated; a first light reflection layer 41 that is provided on the first surface 21a side of the first compound semiconductor layer 21; and a second light reflection layer 42 that is provided on the second surface 22b side of the second compound semiconductor layer 22. The first light reflection layer 41 includes a concave mirror portion 43, and the second light reflection layer 42 has a flat shape.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: November 1, 2022
    Assignee: Sony Corporation
    Inventors: Susumu Sato, Tatsushi Hamaguchi, Shoichiro Izumi, Noriyuki Futagawa, Masamichi Ito, Jugo Mitomo, Hiroshi Nakajima
  • Patent number: 11482635
    Abstract: An InGaN solar photovoltaic device includes a base band, a light absorption layer, an n-type ZnO electron transport layer, and a p-type InN hole transport layer, the p-type InN hole transport layer is on a front side of the light absorption layer, and the base band and the n-type ZnO electron transport layer are on a back side of the light absorption layer, wherein the light absorption layer includes a p-type InxGa1-XN layer and an n-type InyGa1-yN layer which are superposed, where 0.2<x<0.4 and 0.2<y<0.4, and the p-type InxGa1-XN layer and the n-type InyGa1-yN layer are doped with Si and Mg. The InGaN solar photovoltaic device with a flexible multi-layer structure features high in energy conversion efficiency, low in cost, simple in manufacturing, and easy to implement, and thus has a broad prospect in application.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: October 25, 2022
    Assignee: HUBEI YUBOND TECHNOLOGY CO., LTD.
    Inventors: Ping Liu, Dan Liu
  • Patent number: 11469574
    Abstract: A nitride-based electronic device includes an oxide cladding layer, a nitride cladding layer, and a nitride active region layer arranged between the oxide cladding layer and the nitride cladding layer. First and second metal contacts are electrically coupled to the nitride active region layer. The nitride-based electronic device can be formed in a system in which a non-reactive chamber is arranged between an oxide reaction chamber and a nitride reaction chamber so that oxide and nitride layers can be grown without exposing the device to the environment between growth of the oxide and nitride layers.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: October 11, 2022
    Assignee: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventor: Kazuhiro Ohkawa
  • Patent number: 11456573
    Abstract: Single-mode distributed-feedback (DFB) lasers including single mode DFB waveguides with tapered grating structures are provided herein. Tapered grating structures provide for single mode DFB waveguides with predictable single mode operation. Uniform grating structures may provide for single mode operation, however DFB waveguides implementing uniform grating structures may operate at one of two single modes. Advantageously, DFB waveguides with tapered gratings operate with a spectrally narrow single mode at the same predictable single mode for all DFB waveguides with substantially identical specifications. Such predictability may lead to increased yield during manufacture of DFB waveguides with tapered gratings.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: September 27, 2022
    Assignee: California Institute of Technology
    Inventors: Ryan M. Briggs, Clifford F. Frez, Mathieu Fradet
  • Patent number: 11437780
    Abstract: A semiconductor laser device lases in a multiple transverse mode and includes a stacked structure where a first conductivity-side semiconductor layer, an active layer, and a second conductivity-side semiconductor layer are stacked above a substrate. The second conductivity-side semiconductor layer includes a current block layer having an opening that delimits a current injection region. Side faces as a pair are formed in portions of the stacked structure that range from part of the first conductivity-side semiconductor layer to the second conductivity-side semiconductor layer. The active layer has a second width greater than a first width of the opening. The side faces in at least part of the first conductivity-side semiconductor layer are inclined to the substrate. A maximum intensity position in a light distribution of light guided in the stacked structure, in a direction of the normal to the substrate, is within the first conductivity-side semiconductor layer.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: September 6, 2022
    Assignee: NUVOTON TECHNOLOGY CORPORATION JAPAN
    Inventors: Norio Ikedo, Tougo Nakatani, Takahiro Okaguchi, Takeshi Yokoyama, Tomohito Yabushita, Toru Takayama
  • Patent number: 11431151
    Abstract: A MEMS tunable VCSEL includes a membrane device having a mirror and a distal-side electrostatic cavity for displacing the mirror to increase a size of an optical cavity. A VCSEL device includes an active region for amplifying light. Then, a proximal-side electrostatic cavity is defined between the VCSEL device and the membrane device is used to displace the mirror to decrease a size of an optical cavity.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: August 30, 2022
    Assignee: Excelitas Technologies Corp.
    Inventors: James W. Getz, Peter S. Whitney
  • Patent number: 11424596
    Abstract: A semiconductor layer stack, a component made therefrom, a component module, and a production method is provided. The semiconductor layer stack has at least two layers (A, B), which, as individual layers, each have an energy position of the Fermi level in the semiconductor band gap, E F - E V < E G 2 applying to the layer (A) and E L - E F < E G 2 applying to the layer (B), with EF the energy position of the Fermi level, EV the energy position of the valence band, EL the energy position of a conduction band and EL?EV the energy difference of the semiconductor band gap EG, the thickness of the layers (A, B) being selected in such a way that a continuous space charge zone region over the layers (A, B) results.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: August 23, 2022
    Assignees: Otto-von-Guericke-Universitaet Magdeburg, AZUR SPACE Solar Power GmbH
    Inventors: Armin Dadgar, André Strittmatter
  • Patent number: 11411375
    Abstract: An edge emitting laser bar is disclosed. In an embodiment an edge-emitting laser bar includes an AlInGaN-based semiconductor layer sequence having a contact side and an active layer configured to generate laser radiation, a plurality of individual emitters arranged next to each other and spaced apart from one another in a lateral transverse direction, each emitter configured to emit laser radiation and a plurality of contact elements arranged next to each other and spaced apart from one another in the lateral transverse direction on the contact side for making electrical contact with the individual emitters, each contact element being assigned to an individual emitter, wherein each contact element is electrically conductively coupled to the semiconductor layer sequence via a contiguous contact region of the contact side so that a current flow between the semiconductor layer sequence and the contact element is possible via the contact region.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: August 9, 2022
    Assignee: OSRAM OLED GMBH
    Inventors: Alfred Lell, Muhammad Ali, Bernhard Stojetz, Harald Koenig
  • Patent number: 11406005
    Abstract: A substrate for mounting electronic element includes: a first substrate including a first surface and a second surface opposed thereto, the first substrate being made of an insulating material; a second substrate made of a carbon material; at least one surface metal layer located on the first surface, including at least one mounting portion for at least one electronic element; and a bonding metal layer on the second surface. Heat conduction of the second substrate in a direction perpendicular to a longitudinal direction of the at least one mounting portion is greater than heat conduction of the second substrate in the longitudinal direction of the at least one mounting portion, and a width of the bonding metal layer is greater than or equal to a maximum width of the at least one surface metal layer in a direction perpendicular to the longitudinal direction of the at least one mounting portion.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: August 2, 2022
    Assignee: KYOCERA CORPORATION
    Inventor: Noboru Kitazumi
  • Patent number: 11398715
    Abstract: A semiconductor light emitting device includes a substrate, and an array including three or more light emitting elements which are aligned above and along a main surface of a substrate and each emit light. The light emitting elements each include a clad layer of a first conductivity type, an active layer containing In, and a clad layer of a second conductivity type disposed above the substrate sequentially from the substrate. Among the light emitting elements, the compositional ratio of In in the active layer is smaller in the light emitting element located in a central area in an alignment direction than that in the light emitting elements located in both end areas in the alignment direction.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: July 26, 2022
    Assignee: PANASONIC HOLDINGS CORPORATION
    Inventors: Shinichiro Nozaki, Shinichi Takigawa
  • Patent number: 11393950
    Abstract: A light-emitting diode (LED) device includes a substrate, an epitaxial layered structure disposed on the substrate, a current-spreading layer disposed on the epitaxial layered structure, a current-blocking unit disposed on the current-spreading layer, and a distributed Bragg reflector. The epitaxial layered structure, the current-spreading layer and the current-blocking unit are covered by the distributed Bragg reflector. One of the current-spreading layer, the current-blocking unit, and a combination thereof has a patterned rough structure. A method for manufacturing the LED device is also disclosed.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: July 19, 2022
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jiangbin Zeng, Anhe He, Ling-Yuan Hong, Kang-Wei Peng, Su-Hui Lin, Chia-Hung Chang
  • Patent number: 11393948
    Abstract: Group III nitride light emitting diode (LED) structures with improved electrical performance are disclosed. A Group III nitride LED structure includes one or more n-type layers, one or more p-type layers, and an active region that includes a plurality of sequentially arranged barrier-well units. In certain embodiments, doping profiles of barrier layers of the barrier-well units are configured such that a doping concentration in some barrier-well units is different than a doping concentration in other barrier-well units. In certain embodiments, a doping profile of a particular barrier layer is non-uniform. In addition to active region configurations, the doping profiles and sequence of the n-type layers and p-type layers are configured to provide Group III nitride structures with higher efficiency, lower forward voltages, and improved forward voltage performance at elevated currents and temperatures.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: July 19, 2022
    Assignee: CreeLED, Inc.
    Inventors: Joseph G. Sokol, Jefferson W. Plummer, Caleb A. Kent, Thomas A. Kuhr, Robert David Schmidt
  • Patent number: 11362486
    Abstract: A vertical-cavity surface-emitting laser (VCSEL) is provided. The VCSEL includes a mesa structure disposed on a substrate. The mesa structure includes a first reflector, a second reflector, and an active cavity material structure disposed between the first and second reflectors. The second reflector has an opening extending from a second surface of the second reflector into the second reflector by a predetermined depth. Etching into the second reflector to the predetermined depth reduces the photon lifetime and the threshold gain of the VCSEL, while increasing the modulation bandwidth and maintaining the high reflectivity of the second reflector. Thus, etching the second reflector to the predetermined depth provides an improvement in overshoot control, broader modulation bandwidth, and faster pulsing of the VCSEL such that the VCSEL may provide a high speed, high bandwidth signal with controlled overshoot.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: June 14, 2022
    Assignee: Mellanox Technologies, Ltd.
    Inventors: Itshak Kalifa, Elad Mentovich
  • Patent number: 11327346
    Abstract: In one embodiment, an electro-optical modulator includes a waveguide having a first major surface and a second major surface opposite the first major surface. A cavity is disposed in the waveguide. Multiple quantum wells are disposed in the cavity.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: May 10, 2022
    Assignee: STMICROELECTRONICS (CROLLES 2) SAS
    Inventor: Charles Baudot
  • Patent number: 11322912
    Abstract: A semiconductor laser array includes: a plurality of semiconductor lasers configured to oscillate in a single mode at oscillation wavelengths different from one another, each semiconductor laser including an active layer including a multi-quantum well structure including a plurality of will layers and a plurality of barrier layers laminated alternately, and an n-side separate confinement heterostructure layer and p-side separate confinement heterostructure layer configured to sandwich the active layer therebetween in a thickness direction, band gap energies of the n-side separate confinement heterostructure layer and the p-side separate confinement heterostructure layer being greater than band gap energies of the barrier layers of the active layer. The active layer is doped with an n-type impurity.
    Type: Grant
    Filed: June 21, 2016
    Date of Patent: May 3, 2022
    Assignee: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Akira Itoh, Junji Yoshida, Kazuaki Kiyota
  • Patent number: 11309298
    Abstract: A light-emitting diode device with a driving mechanism is provided. A first light-emitting diode chip, a second light-emitting diode chip and a third light-emitting diode chip are arranged on a driver circuit chip, and respectively configured to emit red light, green light and blue light. A first contact of the light-emitting diode chip, a first contact of the second light-emitting diode chip and a first contact of the third light-emitting diode chip are respectively in direct electrical contact with a first output contact, a second output contact and a third output contact of the driver circuit chip in a flip-chip manner. A second contact of the first light-emitting diode chip, a second contact of the second light-emitting diode chip and a second contact of the third light-emitting diode chip are in direct electrical contact with a common contact of the driver circuit chip.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: April 19, 2022
    Assignee: MY-SEMI INC.
    Inventors: Cheng-Han Hsieh, Kuo-Lun Huang, Chun-Ting Kuo
  • Patent number: 11289876
    Abstract: Disclosed is an optically pumped vertical cavity laser structure operating in the mid-infrared region, which has demonstrated room-temperature continuous wave operation. This structure uses a periodic gain active region with type I quantum wells comprised of InGaAsSb, and barrier/cladding regions which provide strong hole confinement and substantial pump absorption. A preferred embodiment includes at least one wafer bonded GaAs-based mirror. Several preferred embodiments also include means for wavelength tuning of mid-IR VCLs as disclosed, including a MEMS-tuning element. This document also includes systems for optical spectroscopy using the VCL as disclosed, including systems for detection concentrations of industrial and environmentally important gases.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: March 29, 2022
    Assignees: Thorlabs, Inc., Praevium Research, Inc.
    Inventors: Vijaysekhar Jayaraman, Kevin Lascola, Stephen Segal, Fredrick Towner, Alex Cable
  • Patent number: 11276988
    Abstract: A semiconductor optical device that achieves both of heat dissipation and light confinement and permits efficient current injection or application of an electric field is implemented. The semiconductor optical device includes: a core layer including an active region (1) made of a compound semiconductor; two cladding layers (5, 6) injecting current into the core layer; and a third cladding layer (4) made of a material having a larger thermal conductivity, a smaller refractive index, and a larger band gap than a material for any of the core layer and the two cladding layers.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: March 15, 2022
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Ryo Nakao, Takaaki Kakitsuka, Shinji Matsuo
  • Patent number: 11271368
    Abstract: A semiconductor laser according to one embodiment of the present disclosure includes a semiconductor stack. The semiconductor stack includes, in the following order, a first cladding layer, an active layer, one or a plurality of low-concentration impurity layers, a contact layer, and a second cladding layer that includes a transparent conductive material. The semiconductor stack further has, in a portion including the contact layer, a ridge extending in a stacked in-plane direction. Each low-concentration impurity layer has an impurity concentration of 5.0×1017 cm?3 or less, and a total thickness of the low-concentration impurity layer is 250 nm or more and 1000 nm or less. A distance between the second cladding layer and the low-concentration impurity layer closest to the second cladding layer is 150 nm or less.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: March 8, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kota Tokuda, Hideki Watanabe, Takayuki Kawasumi
  • Patent number: 11258231
    Abstract: A GaN-based VCSEL chip based on porous DBR and a manufacturing method of the same, wherein the chip includes: a substrate; a buffer layer formed on the substrate; a bottom porous DBR layer formed on the buffer layer; an n-type doped GaN layer formed on the bottom porous DBR layer, which is etched downward on its periphery to form a mesa; an active layer formed on the n-type doped GaN layer; an electron blocking layer formed on the active layer; a p-type doped GaN layer formed on the electron blocking layer; a current limiting layer formed on the p-type doped GaN layer with a current window formed at a center thereof, wherein the current limiting layer covers sidewalls of the active layer, the electron blocking layer and the convex portion of the n-type doped GaN layer; a transparent electrode formed on the p-type doped GaN layer; an n-electrode formed on the mesa of the n-type doped GaN layer; a p-electrode formed on the transparent electrode with a recess formed therein; and a dielectric DBR layer formed on
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: February 22, 2022
    Assignee: Institute of Semiconductors, Chinese Academy of Sciences
    Inventors: Lixia Zhao, Chao Yang, Lei Liu, Jing Li, Kaiyou Wang, Hongda Chen
  • Patent number: 11256047
    Abstract: An optical assembly includes a carrier plate, a light emitting element and a lens component disposed on the carrier plate, and a securing block. The securing block has a first surface and a light-passing portion that are located on an optical path of an output light from the light emitting element. The lens component includes a lens portion and a connecting portion. The lens portion is located on the optical path. The connecting portion has a second surface facing the first surface of the securing block. A bottom surface of the securing block is bonded to the carrier plate. The lens component is secured onto the carrier plate by means of bonding between the second surface and the first surface of the securing block. A clearance space is present between the lens portion and the light-passing portion so that the lens portion does not contact the securing block.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: February 22, 2022
    Assignee: InnoLight Technology (Suzhou) Ltd.
    Inventors: Long Chen, Dengqun Yu, Donghan Wang, Yuzhou Sun
  • Patent number: 11245248
    Abstract: A semiconductor laser includes a semiconductor layer including end faces and at least one of the end faces is configured as a light emission end face. The semiconductor layer includes a waveguide and a light window structure region. The waveguide has a first width and is extended between the end faces. The light window structure region includes an opening having a second width greater than the first width arranged along the waveguide and is formed continuously or intermittently from one to another of the end faces.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: February 8, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Shinya Satou, Hideto Iki
  • Patent number: 11228160
    Abstract: An AlGaInPAs-based semiconductor laser device includes a substrate, an n-type clad layer, an n-type guide layer, an active layer, a p-type guide layer composed of AlGaInP containing Mg as a dopant, a p-type clad layer composed of AlInP containing Mg as a dopant, and a p-type cap layer composed of GaAs. Further, the semiconductor laser device has, between the p-type guide layer and the p-type clad layer, a Mg-atomic concentration peak which suppresses inflow of electrons, moving from the n-type clad layer to the active layer, into the p-type guide layer or the p-type clad layer.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: January 18, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kazuhiko Wada, Ryuhichi Sogabe
  • Patent number: 11217964
    Abstract: There is disclosed in one example a fiberoptic communication device, including: a modulator to modulate data onto a laser pulse; and a semiconductor laser source including an active optical waveguide to provide optical gain and support an optical mode, the laser source further including a V-shaped current channel superimposed on the optical waveguide, and disposed to feed the active optical waveguide with electrical current along its length, the current channel having a proximate end to the optical mode, the proximate end having a width substantially matching a diameter of the optical mode, and a removed end from the optical mode, wherein the removed end is substantially wider than the proximate end.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: January 4, 2022
    Assignee: Intel Corporation
    Inventors: Pierre Doussiere, George A. Ghiurcan, Jonathan K. Doylend, Harel Frish
  • Patent number: 11211769
    Abstract: A front facet of the semiconductor laser device includes a resonator facet portion containing an end of an active layer, and a protruding portion which protrudes beyond the resonator facet portion in a resonator length direction by a predetermined protrusion amount and has a stepped bottom surface portion. The resonator facet portion and the stepped bottom surface portion are connected to each other to form a corner portion. The distance from a thickness center position of the active layer to the stepped bottom surface portion is defined by a bottom surface portion depth. The bottom surface portion depth is set to be equal to a predetermined specific depth or deeper than the specific depth.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: December 28, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventor: Naoki Nakamura
  • Patent number: 11196232
    Abstract: A modulation doped semiconductor laser includes a multiple quantum well composed of a plurality of layers including a plurality of first layers and a plurality of second layers stacked alternately and including an acceptor and a donor; a p-type semiconductor layer in contact with an uppermost layer of the plurality of layers; and an n-type semiconductor layer in contact with a lowermost layer of the plurality of layers, the plurality of first layers including the acceptor so that a p-type carrier concentration is 10% or more and 150% or less of the p-type semiconductor layer, the plurality of second layers containing the acceptor so that the p-type carrier concentration is 10% or more and 150% or less of the p-type semiconductor layer, the plurality of second layers containing the donor, and an effective carrier concentration corresponding to a difference between the p-type carrier concentration and an n-type carrier concentration is 10% or less of the p-type carrier concentration of the plurality of second l
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: December 7, 2021
    Assignee: Lumentum Japan, Inc.
    Inventors: Takayuki Nakajima, Atsushi Nakamura, Yuji Sekino
  • Patent number: 11177634
    Abstract: A gallium and nitrogen containing laser diode device. The device has a gallium and nitrogen containing substrate material comprising a surface region. The surface region is configured on either a non-polar crystal orientation or a semi-polar crystal orientation. The device has a recessed region formed within a second region of the substrate material, the second region being between a first region and a third region. The recessed region is configured to block a plurality of defects from migrating from the first region to the third region. The device has an epitaxially formed gallium and nitrogen containing region formed overlying the third region. The epitaxially formed gallium and nitrogen containing region is substantially free from defects migrating from the first region and an active region formed overlying the third region.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: November 16, 2021
    Assignee: KYOCERA SLD Laser, Inc.
    Inventors: Melvin McLaurin, James W. Raring, Christiane Elsass, Thiago P. Melo, Mathew C. Schmidt
  • Patent number: 11158995
    Abstract: A laser diode is provided, including at least a defect blocking layer deposited between the GaAs substrate and the active layer, so that the crystal defects of the GaAs substrate can be blocked or reduced from propagation to the active layer when the epitaxial layer is formed on the GaAs substrate. As such, the crystal quality of the active layer can be improved, thereby improving the reliability and optical property of the laser diode.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: October 26, 2021
    Assignee: VISUAL PHOTONICS EPITAXY CO., LTD.
    Inventors: Yu-Chung Chin, Chao-Hsing Huang, Van-Truong Dai
  • Patent number: 11158775
    Abstract: In an embodiment, a method includes: connecting a light emitting diode to a substrate; encapsulating the light emitting diode with a photosensitive encapsulant; forming a first opening through the photosensitive encapsulant adjacent the light emitting diode; and forming a conductive via in the first opening.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: October 26, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Keng-Han Lin, Hung-Jui Kuo, Hui-Jung Tsai
  • Patent number: 11145783
    Abstract: An optoelectronic semiconductor component is specified which comprises a semiconductor layer sequence having a first and a second semiconductor layer of a first conductivity type, an active layer designed for generating electromagnetic radiation, a first electrical terminal layer and a second electrical terminal layer laterally spaced therefrom which electrically contacts the second semiconductor layer, and a first contact zone of a second conductivity type which adjoins the first electrical terminal layer and is electrically conductively connected to the first electrical terminal layer. And at least one functional region formed between the first and second terminal layers, in which a second contact zone of a second conductivity type and at least one shielding zone of a second conductivity type is formed. Furthermore, a method for producing the optoelectronic semiconductor component is specified.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: October 12, 2021
    Assignee: OSRAM OLED GMBH
    Inventor: Petrus Sundgren
  • Patent number: 11137557
    Abstract: An optical assembly includes a base plate, a light transmitting component arranged on the base plate, a lens component arranged on the base plate along an optical path of light transmitted from the light transmitting component, a supporting member, and an auxiliary member. The supporting member includes a bottom surface that bonds to the base plate and a side surface that connects to the auxiliary member. The auxiliary member includes a side surface on which the lens component is disposed and a bonding surface that bonds to the side surface of the supporting member. The lens component is configured to focus and couple, or collimate, an optical signal transmitted from the light transmitting component. A bottom surface of the auxiliary member and a bottom surface of the lens component are both higher than the top surface of the base plate.
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: October 5, 2021
    Assignee: InnoLight Technology (Suzhou) Ltd.
    Inventor: Long Chen
  • Patent number: 11133649
    Abstract: A laser includes an active region surrounded by first and second waveguide layers. Two or more mask openings are formed within a dielectric layer on a surface parallel to the active region. A refractive grating is formed on the dielectric mask openings and includes three-dimensional grating features spaced apart in the light-propagation direction of the laser. The refractive grating provides modulation of a real part of the effective refractive index of the laser and modulation of the imaginary part is provided by modulation of the current flow through the mask openings.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: September 28, 2021
    Assignee: Palo Alto Research Center Incorporated
    Inventor: Thomas Wunderer
  • Patent number: 11127424
    Abstract: A light source-unit includes a laser diode, a sub-mount which the laser diode is joined. The laser diode includes an optical generating layer including an active layer which emits laser-light and cladding layers being formed so as to sandwich the active layer. The active layer includes a quantum dot layer including a plurality of quantum dots, which respectively confine movements of carriers in the three-dimensional directions.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: September 21, 2021
    Assignee: SAE Magnetics (H.K.) Ltd.
    Inventors: Kang Gao, Seiichi Takayama, Ryo Hosoi, Ryuji Fujii
  • Patent number: 11121525
    Abstract: A quantum cascade laser including: a laser structure having a first region including a first facet, a second region including a second facet, an epitaxial surface, and a substrate surface; an insulating film disposed on the second facet and the epitaxial surface; an electrode disposed on the epitaxial surface and the insulating film and in contact with the epitaxial surface; and a metal film disposed over the second facet and the epitaxial surface and separated from the electrode and the substrate surface. The insulating film is disposed between the metal film and the second facet and between the metal film and the epitaxial surface. The second region includes a semiconductor mesa. The second facet is located at a boundary between the first region and the second region. The first region includes a connecting surface. The connecting surface connects the second facet to the first facet.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: September 14, 2021
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Jun-ichi Hashimoto
  • Patent number: 11121523
    Abstract: A semiconductor heterostructure device includes a middle layer including an inner conducting channel and an outer current blocking region. A depleted heterojunction current blocking region (DHCBR) is within the outer current blocking region. The DHCBR includes a first depleting impurity specie including a Column II acceptor, and a second depleting impurity comprising oxygen which increases a depletion of the DHCBR so that the DHCBR forces current to flow into the conducting channel during electrical biasing under normal operation of the semiconductor heterostructure device.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: September 14, 2021
    Assignee: University of Central Florida Research Foundation, Inc.
    Inventor: Dennis G. Deppe
  • Patent number: 11114822
    Abstract: According to one embodiment, an optical semiconductor element includes a substrate, a light emitting layer, and a distributed Bragg reflector. The light emitting layer includes an AlGaAs multi quantum well layer. The distributed Bragg reflector is provided between the substrate and the light emitting layer. A pair of a first layer and a second layer is periodically stacked in the distributed Bragg reflector. The first layer includes AlxGa1-xAs. The second layer includes Inz(AlyGa1-y)1-zP. A refractive index n1 of the first layer is higher than a refractive index n2 of the second layer. The first layer has a thickness larger than ?0/(4n1) where ?0 is a center wavelength of a band on wavelength distribution of a reflectivity of the distributed Bragg reflector. The second layer has a thickness smaller than ?0/(4n2).
    Type: Grant
    Filed: February 13, 2020
    Date of Patent: September 7, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Masanobu Iwamoto, Hideto Sugawara, Kenji Isomoto
  • Patent number: 11108213
    Abstract: A light modulation element according to example embodiments includes a substrate; a first lower DBR layer on the substrate including a first material layer alternately stacked with a second material layer having a different refractive index from the first material layer; a second lower DBR layer on the first lower DBR layer with a surface area less than the first lower DBR layer and including a third material layer alternately stacked with a fourth material layer having a different refractive index from the third material layer; an active layer on the second lower DBR layer, including a semiconductor material having a multi-quantum well structure and having a refractive index that varies according to an applied voltage; and an upper DBR layer on the active layer including a fifth material layer alternately stacked with a sixth material layer having a different refractive index from the fifth material layer.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: August 31, 2021
    Assignees: SAMSUNG ELECTRONICS CO., LTD., CALIFORNIA INSTITUTE OF TECHNOLOGY
    Inventors: Duhyun Lee, Muhammad Alam, Ghazaleh Kafaie Shirmanesh, Harry Atwater, Pin Chieh Wu, Ragip Pala
  • Patent number: 11088512
    Abstract: This invention aims at providing a nitride semiconductor causing no element breakdown even in driving under a high current density. A nitride semiconductor element is provided with a nitride semiconductor active layer made of AlxGa(1-x)N and a composition change layer made above the nitride semiconductor active layer and made of Alx3Ga(1-x3)N in which an Al composition ratio x3 decreases in a direction away from the nitride semiconductor active layer.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: August 10, 2021
    Assignee: Asahi Kasei Kabushiki Kaisha
    Inventors: Kosuke Sato, Motoaki Iwaya, Shinji Yasue, Yuya Ogino
  • Patent number: 11085130
    Abstract: A method for producing at least one type of nanostructures comprises the following steps: partially covering a surface of a single-crystal layer or multilayer structure with a discontinuous mask, forming discrete islets having at least one submicrometric lateral dimension and made of a material having an evaporation temperature above that of the layer or multilayer structure; and heating the layer or multilayer structure under vacuum to a so-called etching temperature, above the evaporation temperature of the layer or multilayer structure but below that of the mask, so as to cause evaporation of the layer or multilayer structure outside of the regions covered by the mask. Structures that may be produced by such a method are also provided.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: August 10, 2021
    Assignee: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
    Inventors: Stéphane Vezian, Benjamin Damilano, Julien Brault
  • Patent number: 11073738
    Abstract: Methods and systems for a vertical junction high-speed phase modulator are disclosed and may include a semiconductor device having a semiconductor waveguide including a slab section, a rib section extending above the slab section, and raised ridges extending above the slab section on both sides of the rib section. The semiconductor device has a vertical pn junction with p-doped material and n-doped material arranged vertically with respect to each other in the rib and slab sections. The rib section may be either fully n-doped or p-doped in each cross-section along the semiconductor waveguide. Electrical connection to the p-doped and n-doped material may be enabled by forming contacts on the raised ridges, and electrical connection may be provided to the rib section from one of the contacts via periodically arranged sections of the semiconductor waveguide, where a cross-section of both the rib section and the slab section in the periodically arranged sections may be fully n-doped or fully p-doped.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: July 27, 2021
    Assignee: Luxtera LLC
    Inventors: Attila Mekis, Subal Sahni, Yannick De Koninck, Gianlorenzo Masini, Faezeh Gholami
  • Patent number: 11060851
    Abstract: An optoelectronic device includes a semiconductor substrate and a monolithic array of light-emitting elements, including first and second sets of the light-emitting elements arranged on the substrate in respective first and second two-dimensional patterns, which are interleaved on the substrate. First and second conductors are respectively connected to separately drive the first and second sets of the light-emitting elements so that the device selectably emits light in either or both of the first and second patterns.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: July 13, 2021
    Assignee: APPLE INC.
    Inventors: Benny Pesach, Zafrir Mor
  • Patent number: 11054574
    Abstract: The methods of singulating an optical waveguide sheet that supports sheet optical waveguides include irradiating the optical waveguide sheet with a focused laser beam comprising ultrafast light pulses to form within the body of the optical waveguide sheet modified regions, which along with unmodified regions, that define a singulation line. The modified regions define modified sections that are spaced apart by the unmodified sections, which reside at locations of the sheet optical waveguides. The optical waveguide sheet is separated along the singulation line to form an optical waveguide substrate with substrate waveguides formed by sections of the sheet optical waveguides. The optical waveguide substrate has an end face with both smooth and rough sections. The substrate waveguides have end surfaces that terminate at the smooth sections, thereby enabling low-loss optical coupling to other optical components.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: July 6, 2021
    Assignee: Corning Research & Development Corporation
    Inventors: Lars Martin Otfried Brusberg, Davide Domenico Fortusini, Jason Grenier, Sergio Tsuda, Kristopher Allen Wieland