Abstract: An equalization method has been developed for low latency, low bandwidth wireless communication channel environments. With this method, an exact copy, nearly exact copy, or some facsimile of a message (or associated information), which was transmitted via a low latency, low bandwidth wireless communication channel, is also sent via a backend communication channel such as a fiber optic network. Equalization is generally performed by comparing the originally received message to the copy sent via the backend channel. The original message can incorporate an added channel delay to compensate for the time delay between the primary wireless channel and the backend channel.

Abstract: Methods and apparatus in a multi-carrier cellular wireless network with random access improve receiving reliability and reduce interference of uplink orthogonal frequency division multiplex (OFDM) signals of a random access, while improving the detection performance of a base station receiver by employing specifically configured ranging signals. The OFDM signals of the random access are transmitted in a at least one block indicated in configuration information. Uplink signals are transmitted with a timing adjusted based on a received time advance and a power adjusted based on a received power adjustment.

Abstract: A method includes receiving an input signal at a filter, where the filter includes a plurality of filter taps, and where each of a first filter tap and a second filter tap has a weighting coefficient. The method also includes shutting down the first filter tap based on the weighting coefficient of the first filter tap being below a threshold and the weighting coefficient of the second filter tap being below the threshold, where the second filter tap is next to the first filter tap.

Abstract: Methods and systems are described for generating a time-varying information signal at an output of a continuous time linear equalizer (CTLE), asynchronously sampling a data signal according to a sampling clock having a frequency less than a data rate of the data signal; generating corresponding pattern-verified samples for at least two data patterns, each of the at least two data patterns having a respective frequency content; determining corresponding frequency-specific voltage measurements associated with each of the at least two data patterns based on the corresponding pattern-verified samples of the at least two data patterns; and adjusting an equalization of the data signal based on a comparison of the corresponding frequency-specific voltage measurements.

Abstract: The present disclosure relates to an apparatus and method for continuous time linear equalization. Embodiments include determining, using a decision feedback equalization (“DFE”) training block, a voltage value for one or more resistor values. Embodiments may further include determining, using the DFE training block, a voltage value for one or more capacitor values and identifying a voltage difference between the voltage value for one or more resistor values and the voltage value for one or more capacitor values. Embodiments may further include iteratively performing the determining of the voltage value and identifying of the voltage difference for each of the plurality of capacitor values until the voltage difference is at one or more minimum values to generate one or more optimal resistor and capacitor coefficients for a continuous time linear equalization filter.

Abstract: In some embodiments, a bandwidth constrained equalized transport (BCET) communication system comprises a transmitter that transmits a signal, a communication channel that transports the signal, and a receiver that receives the signal. The transmitter can comprise a pulse-shaping filter that intentionally introduces memory into the signal, and an error control code encoder that is a low-density parity-check (LDPC) error control code encoder. The error control encoder comprises code that is optimized based on the intentionally introduced memory into the signal, a code rate, a signal-to-noise ratio, and an equalizer structure in the receiver. In some embodiments, the communication system is bandwidth constrained, and the transmitted signal comprises an information rate that is higher than for an equivalent system without intentional introduction of the memory at the transmitter.

Abstract: A semiconductor apparatus may include a first semiconductor apparatus configured to transmit a first input signal as first data in synchronization with a first edge of a first clock signal having a first frequency. The semiconductor apparatus may also include a second semiconductor apparatus including: a first storage unit, configured to receive the first data as a set signal and output a second input signal as an internal signal in synchronization with a first edge of a second clock signal having a second frequency; and a second storage unit, configured to output the internal signal as second data in synchronization with a second edge of the second clock signal.

Abstract: A data receiver circuit includes a summer circuit configured to receive an input signal that encodes multiple data symbols, and combine the input signal with a feedback signal to generate an equalized input signal, which is used to generate a clock signal. The data receiver circuit also includes multiple data slicer circuits that sample, using the clock signal and multiple voltage offsets, to generate multiple samples for a particular data symbol. A precursor compensation circuit included in the data receiver circuit may generate an output value for the particular data symbol using the multiple samples. The data receiver circuit also includes a post cursor compensation circuit that generates the feedback signal using at least one of the multiple samples and a value of a previously received sample.

Abstract: Selection of equalization coefficients to configure a communications link between a receiver in a host system and a transmitter in an optical or electrical communication module is performed by a management entity with access to management registers in the receiver and transmitter. Continuous modification of the selected equalization coefficients is enabled on the communications link after the communications link is established to handle varying operating conditions such as temperature and humidity.

Abstract: An example method may include a processing system of a channel sounding receiver having a processor receiving from a base station, at a location, a channel sounding waveform via a plurality of carriers, sampling the channel sounding waveform via the plurality of carriers to generate a plurality of per-carrier time domain sample sets, and processing the plurality of per-carrier time domain sample sets via a plurality of discrete Fourier transform modules to provide a plurality of per-carrier frequency domain sample sets. The method may further include the processing system aligning the plurality of per-carrier frequency domain sample sets in gain and phase to provide a combined frequency domain sample set and measuring a channel property at the location based upon the combined frequency domain sample set.

Abstract: An illustrative short, high-rate communications link includes a serializer that provides a signal having a symbol rate of at least 10 GHz; and a deserializer that receives the signal via a printed circuit board (“PCB”) trace coupled to the serializer with a first impedance mismatch and coupled to the deserializer with a second impedance mismatch. At least one of the serializer and deserializer includes an equalizer that attenuates a frequency component of the signal at half of the symbol rate relative to a frequency component of the signal at one third of the symbol rate. Though such attenuation may reduce signal-to-noise ratio, an improved communications performance may nevertheless be achieved by suppression of signal reflections.

Abstract: A continuous time linear equalization (CTLE) circuit is disclosed. The CTLE circuit includes a passive CTLE circuit and an active CTLE circuit. The active CTLE circuit includes a differential transistor pair and the output of the passive CTLE is configured to drive gates or bases of the differential transistor pair.

Abstract: A system and method for detecting a scrambling seed in communication between a drone and a controller are described. The system comprises a radio-frequency (RF) receiver configured to receive an RF signal transmitted between the drone and a controller. The RF signal includes scrambled data that contain repetitions of unscrambled data based on known scramblers with an unknown scrambling seed. The system further comprises a memory device in communication with a hardware processor and having stored computer-executable instructions to cause the hardware processor to identify the smallest number of bits required in each segment of scrambled data for data combining by finding an invertible predetermined matrix. The hardware processor is configured to determine the unknown scrambling seed based on a function combining the predetermined matrix, transition matrices of scramblers, and segments of received scrambled data.

Abstract: A method and structure for equalization in coherent optical receivers. Block-based LMS (BLMS) algorithm is one of the many efficient adaptive equalization algorithms used to (i) increase convergence speed and (ii) reduce implementation complexity. Since the computation of the equalizer output and the gradient of the error are obtained using a linear convolution, BLMS can be efficiently implemented in the frequency domain with the constrained frequency-domain BLMS (FBLMS) adaptive algorithm. The present invention introduces a novel reduced complexity constrained FBLMS algorithm. This new approach replaces the two discrete Fourier transform (DFT) stages required to evaluate the DFT of the gradient error, by a simple frequency domain filtering. Implementation complexity can be drastically reduced in comparison to the standard constrained FBLMS. Furthermore, the new approach achieves better performance than that obtained with the unconstrained FBLMS in ultra-high speed coherent optical receivers.

Abstract: A wired communication system includes a bidirectional channel for sending information in one direction at a high bandwidth and sending control information for configuring a transmitter in the other direction at a lower bandwidth. Embodiments of the disclosure may use a primary transmitter output stage in the transmitter and a primary receiver input stage in the receiver to send and receive data or a clock, for example. An auxiliary transmitter output stage in the receiver and auxiliary receiver input stage in the transmitter send and receive control information for configuring the transmitter to efficiently send data over a wired channel.

Abstract: An adaptive equalizer and automatic gain controller is disclosed. The adaptive equalizer and automatic gain controller includes a programmable continuous time linear equalizer (CTLE). The CTLE includes a control port to receive a control signal to adjust a frequency response of the CTLE. The adaptive equalizer and automatic gain controller also includes a power comparator coupled with an output of the CTLE and a controller coupled with the power comparator and the control port and configured to generate the control signal for the CTLE based on the output of the power comparator. The power comparator is configured to compare power of a low frequency part and a high frequency part of an output signal of the CTLE.

Abstract: A reception device includes an equalization processing unit including a linear filter unit and a nonlinear filter unit and performing equalization process on a reception signal; a linear propagation channel estimation unit making propagation channel estimation using a known signal included in a reception signal to calculate a filter coefficient of the linear filter unit; and a synchronization processing unit performing synchronization process of correcting frequency deviation based on a signal output by the equalization processing unit, and when a predetermined condition is satisfied after executing first equalization process of outputting a reception signal filtered by the linear filter unit to the synchronization processing unit, the equalization processing unit starts second equalization process that is an adaptive equalization process of outputting a result of addition of a reception signal filtered by the linear filter unit and a reception signal filtered by the nonlinear filter unit to the synchronizati

Abstract: Equalization methods and equalizers employing discrete-time filters are provided with dynamic perturbation effect based adaptation. Tap coefficient values may be individually perturbed during the equalization process and the effects on residual ISI monitored to estimate gradient components or rows of a difference matrix. The gradient or difference matrix components may be assembled and filtered to obtain components suitable for calculating tap coefficient updates with reduced adaptation noise. The dynamic perturbation effect based updates may be interpolated with precalculated perturbation effect based updates to enable faster convergence with better accommodation of analog component performance changes attributable to variations in process, supply voltage, and temperature.

Abstract: The present disclosure relates to a method and an apparatus for reducing or eliminating interferences between resource blocks in a transmitter and/or a receiver of a filter bank multicarrier system is provided. According to at least one embodiment, the method comprises performing discrete Fourier transform (DFT) on a data symbol vector to be transmitted thereby generating a DFT-spread data symbol vector, performing a cyclic shift operation on the DFT-spread data symbol vector to arrange a small magnitude element of the DFT-spread data symbol vector at an edge of a resource block allocated to the DFT-spread data symbol vector, and performing filter bank multicarrier (FBMC) modulation on a cyclically shifted DFT-spread data symbol vector.

Abstract: Facilitating sparsity adaptive feedback in the delay doppler domain in advanced networks (e.g., 4G, 5G, 6G, and beyond) is provided herein. Operations of a method can comprise determining, by a first device comprising a processor, a channel covariance matrix in a time-frequency domain based on a channel estimation associated with reference signals received from a second device. The method also can comprise decomposing, by the first device, the channel covariance matrix into a group of component matrices. Further, the method can comprise transforming, by the first device, respective matrices of the group of component matrices into respective covariance matrices in a delay doppler domain. The method also can comprise determining, by the first device, channel state information feedback in the delay doppler domain.

Abstract: A continuous time linear equalizer (CTLE) is disclosed. The CTLE may include a first cell configured to buffer and invert an input signal and generate a first intermediate signal, a second cell configured to buffer and invert the input signal and generate a second intermediate signal, and a first frequency section configured to selectively buffer and invert a first range of frequencies of the second intermediate signal. The first frequency section may include a first tunable resistor configured to provide a first resistance and a third cell coupled to the first tunable resistor configured to generate a third intermediate signal based on the first resistance.

Abstract: An equalizer can connect with N receiving antennas that receive single carrier transmission signals transmitted from M transmitting antenna(s) in the same frequency band at the same time, and receives as input L signals sampled in a sampling period T from each of the N receiving antennas, the equalizer comprising, a first selection part that selects K signal(s) from the L signals for each of the N receiving antennas as signals to be multiplied by a first tap coefficient(s), and a second selection part selects L-K signal(s) to be multiplied by a second tap coefficient(s), from the L signals obtained by multiplying signals in the same sampling period for each of the N receiving antennas by the tap coefficient(s) and performing addition thereof.

Abstract: A serial receiver combines continuous-time equalization, analog interleaving, and discrete-time gain for rapid, efficient data reception and quantization of a serial, continuous-time signal. A continuous-time equalizer equalizes a received signal. A number N of time-interleaved analog samplers sample the equalized continuous-time signal to provide N streams of analog samples transitioning at rate reduced by 1/N relative to the received signal. A set of N discrete-time variable-gain amplifiers amplify respective streams of analog samples. A quantizer then quantizes the amplified streams of analog samples to produce a digital signal.

Abstract: A transceiver architecture supports high-speed communication over a signal lane that extends between a high-performance integrated circuit (IC) and one or more relatively low-performance ICs employing less sophisticated transmitters and receivers. The architecture compensates for performance asymmetry between ICs communicating over a bidirectional lane by instantiating relatively complex transmit and receive equalization circuitry on the higher-performance side of the lane. Both the transmit and receive equalization filter coefficients in the higher-performance IC may be adaptively updated based upon the signal response at the receiver of the higher-performance IC.

Abstract: A method for transmitting a signal by a first apparatus in a wireless communication system, includes receiving a known signal, performing, on a carrier configured in an unlicensed band, a channel sensing based on cancelling a first value from power detected during a predetermined time interval related to the channel sensing and after the carrier is determined to be idle based on the channel sensing, transmitting, on the carrier, the signal, wherein the first value is determined based on reception power of the known signal and a cancellation ratio.

Abstract: A method of operating a wireline receiver. The receiver may include a front-end comparator and a feedback controller. The method may include providing, by the front-end comparator, a symbol signal by processing a received electrical input signal according to a tunable timing characteristic of the front-end comparator. The method may further include adapting, by the feedback controller, the processing of the input signal to match a predetermined processing criterion by tuning the timing characteristic based on the symbol signal.

Abstract: An integrated circuit for generating an equalized signal, according to a channel, from serial data includes a shift register that extracts a symbol sequence from the serial data. A data storage stores values of an equalized digital signal corresponding to potential symbol sequences corresponding to a filter coefficient sequence. A lookup table outputs the equalized digital signal of a value corresponding to the extracted symbol sequence. A digital-to-analog converter (DAC) converts the equalized digital signal into the equalized signal. A controller refreshes the lookup table, based on at least one of values stored in the data storage and values included in the lookup table, in response to a control signal.

Abstract: A system for data communications, comprising an upstream component configured to select an in-band peripheral component interconnect express (PCIe) equalization procedure or an out-of-band PCIe equalization procedure and a downstream component configured to respond to the selected one of the in-band PCIe equalization procedure or the out-of-band PCIe equalization procedure to enable PCIe communications with the upstream component.

Abstract: Disclosed herein are a signal-multiplexing apparatus and method based on machine learning. The signal-multiplexing method based on machine learning, performed by a signal-multiplexing apparatus based on machine learning, including training a transmitted signal using a machine-learning technique, performing complex mapping to transmit the transmitted signal as multiple signals, receiving the multiple signals and regularizing the multiple signals based on a preset rule corresponding to the machine-learning technique, outputting an estimated value for the transmitted signal by training regularized multiple signals using the machine-learning technique, calculating a difference between the transmitted signal and the estimated value for the transmitted signal, and detecting the transmitted signal from an output value when the difference is less than or equal to a preset value.

Abstract: A data receiver configured to receive a signal having at least two partial data packets, the data receiver being configured to estimate a state of a transmission channel, to obtain first channel state information, to demodulate a first set of received symbols from different data packets, to obtain a first set of received encoded bits, wherein the data receiver is configured to decode the first set of received encoded bits to determine, a first set of estimated encoded bits which corresponds more likely to a first set of transmitted encoded bits than the received encoded bits, and to map the first set of estimated bits to estimated transmission symbols using a mapping rule matching a transmitter-side mapping rule to obtain a first set of estimated transmission symbols, and to determine second channel state information using the first set of estimated transmission symbols.

Abstract: At least some aspects of the present disclosure provide for a method. In at least one example, the method includes applying first equalization to a received data signal to generate an equalizer signal and comparing the equalized signal to each of a plurality of reference voltages for a predetermined period of time per respective reference voltage to generate a comparison result. The method further includes determining a plurality of counts with each count of the plurality of counts uniquely corresponding to a number of rising edges in the comparison result for each of the plurality of reference voltages. The method further includes comparing at least one of the plurality of counts to at least another of the plurality of counts to determine a relationship among the plurality of counts and applying second equalization to the received data signal based on the determined relationship among the plurality of counts.

Abstract: An illustrative SerDes (serializer-deserializer) communications method embodiment may include a transceiver: selecting one of multiple registers to specify initial pre-equalizer coefficient values; updating the initial pre-equalizer coefficient values during a training phase; and using the updated pre-equalizer coefficient values to convey a transmit data stream. In an illustrative embodiment of a chip-to-module communications link, a port connector couples a port transceiver to a pluggable module transceiver, the pluggable module transceiver including: one or more transmit filters to each pre-equalize a corresponding serial symbol stream being transmitted to the port transceiver; and a controller having multiple registers, each of the multiple registers containing a set of initial coefficient values, the controller using one of the registers to set initial coefficient values for the one or more transmit filters.

Abstract: A restraint control module is provided in this disclosure. The restraint control module is configured to communicate a sync pulse to a sensor. The control module may include a sync pulse driver circuit and a memory. The memory may store the waveform profile of a sync pulse. The sync pulse driver circuit generates a sync pulse in response to the waveform profile stored in the memory. The sync pulse may be transmitted to one or more sensors. The waveform profile stored in the memory may be derived from a sync pulse with reduced electro-magnetic emissions by applying spectrum analysis.

Abstract: A method for determining a localization parameter of an object includes generating a plurality of estimates of a first frequency-domain amplitude of a baseband signal from the object, each estimate corresponding one of a plurality of temporal segments of the baseband signal. The method also includes determining the first frequency-domain amplitude as most common value of the plurality of estimates, and determining the localization parameter therefrom. A localization system includes a memory and a microprocessor. The memory stores instructions and is configured to store a baseband signal having a temporal frequency component and a corresponding first frequency-domain amplitude. The microprocessor is adapted to execute the instructions to: (i) generate a plurality of estimates of the first frequency-domain amplitude each corresponding to a respective one of a plurality of temporal segments of the baseband signal, and (ii) determine the first frequency-domain amplitude as the most common value of the estimates.

Abstract: An illustrative SerDes receiver includes: a front-end filter, a precomputation unit, a selection element, and a controller. The front end filter converts a receive signal into a linearly-equalized signal. The precomputation unit accepts the linearly-equalized signal with or without a subtracted feedback signal, and employs a set of comparators with threshold values that depend on a first post-cursor ISI value F1, the set of comparators operating to generate a set of tentative symbol decisions. The selection element derives a selected symbol decision from each set of tentative symbol decisions, thereby deriving a sequence of symbol decisions from the receive signal. The controller constrains F1 if the receive signal uses a PAM4 signal constellation, setting F1 to equal zero if the receive signal is conveyed via a low-loss channel and to equal one if the receive signal is conveyed via a high-loss channel.

Abstract: A communication receiving device includes a clock data recovery circuit, an analog-to-digital converter (ADC), a channel evaluating circuit, a first equalizer, and a selector. The clock data recovery circuit is configured to generate a clock signal according to a first digital signal. The ADC is coupled to the clock data recovery circuit, and configured to convert a first analog signal to a second digital signal according to the clock signal. The channel evaluating circuit is configured to analyze the second digital signal to output a selection signal. The first equalizer is coupled to the ADC, and configured to equalize the second digital signal to generate a third digital signal. The selector is coupled between the first equalizer, the ADC, and the clock data recovery circuit. The selector is configured to output the second digital signal or the third digital signal as the first digital signal according to the selection signal.

Abstract: A port of a computing device is to connect to another device over a link and use equalization logic to perform equalization of the link at a plurality of different data rates. The equalization logic may identify that the other device supports bypassing a sequential equalization mode, determine a maximum data rate supported by the devices on the link, and participate in equalization of the link at the maximum supported data rate before equalizing the link at one or more other data rates lower than the maximum supported data rate in the plurality of data rates.

Abstract: A method for recovering a clock signal from a data signal by using a clock recovery module is described. At least one bit count of the data signal is received. At least one edge timing of the data signal is received. At least one cost function is formed that comprises the at least one bit count of the data signal and the at least one edge timing of the data signal. The at least one cost function is minimized with respect to at least one of a clock edge timing and a bit period. Further, a clock recovery module is described.

Abstract: Embodiments include expansion cards that provide a specialized capability, such as networking, when coupled to an Information Handling System (IHS). The expansion card embodiments include a printed circuit board (PCB) of a first width and a heat sink located on a top surface of the PCB. The expansion cards also include pins located on a distal end of the PCB, where the pins are received by a connector of the IHS. Embodiments include a button operable for ejecting a latch of the expansion card from a stored position in response to pressing the button. When ejected, the latch remains within the first width of the PCB, thus supporting high-density configurations of expansion cards. The ejected latch is further operable for an administrator to easily pull the expansion card from the IHS. Expansion card embodiments may also include vents that provide pathways for ventilating heated air away from the heat sink.

Abstract: A broadband digitizer for an applied broadband analog input signal SA(t). The digitizer includes a low frequency analog-to-digital converter (LF ADC) channel and a high frequency analog-to-digital converter (HF ADC) channel, an input splitter coupled to respective inputs to the LF ADC channel HF ADC channels, a frequency divider, and a combining unit. Low frequency portions of SA(t) are digitized to digital signal SDLF[n] in the LF ADC channel and high frequency portions of SA(t) are digitized to digital signal SDHF[n] in the HF ADC channel. The combining unit combines the digital signals SDLF[n] and SDHF[n] to form distortion-reduced SD[n], corresponding to SA(t). Front ends of the LF ADC channel and HF ADC channel reduce level-caused distortions, and the combining unit reduces ADC frequency-caused, time-position-caused, and interpolation-caused distortions.

Abstract: For canceling acoustic echoing, a processor receives audio signals comprising a speaker output and an ambient input. The processor further calculates separated output signals from mixed signals using a separating transfer function. The processor calculates a criterion function based on the separated output signals. In addition, the processor calculates an acoustic echo transfer function based on maximizing the a criterion function. The processor separates a source signal from the audio signal using the acoustic echo transfer function.

Abstract: Facilitation of communication of radio resource quality to a mobile application is provided. In one example, a method comprises: determining, by a device coupled to a processor, a peak-to-average loading ratio of a loading of a radio of a base station device and a mobility factor of the radio, wherein the loading relates to an amount of data being handled by the radio; and determining, by the device, class information for the radio of the base station device, wherein the class information comprises a value indicative of the peak-to-average loading ratio and the mobility factor of the radio, wherein the class information is correlatable to a bit rate at which a mobile device is to execute an application of a mobile device, and wherein the radio is communicatively coupled to the mobile device.

Abstract: Embodiments of the present application provide a parameter indication method and parameter determining method, a receive device, and a transmit device. The parameter indication method includes: generating indication information for each of a plurality of antenna panels, where the indication information is used to indicate an adjustment parameter of the antenna panel, and the adjustment parameter includes at least one of an amplitude adjustment parameter and a phase adjustment parameter; and sending the indication information. The embodiments of the present application further provide a parameter determining method, a receive device, and a transmit device. In the technical solutions provided in the embodiments of the present application, adjustment parameters of the plurality of antenna panels are fed back to adjust the plurality of antenna panels, so that a precoding vector constructed based on the plurality of antenna panels is more accurate.

Abstract: An input audio signal comprises a plurality of input audio channels. A KLT-based pre-processor transforms the plurality of input audio channels into a plurality of eigenchannels and provides metadata associated with the plurality of eigenchannels. Each eigenchannel is associated with an eigenvalue and an eigenvector. The metadata allows reconstructing the plurality of input audio channels on the basis of the plurality of eigenchannels. A selector selects a subset of the plurality of eigenvectors corresponding to a plurality of selected eigenchannels on the basis of a geometric mean of the eigenvalues. An eigenchannel encoder encodes the plurality of selected eigenchannels. A metadata encoder encodes the metadata.

Abstract: Facilitating sparsity adaptive feedback in the delay doppler domain in advanced networks (e.g., 4G, 5G, 6G, and beyond) is provided herein. Operations of a method can comprise determining, by a first device comprising a processor, a channel covariance matrix in a time-frequency domain based on a channel estimation associated with reference signals received from a second device. The method also can comprise decomposing, by the first device, the channel covariance matrix into a group of component matrices. Further, the method can comprise transforming, by the first device, respective matrices of the group of component matrices into respective covariance matrices in a delay doppler domain. The method also can comprise determining, by the first device, channel state information feedback in the delay doppler domain.

Abstract: An illustrative short, high-rate communications link includes a serializer that provides a signal having a symbol rate of at least 10 GHz; and a deserializer that receives the signal via a printed circuit board (“PCB”) trace coupled to the serializer with a first impedance mismatch and coupled to the deserializer with a second impedance mismatch. At least one of the serializer and deserializer includes an equalizer that attenuates a frequency component of the signal at half of the symbol rate relative to a frequency component of the signal at one third of the symbol rate. Though such attenuation may reduce signal-to-noise ratio, an improved communications performance may nevertheless be achieved by suppression of signal reflections.

Abstract: An integrated circuit equalizes a data signal expressed as a series of symbols. The symbols form data patterns with different frequency components. By considering these patterns, the integrated circuit can experiment with equalization settings specific to a subset of the frequency components, thereby finding an equalization control setting that optimizes equalization. Optimization can be accomplished by setting the equalizer to maximize symbol amplitude.

Abstract: A system and method for establishing secured wireless communications between electromagnetic communication devices.

Abstract: An equalizer includes: a channel estimator configured to generate a set of time-domain channel coefficients based on a receive signal; a frequency-domain transformer configured to generate a set of frequency-domain channel coefficients based on a frequency transform of the set of time-domain channel coefficients; an equalizer coefficient generator configured to generate a set of frequency-domain equalizer coefficients based on the set of frequency-domain channel coefficients; a time-domain transformer configured to generate a set of time-domain equalizer coefficients based on a time transform of the set of frequency-domain equalizer coefficients; and a filter configured to filter the receive signal based on a filter function that is based on the set of time-domain equalizer coefficients.

Abstract: The present environmental condition controller and method provide for controlling an environmental condition in an area of a building. For doing so, a communication interface receives an environmental condition target value (xref), and an environmental condition measured value (x). A processing unit calculates an environmental condition adjustment value (yn) with a recursive function based on the environmental condition measured value (x), the environmental condition target value (xref) and an adaptive proportionality value (k). The processing unit also generates and transmits a command based on the environmental condition adjustment value (yn). The processing unit further stores in a memory the environmental condition adjustment value (yn) as a previously calculated environmental condition adjustment value (yn?1). Specific steps of the method are executed recursively. The present method may further be performed by a computer program product.