Abstract: The present disclosure generally pertains to systems and methods for synchronizing nodes in a mesh network. A system in some embodiments may comprise a node having a counter that is incremented using a non-linear counting function. The node may be incremented using the function at intervals as measured by an internal oscillator of the node. The counter may also be incremented by a fixed amount when receiving a sync-packet from neighboring nodes. The non-linear counting function effectively smooths out the variability of the internal oscillator while the synchronization packet acts to keep the value of the counter synchronized with the value of the counters of neighboring nodes. This allows nodes in a mesh network to be synchronized for certain events while avoiding the issues of other synchronization techniques.

Abstract: When the ultra-low power mm-scale sensor node does not have a crystal oscillator and phase-lock loop, it inevitably exhibits significant carrier frequency offset (CFO) and sampling frequency offset (SFO) with respect to the reference frequencies in the gateway. This disclosure enables efficient real-time calculation of accurate SFO and CFO at the gateway, thus the ultra-low power mm-scale sensor node can be realized without a costly and bulky clock reference crystal and also power-hungry phase lock loop. In the proposed system, the crystal-less sensor starts transmission with repetitive RF pulses with a constant interval, followed by the data payload using pulse-position modulation (PPM). A proposed algorithm uses a two-dimensional (2D) fast Fourier transform (FFT) based process that identifies the SFO and CFO at the same time to establish successful wireless communication between the gateway and crystal-less sensor nodes.

Abstract: Device, system and method of securely transmitting information from a mobile device or application or a user device to a mobile phone or other acoustic aware devices using audio frequency encoded data and security token transmission.

Abstract: A wireless receiver including a front end circuit, an adaptive threshold circuit, and a correlator. The front end circuit converts a wireless signal into a series of digital symbols. The adaptive threshold circuit provides an adaptive correlation threshold that is adapted based on a sync word. The correlator correlates the digital symbols with the sync word using the adaptive correlation threshold. The adaptive correlation threshold may be based on amplitude attenuation of the digital symbols that correspond to transitions of the sync word. The adaptive threshold circuit may be a lookup table that stores different threshold values each corresponding to one of multiple different sync words. Alternatively, the adaptive threshold circuit may be implemented as an evaluation circuit that determines the adaptive correlation threshold based on expected amplitude attenuation of the digital symbols that correspond to transitions of the sync word.

Abstract: Apparatus and methods for operation of a memory controller, memory device and system are described. During operation, the memory controller transmits a read command which specifies that a memory device output data accessed from a memory core. This read command contains information which specifies whether the memory device is to commence outputting of a timing reference signal prior to commencing outputting of the data. The memory controller receives the timing reference signal if the information specified that the memory device output the timing reference signal. The memory controller subsequently samples the data output from the memory device based on information provided by the timing reference signal output from the memory device.

Abstract: A method corrects at least one transmission parameter for data transmission between a sensor unit and a control unit. A sensor timing signal is generated by a sensor oscillator with a predetermined period. The at least one transmission parameter is determined on the basis of the sensor timing signal. A reference timing signal is generated by a reference oscillator with a predefined reference period. The sensor timing signal is compared with the reference timing signal. A deviation of a current period of the sensor timing signal from a reference period is determined on the basis of the comparison. The at least one transmission parameter is corrected on the basis of the determined deviation.

Abstract: An apparatus for generating a radio frequency signal based on a symbol within a constellation diagram is provided. The constellation diagram is spanned by a first axis representing an in-phase component and an orthogonal second axis representing a quadrature component. The apparatus includes a processing unit configured to select a segment of a plurality of segments of the constellation diagram containing the symbol. The segment is delimited by a third axis and a fourth axis each crossing the origin of the constellation diagram and spanning an opening angle of the segment of less than about 90°. The processing unit is further configured to calculate a first coordinate of the symbol with respect to the third axis, and a second coordinate of the symbol with respect to the fourth axis. The apparatus further includes a plurality of digital-to-analog converter cells configured to generate the radio frequency signal using the first coordinate and the second coordinate.

Abstract: An information processing apparatus determines, when a data transmission is executed, whether or not a host name designated as a destination of the data transmission is set to a terminal list indicating an external terminal that is permitted as a data transmission destination, and if a result of the determination is that the host name is set to the terminal list, permits data transmission irrespective of whether or not an IP address corresponding to the host name is set to the terminal list; and executes data transmission if data transmission is permitted.

Abstract: This disclosure generally relates to data delivery in distributed applications. One example method includes identifying a data source associated with a shuffle operation, the data source configured provide data from a data set associated with the shuffle operation; identifying a data sink associated with the shuffle operation, the data sink configured to receive data provided by the data source; associating a shuffler component with the shuffle operation, the shuffler component configured to receive data from the data source and provide the data to the data sink; receiving, by the shuffler component, a first data portion from the data source; providing, by the shuffler component, the first data portion to the data sink; receiving, by the shuffler component, a second data portion from the data source, the second data portion being received from the data source prior to or concurrent with providing the first data portion to the data sink.

Abstract: A method of recovery from a time-synchronization loss in a communication unit between a first processor supporting physical layer communications and a second processor supporting layer-2 communications is described.

Abstract: An improved system for handling events in an industrial control system is disclosed. A module in an industrial controller is configured to generate an event responsive to a predefined signal or combination of signals occurring. The event is transferred to an event queue for subsequent execution. The event queue may also be configured to store a copy of the state of the module at the time the event is generated. The event queue may hold multiple events and each event is configured to trigger at least one event task. Subsequent events that occur during execution of the event task are stored in the event queue for later execution. An event, or combination of events, may trigger execution of an event task within the module, within the controller to which the module is connected, or within multiple controllers.

Abstract: Systems and methods are disclosed for providing redundancy in a network node implementing a ring protection protocol. Each of the two ring ports connecting the node to other nodes in a ring supporting the protocol may be maintained by a separate line card. Should one line card fail, traffic passing through the node may be redirected through the remaining ring port under the control of the surviving state machine. The two state machines may be coordinated over the backplane of the node to maintain a common state, making them transparent to other nodes. Additionally, the backplane link between the state machines may be monitored for failures that may be addressed with messages used to respond to general ring failures and by assigning one state machine to block a ring port upon recovery to prevent a loop within the ring until the ring protection link can be blocked.

Abstract: A method of configuring a preamble of a downlink frame for synchronization in data frame transmission of a 60 GHz a wireless local area network system, the method comprising arranging a short preamble having a plurality of repetitive S symbols, and an IS symbol, and arranging a long preamble having a long cyclic prefix (CP) and a plurality of L symbols for frame synchronization and symbol timing by performing auto-correlation according to the length of window of the auto-correlation.

Abstract: A non-implantable communication unit conducts wireless communication with an implantable medical device (IMD). The communication unit comprises a request processor for generating power down requests destined to the IMD and triggering temporary power down of the IMD radio equipment. When the communication unit receives a data packet from the IMD or a connected programmer it determines the size of the data packet. A timer processor sets a timer to a value defined based on the determined size. A processor controller selectively controls the operation of request processor to generate or stop generating the power down requests based on a current value of the timer. Power down of the IMD radio equipment is thereby prevented if it is likely that the IMD comprises data to transmit to the communication unit as predicted based on data packet sizes.

Abstract: A method in a UE comprises: receiving, from an RBS, information regarding a base sequence and a first phase rotation speed of the base sequence; determining an order, L, of the IFDMA, indicating a spacing between subcarriers over which the base sequence is to be mapped in the frequency domain; generating an RS-specific second phase rotation speed of the base sequence based on a CS pseudo random offset; increasing at least the second phase rotation speed based on L; combining the first and the increased second phase rotation speeds to obtain a third phase rotation speed, and performing phase rotation of the base sequence based on the third phase rotation speed; and mapping the phase rotated base sequence to every L:th subcarrier of the RSs, and transmitting the RSs.

Abstract: A phase rotation correcting method includes receiving a signal modulated by a multi-value modulation method; recognizing a position of a symbol point of the received signal on an IQ plane; performing phase rotation for rotating a phase of the symbol point of the received signal toward an I axis or a Q axis in accordance with the recognized position and calculating, as an amount of phase rotation correction, a value on an axis different from the axis toward which the phase of the symbol point has been rotated by the phase rotation; and correcting phase rotation of the symbol point by using the calculated amount of phase rotation correction.

Abstract: A system for the wireless control of an RC model, comprising a transmitting device separate from the RC model, a multifunctional device in the RC model, and a receiver model in the RC model. The transmitting device comprises a first transmitter for transmitting information via digital radio communication to the RC model, and a second receiver adapted to receive second information via digital radio communication from the RC model. The multifunctional device comprises or is connected to one or more electronic accessory modules. The receiver module is connected to or integrated with the multifunctional device, and comprises a first receiver configured to receive the first information and a second transmitter configured to transmit the second information. A method for using the system, a transmitting device suitable for use with the system, and a receiving device suitable for use with the system are also claimed.

Abstract: A state migration module (SMM) is described herein which seamlessly, efficiently, and correctly transfers application state between user computing devices, or between different interactions with the application on the same device that occur at different respective times. The SMM operates by capturing the current state of an application relative to the operation of a high-level execution platform (such as a browser) on which the application runs, rather than capturing the overall low-level state of the computing that runs the application. The SMM can include additional provisions designed to improve the efficiency of state migration, such as asynchronous migration, incremental delta-based migration, etc.

Abstract: An electronic messaging system and method with reduced traceability. An electronic message is separated into a message content and container (header) information. In one aspect, the message content and header information are entered by a user separately using a single display image screen having separate portions for entry of message content and header information. The separate portions do not allow visibility of content in the portions to be displayed at the same time.

Abstract: A method for calculating an error of a sampling clock is provided. The sampling clock is used for sampling a signal to generate a first sample data group and a second sample data group. Each of the first and second sample data groups includes a header having a predetermined sequence. The method includes: performing a correlation operation on the first and second sample data groups with data of the predetermined format to obtain first and second correlation results, respectively; comparing the first and second correlation results to generate a sample data group offset; and generating the error of the sampling clock according to the sample data group offset and a time difference between the first and second sample data groups.

Abstract: A data transmitter for transmitting a data packet to a data receiver via a communication channel includes a generator for generating the data packet and a transmitter for transmitting the data packet. The generator for generating the data packet is configured to generate a data packet having a first data block and a second data block and a predefined first reference sequence and second reference sequence for synchronizing the data receiver, wherein the first reference sequence is longer than the second reference sequence, and wherein in the data packet, the second data block is located between the first reference sequence and the second reference sequence, and the first reference sequence is located between the first data block and the second data block. The transmitter for transmitting the data packet is configured to transmit the data packet to the data receiver via the communication channel.

Abstract: A method is provided for enhancing a legacy satellite digital radio audio service (SDARS) by overlaying a hierarchically modulated data stream on a base layer (legacy) data stream and improving the synchronization of the received signal in which an overlay layer frame is synchronized to a base layer frame. The base layer frame includes additional data that is used to synchronize the receivers to demodulate and decode the overlay layer and the base layer. The additional data is modulated using a technique that aids the receiver in synchronizing the received signal that is different from the overlay layer.

Abstract: In one embodiment, an apparatus may include a de-serializer to convert serial data to parallel data, and a counter to provide an update signal based on a bit count of the serial data. The apparatus may further include a synchronizer to provide a synchronization signal when a target clock signal is synchronized with the update signal. The apparatus may further include an output unit to provide a validation indicator in response to the synchronization signal.

Abstract: An input module for an industrial controller is configurable to simplify setup and commissioning. The input module includes input terminals configurable, for example, as a counter input. Still other input terminals may be configured to trigger events as a function of the input signals present at the terminals. Time signals corresponding to transitions in state of the input terminals, triggering of events, or operation of the counters may be recorded. The input module is further configurable to transmit data back to the processor or to transmit data directly to another module in the industrial control network.

Abstract: A method and system for packet synchronization may comprise receiving a plurality of bits from an incoming sample of data. The received plurality of bits may be sliced at a first sampling rate. A logic level of at least one of the received plurality of bits may be determined based on the slicing of the received plurality of bits. The received plurality of bits may be synchronized with a channel access code based on determining the logic level of at least one of the received plurality of bits. The channel access code may be sampled at a higher frequency, to increase the probability of detecting whether the incoming bit is LOGIC 1 or LOGIC 0.

Abstract: A method and system for combining a guard interval and a corresponding portion of a received symbol, whereby when receiving a signal that contains the symbol with a guard interval corresponding to the symbol, a portion of the guard interval that is free from inter-symbol interference may be extracted, and the extracted portion of the guard interval may be combined with the corresponding portion of the symbol. The extracting and combining may be done after a determining, based on a delay profile provided by the received signal, that a delay spread is smaller than a predetermined channel delay. The delay spread may be determined by filtering an instantaneous delay spread associated with the received signal. The filtering may be performed using a 1-tap infinite impulse response low-pass filter. The low-pass filter may include a time constant that is the inverse of a maximum Doppler frequency shift.

Abstract: Embodiments of the present disclosure provide a sequence synchronization apparatus and method and a receiver. The sequence synchronization apparatus includes: a signal receiving unit configured to receive a clock synchronized signal including a training symbol, the training symbol being in-phase modulated or being modulated with a fixed phase difference based on all or part of subcarriers; and a symbol detecting unit configured to detect the training symbol, so as to achieve sequence synchronization of the signal. With the embodiments of the present disclosure, not only sequence synchronization may be achieved by using minimum complexity as possible, but also the sequence synchronization apparatus is made simple, fast and accurate.

Abstract: Systems, methods, and other embodiments associated with preamble detection based on repeated preamble codes are described. According to one embodiment, an apparatus is provided that wirelessly receives a signal and calculates a differential output corresponding to a multiplication of the signal and a delayed version of the signal. A cross correlation is performed between the differential output and a known preamble pattern to produce a cross correlation output. One or more peaks are detected in the cross correlation. The detected peaks are used in subsequent processing to detect the known preamble pattern in the wirelessly received signal.

Abstract: Receiver synchronization techniques (RST), contributing more accurate synchronization of receiver clock to OFDM composite frame combined with much faster acquisition time and better stability of the receiver clock, and phase and frequency recovery techniques, comprising a software controlled clock synthesizer (SCCS) for high accuracy phase & frequency synthesis producing synchronized low jitter clock from external time referencing signals or time referencing messages wherein SCCS includes a hybrid PLL (HPLL) enabling 1-50,000 frequency multiplication with very low output jitter independent of reference clock quality.

Abstract: Methods and systems for augmenting a source message by suitably-chosen bits and/or sequences of bits for the purpose of enhancing decoding or synchronization performance. Properties of the source message can be used to select and optimize synchronization sequences, including their length and placement within the source message. Various message attributes, such as message or segment weight, symbol counts, and others, including their combinations, may be encoded into the synchronization sequence to further improve decoding performance in the presence of errors. These methods and systems can be employed for standalone source decoding of noisy bit streams, as well as iterative joint source-channel decoding. They may further be combined with other methods whether or not known in the art, such as CRC and forward error correction, to achieve the desired performance complexity trade-off.

Abstract: A method and system is provided for detecting the presence of a DVB (digital video broadcasting) transmission. The method includes receiving an RF (radio frequency) signal in a selected channel (1101); creating signal samples from the received RF signal (1102); creating averaged samples from the signal samples, each averaged sample being an average of a predetermined number of signal samples that are separated by a minimum pilot pattern repetition period from one to the next signal sample (1103); correlating the averaged samples with a reference sequence (1104); and comparing a correlation result with a threshold correlation value (1105).

Abstract: A method is provided for synchronizing binary data transmitted in parallel via N channels. The method comprises performing at the receiver side, a data-clock-alignment for the data in the N channels by selecting an optimal reference channel to which no delay will be added, and adding an appropriate delay to each of the remaining channels, until their respective centers of valid data portions are aligned to each other, and associating clock edges with the centers of the valid data portions. The method is characterized in that the alignment is performed regardless to whether binary word alignment is simultaneously achieved or not, and wherein the optimal reference channel allows aligning the centers of valid data of all the channels while adding a minimal delay to a worst channel from among the remaining channels, wherein the worst channel carries valid data portions which are maximally shifted from those of the reference channel.

Abstract: A receiver and method for a transponder of a two-way automatic communications system (TWACS) used by an electrical utility in which analog outbound messages are sent from the utility to a consumer and inbound, reply messages are sent from the consumer to the utility. The receiver and method enable a transponder to detect the outbound messages and include A/D conversion and digital processing for demodulating a digitized signal and providing the outbound message.

Abstract: Circuits and methods characterize a receiver. The circuit includes a decision feedback equalizer (DFE) circuit, a clock and data recovery (CDR) circuit, a data checker, and an eye-scan controller. The DFE circuit generates a filtered signal from the communication signal. The filtered signal is a sum of the communication signal and a variable weighting of a symbol recently sampled from the filtered signal. The CDR circuit samples a sequence of sampled symbols from the filtered signal. The CDR circuit samples the filtered signal at a variable phase relative to a clock signal. The data checker generates an indication of an error in the sequence of sampled symbols. The eye-scan controller varies the variable weighting and the variable phase through multiple value combinations. The eye-scan controller checks for the indication of the error for each of the value combinations.

Abstract: Processing the synchronization of an inband modem to detect sample slip conditions is disclosed. Decision logic reliably detects the sample slip condition while minimizing the number of false alarms.

Abstract: A method and system for a estimating a most likely location of a periodic SYNC burst within an optical signal received through an optical communications system. A cross-correlation is calculated between a multi-bit digital signal derived from the optical signal and a known symbol sequence of the SYNC burst. The cross-correlation is processed in at least one sub-block to identify a candidate sub-block in which the SYNC burst is most likely located. The candidate sub-block is then further analyzed to estimate a location of the SYCN burst.

Abstract: The present invention provides a method and a device for calculating a coefficient of a time-domain channel estimation filter. The method comprises: acquiring position information and weight information of symbols carrying RS information corresponding to X1, X2 . . . XP; acquiring position information and weight information of symbols carrying RS information relating to Y1, Y2, . . . YQ; calculating an autocorrelation matrix of a vector I in accordance with the position information and the weight information, wherein I=[X1, X2, . . . XP, Y1, Y2, . . .

Abstract: Systems, methods, and other embodiments associated with processing wireless signals. According to one embodiment, a wireless receiver includes at least one antenna configured to receive a wireless signal. The wireless signal comprises pilot symbols dispersed irregularly throughout a two-dimensional grid. The pilot symbols of the wireless signal are usable by the wireless receiver to estimate the wireless channel at each point in the two-dimensional grid. The wireless receiver includes a pattern logic including hardware configured to generate additional pilot symbols in the two-dimensional grid. The additional pilot symbols generated by the pattern logic along with the pilot symbols dispersed irregularly throughout the two-dimensional grid form a regular distribution of pilot symbols in the two-dimensional grid. The wireless receiver is configured to estimate the wireless channel at each point in the two-dimensional grid based on the regular distribution of pilot symbols in the two-dimensional grid.

Abstract: A transmission system which couples a plurality of transmission devices to a control device includes a first transmission device which is one of the plurality of transmission devices; a first calculation circuit which calculates a first difference value indicating a frequency difference value between a common clock supplied from the control device and a first clock as a clock used in the first transmission device; and a transmitter which reports the first difference value to a second transmission device other than the first transmission device, wherein the second transmission device comprises: a second calculation circuit which calculates a second difference value indicating a frequency difference value between the common clock and a second clock used in the second transmission device, and a frequency controller which controls an oscillator generating the second clock so that the second difference value approaches the first difference value reported from the first transmission device.

Abstract: A method and a device for detection in cell random access are provided. The method includes: extending an original format used for a random access procedure to change a CP range defined by the original format; in the process of extracting a time-domain signal of a random access channel, extracting and splitting input data into time-domain antenna data in the original format and time-domain antenna data in an enhanced format, and performing signal extraction processing on the time-domain antenna data in the original format and the time-domain antenna data in the enhanced format respectively; and in the process of detection, detecting the time-domain antenna data in the original format and the time-domain antenna data in the enhanced format after the signal extraction processing to obtain detection information. The method can improve the performance of a BS and reduce the network construction costs without affecting an MS.

Abstract: A transmitting apparatus transmits signals in a digital telecommunication system and a synchronising method is used for synchronizing such signals at a receiving apparatus. The transmitting apparatus prepares for transmission a reference symbol having at least two repetition patterns, whereby one of the at least two repetition patterns is phase-shifted in relation to the other repetition pattern, and a synchronizing mechanism in the digital telecommunication system uses the reference symbol once received for synchronization. The synchronizing mechanism uses a cross-correlation mechanism to cross-correlate at least one of the two repetition patterns within a correlation window having a predetermined length.

Abstract: Processing the synchronization of an inband modem to detect sample slip conditions is disclosed. Decision logic reliably detects the sample slip condition while minimizing the number of false alarms.

Abstract: Disclosed is an apparatus and method for detecting a code. The code detecting apparatus may include a detector to detect symbol synchronous timing information associated with a PSS code from a first signal received during a predetermined first period, a compensator to extract and buffer the PSS code and the SSS code based on the symbol synchronous timing information detected from a second signal received during a predetermined second period, and compensate for a frequency offset with respect to the buffered PSS code, and a processor to re-detect the symbol synchronous timing information based on the PSS code in which the frequency offset is compensated for, and extract the buffered SSS code using the re-detected symbol synchronous timing information.

Abstract: A processor implements a network of functional nodes and communication paths between the nodes. The processor includes a plurality of circuit implementations of the functional nodes of the processor; and a plurality of signal paths implementing the communication paths linking the circuit implementations of the nodes. At least some of the signal paths are configured to pass signal values represented according to temporal patterns of signal levels on the signal paths. The processor also includes a plurality of circuit components for conversion between a signal value represented as a signal level (e.g., voltage or current level) and a signal value represented as a temporal pattern.

Abstract: An apparatus for acquiring synchronization in a multi-channel system includes a signal reception unit for receiving information about repetition patterns of signal streams for each channel and receiving the signal streams and data from the channel, an estimated synchronization point tracking unit for determining a estimated synchronization point for the channel from a point of time where the repetition patterns are ended by tracking a period where the signal streams are repeated based on the repetition patterns, and a synchronization acquisition unit for searching, based on the estimated synchronization point related to the channel, for a point where the repetition of the signal stream is ended or a point where new signal streams are started and acquiring a synchronization point based on the point.

Abstract: A system including an input module, a first gain module, a second gain module, and a preamble estimation module. The input module is configured to receive an input signal from a station. The input signal includes (i) a first preamble sequence, and (ii) subcarriers. The first gain module is configured to, based on the input signal, generate first channel gain values. Each of the first channel gain values is for a respective one of the subcarriers. A second gain module is configured to, based on the first channel gain values, generate second channel gain values. A preamble estimation module is configured to estimate the first preamble sequence based on (i) the first channel gain values, and (ii) the second channel gain values.

Abstract: A clock data recovery circuit has: a receiver circuit configured to receive a serial data including a predetermined pattern and to sample the serial data in synchronization with a clock signal to generate a sampled data; a PLL circuit configured to perform clock data recovery based on the sampled data to generate the clock signal; and a false lock detection circuit configured to detect false lock of the PLL circuit by detecting a false lock pattern included in the sampled data. The false lock pattern is a pattern obtained by the receiver circuit sampling the predetermined pattern when the false lock of the PLL circuit occurs.

Abstract: Various embodiments of the present invention provide systems and methods for pattern identification. As an example, a pattern detection circuit is discussed that include: a distance calculation circuit operable to calculate a distance value corresponding to a difference between a first pattern and a second pattern; a threshold comparator circuit operable to compare the distance value to a variable threshold value; and a threshold value calculation circuit. The threshold value calculation circuit is operable to modify the variable threshold value based at least in part on the distance value.

Abstract: Motor control circuits and associated methods to control an electric motor provide a plurality of drive signal channels at the same phase, resulting in reduced jitter in the rotational speed of the electric motor.

Abstract: A method switches master/slave timing in a communication network without traffic disruption. The method includes a master device informing a slave of timing loss. The master device additionally begins transmitting with timing from a local reference clock and begins receive timing recovery. The slave freezes its receive timing recovery and locks its transmit clock. The master device transitions its transmit timing to use the recovered receive clock. The slave gradually switches to transmitting using its local clock signal. The method may be used in synchronous Ethernet networks.