Vapor Deposition Or Utilizing Vacuum Patents (Class 427/124)
  • Patent number: 6773687
    Abstract: In processes for coating objects, such as semiconductor wafers, with a film of metal, such as titanium metal, a metal-containing compound, such as TiCl4, is injected into a chamber containing the object and a portion of the metal-containing compound reacts to provide the film of metal on the object and a gas containing by-products, such as unreacted TiCl4 and TiClx (x<4), which is discharged out of the chamber and passed through a trap mechanism and an eliminator for the removal of the by-products out of the gas. The by-products have relatively high vapor pressures, making them difficult to trap. The Applicants have found that by adding a reagent, such as water, O2 or NH3, into the exhaust gas at a location upstream of the trap mechanism and eliminator, the reagent reacts with the by-product in the gas to produce a compound, such as TiCl4.2NH3, which has a significantly lower vapor pressure than the by-product and can be removed in the trap mechanism.
    Type: Grant
    Filed: November 24, 2000
    Date of Patent: August 10, 2004
    Assignee: Tokyo Electron Limited
    Inventor: Toshio Hasegawa
  • Patent number: 6743934
    Abstract: This invention provides raw material compounds for use in CVD which contain organic ruthenium compounds as a main ingredient, the organic ruthenium compounds having two &bgr;-diketones plus one diene, one diamine or two organic ligands which are coordinated with ruthenium. In this invention, the vapor pressures of the organic ruthenium compounds are made preferable by specifying the number of the carbon atoms contained in the above &bgr;-diketones and the types of the above diene etc.
    Type: Grant
    Filed: April 17, 2003
    Date of Patent: June 1, 2004
    Assignee: Tanaka Kikinzoku Kogyo K.K.
    Inventors: Masayuki Saito, Takeyuki Sagae
  • Patent number: 6739026
    Abstract: A head chip is manufactured by disposing partition walls made of piezoelectric ceramic between a pair of opposing substrates made of a dielectric material so that the partition walls are spaced apart at a preselected interval to form channels. Inorganic conductive films are formed on a surface of one of the substrates. At least one metal film is formed on a portion of each of the inorganic conductive films. An electrode is formed on a side surface of each of the channels. Each of the electrodes is electrically connected to a respective one of the metal films via a respective one of the inorganic conductive films.
    Type: Grant
    Filed: May 24, 2001
    Date of Patent: May 25, 2004
    Assignee: Seiko Instruments Inc.
    Inventor: Toshihiko Harajiri
  • Patent number: 6733923
    Abstract: A metal oxide electrode coated with a porous metal film, a metal oxide film or a carbon film, its fabrication method and a lithium-ion secondary battery using it are disclosed. The porous thin film of Li, Al, Sn, Bi, Si, Sb, Ni, Cu, Ti, V, Cr, Mn, Fe, Co, Zn, Mo, W, Ag, Au, Pt, Ir, Ru, carbon or their alloys are coated to a few Řa few &mgr;m, so as to remarkably improve the capacity of a battery, high rate charging and discharging characteristics and a durability characteristic. The method can be applied to a fabrication of every secondary battery.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: May 11, 2004
    Assignee: Korea Institute of Science and Technology
    Inventors: Kyung-Suk Yun, Byung-Won Cho, Won-Il Cho, Hyung-Sun Kim, Un-Seok Kim, Sang-Cheol Nam, Seung-Won Lee, Young-Soo Yoon
  • Patent number: 6725528
    Abstract: A photosensitive material is coated on an insulating material (13) stacked on a substrate (1) (FIG. 16A), and exposed and developed using a mask having a light-shielding film capable of controlling a light transmittance from 100% to 0% annularly and continuously to form a spiral photosensitive material (FIG. 16B). After conducting treatment at a high temperature, the insulating material under the photosensitive material is spirally formed by etching (FIG. 16C). A metal (12) is stacked on the substrate (FIG. 16D), and a photosensitive material is coated (FIG. 16E). The photosensitive material is exposed and developed using a mask having an annular light-shielding film with a light transmittance of 0% to leave the photosensitive material covering only the metal on the base of the spiral structure (FIG. 16F). After treatment at a high temperature is conducted and the metal exposed is etched (FIG. 16G), the photosensitive material is removed (FIG. 16H).
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: April 27, 2004
    Inventor: Takashi Nishi
  • Patent number: 6709702
    Abstract: A cover tape for the electronic-part conveyance comprises at least four laminated layers of: a substrate; at least one layer of a base coating layer and an intermediate layer, provided on the substrate; an adhesive layer, provided on the at least one layer of the coating layer and the intermediate layer; and a conductive layer formed on at least one of the rear surface of the substrate and the front surface of the adhesive layer by deposition.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: March 23, 2004
    Assignee: Nitto Denko Corporation
    Inventors: Ichiro Nakano, Hiroki Ichikawa, Seiji Izutani
  • Patent number: 6663706
    Abstract: This invention provides raw material compounds for use in CVD which contain an organic iridium compound as a main ingredient, the organic iridium compound consisting of tris(5-methyl-2,4-hexanedionato)iridium. According to the CVD which uses the above raw material compounds, a pure iridium thin film and an iridium oxide thin film of excellent morphology can be produced effectively.
    Type: Grant
    Filed: April 15, 2003
    Date of Patent: December 16, 2003
    Assignee: Tanaka Kikinzoku Kogyo K.K.
    Inventors: Masayuki Saito, Takeyuki Sagae
  • Patent number: 6663761
    Abstract: The invention provides a fine pattern forming method in which a pattern interval of a resist pattern is narrowed, and a fine pattern forming material can be certainly formed on a surface of the resist pattern. In the method, a first resist layer containing a material generating acid by heating or light irradiation is coated on a substrate, is exposed through a pattern, and is developed. A developing solution is washed by a washing solution to form a first resist frame, and in a state where the washing solution is adhered to the substrate, a fine pattern forming material containing a material, which is cross-linked by the existence of acid, is coated on the substrate. Acid is generated in the first resist frame by heating or light irradiation, and the first resist frame is covered with a cross-linked layer generated on an interface between the first resist frame and the fine pattern forming material.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: December 16, 2003
    Assignee: TDK Corporation
    Inventor: Akifumi Kamijima
  • Patent number: 6652697
    Abstract: A method for manufacturing a copper-clad laminate includes the steps of forming first and second metal films on first and second carriers, forming first and second copper films on the first and second metal films, forming first and second semi-cured resin layers, stacking a first assembly of the first carrier, the first metal film, the first copper film and the first semi-cured resin layer on a second assembly of the second carrier, the second metal film, the second copper film and the second semi-cured resin layer, and vacuum hot pressing the first and second assemblies so as to complete cure and integrate the first and second semi-cured resin layers.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: November 25, 2003
    Assignee: Pioneer Technology Engineering Co., Ltd.
    Inventor: Chien-Hsin Ko
  • Patent number: 6651871
    Abstract: A substrate is coated with a conductive layer, which comprises a conductive layer of bonded ultrafine metal particles formed on the top surface thereof. The ultrafine metal particles have a diameter of 1-20 nm, and the substrate is of a flexible high polymer material. Since the conductive layer is formed by bonded layer of the ultrafine metal particles, an extremely thin layer having high conductivity can be formed. This structure enables the formation of a flexible printed circuit board with high-density interconnects or a transparent conductive film provided with both transparency and conductivity. Conventional vacuum equipments and complicated processes are not necessary for forming the conductive layer on the substrate.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: November 25, 2003
    Assignee: Ebara Corporation
    Inventor: Naoaki Ogure
  • Patent number: 6649033
    Abstract: The method for producing an electrode for a lithium secondary battery, having an active material in the form of a thin film composed of an interface layer formed on a current collector and an active material layer formed on the interface layer. The method comprises the steps of: depositing the interface layer on the current collector by sputtering; and depositing the active material layer on the interface layer by vapor evaporation.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: November 18, 2003
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hiromasa Yagi, Hisaki Tarui
  • Patent number: 6637643
    Abstract: A method for applying at least one bond coating on a surface of a metal-based substrate is described. A foil of the bond coating material is first attached to the substrate surface and then fused thereto, e.g., by brazing. The foil is often initially prepared by thermally spraying the bond coating material onto a removable support sheet, and then detaching the support sheet. Optionally, the foil may also include a thermal barrier coating applied over the bond coating. The substrate can be a turbine engine component.
    Type: Grant
    Filed: February 4, 2002
    Date of Patent: October 28, 2003
    Assignee: General Electric Company
    Inventors: Wayne Charles Hasz, Marcus Preston Borom, Warren Arthur Nelson, James Edward Viggiani, John Zanneti
  • Patent number: 6635220
    Abstract: A method for forming a composite vapor-deposited film one side of which suitable for vapor-deposition on a phosphor surface of a CRT, such as a color television picture tube, has high light reflectivity, and the other side of which has a property to absorb radiant heat, and a composite vapor-deposition material suitable for vacuum deposition are disclosed. The composite vapor-deposition material has a high vapor-pressure metal envelope and a low vapor-pressure metal in the core region of the envelope. Low vapor-pressure metal powder should preferably be dispersed and held by high vapor-pressure metal powder in the core region. Vacuum deposition using this composite vapor-deposition material yields a composite deposited film having a composition comprising almost 100% of the high vapor-pressure metal formed in the initial stage of evaporation, and a composition comprising 100% of the low vapor-pressure metal formed in the final stage of evaporation.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: October 21, 2003
    Assignee: Hitachi Metals, Ltd.
    Inventors: Shinji Furuichi, Shigetoshi Takashima
  • Publication number: 20030181746
    Abstract: Disclosed are methods of preparing monoalkyl Group VA metal dihalide compounds in high yield and high purity by the reaction of a Group VA metal trihalide with an organo lithium reagent or a compound of the formula RnM1X3−n , where R is an alkyl, M1 is a Group IIIA metal, X is a halogen and n is an integer fro 1 to 3. Such monoalkyl Group VA metal dihalide compounds are substantially free of oxygenated impurities, ethereal solvents and metallic impurities. Monoalkyl Group VA metal dihydride compounds can be easily produced in high yield and high purity by reducing such monoalkyl Group VA metal dihalide compounds.
    Type: Application
    Filed: January 17, 2003
    Publication date: September 25, 2003
    Applicant: Shipley Company, L.L.C.
    Inventors: Deodatta Vinayak Shenai-Khatkhate, Michael Brendan Power, Artashes Amamchyan, Ronald L. DiCarlo
  • Publication number: 20030181745
    Abstract: Disclosed are trialkylindium compounds containing two bulky alkyl groups that are liquids or easily liquefiable solids and have sufficient vapor pressure for use in vapor deposition processes, as well as methods of depositing indium containing films using such compounds.
    Type: Application
    Filed: January 17, 2003
    Publication date: September 25, 2003
    Applicant: Shipley Company, L.L.C.
    Inventors: Deodatta Vinayak Shenai-Khatkhate, Ronald L. DiCarlo
  • Patent number: 6623800
    Abstract: A method for forming a composite vapor-deposited film which is suitable for the deposition on the fluorescent screen of a color television picture tube and the like and in which one side has a high light-reflectance and the other side has a property of absorbing heat rays, and a composite vapor-deposition material suitable for vacuum vapor deposition therefor are disclosed. This composite vapor-deposition material has an aluminum envelope and a low vapor-pressure metal/metalloid compound powder in the its core region. It is desirable that the low vapor-pressure metal/metalloid compound powder is dispersed and retained with aluminum in the core region.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: September 23, 2003
    Assignee: Hitachi Metals Ltd.
    Inventor: Shinji Furuichi
  • Patent number: 6610355
    Abstract: Ion conducting solid electrolytes are constructed from nanoscale precursor material. Nanocrystalline powders are pressed into disc structures and sintered to the appropriate degree of densification. Metallic material is mixed with 0 to 65 vol % nanostructured electrolyte powders to form a cermet mix and then coated on each side of the disc and fitted with electrical leads. The electrical conductivity of a Ag/YSZ/Ag cell so assembled exhibited about an order of magnitude enhancement in oxygen ion conductivity. As an oxygen-sensing element in a standard O2/Ag/YSZ/Ag/N2 set up, the nanocrystalline YSZ element exhibited commercially significant oxygen ion conductivity at low temperatures. The invention can be utilized to prepare nanostructured ion conducting solid electrolytes for a wide range of applications, including sensors, oxygen pumps, fuel cells, batteries, electrosynthesis reactors and catalytic membranes.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: August 26, 2003
    Assignee: NanoProducts Corporation
    Inventors: Tapesh Yadav, Hongxing Hu
  • Patent number: 6607804
    Abstract: A filter having two zones, the first zone having a low electrical conductivity and the second zone having a high electrical conductivity at electrode attachment zones due to infiltration of metal within the second zone.
    Type: Grant
    Filed: March 1, 1999
    Date of Patent: August 19, 2003
    Assignee: Thomas Josef Heimbach Gesellschaft mit beschrankter Haftung & Co.
    Inventors: Walter Best, Oliver Benthaus, Wolfgang Schäfer, Uwe Schumacher
  • Patent number: 6575801
    Abstract: Method for fabricating a cathode in a cathode ray tube, the cathode having a cathode sleeve with a heat radiative coating layer formed on an inside wall thereof for emission of thermal electrons, the heat radiative coating layer being formed by a method including the steps of (a) coating a material of the heat radiative coating layer on a surface of a metal wire provided separately, (b) inserting the metal wire having the heat radiative coating layer coated thereon, to pass through an opening the cylindrical cathode sleeve, and (c) heating the metal wire by providing a power thereto, to deposit the material of the heat radiative coating layer coated on the metal wire on the inside wall of the cathode sleeve, whereby permitting to coat many number of cathode sleeves at a time, and to form a film of uniform composition and even thickness to enhance electron emission.
    Type: Grant
    Filed: November 7, 2000
    Date of Patent: June 10, 2003
    Assignee: LG Electronics Inc.
    Inventors: Gyeong Sang Lee, Byoung Doo Ko, Young Deog Koh, Dawa Yashiro, Matsuo Tosihiro, Huruya Koushi, Yagima Taeruo
  • Patent number: 6575552
    Abstract: A surface processing method for processing the surface of an insulating article in which an ion-implanted surface-modified layer is effectively formed on the article 2. In surface processing the article 2 of an insulating material, an electrically conductive thin metal film 50 is first formed on the article surface. A pulsed voltage containing a positive pulsed voltage and a negative pulsed voltage is applied to the article in a plasma containing ions to be implanted to implant ions in the article surface. This implants ions at right angles to the article surface to generate a surface-modified layer 51. There is no possibility of the article 2 being charged up due to application of a pulsed voltage.
    Type: Grant
    Filed: July 17, 2002
    Date of Patent: June 10, 2003
    Assignee: Sony Corporation
    Inventors: Seiichi Watanabe, Kenji Shinozaki, Minoru Kohno, Hiroyuki Mitsuhashi, Minehiro Tonosaki, Masato Kobayashi
  • Patent number: 6565917
    Abstract: A paste for one of a via and an external feature, such as a pad, tab, or line, of a ceramic substrate, includes at least one of titania and zirconia, and a filler material mixed with the at least one of titania and zirconia. Further, the via structure or external feature such as an input/output pad, tab, or line, includes a metallic plating thereover. A method of forming the via structure or the external feature on the ceramic substrate, includes steps of either depositing the paste in the via of the ceramic substrate or depositing the paste on the ceramic substrate, and depositing, by a dry process metallic plating, a metallic plating on the paste. The paste includes at least one of titania and zirconia for reducing residual stress without effecting the platability of the metallic plating.
    Type: Grant
    Filed: March 15, 2000
    Date of Patent: May 20, 2003
    Assignee: International Business Machines Corporation
    Inventors: Srinivasa S. N. Reddy, Donald R. Wall
  • Patent number: 6551929
    Abstract: A method and system to form a refractory metal layer on a substrate features a bifurcated deposition process that includes nucleating a substrate using ALD techniques to serially expose the substrate to first and second reactive gases followed forming a bulk layer, adjacent to the nucleating layer, using CVD techniques to concurrently exposing the nucleation layer to the first and second gases.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: April 22, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Moris Kori, Alfred W. Mak, Jeong Soo Byun, Lawrence Chung-Lai Lei, Hua Chung, Ashok Sinha, Ming Xi
  • Patent number: 6538147
    Abstract: The present invention provides a copper precursor according to the formula (R3COOCR2COR1)Cu+1{L}x, where x is 1, 2 or 3 and L is a neutral ligand. The precursors in the present invention, which are low melting solids or distillable liquids with high volatility and thermal stability, can be vaporized without decomposition and used to deposit high quality copper films. The improved stability of the copper compounds in the present invention enables them to reproducibly produce selective copper films on metallic or electrically conductive surfaces.
    Type: Grant
    Filed: January 25, 2001
    Date of Patent: March 25, 2003
    Inventor: Hyungsoo Choi
  • Patent number: 6535628
    Abstract: During a wafer process, fragments can break away from a wafer. The wafer fragments can compromise the accuracy of the temperature signals generated by sensor probes in a rapid thermal process. In particular, the fragments can attenuate or otherwise interfere with the radiation received from the wafer. This interference can undermine the accuracy of the temperature measurement signal generated by the probes. If the temperature control function is compromised, excessive temperature gradients can result in damage to the wafer, reducing device yield and degrading device quality. To alleviate the effects of wafer fragments, the presence of a wafer fragment is detected. An image acquisition device acquires an image of an area adjacent the sensor probe. A processor analyzes the acquired image to determine whether a wafer fragment is present. One approach involves comparing the acquired image to a reference image taken in the absence of a wafer fragment quantifying the amount of deviation.
    Type: Grant
    Filed: October 15, 1998
    Date of Patent: March 18, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Eugene Smargiassi, Wayez R. Ahmad
  • Publication number: 20030039887
    Abstract: A metal oxide electrode coated with a porous metal film, a metal oxide film or a carbon film, its fabrication method and a lithium-ion secondary battery using it are disclosed. The porous thin film of Li, Al, Sn, Bi, Si, Sb, Ni, Cu, Ti, V, Cr, Mn, Fe, Co, Zn, Mo, W, Ag, Au, Pt, Ir, Ru, carbon or their alloys are coated to a few Řa few &mgr;m, so as to remarkably improve the capacity of a battery, high rate charging and discharging characteristics and a durability characteristic. The method can be applied to a fabrication of every secondary battery.
    Type: Application
    Filed: August 23, 2001
    Publication date: February 27, 2003
    Inventors: Kyung-Suk Yun, Byung-Won Cho, Won-II Cho, Hyung-Sun Kim, Un-Seok Kim, Sang-Cheol Nam, Seung-Won Lee, Young-Soo Yoon
  • Publication number: 20030038024
    Abstract: The method for producing an electrode for a lithium secondary battery, having an active material in the form of a thin film composed of an interface layer formed on a current collector and an active material layer formed on the interface layer. The method comprises the steps of: depositing the interface layer on the current collector by sputtering; and depositing the active material layer on the interface layer by vapor evaporation.
    Type: Application
    Filed: March 27, 2002
    Publication date: February 27, 2003
    Inventors: Hiromasa Yagi, Hisaki Tarui
  • Patent number: 6514557
    Abstract: A process to produce magnesium diboride objects from boron objects with a similar form is presented. Boron objects are reacted with magnesium vapor at a predetermined time and temperature to form magnesium diboride objects having a morphology similar to the boron object's original morphology.
    Type: Grant
    Filed: August 24, 2001
    Date of Patent: February 4, 2003
    Assignee: Iowa State University Research Foundation
    Inventors: Douglas K. Finnemore, Paul C. Canfield, Sergey L. Bud'ko, Jerome E. Ostenson, Cedomir Petrovic, Charles E. Cunningham, Gerard Lapertot
  • Patent number: 6479095
    Abstract: A high-pressure vessel is allowed to be in an initial state, and a first chamber is disposed downward. Copper or copper alloy is placed in the first chamber, and SiC is set in a second chamber. The high-pressure vessel is tightly sealed, and then the inside of the high-pressure vessel is subjected to vacuum suction through a suction pipe. An electric power is applied to a heater to heat and melt the copper or copper alloy in the first chamber. At a stage at which the molten copper in the first chamber arrives at a predetermined temperature, the high-pressure vessel is inverted by 180 degrees to give a state in which SiC is immersed in the molten copper. An impregnating gas is introduced into the high-pressure vessel through a gas inlet pipe to apply a pressure to the inside of the high-pressure vessel. Thus, SiC is impregnated with the molten copper.
    Type: Grant
    Filed: July 12, 2000
    Date of Patent: November 12, 2002
    Assignee: NGK Insulators, Ltd.
    Inventors: Shuhei Ishikawa, Tsutomu Mitsui
  • Patent number: 6473563
    Abstract: There are disclosed a vaporizer wherein at least a portion of a CVD material feed portion in contact with a CVD material is constituted of a corrosion resistant synthetic resin; and an apparatus for vaporizing and supplying which comprises a cooler and the vaporizer wherein the inside of the CVD material feed portion of the vaporizer and the surface on the side of the vaporization chamber of the CVD material feed portion are constituted of a corrosion resistant synthetic resin; the feed portion in contact with the outside of the vaporizer is constituted of a metal; and the CVD material feed portion which is constituted of a metal and which undergoes heat transfer from the heating means upon heating the vaporization chamber can be cooled with a cooler.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: October 29, 2002
    Assignee: Japan Pionics Co., Ltd.
    Inventors: Yukichi Takamatsu, Takeo Yoneyama, Koji Kiriyama, Akira Asano, Kazuaki Tonari, Mitsuhiro Iwata
  • Patent number: 6468582
    Abstract: The solder pre-coating method including cleaning by dry etching a surface of a gold film on a surface of an electrode formed on a circuit board by covering the surface of the circuit board with a template having an opening; adding tackiness on the surface of the electrode after cleaning by making a tackiness adding compound react with the electrode surface; attaching solder powder on the tackiness added electrode surface; and forming a solder pre-coat layer on the electrode surface by melting the solder powder by heating. Another solder pre-coating method of the present invention adds tackiness on a surface of a gold film on a surface of an electrode after forming a metal film containing one of copper or nickel on the surface of the gold film. According to the present invention, as it eliminates the need for masking work on each individual circuit board in pre-coating solder, a partially solder pre-coated circuit board can be obtained simply and at allow cost.
    Type: Grant
    Filed: April 4, 2000
    Date of Patent: October 22, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shoji Sakemi
  • Patent number: 6465347
    Abstract: A method of forming a tungsten film is capable of forming a tungsten film having a low resistivity. The method of forming a tungsten film (50) on a surface of a workpiece by a vacuum processing system (2) comprises, in sequential steps: a seed crystal growing process for growing tungsten seed crystal grains (48) on the surface of the workpiece in an atmosphere of a film forming gas containing tungsten atoms; a boron-exposure process for exposing the workpiece to an atmosphere of a boron-containing gas for a short time; and a tungsten film forming process for forming a tungsten film by making the tungsten seed crystal grains grow in an atmosphere of a gas containing a film forming gas containing tungsten atoms, and a hydrogen-diluted boron-containing gas. The tungsten film has a low resistivity.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: October 15, 2002
    Assignee: Tokyo Electron Limited
    Inventors: Hotaka Ishizuka, Mitsuhiro Tachibana
  • Patent number: 6455172
    Abstract: A method for producing a laminated metal ribbon comprises the steps of (a) vapor-depositing a third metal layer on at least one welding surface of a first metal ribbon 4 and a second metal ribbon 5 in a vacuum chamber 1, the third metal being the same as or different from a metal or an alloy of the first and second metal ribbons 4, 5; (b) pressure-welding the first metal ribbon 4 to the second metal ribbon 5; and (c) subjecting the resultant laminate 9 to a heat treatment for thermal diffusion.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: September 24, 2002
    Assignee: Hitachi Metals, Ltd.
    Inventors: Kentaro Yano, Noboru Hanai
  • Patent number: 6448644
    Abstract: A flip chip assembly, and methods of forming the same, including a single layer or multilayer substrate in which via holes serve as connections between a semiconductor chip and the substrate. The assembling steps comprise attaching an integrated circuit chip to a rigid or flexible dielectric substrate having a plurality of via holes for connecting respective traces on the substrate with respective input/output terminal pads of the integrated circuit chip. The via holes are aligned and placed on top of the pads so that the pads are totally or partially exposed through the opposite side of the substrate. Electrically conductive material is subsequently deposited in the via holes as well as on the surface of the pads to provide electrical connections between the integrated circuit chip and the traces of the dielectric circuitry.
    Type: Grant
    Filed: July 22, 1998
    Date of Patent: September 10, 2002
    Inventor: Charles W. C. Lin
  • Patent number: 6447849
    Abstract: A surface processing method for processing the surface of an insulating article in which an ion-implanted surface-modified layer is effectively formed on the article 2. In surface processing the article 2 of an insulating material, an electrically conductive thin metal film 50 is first formed on the article surface. A pulsed voltage containing a positive pulsed voltage and a negative pulsed voltage is applied to the article in a plasma containing ions to be implanted to implant ions in the article surface. This implants ions at right angles to the article surface to generate a surface-modified layer 51. There is no possibility of the article 2 being charged up due to application of a pulsed voltage.
    Type: Grant
    Filed: June 21, 2000
    Date of Patent: September 10, 2002
    Assignee: Sony Corporation
    Inventors: Seiichi Watanabe, Kenji Shinozaki, Minoru Kohno, Hiroyuki Mitsuhashi, Minehiro Tonosaki, Masato Kobayashi
  • Patent number: 6444257
    Abstract: An evaporation system has fluorocarbon polymer-coated surfaces to permit easy removal of deposited metal. Evaporated lead-tin films will adhere strongly enough to a Teflon-coated shield so that the lead tin does not fall off during vacuum deposition but the bond between the lead-tin and the Teflon is still weak enough so that the lead-tin coating is easily peeled off, leaving the Teflon coating on the shield intact. The peeled lead-tin is substantially free of contamination so it can be reused, for example, in a subsequent deposition.
    Type: Grant
    Filed: August 11, 1998
    Date of Patent: September 3, 2002
    Assignee: International Business Machines Corporation
    Inventors: John C. Kutt, Craig J. Gilmond, Jeff R. Kelby, Pat N. McCabe, Jr.
  • Patent number: 6444264
    Abstract: A solvent composition for liquid delivery chemical vapor deposition of metal organic precursors, to form metal-containing films such as SrBi2Ta2O9 (SBT) films for memory devices. An SBT film may be formed using precursors such as Sr(thd)2(tetraglyme), Ta(OiPr)4(thd) and Bi(thd)3 which are dissolved in a solvent medium comprising one or more alkanes. Specific alkane solvent compositions may advantageously used for MOCVD of metal organic compound(s) such as &bgr;-diketonate compounds or complexes, compound(s) including alkoxide ligands, and compound(s) including alkyl and/or aryl groups at their outer (molecular) surface, or compound(s) including other ligand coordination species and specific metal constituents.
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: September 3, 2002
    Assignee: Advanced Technology Materials, Inc.
    Inventors: Frank S. Hintermaier, Thomas H. Baum
  • Patent number: 6440495
    Abstract: The present invention provides a method of depositing ruthenium films on a substrate via liquid source chemical vapor deposition wherein the source material is liquid at room temperature and utilizing process conditions such that deposition of the ruthenium films occurs at a temperature in the kinetic-limited temperature regime. Also provided is a method of depositing a thin ruthenium film on a substrate by liquid source chemical vapor deposition using bis-(ethylcyclopentadienyl) ruthenium by vaporizing the bis-(ethylcyclopentadienyl) ruthenium at a vaporization temperature of about 100-300° C. to form a CVD source material gas, providing an oxygen source reactant gas and forming a thin ruthenium film on a substrate in a reaction chamber using the CVD source material gas and the oxygen source reactant gas at a substrate temperature of about 100-500° C.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: August 27, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Christopher P. Wade, Elaine Pao, Yaxin Wang, Jun Zhao
  • Patent number: 6436203
    Abstract: The present invention provides a CVD apparatus and a CVD method for use in forming an Al/Cu multilayered film. The Al/Cu multilayered film is formed in the CVD apparatus comprising a chamber for placing a semiconductor wafer W, a susceptor for mounting the semiconductor wafer W thereon, an Al raw material supply system for introducing a gasified Al raw material into the chamber and a Cu raw material supply system for introducing a gasified Cu raw material into the chamber. The Al/Cu multilayered film is formed by repeating a series of steps consisting of introducing the Al raw material gas into the chamber, depositing the Al film on the semiconductor wafer W by a CVD method, followed by generating a plasma in the chamber in which the Cu raw material gas has been introduced and depositing the Cu film on the semiconductor wafer W by a CVD method. The Al/Cu multilayered film thus obtained is subjected to a heating treatment (annealing), thereby forming a desired Al/Cu multilayered film.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: August 20, 2002
    Assignee: Tokyo Electron Limited
    Inventors: Takeshi Kaizuka, Takashi Horiuchi, Masami Mizukami, Takashi Mochizuki, Yumiko Kawano, Hideaki Yamasaki
  • Patent number: 6432819
    Abstract: The present invention generally provides a method and apparatus for forming a doped layer on a substrate to improve uniformity of subsequent deposition thereover. Preferably, the layer is deposited by a sputtering process, such as physical vapor deposition (PVD) or Ionized Metal Plasma (IMP) PVD, using a doped target of conductive material. Preferably, the conductive material, such as copper, is alloyed with a dopant, such as phosphorus, boron, indium, tin, beryllium, or combinations thereof, to improve deposition uniformity of the doped layer over the substrate surface and to reduce oxidation of the conductive material. It is believed that the addition of a dopant, such as phosphorus, stabilizes the conductive material surface, such as a copper surface, and lessens the surface diffusivity of the conductive material.
    Type: Grant
    Filed: September 27, 1999
    Date of Patent: August 13, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Vikram Pavate, Murali Narasimhan
  • Patent number: 6413860
    Abstract: A plasma enhanced chemical vapor deposition (PECVD) method for depositing high quality conformal tantalum (Ta) films from inorganic tantalum pentahalide (TaX5) precursors is described. The inorganic tantalum halide precursors are tantalum pentafluoride (TaF5), tantalum pentachloride (TaCl5) and tantalum pentabromide (TaBr5). A TaX5 vapor is delivered into a heated chamber. The vapor is combined with a process gas to deposit a Ta film on a substrate that is heated to 300° C.-500° C. The deposited Ta film is useful for integrated circuits containing copper films, especially in small high aspect ratio features. The high conformality of these films is superior to films deposited by PVD.
    Type: Grant
    Filed: April 27, 1999
    Date of Patent: July 2, 2002
    Assignee: Tokyo Electron Limited
    Inventors: John J. Hautala, Johannes F. M. Westendorp
  • Patent number: 6413576
    Abstract: Methods for protecting the surface of an uninsulated portion of a copper circuit from environmental contamination detrimental to joining the surface to another metal surface, said method comprising the step of coating the surface with a layer of a ceramic material having a thickness that is suitable for soldering without fluxing and that is sufficiently frangible when the surfaces are being joined to obtain metal-to-metal contact between the surfaces. Coated electronic packages including semiconductor wafers are also disclosed.
    Type: Grant
    Filed: October 5, 1999
    Date of Patent: July 2, 2002
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: Timothy W. Ellis, Nikhil Murdeshwar, Mark A. Eshelman, Christian Rheault
  • Patent number: 6413456
    Abstract: In a method for manufacturing electronic parts by laminating metal thin films and insulating thin films on a support, a mold releasing agent is applied to the support before the start of lamination. Alternatively, the mold releasing agent is applied to the surface of the laminate during the lamination step, and then lamination is resumed. Therefore, the laminate can be prevented from cracking when the laminate is separated from the support or divided into plural pieces in the lamination direction. Thus, the reliability and productivity of electronic parts improve.
    Type: Grant
    Filed: December 18, 1998
    Date of Patent: July 2, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuyoshi Honda, Noriyasu Echigo, Masaru Odagiri, Nobuki Sunagare
  • Patent number: 6410432
    Abstract: A chemical vapor deposition (CVD) method for depositing high quality conformal tantalum/tantalum nitride (Ta/TaNx) bilayer films from inorganic tantalum pentahalide (TaX5) precursors and nitrogen is described. The inorganic tantalum halide precursors are tantalum pentafluoride (TaF5), tantalum pentachloride (TaCl5) and tantalum pentabromide (TaBr5). A TaX5 vapor is delivered into a heated reaction chamber. The vapor is combined with a process gas to deposit a Ta film and a process gas containing nitrogen to deposit a TaNx film on a substrate that is heated to 300° C.-500° C. The deposited Ta/TaNx bilayer film is useful for integrated circuits containing copper films, especially in small high aspect ratio features. The high conformality of these films is superior to films deposited by PVD.
    Type: Grant
    Filed: April 27, 1999
    Date of Patent: June 25, 2002
    Assignee: Tokyo Electron Limited
    Inventors: John J. Hautala, Johannes F. M. Westendorp
  • Patent number: 6383573
    Abstract: A process is provided for producing coated synthetic bodies during which, before the coating, the surface to be coated is subjected to a pretreatment in an excited gas atmosphere. The surface is then coated. The gas atmosphere is predominantly formed of a noble gas and nitrogen and/or hydrogen, and the ionic energy in the gas atmosphere and in the are of the surface to be coated is not more than 50 eV. The ionic energy is selected to be not more than 20 eV, preferable not more than 10 eV. The gas atmosphere is excited by means of a plasma discharge or by means of UV radiation.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: May 7, 2002
    Assignee: Unaxis Balzers Aktiengesellschaft
    Inventors: Eugen Beck, Jürgen Ramm, Heinrich Zimmermann
  • Patent number: 6383555
    Abstract: A substrate is located within a deposition chamber, the substrate defining a substrate plane. A liquid precursor is misted by ultrasonic or venturi apparatus, to produce a colloidal mist. The mist is generated, allowed to settle in a buffer chamber, filtered through a system up to 0.01 micron, and flowed into the deposition chamber between the substrate and barrier plate to deposit a liquid layer on the substrate. The liquid is dried to form a thin film of solid material on the substrate, which is then incorporated into an electrical component of an integrated circuit.
    Type: Grant
    Filed: July 13, 2000
    Date of Patent: May 7, 2002
    Assignees: Symetrix Corporation, Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichiro Hayashi, Larry D. McMillan, Carlos A. Paz de Araujo
  • Patent number: 6383669
    Abstract: Zirconium precursors for use in depositing thin films of or containing zirconium oxide using an MOCVD technique have the following general formula: Zrx(OR)yL, wherein R is an alkyl group; L is a &bgr;-diketonate group; x=1 or 2; y=2, 4 or 6; and z=1 or 2.
    Type: Grant
    Filed: December 1, 1999
    Date of Patent: May 7, 2002
    Assignee: The Secretary of State for Defence in Her Britannic Majesty's Government of the United Kingdom of Great Britain and Northern Ireland
    Inventors: Timothy J Leedham, Anthony C Jones, Michael J Crosbie, Dennis J Williams, Peter J Wright, Penelope A Lane
  • Patent number: 6372364
    Abstract: A thin film product having a nanostructured surface, a laminate product including the thin film and a temporary substrate opposite the nanostructured surface, a laminate product including the thin film and a final substrate attached to the nanostructured surface and a method of producing the thin film products. The thin film is particularly useful in the electronics industry for the production of integrated circuits, printed circuit boards and EMF shielding. The nanostructured surface includes surface features that are mostly smaller than one micron, while the dense portion of the thin film is between 10-1000 nm. The thin film is produced by coating a temporary substrate (such as aluminum foil) with a coating material (such as copper) using any process. One such method is concentrated heat deposition or a combustion, chemical vapor deposition process.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: April 16, 2002
    Assignee: MicroCoating Technologies, Inc.
    Inventors: Andrew T. Hunt, Henry A. Luten, III
  • Publication number: 20020028383
    Abstract: A member having a lithium metal thin film is provided, which is extremely thin, uniform, and not degraded by air. The member includes a substrate and a thin lithium metal film formed on the substrate by a vapor deposition method. The thin film typically has a thickness of 0.1 &mgr;m to 20 &mgr;m. The substrate is typically made of a metal, an alloy, a metal oxide, or carbon. The substrate typically has a thickness of 1 &mgr;m to 100 &mgr;m. The member is used as an electrode member for a lithium cell.
    Type: Application
    Filed: June 18, 2001
    Publication date: March 7, 2002
    Inventors: Hirokazu Kugai, Nobuhiro Ota, Shosaku Yamanaka
  • Patent number: 6352743
    Abstract: Methods of protecting from atmospheric contaminants, or removing atmospheric contaminants from, the bonding surfaces of copper semiconductor bond pads by coating a bond pad with a layer of a ceramic material having a thickness that is suitable for soldering without fluxing and that is sufficiently frangible during ball or wedge wire bonding to obtain metal-to-metal contact between the bonding surfaces and the wires bonded thereto. Coated semiconductor wafers are also disclosed.
    Type: Grant
    Filed: June 11, 1999
    Date of Patent: March 5, 2002
    Assignee: Kulicke & Soffa Investments, Inc.
    Inventors: Timothy W. Ellis, Nikhil Murdeshwar, Mark A. Eshelman
  • Patent number: 6344281
    Abstract: IC fabrication employs the deposition of aluminum as a metallization layer. Frequently, the aluminum is doped with copper in small amounts to improve electric properties. Low temperature deposition of these layers is preferred to ensure the proper microstructure and surface roughness. Low temperature deposition (below about 300° C.) results in the formation of copper precipitates which can be difficult to remove. Annealing the layer formed, either prior to, or after formation of capping layers and additional layers thereon, drives the copper precipitate back into solution, permitting small dimension fabrication.
    Type: Grant
    Filed: October 18, 1999
    Date of Patent: February 5, 2002
    Assignee: Cypress Semiconductor Corporation
    Inventors: Mark Smith, Ivan Ivanov, Frederick Eisenmann