Abstract: There are provided a porous material and a process for producing the same. The porous material has a plurality of columnar pores and an area surrounding the pores, and the area is an amorphous area containing C, Si, Ge or a combination thereof.

Abstract: A joined body and method of producing the joined body are provided. A first member containing at least a ceramic and a second member containing at least one of a metal and a metal composite are joined with each other via a metal adhesive. The metal adhesive contains at least indium and at least one material containing at least a component capable of reducing the melting point of indium and is provided between the first and second members to provide a laminate. The laminate is heated at a temperature in a solid-liquid coexisting range of an alloy comprising indium and the indium melting point reducing component to join the first and second members.

Abstract: According to various embodiments and aspects of the present invention, there is provided a dynamically tunable thin film interference coating including one or more layers with thermo-optically tunable refractive index. Tunable layers within thin film interference coatings enable a new family of thin film active devices for the filtering, control, modulation of light. Active thin film structures can be used directly or integrated into a variety of photonic subsystems to make tunable lasers, tunable add-drop filters for fiber optic telecommunications, tunable polarizers, tunable dispersion compensation filters, and many other devices.

Abstract: A curable underfill encapsulant composition that is applied directly onto semiconductor wafers before the wafers are diced into individual chips. The composition comprises a thermally curable epoxy resin, a solvent, an imidazole-anhydride curing agent, fluxing agents, and optionally, wetting agents. Various other additives, such as defoaming agents, adhesion promoters, flow additives and rheology modifiers may also be added as desired. The underfill encapsulant is B-stageable to provide a coating on the wafer that is smooth, non-tacky and will allow the wafer to be cleanly diced into individual chips. A method for producing an electronic package containing the B-stageable material may also utilize an unfilled liquid curable fluxing material on the substrate to which the chip is to be attached.

Abstract: A conductive silicon composite in which particles of the structure that silicon crystallites are dispersed in silicon dioxide are coated on their surfaces with carbon affords satisfactory cycle performance when used as the negative electrode material in a non-aqueous electrolyte secondary cell.

Abstract: A first metal is plated onto a substrate comprising a second metal by immersing the substrate into a bath comprising a compound of the first metal and an organic diluent. The second metal is more electropositive than the first metal. The organic diluent has a boiling point higher than a eutectic point in a phase diagram of the first and second metals. The bath is operated above the eutectic point but below the melting point of the second metal. For example, bismuth is immersion plated onto lead-free tin-based solder balls, and subsequently redistributed by fluxless reflow. Plated structures are also provided.

Abstract: It is an object of the present invention to provide a surface-treated copper foil wherein a surface layer which is situated on a side being not bonded to a resin in a copper foil for a printed-wiring board and on which a copper direct drilling process by carbon dioxide laser is easily applied is prepared with a small amount of a covering material in accordance with a simple manner. In the copper foil used for a direct drilling process by laser of the present invention, 50 to 1000 mg/m2 of a covering layer consisting of iron and tin, or a covering layer made of an alloy prepared from iron, tin, and at least one member selected from the group consisting of nickel, cobalt, zinc, chromium, and phosphorous is provided on at least one side of the copper foil.

Abstract: A heat radiating structure for an electronic device, for cooling an electronic part by transferring the heat generated in the electronic part to a heat spreader has a grading layer, which is located between the electronic part and the heat spreader and having a coefficient of thermal expansion varied such that it is substantially equal or approximate at its portion on the electronic part side to the coefficient of thermal expansion of the electronic part and such that it is substantially equal or approximate at its portion on the heat spreader side to the coefficient of thermal expansion of the heat spreader.

Abstract: A package is configured as a composite component with a substrate, at least one semiconductor component, and an enclosure, which are joined to one another. The heat-dissipating substrate is a single-layer or multilayer substrate with a thermal conductivity, transversely with respect to a joining surface to which the semiconductor component is joined, of greater than 170 W/m. The substrate may be a layered structure and/or a structure of graduated material composition, and it has an asymmetrical thermal expansion characteristic. By suitable selection the layers or the material graduation, it is possible to reduce and limit the shear distortion of the composite component formed of the substrate, the semiconductor component, and the enclosure.

Abstract: A conductive material is electroplated onto a platable resistive metal barrier layer(s) employing a plating bath optionally comprising a super filling additive and a suppressor, and by changing the current or voltage as a function of the area of plated metal. A structure is also provided that comprises a substrate, a platable metal barrier layer(s) located on the substrate and a relatively continuous uniform electroplated layer of a conductive material located on the platable resistive metal barrier layer.

Abstract: An imaging cell reduces recombination losses and increases sensitivity by forming a low resistance lateral path with a silicon germanium layer of a conductivity type that is sandwiched between silicon layers of the same conductivity type. The silicon germanium layer also provides a quantum well from which photo-generated electrons find it difficult to escape, thereby providing a barrier that reduces cross-talk.

Abstract: There is provided a method for producing a metal/ceramic bonding article, the method including the steps of: arranging a metal plate 12 of an overall-rate solid solution type alloy on a ceramic substrate 10; and heating the metal plate 12 and the ceramic substrate 10 in a non-oxidizing atmosphere at a temperature of lower than a melting point of the alloy to bond the metal plate 12 directly to the ceramic substrate 10. According to this method, it is possible to easily bond an alloy plate directly to a ceramic substrate, and it is possible to inexpensively provide an electronic member for resistance without causing the alloy plate to be deteriorated.

Abstract: Reworkable thermoset acid-cleavable acetal and ketal based epoxy oligomers can be B-staged into a tack free state. Compositions containing the epoxy oligomers are employed in a reworkable assembly such as a wafer-level underfilled microelectronic package.

Abstract: A main object of the present invention is to provide a charge-giving body capable of forming a pattern having a minute structure on a surface of a semiconductor by a simple process; and a minute pattern-formed body. The present invention is a charge-giving body, comprising a defected region in which defect is introduced into a crystal structure in a crystalline semiconductor surface, charge being given from the defected region.

Abstract: One embodiment disclosed pertains to a method for inspecting a substrate. The method includes inserting the substrate into a holding place of a substrate holder, moving the substrate holder under an electron beam, and applying a voltage to a conductive element of the substrate holder. The voltage applied to the conductive element reduces a substrate edge effect. Another embodiment disclosed relates to an apparatus for holding a substrate that reduces a substrate edge effect. The apparatus includes a holding place for insertion of the substrate and a conductive element. The conductive element is positioned so as to be located within a gap between an edge of the holding place and an edge of the substrate.

Abstract: Microelectronic and optoelectronic packaging embodiments are described with underfill materials including polybenzoxazine, having the general formula:

Abstract: The present invention provides a thermosetting resin composition useful as a highly filled low CTE underfilling sealant composition which completely fills the underfill space in a semiconductor device, such as a flip chip assembly which includes a semiconductor chip mounted on a carrier substrate, enables the semi-conductor to be securely connected to a circuit board by heat curing and with good productivity, and demonstrates acceptable heat shock properties (or thermal cycle properties). The thermosetting resin composition which is used as an underfilling sealant between such a semiconductor device and a circuit board to which the semiconductor device is electrically connected, includes an epoxy resin component, a latent hardener component, and a polysulfide-based toughening component. The latent hardener component includes a modified amide component and a latent catalyst therefor.

Abstract: Compound preforms are provided having a first region, including a porous ceramic and a second region including a porous or solid ceramic in which the two regions differ in composition. The compound preform is infiltrated with a liquid metal which is then solidified to form a metal matrix composite.

Abstract: A thin film based nanoporous alumina template has been developed which allows the in situ removal of an electrically insulating alumina barrier layer at the pore bases. This barrier free nanoporous system has great utility for electrodeposition of a wide variety of nanowire materials. An exemplary multilayer thin film precursor is provided comprising Al (anodization layer), Ti (diffusion barrier) and Pt (active electrode) on a Si substrate. Aluminum anodization in sulfuric acid with a subsequent applied voltage ramping program produces a Pt electrode at the base of the nanopores without the additional steps of alumina removal, barrier layer dissolution, and metal deposition onto the pore bottoms.

Abstract: A substrate for epitaxial growth allowing formation of an Al-containing group III nitride film having high crystal quality is provided. A nitride film containing at least Al is formed on a 6H—SiC base by CVD at a temperature of at least 1100° C., for example. The substrate for epitaxial growth allowing formation of an Al-containing group III nitride film having high crystal quality is obtained by setting the dislocation density of the nitride film to not more than 1×1011/cm2, the full width at half maximum of an X-ray rocking curve for (002) plane to not more than 200 seconds and the full width at the half maximum of the X-ray rocking curve for (102) plane to not more than 1500 seconds.

Abstract: The semiconductor laser of this invention includes an active layer formed in a c-axis direction, wherein the active layer is made of a hexagonal-system compound semiconductor, and anisotropic strain is generated in a c plane of the active layer.

Abstract: A semiconductor device wherein a resin containing as a cross-linking component a compound having a plurality of styrene group and represented by chemical formula [1] is used as an insulating material: where R is a hydrocarbon structure which may have a substituent group or groups, R1 is hydrogen, methyl, or ethyl, m is and integer of 1 to 4, and n is an integer of not less than 2. With this, a semiconductor device and a semiconductor package which show excellent transmission characteristics and less power consumption are provided.

Abstract: A spinel composition of the invention includes a monocrystalline lattice having a formula Mg1-w?wAlx-y?yOz, where w is greater than 0 and less than 1, x is greater than 2 and less than about 8, y is less than x, z is equal to or greater than about 4 and equal to or less than about 13, ? is a divalent cationic element having an ionic radius greater than divalent magnesium, and ? is a trivalent cationic element having an ionic radius greater than trivalent aluminum. The monocrystalline lattice has tetrahedral and octahedral positions, and most of the magnesium and ? occupy tetrahedral positions. In one embodiment, the molar ratio of aluminum to the amount of magnesium, ? and ? can be controlled during growth of the monocrystalline lattice thereby forming a spinel substrate suitable for heteroepitaxial growth of III-V materials. A method of the invention, includes forming a monocrystalline lattice of a spinel composition.

Abstract: The present invention provides a silicon/silicon carbide composite and having a high quality in avoiding warp or breakage and in a corrosion resistance, a durability, a heat shock resistance and particularly suitable used for semiconductor heat treatment member such as a dummy wafer or the like and a process for manufacturing a high purity silicon/silicon carbide composite containing a limited amount of carbon left without reaction. The present invention uses a silicon/silicon carbide composite comprised of 45 to 75 weight % of silicon and 25 to 55 weight % silicon carbide, said silicon carbide being formed from an assembly of fibers each having a thickness of 150 ?m or less and a length of 0.8 to 3.5 mm. The present invention is directed to a process for manufacturing a silicon/silicon carbide composite which comprises a first step where cellulose fibers with a fiber thickness of 150 ?m or less is heated at a temperature of 500° C. to 1500° C.

Abstract: Selected micro- and nanoscale, 1-dimensional and 2-dimensional periodic and random structures generated on silicon and other substrates are expected to perform as compliant, thin films for gettering defects and for accommodating lattice and thermal expansion mismatches during heteroepitaxial growth thereon, thereby leading to relatively defect-free, heteroepitaxial films of chosen thicknesses. The as-grown epilayers or completed electronic and optoelectronic devices can be bonded to a second substrate such as glass, or plastic following separation thereof from the substrate on which they were formed using preferential etching of a readily detachable, nanoporous silicon or silicon dioxide layer introduced between the generated structures and the substrate.

Abstract: A structure having a first part and at least one second part. The second part is electrically insulated from the first part and the parts are formed in the same wafer of a material. The first and second parts have the same thickness, extend in the same plane and have at least one mutually adjacent edge. The adjacent edges are separated by a spacing. In addition there is at least one joint of insulating material arranged in the spacing to make the first and second parts integral. The structure may be used for sensors and isolated circuits.

Abstract: An epoxy resin composition for encapsulation of semiconductors which contains substantially no halogen-based flame retarding agents or antimony compounds having properties of moldability, flame retardance, high-temperature storage characteristics, reliability for moisture resistance, and solder cracking resistance. The epoxy resin composition for encapsulating semiconductors contains (A) an epoxy resin, (B) a phenolic resin, (C) a curing accelerator, (D) an inorganic filler and (E) a phosphazene compound as essential components, the total weight of phosphate ion and phosphite ion contained in the phosphazene compound being not more than 500 ppm. Further, the epoxy resin composition may optionally contain a flame-retarding assistant or an ion scavenger.

Abstract: A diffusion barrier multi-layer structure for a TFT LCD by the LTPS process and the process for fabricating thereof are disclosed. By increasing the coarseness between two layers of the diffusion barrier multi-layer structure with a plasma treatment, or by forming a loose and porous impurity collecting layer between two layers of the diffusion barrier multi-layer structure to trap the impurity atoms, the impurity diffusion can be effectively obstructed.

Abstract: Thermosetting resin compositions useful as underfill sealants for mounting semiconductor devices onto a circuit board are provided, which include epoxy resins, an adhesion promoter having at least two secondary amine groups, and a curative based on the combination of nitrogen-containing compounds and transition metal complexes.

Abstract: The invention includes the use of a high-modulus fiber metal matrix composite material as a backing plate for physical vapor deposition targets, as a lid for microelectronics packages, as a heat spreader, and as a heat sink. In one implementation, copper-coated carbon fibers are mixed with copper powder. In another implementation, the mixture is consolidated to a carbon fiber metal matrix composite by using a vacuum hot press. The resultant backing plate has a coefficient of thermal expansion of 4.9×10−6/C, thermal conductivity of at least 300 W/mK, density of greater than 99% of theoretical, and the composite material of the backing plate is 30% lighter than Cu while also having higher stiffness than Cu. The high-modulus fiber metal matrix composite backing plate can be used for high power W, Ta, and ceramic PVD targets.

Abstract: A method of pretreating a copper surface for protecting the surface from oxidation, by immersing the surface in a solution containing organic solderabilty preservatives, such as BenzoTriAzole, with the addition of a zinc salt. The method is particularly useful in the manufacturing of electronic Printed Circuit Boards for protecting the copper surfaces during the solder processes when the PCB undergoes high temperature. The addition of the zinc salts also gives the additional advantage of increasing the solderabilty properties of the copper surface (i.e. wettability and adhesion).

Abstract: A peeling layer 2 is formed on an element-forming substrate 1, an element-forming layer 3 including an electrical element is formed on the peeling layer, the element-forming layer is joined by means of a dissolvable bonding layer 4 to a temporary transfer substrate 5, the bonding force of the peeling layer is weakened to peel the element-forming layer from the element-forming substrate, the layer is moved to the temporary transfer substrate 5 side, a curable resin 6 is applied onto the element-forming layer 3 which has been moved onto the temporary transfer substrate 5, the resin is cured to form a transfer substrate 6, and the bonding layer 4 is dissolved to peel the temporary transfer substrate 5 from the transfer substrate 6, resulting in a structure in which a transfer substrate is formed directly on the element-forming layer 3.

Abstract: A method of fabricating a semiconductor device, having a reduced-oxygen Cu—Zn alloy thin film (30) electroplated on a Cu surface (20) by electroplating, using an electroplating apparatus, the Cu surface (20) in a unique chemical solution containing salts of zinc (Zn) and copper (Cu), their complexing agents, a pH adjuster, and surfactants; and annealing the electroplated Cu—Zn alloy thin film (30); and a semiconductor device thereby formed. The method controls the parameters of pH, temperature, and time in order to form a uniform reduced-oxygen Cu—Zn alloy thin film (30), having a controlled Zn content, for reducing electromigration on the Cu—Zn/Cu structure by decreasing the drift velocity therein which decreases the Cu migration rate in addition to decreasing the void formation rate, for improving device reliability, and for increasing corrosion resistance.

Abstract: A tin-lead solder alloy containing copper and optionally silver as its alloying constituents. The solder alloy consists essentially of, by weight, about 55% to about 75% tin, about 11% to about 44% lead, up to about 4% silver, nickel, palladium, platinum and/or gold, greater than 1% to about 10% copper, and incidental impurities. The solder alloys contain a small portion of CuSn intermetallic compounds, and exhibit a melting mechanism in which all but the intermetallic compounds melt within a narrow temperature range, though the actual liquidus temperature of the alloys may be considerably higher, such that the alloys can be treated as requiring peak reflow temperatures of about 250° C. or less. The intermetallic compounds precipitate out to form a diffusion barrier that increases the reliability of solder connections formed therewith.

Abstract: A semiconductor device is disclosed containing a semiconductor die having a trimetal electrode soldered to a substrate by a Sn—Sb solder.

Abstract: In a process for producing a substrate for use in a semiconductor element: a first GaN layer having a plurality of pits at its upper surface is formed; and then a second GaN layer is formed by growing a GaN crystal over the first GaN layer until the upper surface of the second GaN layer becomes flattened. Each of the above plurality of pits has an opening area of 0.005 to 100 &mgr;m2 and a depth of 0.1 to 10.0 &mgr;m.

Abstract: A flip-chip type semiconductor device sealed with a light transmissive epoxy resin composition comprising (A) an epoxy resin having the following general formula (i):  wherein n is 0 or a positive number, (B) a curing accelerator, and (C) an amorphous silica-titania co-melt as at least one of inorganic fillers, said composition satisfying the relationship of the following formula (1): [ { 2 ⁢ ( n A 2 + n C 2

Abstract: Heat dissipation devices and molding processes for fabricating such devices, which have at least two regions comprising different conductive materials such that efficient thermal contact is made between the different conductive materials. The molding processes include injection molding at least two differing conductive materials.

Abstract: A highly reliable member for a semiconductor device, in which a high melting point metallizing layer, which consists mainly of a high melting point metal such as W and/or Mo, and an intervening metal layer, which has a melting point of not greater than 1,000° C. and consists mainly of at least one selected from among Ni, Cu and Fe, are provided on an AlN substrate material in this order on the AlN substrate material, and a conductor layer consisting mainly of copper is directly bonded to the intervening metal layer without intervention of a solder material layer. A semiconductor element or the like is mounted on the member for a semiconductor device, thereby fabricating a semiconductor device. The high melting point metallizing layer is formed on an aluminum nitride substrate by post-fire or co-fire metallization.

Abstract: A part has a body unit; and one or more leg formed on the body unit. One or more slit is formed on the body unit adjacent to the leg. The legs are inserted to insert holes of a printed wiring board or the like and soldered thereto. Since the slit is formed adjacent to the leg, the heat applied to the leg for the soldering is not radiated by the body unit by virtue of the slit. Therefore, the part can be reliably attached to the printed wiring board or the like.

Abstract: Organic molecules are partially oxidized in that the gas phase on supported and immobilized photocatalysts deposited having a nanostructure. the photocatalysts are semiconductors such as titanium dioxide and are preferentially coated onto a substrate by flame aerosol coating.

Abstract: A method for creating an electroconductive joint in connection with conductor rails made of copper or copper alloy, in which method in between the conductor rail elements to be joined, there is applied soldering/brazing agent, whereafter at least the junction area is heated, so that a joint is created. According to the method, the employed soldering/brazing agent is a layered soldering/brazing agent foil (3) comprising surface layers (4, 6) and an intermediate layer (5) therebetween, and the junction area is thermally treated, so that a diffusion joint is created.

Abstract: A semiconductor device structure and method for manufacture includes a substrate having a top first layer of dielectric material; a second layer of material selected from the group including: amorphous Silicon (a-Si), amorphous Ge (a-Ge) or alloys thereof, located on top of the first layer; and, a third layer located on top of the a-Si, a-Ge, or alloys thereof layer, wherein the second layer provides adhesion between the first and third layers of the structure. Additionally, a semiconductor device structure and method for manufacture includes an insulating structure comprising a multitude of dielectric and conductive layers with respective a-Si, a-Ge, or alloys thereof bonding layers disposed to enhance adhesion between the different layers.

Abstract: Cobalt-nickel oxide films of nominal 100 nm thickness, and resistivity as low as 0.06 &OHgr;·cm have been deposited by spin-casting from both aqueous and organic precursor solutions followed by annealing at 450° C. in air. Films deposited on sapphire substrates exhibit a refractive index of about 1.7 and are relatively transparent in the wavelength region from 0.6 to 10.0 &mgr;m. They are also magnetic. The electrical and spectroscopic properties of the oxides have been studied as a function of x=Co/(Co+Ni) ratio. An increase in film resistivity was found upon substitution of other cations (e.g., Zn2+, Al3+) for Ni in the spinel structure. However, some improvement in the mechanical properties of the films resulted. On the other hand, addition of small amounts of Li decreased the resistivity. A combination of XRD, XPS, UV/Vis and Raman spectroscopy indicated that NiCo2O4 is the primary conducting component and that the conductivity reaches a maximum at this stoichiometry.

Abstract: An object of the present invention is to provide solder bumps sufficiently satisfying the expected functions and having a small diameter which conventional methods cannot attain, a semiconductor device on which these bumps are mounted, and a bump transferring sheet. The present invention provides a method for forming the bumps, which includes forming a solder alloy material layer and flux material layer one by one on an intermediate metallic layer formed on an external electrode pad in a semiconductor device, and then fusing these layers, wherein each of the solder alloy material layer and flux material layer is formed by a liquid spraying method (e.g., ink jetting method).

Abstract: Method for manufacturing electromagnetic radiation reflecting devices, said method comprising the steps of: a) providing a silicon substrate defined by at least one first free surface, b) forming on said first surface a layer of protective material provided with an opening which exposes a region of the first free surface, and c)etching the region of the free surface by means of an anisotropic agent to remove at least one portion of the substrate and define a second free surface of the substrate inclined in relation to said first surface. Furthermore, said first free surface is parallel to the crystalline planes {110} of silicon substrate and said step (c) comprises a progressing step of the anisotropic agent such that the second free surface resulting from the etching step is parallel to the planes {100} of said substrate.

Abstract: A nitride-based semiconductor element enabling formation of a nitride-based semiconductor layer having low dislocation density, consisting of a material different from that of an underlayer, on the underlayer with a small thickness is obtained. This nitride-based semiconductor element comprises a plurality of mask layers formed at a prescribed interval to be in contact with the upper surface of the underlayer while partially exposing the underlayer and the nitride-based semiconductor layer, formed on the upper surface of the underlayer and the mask layers, consisting of the material different from that of the underlayer. The minimum distance between adjacent mask layers is smaller than the width of an exposed part of the underlayer located between the adjacent mask layers.

Abstract: A joined structure includes a metal terminal, a ceramic member and a joining layer between the metal terminal and the ceramic member. The joining layer includes a metal adhesive layer containing at least indium metal. The invention further provides a joined structure including a metal member, a ceramic member, and a joining layer. The metal member includes a tip face and a side face. A hollow portion is formed in the ceramic member. The joining layer is formed between a bottom surface facing the hollow portion and the tip face of member, and further formed between a side wall surface facing the hollow portion and the side face of the metal member. The joining layer also includes a metal adhesive layer containing at least indium metal.

Abstract: A multilayer structure with controlled internal stresses comprising, in this order, a first main layer (110a), at least a first constraint adaptation layer (130) in contact with the first main layer, at least a second stress adaptation layer (120) put into contact by adhesion with said first stress adaptation layer, and a second main layer (110b) in contact with the second stress adaptation layer, the first and second stress adaptation layers having contact stresses with the first and second main layers. Application to the realization of electronic circuits and membrane devices.

Abstract: A heat spreader includes an electromagnetic soft iron sheet and a plating layer formed on the surface of the sheet. The plate is made of a rustproof metal. An electronic component is mounted on an aluminum base with an HITT substrate and the heat spreader in between. The heat spreader is manufactured at low cost and has a favorable property as a heat dissipating material.