Abstract: A method of patterning a plurality of layers of a work piece in a series of writing cycles in one or a plurality of write machines, the workpiece being deviced to have a number of N layers and layers of the workpiece having one or a plurality of boundary condition(s) for pattern position, the method comprising the steps of: determining the boundary conditions of layers 1 to N, calculating deviations due to the boundary conditions and calculating a compensation for the deviation of the first transformation added with the assigned part of the deviation due to the boundary conditions.

Abstract: A plurality of gate electrode patterns to be laid out in parallel are alternately set as first patterns to be formed in a first exposure step of double patterning and as second patterns to be formed in a second exposure step. Subsequently, a circuit that includes transistor pairs each formed by connecting one of the first patterns and one of the second patterns in parallel is laid out. This reduces the risk of variations in characteristics of transistors caused by double patterning.

Abstract: Some embodiments of the present disclosure relate to a method of patterning a workpiece with a mask, wherein a scale factor between a geometry of the mask and a corresponding target shape of the mask is determined. The scale factor results from thermal expansion of the mask and geometry due to heating of the mask during exposure to radiation by an electron beam (e-beam) in the mask manufacturing process. A number of radiation pulses necessary to dispose the geometry on the mask is determined. A scale factor for the mask is then determined from the number of pulses. The target shape is then generated on the mask by re-scaling the geometry according to the scale factor prior to mask manufacturing. This method compensates for thermal deformation due to e-beam heating to improve OVL variability in advanced technology nodes.

Abstract: A method of providing a photolithography pattern can be provided by identifying at least one weak feature from among a plurality of features included in a photolithography pattern based on a feature parameter that is compared to a predetermined identification threshold value for the feature parameter. A first region of the weak feature can be classified as a first dosage region and a second region of the weak feature can be classified as a second dosage region. Related methods and apparatus are also disclosed.

Abstract: Correction of reticle defects, such as EUV reticle defects, is accomplished with a second exposure. Embodiments include obtaining a reticle with a first pattern corresponding to a design for a wafer pattern, detecting dark defects and/or design/OPC weak spots in the first pattern, exposing a resist covered wafer using the reticle, and exposing the wafer using a second reticle with a second pattern or a second image field with openings corresponding to the dark defects, with a repair pattern on the reticle or on another reticle, or with a programmed e-beam or laser writer.

Abstract: The present invention provides a method for manufacturing a resist composition which is used in a manufacturing process of a semiconductor apparatus, comprising the steps of: cleaning a manufacturing apparatus for the resist composition with a cleaning solution; analyzing the cleaning solution taken out from the manufacturing apparatus; repeating the step of cleaning and the step of analyzing until a concentration of a nonvolatile component(s) contained in the cleaning solution became 10 ppm or less; and manufacturing the resist composition by using the manufacturing apparatus after the step of repeating. There can be provided a method for manufacturing a resist composition which can manufacture a resist composition lowered in coating defects.

Abstract: The present application discloses methods, systems and devices for using charged particle beam tools to pattern and inspect a substrate. The inventors have discovered that it is highly advantageous to use write and inspection tools that share the same or substantially the same stage and the same or substantially the same designs for respective arrays of multiple charged particle beam columns, and that access the same design layout database to target and pattern or inspect features. By using design-matched charged particle beam tools, correlation of defectivity is preserved between inspection imaging and the design layout database. As a result, image-based defect identification and maskless design correction, of random and systematic errors, can be performed directly in the design layout database, enabling a fast yield ramp.

Abstract: The present application discloses methods, systems and devices for using charged particle beam tools to pattern and inspect a substrate. The inventors have discovered that it is highly advantageous to use write and inspection tools that share the same or substantially the same stage and the same or substantially the same designs for respective arrays of multiple charged particle beam columns, and that access the same design layout database to target and pattern or inspect features. By using design-matched charged particle beam tools, correlation of defectivity is preserved between inspection imaging and the design layout database. As a result, image-based defect identification and maskless design correction, of random and systematic errors, can be performed directly in the design layout database, enabling a fast yield ramp.

Abstract: Methods for modifying a layout design of an integrated circuit using model-based retargeting are provided. In one embodiment, a method for modifying an integrated circuit layout design includes providing an initial integrated circuit layout design, correcting the initial layout design for etch-induced lithography errors to generate an etch-corrected layout design, and fragmenting the etch-corrected layout design to generate a fragmented layout design comprising a plurality of fragments. The method further includes performing a bridging condition simulation and a pinching condition simulation on the fragmented layout design and calculating a required movement for at least one fragment of the fragmented layout design based on the bridging condition simulation and the pinching condition simulation.

Abstract: A dose and focus monitor structure includes at least one complementary set of unit dose monitors and at least one complementary set of unit focus monitors. Each complementary set of unit dose monitors generate edges on a photoresist layer such that the edges move in opposite directions as a function of a dose offset. Each complementary set of unit focus monitors generates edges on the photoresist layer such that the edges move in opposite directions as a function of a focus offset. The dose and focus monitor structure generates self-compensating differential measurements of the dose offset and the focus offset such that the dose offset measurement and the focus offset measurement are independent of each other.

Abstract: An optical thin film can have a refractive index variation along a dimension that is perpendicular to its thickness. Two areas that have equal physical thicknesses can have different optical thicknesses. Including the thin film as a layer in a thin film optical filter can provide a corresponding variation in the filter's spectral properties. Dosing an optical thin film with ultraviolet light can cause the refractive index variation. Subjecting the film to hydrogen can increase the refractive index's response to the dose of light. Dosing a region of a thin film optical filter with ultraviolet light can change the spectral properties of the region, for example shifting an out-of-specification optical filter into specification thereby increasing manufacturing yield. An agent can promote the film's response to the dose.

Abstract: A method of quantifying a lithographic proximity effect and determining a lithographic exposure dosage is disclosed. In an exemplary embodiment, the method for determining an exposure dosage comprises receiving a design database including a plurality of features intended to be formed on a workpiece. A target region of the design database is defined such that the target region includes a target feature. A region of the design database proximate to the target region is also defined. An approximation for the region is determined, where the approximation represents an exposed area within the region. A proximity effect of the region upon the target feature is determined based on the approximation for the region. A total proximity effect for the target feature is determined based on the determined proximity effect of the region upon the target feature.

Abstract: Methods and systems for designing a binary spatial filter based on data indicative of a desired exposure condition to be emulated by an inspection system, and for implementing the binary spatial filter in an optical path of the inspection system, thereby enabling emulation of the desired exposure condition by interacting a light beam of the inspection system with the binary spatial filter. The present method and systems enable on-the-fly and on-demand design and implementation/generation of spatial filters for use in inspection systems.

Abstract: Systems, methods, and other embodiments associated with dynamically generating jog patches are described. In one embodiment, a method includes determining a virtual edge within metal of a design at a jog rule violation. The design is a design of an integrated circuit and the virtual edge is an edge of a rectangle associated with one or more edges of the jog rule violation. The example method may also include dynamically generating a jog patch by expanding the metal from the virtual edge.

Abstract: A substrate is loaded onto a substrate support of a lithographic apparatus, after which the apparatus measures locations of substrate alignment marks. These measurements define first correction information allowing the apparatus to apply a pattern at one or more desired locations on the substrate. Additional second correction information is used to enhance accuracy of pattern positioning, in particular to correct higher order distortions of a nominal alignment grid. The second correction information may be based on measurements of locations of alignment marks made when applying a previous pattern to the same substrate. The second correction information may alternatively or in addition be based on measurements made on similar substrates that have been patterned prior to the current substrate.

Abstract: A method includes generating one or more routes usable for implementing a conductive path of an integrated circuit. A corresponding cost function value for the one or more routes is calculated according to a first cost function, including adjusting the corresponding cost function value based on whether the corresponding route is at least partially assigned to be formed in a conductive layer by a first patterning process or a second patterning process. The integrated circuit has electrical devices and the conductive layer, and the conductive layer has a first set of conductive lines formed by the first patterning process and a second set of conductive lines formed by the second patterning process. The first set of conductive lines has a unit resistance less than that of the second set of conductive lines. The conductive path electrically connects two of the electrical devices of the integrated circuit.

Abstract: A method of forming a mask includes creating a difference map between a desired intra-field pattern that is to be formed on substrates and an intra-field signature pattern. The intra-field signature pattern represents a pattern formed on an example substrate by an exposure field using an example E-beam-written mask. Modifications are determined to formation of mask features to be made using an E-beam mask writer if forming a modified E-beam-written mask having mask features modified from that of the example E-beam-written mask that will improve substrate feature variation identified in the difference map. The E-beam mask writer is programmed using the determined modifications to improve the substrate feature variation identified in the difference map. It is used to form the modified E-beam-written mask having the modified mask features. One or more substrates are photolithographically processed using the modified E-beam-written mask.

Abstract: Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes patterning a first photoresist layer overlying a mask blank that is mounted on a first chuck to form a first patterned photoresist layer. The mask blank is selectively etched using the first patterned photoresist layer to form a first patterned mask. The first patterned mask is mounted on a second chuck and a non-flatness compensation is determined. The first patterned mask is mounted on the first chuck and a second photoresist layer is patterned overlying the first patterned mask to form a second patterned photoresist layer. The second patterned photoresist layer includes a device pattern that has been adjusted using the non-flatness compensation. The first patterned mask is selectively etched using the second patterned photoresist layer to form a second patterned mask.

Abstract: Techniques are provided for determining how thick or how deep to make the phased regions of a lithography mask. One example embodiment provides a method that includes: providing a first mask layout design including a first test set, and providing a second mask layout design including a second test set, wherein the second test set is larger than the first test set; simulating critical dimensions through focus of structures of interest in the first test set for a range of phase depths/thicknesses, and selecting an initial preferred mask phase depth/thickness based on results of the simulating; and generating a fast thick-mask model (FTM) at the initial preferred phase depth/thickness, and correcting the second test set of the second mask layout design using the FTM, thereby providing an optimized mask layout design. A mask having the optimized mask layout design may be implemented to give the optimum patterning.

Abstract: According to one embodiment, an exposure tolerance estimation method is disclosed. The method can include setting a plurality of regions along a first surface of a substrate. The method can form a plurality of patterns for estimation by performing exposure on each of the regions using at least three levels of exposure condition using an exposure mask. The method can measure dimensions of the patterns for estimation and find relationships between the exposure condition and the dimensions. The method can select a first region from the regions. In the first region, a first dimension of a first pattern for estimation formed by exposure using a first exposure condition of an intermediate level out of the at least three levels falls within a previously set range. In addition, the method can calculate an exposure tolerance from a relationship between the first exposure condition and the first dimension.

Abstract: A method forming a pattern includes a process in which self-assembly material is formed on the substrate where on which a fiducial mark is formed, and the self-assembly material is separated in micro phase to form a self-assembled pattern. The position error from a predetermined formation position of the self-assembled pattern is measured on the basis of the fiducial mark, and a pattern for an alignment as well as a peripheral circuit pattern are formed on the substrate. The formation position of at least one pattern among the pattern for alignment and peripheral circuit pattern is corrected using the position error.

Abstract: A portion of a layout of a single layer of an integrated circuit is to be multi-patterned. The patterns are divided into first and second groups, to be patterned on the single layer by a first mask or a second mask. For each portion of each pattern, a spacing relationship is determined between that portion and any adjacent pattern on either or both sides. A processor computes a first capacitance (C), resistance (R), or resistance-capacitance (RC) cost of assigning the first group to the first mask and the second group to the second mask, and a second cost of assigning the first group to the second mask and the second group to the first mask, based on the spacing relationships. The first group is assigned to the first mask and the second group to the second mask if the first cost is lower than the second cost.

Abstract: In a multiple patterning techniques, where two or more exposures are used to form a single layer of a device, the splitting of features in a single layer between the multiple exposures is carried out additionally with reference to features of another associated layer and the splitting of that layer into two or more sets of features for separate exposure. The multiple exposure process can be a process involving repeated litho-etch steps desirably, the alignment scheme utilized during exposure of the split layers is optimized with reference to the splitting approach.

Abstract: A method for measuring flare information of a projection optical system includes arranging, on an object plane of the projection optical system, a sectoral pattern surrounded by a first side, a second side which is inclined at a predetermined angle with respect to the first side, and an inner diameter portion and an outer diameter portion which connect both ends of the first side and both ends of the second side; projecting an image of the sectoral pattern via the projection optical system; and determining the flare information based on a light amount of the image of the sectoral pattern and a light amount provided at a position away from the image. With the flare measuring method, it is possible to correctly measure the flare information in an arbitrary angle range of the sectoral pattern.

Abstract: A substrate is irradiated by primary electrons and secondary electrons generated from the substrate are detected by a detector. A reference die is placed on the stage to obtain a pattern matching template image including feature coordinates of the reference die. A pattern matching is performed with an arbitrary die in a row or column including the reference die using the template image to obtain feature coordinates of the arbitrary die. An angle of misalignment is calculated between the direction of the row or column including the reference die and one of the directions of movement of the substrate on the basis of the feature coordinates of the arbitrary die and those of the reference die. The stage is rotated to correct the angle of misalignment to conform the direction of the row or column including the reference die with the one of the directions of movement of the substrate.

Abstract: A method and system for fracturing or mask data preparation is disclosed in which the central core portion of a diagonal pattern is fractured using overlapping variable shaped beam (VSB) shots, and an outer portion of the diagonal pattern is fractured using non-overlapping VSB shots. A transition region is interposed between the central core and outer pattern portions, and transition region shots are generated so as to produce in the transferred pattern a smooth transition in pattern characteristics such as line edge roughness or period of waviness, from the central core portion of the pattern to the outer portion of the pattern. A pattern determined by the transition region shots is then compared to a reticle pattern created using conventional non-overlapping VSB shots. Methods for forming a semiconductor device layout pattern on a reticle or substrate are also disclosed.

Abstract: Data regarding a first corrected patterns on a single cell corrected such that an evaluation value of a pattern formed on a substrate after an image of a pattern of the single cell is projected onto a resist on the substrate and the resist is developed is obtained for each of a plurality of cells, a first evaluation value obtained by evaluating a projected image of the first corrected pattern on the single cell generated by the projection system is obtained for each of the cells, a second evaluation value obtained by, when the cells are arranged adjacent to one another, evaluating the projected images of the first corrected patterns on the cells is calculated, and creating a second corrected pattern by correcting the first corrected patterns on the cells arranged adjacent to one another such that the second evaluation value becomes close to the first evaluation value.

Abstract: The present disclosure provides a method of improving a layer to layer overlay error by an electron beam lithography system. The method includes generating a smart boundary of two subfields at the first pattern layer and obeying the smart boundary at all consecutive pattern layers. The same subfield is exposed by the same electron beam writer at all pattern layers. The overlay error caused by the different electron beam at different layer is improved.

Abstract: A route technique includes: receiving an input specifying a plurality of semiconductor device components and their logical connections; determining route information pertaining to a plurality of routes that connect in one or more metal layers the semiconductor device components according to their logical connections, the determination being based at least in part on a plurality of predefined tracks associated with a metal layer; and outputting at least a portion of the route information. A first portion of the plurality of predefined tracks corresponds to a first color and a second portion of the plurality of predefined tracks corresponds to a second color.

Abstract: The present invention relates to a multilayer substrate containing a substrate and a multilayer film provided on the substrate, in which a concave or convex fiducial mark that indicates a fiducial position of the multilayer substrate is formed on the surface of the multilayer film on the opposite side to the side of the substrate; and a material of at least a part of the surface of the fiducial mark is different from a material of a most superficial layer of the multilayer film on the opposite side to the side of the substrate.

Abstract: One illustrative method disclosed herein includes the steps of decomposing an initial overall target exposure pattern into at least a first decomposed sub-target pattern and a second decomposed sub-target pattern, performing first and second retargeting processes on the first and second decomposed sub-target patterns while using the other sub-target pattern as a reference layer, respectively, to thereby define retargeted first and second decomposed sub-target patterns, respectively, and, after performing the first and second retargeting processes, performing at least one process operation to determine if each of the retargeted first decomposed sub-target pattern and the retargeted second decomposed sub-target pattern is in compliance with at least one design rule.

Abstract: A lithographic mask reticle includes a first mask region having a first mask pattern configured for use in fabrication of electronic circuit structures, and a second mask region having a second mask pattern configured for use in fabrication of test structures. The second mask pattern includes all categories of structural patterns containing in the first mask pattern.

Abstract: Described herein is a method for simulating an image formed within a resist layer on a substrate resulting from an incident radiation, the substrate having a first feature and a second feature underlying the resist layer, the method comprising: simulating a first partial image using interaction of the incident radiation and the first feature without using interaction of the incident radiation and the second feature; simulating a second partial image using the interaction of the incident radiation and of the second feature without using the interaction of the incident radiation and the first feature; computing the image formed within the resist layer from the first partial image, and the second partial image; wherein the interaction of the incident radiation and the first feature is different from the interaction of the incident radiation and the second feature.

Abstract: The present invention relates to a reflective mask blank containing in this order, a substrate, a multilayer reflective film that reflects exposure light, and an absorber layer that absorbs the exposure light, in which the reflective mask blank further contains a fiducial mark indicating a reference position of the multilayer reflective film, which is formed in a concave shape or in a convex shape on a surface of the multilayer reflective film or on a surface of one layer formed between the multilayer reflective film and the absorber layer, and the fiducial mark is formed so as to have a reflectivity different from an area surrounding the fiducial mark with respect to a light with a prescribed wavelength and is transferred to a layer formed on the fiducial mark.

Abstract: In the field of semiconductor production using shaped charged particle beam lithography, a method and system for fracturing or mask data preparation or proximity effect correction is disclosed, wherein a plurality of circular or nearly-circular shaped beam shots can form a non-circular pattern on a surface. Methods for manufacturing a reticle and for manufacturing a substrate such as a silicon wafer by forming non-circular patterns on a surface using a plurality of circular or nearly-circular shaped beam shots is also disclosed.

Abstract: A method of manufacturing a semiconductor device in which the alignment accuracy of an immersion exposure device is maintained even when exposure steps are carried out intermittently. In the method, a substrate is placed on a stage of an exposure device (substrate placing step). Then, a first liquid is supplied to between the substrate and the optics system of the exposure device to expose the substrate through the first liquid (exposure step). A second liquid is supplied from a different place from the first liquid to a drainage groove provided around the stage at least in a period other than when the first liquid is supplied onto the stage, in order to suppress change in the temperature of the exposure device.

Abstract: A method of generating complementary masks based on a target pattern having features to be imaged on a substrate for use in a multiple-exposure lithographic imaging process is disclosed. The method includes defining an initial H-mask and an initial V-mask corresponding to the target pattern; identifying horizontal critical features in the H-mask and vertical critical features in the V-mask; assigning a first phase shift and a first percentage transmission to the horizontal critical features, which are to be formed in the H-mask; and assigning a second phase shift and a second percentage transmission to the vertical critical features, which are to be formed in the V-mask. The method further includes the step of assigning chrome to all non-critical features in the H-mask and the V-mask.

Abstract: An apparatus and method for lithography patterning is disclosed. An exemplary method includes receiving a first mask. The method further includes receiving a defect map, the defect map identifying a defect region of a defect of the first mask. The method further includes preparing processing data, the processing data including pattern data of a semiconductor device and data associated with the defect region. The method further includes processing the first mask according to the processing data thereby forming a first portion of a pattern of the semiconductor device on the first mask, the first portion of the pattern excluding the defect region.

Abstract: A method for forming patterns on a surface using charged particle beam lithography is disclosed, in which a stencil is provided comprising first and second apertures, where circular or nearly-circular patterns in a first plurality of sizes are formed on the surface using the first aperture by varying shot dosage, and where circular or nearly-circular patterns in a second plurality of sizes are formed on the surface using the second aperture by varying shot dosage. A similar method for fracturing or mask data preparation is also disclosed. A stencil for charged particle beam lithography is also disclosed, where the stencil comprises first aperture and second apertures capable of forming, in one shot, patterns in a first and a second range of sizes on a surface by varying the shot dosage, where the first range of sizes is discontinuous with the second range of sizes.

Abstract: A method for printing a periodic pattern having a first symmetry and a first period into a photosensitive layer. The method includes providing a mask bearing a pattern of at least two overlapping sub-patterns which have a second symmetry and a second period, the features of each sub-pattern being formed in a transmissive material, providing a substrate bearing the layer, arranging the mask with a separation from the substrate, providing light having a central wavelength for illuminating the mask to generate a light-field in which light of the central wavelength forms a range of intensity distributions between Talbot planes, illuminating said mask pattern with said light while maintaining the separation or changing it by a distance whereby the photosensitive layer is exposed to an average of the range of intensity distributions, wherein the light transmitted by each sub-pattern is shifted in phase relative to that transmitted by another sub-pattern.

Abstract: In the field of semiconductor production using charged particle beam lithography, a method and system for fracturing or mask data preparation or proximity effect correction is disclosed, wherein base dosages for a plurality of exposure passes are different from each other. Methods for manufacturing a reticle and manufacturing an integrated circuit are also disclosed, wherein a plurality of charged particle beam exposure passes are used, with base dosage levels being different for different exposure passes.

Abstract: A radiation source for generating EUV from a stream of molten metal fuel droplets by LPP (Laser Produced Plasma) or (Dual Laser Plasma) has a fuel droplet generator arranged to provide a stream of droplets of fuel and at least one laser configured to vaporise at least some of said droplets of fuel, whereby radiation is generated. The fuel droplet generator has nozzle, fuel supply line, and reservoir, with a pumping device arranged to supply a flow of molten metal fuel from the reservoir through the fuel feed line and out of the nozzle as a stream of droplets. The fuel droplet generator has a replaceable filter assembly in the fuel feed line, arranged to filter the molten metal fuel in use, to deter nozzle blockage by solid particulate impurities in the fuel.

Abstract: In the field of semiconductor production using charged particle beam lithography, a method and system for fracturing or mask data preparation or proximity effect correction is disclosed, wherein a plurality of exposure passes are used, and where the sum of the base dosage levels for all of the exposure passes does not equal a normal dosage. Methods for manufacturing a reticle and manufacturing an integrated circuit are also disclosed, wherein a plurality of charged particle beam exposure passes are used, and where the sum of the base dosage levels for all of the exposure passes is different than a normal dosage.

Abstract: On a film where an exposure material coating has been formed in a exposure pattern formation region on a film base material, a colored firing material, colored light-curable material, or colored ink is applied to at least one of two widthwise side edges to form a side part application coating, which is irradiated with laser light by an alignment mark formation unit to form an alignment mark. The alignment mark is then used to detect film meandering and adjust the positions of masks. This makes it easy to form the alignment mark and detect the alignment mark thus formed and makes it possible to accurately correct for meandering of a film and stably expose the film in the process of continuous exposure of a film where an exposure material coating has been formed in a exposure pattern formation region on a film base material.

Abstract: A method for reducing an effect of flare produced by a lithographic apparatus for imaging a design layout onto a substrate is described. A flare map in an exposure field of the lithographic apparatus is simulated by mathematically combining a density map of the design layout at the exposure field with a point spread function (PSF), wherein system-specific effects on the flare map may be incorporated in the simulation. Location-dependent flare corrections for the design layout are calculated by using the determined flare map, thereby reducing the effect of flare. Some of the system-specific effects included in the simulation are: a flare effect due to reflection from black border of a mask, a flare effect due to reflection from one or more reticle-masking blades defining an exposure slit, a flare effect due to overscan, a flare effect due reflections from a gas-lock sub-aperture of a dynamic gas lock (DGL) mechanism, and a flare effect due to contribution from neighboring exposure fields.

Abstract: The present disclosure provides a dithering method of increasing wafer throughput by an electron beam lithography system. The dithering method generates an edge map from a vertex map. The vertex map is generated from an integrated circuit design layout (such as an original pattern bitmap). A gray map (also referred to as a pattern gray map) is also generated from the integrated circuit design layout. By combining the edge map with the gray map, a modified integrated circuit design layout (modified pattern bitmap) is generated for use by the electron beam lithography system.

Abstract: A photo mask having a first set of patterns and a second set of patterns is provided in which the first set of patterns correspond to a circuit pattern to be fabricated on a wafer, and the second set of patterns have dimensions such that the second set of patterns do not contribute to the circuit pattern that is produced using a lithography process based on the first set of patterns under a first exposure condition. The critical dimension distribution of the photo mask is determined based on the second set of patterns that do not contribute to the circuit pattern produced using the lithography process based on the first set of patterns under the first exposure condition.

Abstract: A method and system for fracturing or mask data preparation is disclosed in which the central core portion of a diagonal pattern is fractured using overlapping variable shaped beam (VSB) shots, and an outer portion of the diagonal pattern is fractured using non-overlapping VSB shots. A transition region is interposed between the central core and outer pattern portions, and transition region shots are generated so as to produce in the transferred pattern a smooth transition in pattern characteristics such as line edge roughness or period of waviness, from the central core portion of the pattern to the outer portion of the pattern. Methods for forming a semiconductor device layout pattern on a reticle or substrate are also disclosed.

Abstract: An inspection data generator generates inspection data used to inspect a pattern transferred onto the same material layer using exposure processes. An input part of the generator receives first layout data for a mask used in a first exposure process and second layout data for a mask used in a second exposure process, and receives a measured value of a misalignment between a first transfer pattern actually transferred onto the material layer in the first exposure process and a second transfer pattern actually transferred onto the material layer in the second exposure process. A processor unit generates the inspection data by shifting the first layout data and the second layout data from each other by an amount corresponding to the measured value and then combining the first layout data with the second layout data. An output part outputs the inspection data to inspect the pattern transferred onto the material layer.

Abstract: A document reading device for reading a page of a passport includes a mounting surface, a camera, an illumination light source for radiating illumination light that is, and an ultraviolet light source for radiating ultraviolet light to activate a fluorescent material on the page. The illumination light source is at a first edge perpendicular to a binding edge on the page and radiates illumination light in the direction intersecting with the first edge. The ultraviolet light source is at a second edge parallel to the binding edge and radiates ultraviolet light in the direction intersecting with the second edge. The illumination light source includes an infrared light source and a white light source. The document reading device has both an illumination light source and an ultraviolet light source, and can avoid image capturing in the specular reflection condition when the document is deformed.