Material Deposition Only Patents (Class 430/315)
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Publication number: 20100028810Abstract: In a lithography process using an ultraviolet process, the applied ultraviolet resist can be removed by intentionally condensing the ultraviolet resist before removing the ultraviolet resist.Type: ApplicationFiled: August 4, 2008Publication date: February 4, 2010Applicant: Texas Instruments IncorporatedInventors: Ronald Charles Roth, Georgina Marie Park, Rosemary Urmese Anthraper
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Patent number: 7655365Abstract: It is a main object of the present invention to provide a wettability variable substrate provided with a wettability variable layer which is free from any cloud and is superior in adhesion to a substrate, transparency and liquid repellency.Type: GrantFiled: June 30, 2003Date of Patent: February 2, 2010Assignee: Dai Nippon Printing Co., Ltd.Inventors: Kaori Yamashita, Hironori Kobayashi
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Publication number: 20100021703Abstract: A developing method for immersion lithography is provided, realizing a process that is simple and low-cost and enables high repellency sufficient to allow high-speed scanning. The developing method for immersion lithography improved by inexpensive material without introducing any new facility, a solution to be used in the developing method, and an electronic device formed by using the developing method are provided. The developing method for immersion lithography is a method of developing for immersion lithography of an electronic device with a resist containing a surface segregation agent and chemically-amplified resist, including the step of development with alkali immersion, characterized by the dissolving and removing step, conducted using a dissolving and removing solution that selectively dissolves and removes the surface segregation agent of the resist.Type: ApplicationFiled: June 24, 2009Publication date: January 28, 2010Inventors: Mamoru Terai, Takuya Hagiwara, Takeo Ishibashi, Miwako Ishibashi
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Publication number: 20100015409Abstract: There is herein described a method and apparatus for photoimaging. In particular, there is described a method and apparatus for photoimaging a substrate covered with a wet curable photopolymer, wherein the photoimaged substrate is used to form images such as electrical circuits.Type: ApplicationFiled: September 18, 2008Publication date: January 21, 2010Inventors: Sheila Hamilton, Charles Jonathan Kennett
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Patent number: 7642040Abstract: Providing a fabrication method of a periodic domain inversion structure. A nonlinear optical ferroelectric material substrate is provided. A photoresist layer is formed on the upper and the lower surface of the substrate, and periodic gratings formed by interference of two laser beams are employed to expose the photoresist layer on the upper surface. Meanwhile, the two laser beams pass through the substrate, so the periodic gratings are used to expose the photoresist layer on the lower surface. A development process is performed to form a periodic photoresist pattern on the two surfaces of the substrate. A conductive layer is formed above the substrate for covering the photoresist pattern and the surface of the exposed substrate. The photoresist pattern and a portion of the conductive layer thereon are removed by lift-off. A voltage is applied to the substrate via the remaining conductive layer to polarize parts of the substrate.Type: GrantFiled: March 5, 2007Date of Patent: January 5, 2010Assignee: National Central UniversityInventors: Jyh-Chen Chen, Chang-Hung Chiang, Yeeu-Chang Lee, Cheng-Wei Chien
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Publication number: 20090325105Abstract: Disclosed herein is a printed circuit board with embedded capacitors therein which comprises inner via holes filled with a high dielectric polymer capacitor paste composed of a composite of BaTiO3 and an epoxy resin, and a process for manufacturing the printed circuit board.Type: ApplicationFiled: June 25, 2009Publication date: December 31, 2009Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seok-Kyu Lee, Byoung-Youl Min, Chang-Hyun Nam, Hyun-Ju Jin, Jang-Kyu Kang
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Patent number: 7637599Abstract: The method manufactures a liquid ejection head having a diaphragm which forms a portion of pressure chambers connected to nozzles ejecting liquid, and piezoelectric elements which deform the diaphragm. The method includes the steps of: applying a photosensitive resin on at least a portion of each of electrodes of the piezoelectric elements; bonding a substrate having through holes, to the photosensitive resin; exposing the photosensitive resin via the through holes; developing the exposed photosensitive resin, thereby forming holes connecting to the through holes in the photosensitive resin; and filling conductive material into the through holes and the holes formed in the photosensitive resin.Type: GrantFiled: April 17, 2006Date of Patent: December 29, 2009Assignee: Fujifilm CorporationInventor: Hiroshi Ota
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Publication number: 20090305168Abstract: Techniques or processes for providing markings on products are disclosed. The markings provided on products can be textual and/or graphic. The techniques or processes can provide high resolution markings on surfaces that are flat or curved. In one embodiment, the products have housings and the markings are to be provided on the housings. For example, the housing for a particular product can include an outer housing surface and the markings can be provided on the outer housing surface.Type: ApplicationFiled: May 31, 2009Publication date: December 10, 2009Inventors: Richard Walter Heley, Erming Luo, Adam Mittleman, John Payne, Tang Yew Tan, Erik Wang
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Patent number: 7611818Abstract: A photosensitive resin composition comprising (A) a binder polymer, (B) a photopolymerizing compound with an ethylenic unsaturated bond, (C) a photopolymerization initiator and (D) a compound represented by the following general formula (1) or (2). [Chemical Formula 1] [wherein X1, X2, X3, X4, X5 and X6 each independently represent a CH group, CCH3 group, CC2H5 group or nitrogen, Y1, Y2, Y3 and Y4 each independently represent optionally substituted aryl, and Y5 represents optionally substituted arylene].Type: GrantFiled: November 2, 2004Date of Patent: November 3, 2009Assignee: Hitachi Chemical Company, Ltd.Inventors: Ken Sawabe, Hanako Yori
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Publication number: 20090267706Abstract: A resonator fabrication method is provided. A method includes providing a plurality of electrode patterns disposed apart from each other on a substrate using a nano-imprint technique; and forming an extended electrode pattern connected to a plurality of electrode patterns, and forming a nano structure laid across an extended electrode patterns. Therefore, a nano-electromechanical system (NEMS) resonator is easily fabricated at a nanometer level.Type: ApplicationFiled: February 18, 2009Publication date: October 29, 2009Applicants: SAMSUNG ELECTRONICS CO., LTD., KOREA UNIVERSITY INDUSTRIAL & ACADEMIC COLLABORATION FOUNDATIONInventors: Yun-kwon PARK, Byeoung-Ju Ha, Byeong-Kwon Ku, Jae-Sung Rieh, In-Sang Song, Jin-Woo Lee, Jea-shik Shin, Young-Min Park
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Patent number: 7608389Abstract: Novel photoresist materials, which can be photolithographically processed in biocompatible conditions are presented in this invention. Suitable lithographic scheme for the use of these and analogous resists for biomolecule layer patterning on solid substrates are also described. The processes described enable micropatterning of more than two different proteins on solid substrates without denaturation of the proteins. The preferred resist materials are based on (meth)acrylate copolymers that contain at least one acid cleavable ester group and at least one hydrophilic group such as an alcoholic or a carboxylic group.Type: GrantFiled: May 30, 2002Date of Patent: October 27, 2009Assignees: National Centre for Scientific Research DemokritosInventors: Panagiotis Argitis, Konstantinos Misiakos, Sotirios E. Kakabakos, Constantinos D. Diakoumakos
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Publication number: 20090261936Abstract: An inductor structure comprising a substrate and a planar conductor structure on a surface of the substrate, and methods for fabricating an inductor structure. The planar conductor structure may comprise a vertical stack of three or more multilayer films. Each multilayer film may comprise a first layer of a first metal, defining a first vertical thickness, and a second layer of a second metal, defining a second vertical thickness. The metals and thicknesses are chosen such that the inductor exhibits a negative electrical self-inductance when an electrical signal is transmitted from a first contact point to a second contact point.Type: ApplicationFiled: April 21, 2009Publication date: October 22, 2009Inventors: Agus Widjaja, Andrew Sarangan
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Publication number: 20090242236Abstract: A patterned electrical conductor having improved resolution and conductivity is obtained by forming a latent image by exposing, to pressure or sensitising radiation according to a desired conductive track pattern, a pressure-sensitive or photosensitive element having a support substrate and a pressure-sensitive or photosensitive material coated thereon, being capable of providing a latent image upon exposure and comprising a pressure-sensitive or photosensitive metal salt dispersed in a binder, which binder is susceptible to decomposition and/or dissolution upon treatment with an enzyme solution, developing the latent image to form a developed image formed by a first metal (e.g. silver) corresponding to the desired conductive track pattern, treating the developed image with an enzyme capable of decomposing or dissolving the binder and electroless plating and/or electroplating the developed metal image with a plating of a second metal (e.g.Type: ApplicationFiled: September 7, 2006Publication date: October 1, 2009Inventors: John R. Fyson, Sean D. Slater
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Patent number: 7592131Abstract: The invention is to provide a method for producing a fine structured member and a fine hollow structure, useful for producing a liquid discharge head which is inexpensive, precise and highly reliable, also to provide a method for producing a liquid discharge head utilizing such producing method for the fine structured member and the fine hollow structure and a liquid discharge head obtained by such producing method. A positive-working photosensitive material, including a ternary polymer containing an acrylate ester as a principal component, acrylic acid for thermal crosslinking and a monomer unit for expanding a sensitivity region, is used as a material for forming the Line structured member.Type: GrantFiled: July 9, 2003Date of Patent: September 22, 2009Assignee: Canon Kabushiki KaishaInventors: Masahiko Kubota, Yoshinori Tagawa, Wataru Hiyama, Tatsuya Masukawa, Shoji Shiba, Yoshiaki Kurihara, Hiroe Ishikura, Akihiko Okano
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Publication number: 20090233230Abstract: The present invention provides a photosensitive resin composition characterized by comprising: (a) 20 to 90% by mass of a thermoplastic copolymer comprising an ?,?-unsaturated carboxyl group containing monomer as a copolymerization constituent and having an acid equivalent of 100 to 600 and a weight-average molecular weight of 5000 to 500000; (b) 5 to 75% by mass of an addition polymerizable monomer having at least one terminal ethylenic unsaturated group; (c) 0.01 to 30% by mass of a photopolymerization initiator containing a hexaarylbisimidazole; and (d) 0.Type: ApplicationFiled: July 22, 2005Publication date: September 17, 2009Inventors: Yosuke Hata, Toru Mori
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Patent number: 7588884Abstract: A method of enhancing alignment marks defined in a relatively thin layer on a wafer by etching the alignment marks into an underlying alignment mark transfer layer is described. The target area for the alignment marks is prepared by depositing material for the transfer layer. In alternative embodiments an oversized trench is formed in the target area prior to the deposition of the transfer layer. The alignment marks can fabricated in the layer(s) deposited by the existing process or alternatively, the original layers can be removed and replaced with a layer of material selected to have comparable etching properties (definition layer).Type: GrantFiled: May 28, 2004Date of Patent: September 15, 2009Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Amanda Baer, Nian-Xiang Sun, Sue Siyang Zhang, Yi Zheng
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Patent number: 7585614Abstract: A method of patterning which provides images substantially smaller than that possible by lithographic techniques is provided. In the method of the invention, a substrate has a memory layer and a sacrificial layer formed thereon. An image is patterned onto the memory layer by protecting an edge during an etching step using chemical oxide removal (COR) processes, for example. Another edge is memorized in the layer. The sacrificial layer is removed to expose another memorized edge, which is used to define a pattern in an underlying layer.Type: GrantFiled: September 20, 2004Date of Patent: September 8, 2009Assignee: International Business Machines CorporationInventors: Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, Charles W. Koburger, III, Peter H. Mitchell, Larry A. Nesbit, James A. Slinkman
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Publication number: 20090220892Abstract: A method of manufacturing a semiconductor device includes: forming a resist layer on an underlayer, forming an exposed pattern in the resist layer, wherein the exposed pattern comprises a soluble layer and an insoluble layer, forming a resist pattern by removing the soluble layer from the resist layer in which the exposed pattern is formed, removing an intermediate exposed area from the resist pattern, forming a new soluble layer in a surface of the resist pattern from which the intermediate exposed area is removed by applying a reaction material to the resist pattern from which the intermediate exposed area is removed, wherein the reaction material generates a solubilization material that solubilizes the resist pattern, and removing the new soluble layer from the resist pattern.Type: ApplicationFiled: March 2, 2009Publication date: September 3, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Fumiko IWAO, Satoru SHIMURA, Tetsu KAWASAKI
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Patent number: 7582412Abstract: Multilayer photoresist systems are provided. In particular aspects, the invention relates to underlayer composition for an overcoated photoresist, particularly an overcoated silicon-containing photoresist. Preferred underlayer compositions comprise one or more resins or other components that impart etch-resistant and antireflective properties, such as one or more resins that contain phenyl or other etch-resistant groups and anthracene or other moieties that are effective anti-reflective chromophores for photoresist exposure radiation.Type: GrantFiled: November 20, 2003Date of Patent: September 1, 2009Assignee: Rohm and Haas Electronic Materials LLCInventors: James F. Cameron, Dana A. Gronbeck, George G. Barclay
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Patent number: 7575853Abstract: The present invention provides a thin film pattern forming method capable of forming a thin film pattern having small dimensions at higher precision. A thin film pattern forming method of the invention includes: a step of forming a first thin film on a substrate; a step of forming a bilayer resist pattern; a step of forming a soluble layer as a covering layer; and a step of forming a first thin film pattern by selectively removing the first thin film by dry etching using the bilayer resist pattern as a mask. Since the soluble layer generally and continuously covering the periphery of the bilayer resist pattern and the first thin film in an area other than the area covered with the bilayer resist pattern is formed, deformation of the shape of the bilayer resist pattern can be suppressed at the time of dry etching and a deposition amount of a re-deposit 9 can be also reduced. Consequently, the isolated first thin film pattern having small dimensions and defined by a contour can be formed at higher precision.Type: GrantFiled: March 18, 2005Date of Patent: August 18, 2009Assignee: TDK CorporationInventor: Akifumi Kamijima
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Patent number: 7569333Abstract: The wiring line structure comprises a transparent substrate, a barrier layer, a metal layer, and a photosensitive protecting layer. The barrier layer and a metal layer are successively disposed on the transparent substrate. The photosensitive protecting layer is formed on the barrier layer and both sides of the metal layer. A method for fabricating the wiring line structure is also disclosed.Type: GrantFiled: September 10, 2007Date of Patent: August 4, 2009Assignee: Au Optronics Corp.Inventors: Tzeng-Guang Tsai, Kuo-Yu Huang, Hui-Fen Lin, Yu-Wei Liu
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Patent number: 7569334Abstract: In the present invention, the problem of stability deterioration of the obtained conductive pattern substrate at the time of forming a conductive pattern by an additive method when a layer having reactivity remains on the substrate is to be solved. According to pattern exposure with a photo catalyst substrate 4 having a photo catalyst layer 3 laminated on a second substrate 5 superimposed onto a wettability changeable substrate 1 with a wettability changeable layer 3 laminated on a first substrate 2, a wettability pattern is formed. And furthermore, by adhering a conductive coating solution, or the like, a conductive pattern substrate without containing a photo catalyst can be manufactured.Type: GrantFiled: April 17, 2003Date of Patent: August 4, 2009Assignee: Dai Nippon Printing Co., Ltd.Inventors: Hironori Kobayashi, Yudai Yamashita
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Patent number: 7569332Abstract: A processing method of a thin-film includes a step of forming a predetermined pattern film or predetermined elements on a substrate or on a film formed in an upstream process, a step of forming a transparent film over the formed predetermined pattern film or predetermined elements, a step of forming a pattern-transferred film having shapes corresponding to shapes of the formed predetermined pattern film or predetermined elements, on the formed transparent film, and a step of forming an opaque film on the pattern-transferred film.Type: GrantFiled: February 25, 2005Date of Patent: August 4, 2009Assignees: TDK Corporation, SAE Magnetics (H.K.) Ltd.Inventors: Mitsuharu Isobe, Hiromichi Umehara, Hirotaka Gomi, Tomohide Yokozawa
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Patent number: 7569330Abstract: A method for manufacturing a pattern of a light shielding layer and a patter forming body of light shielding layer. After placing a photocatalyst containing layer side substrate having a base material and a photocatalyst containing layer, and a pattern forming body substrate having a substrate and a property changing layer, the property of an exposed part changes by the action of a photocatalyst in a photocatalyst containing layer, to form a wettability pattern having a lyophilic region and a liquid repellent region on the property changing layer. A light shielding layer composition is coated on the whole surface of the pattern forming body substrate on which the above-mentioned wettability pattern is formed, adhering and solidifying a light shielding layer composition only to the lyophilic region, to form a light shielding layer pattern.Type: GrantFiled: April 15, 2003Date of Patent: August 4, 2009Assignee: Dai Nippon Printing Co., Ltd.Inventors: Hironori Kobayashi, Akio Sonehara
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Patent number: 7560201Abstract: A multiple mask and a multiple masking layer technique can be used to pattern a single IC layer. A resolution enhancement technique can be used to define one or more fine-line patterns in a first masking layer, wherein each fine-line feature is sub-wavelength. Moreover, the pitch of each fine-line pattern is less than or equal to that wavelength. The portions of the fine-line features not needed to implement the circuit design are then removed or designated for removal using a mask. After patterning of the first masking layer, another mask can then be used to define coarse features in a second masking layer formed over the patterned first masking layer. At least one coarse feature is defined to connect two fine-line features, wherein the coarse feature(s) can be derived from a desired layout using a shrink/grow operation. The IC layer can be patterned using the composite mask formed by the patterned first and second masking layers.Type: GrantFiled: July 23, 2008Date of Patent: July 14, 2009Assignee: Synopsys, Inc.Inventor: Tsu-Jae King Liu
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Patent number: 7553610Abstract: It is disclosed a method of forming fine patterns comprising: covering a substrate having photoresist patterns with an over-coating agent for forming fine patterns, applying heat treatment to cause thermal shrinkage of the over-coating agent so that the spacing between adjacent photoresist patterns is lessened by the resulting thermal shrinking action, and removing the over-coating agent substantially completely by way of bringing thusly treated substrate into contact with a remover solution for over 60 seconds.Type: GrantFiled: September 18, 2008Date of Patent: June 30, 2009Assignee: Tokyo Ohka Kogyo Co., Ltd.Inventors: Fumitake Kaneko, Yoshiki Sugeta, Toshikazu Tachikawa
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Publication number: 20090155726Abstract: A method of forming an electronic device is provided that includes forming a resist layer over a substrate having a first region, a second region, and a third region. The method further includes directing radiation through a reticle, wherein the reticle comprises different radiation zones having significantly different transmission values with respect to each other, and the first region is exposed to a significantly different amount of radiation as compared to the second region. The method also includes removing part of the resist layer to leave a remaining portion such that the second region of the resist layer is significantly thinner than the third region of the resist layer, and then ion implanting the substrate while the remaining portion of the resist layer overlies the substrate to form a first implant region and a second implant region having different depths.Type: ApplicationFiled: December 17, 2007Publication date: June 18, 2009Applicant: SPANSION LLCInventors: Eric Apelgren, Nabil R. Yazdani
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Patent number: 7547503Abstract: Provided is a photosensitive silane coupling agent for forming a low-defect microparticle pattern, dot array pattern, or hole array pattern with a smaller number of process steps, and a method of forming a pattern using such photosensitive silane coupling agent. Used is a photosensitive silane coupling agent having a secondary amino group protected by an o-nitrobenzyloxycarbonyl group.Type: GrantFiled: February 27, 2007Date of Patent: June 16, 2009Assignee: Canon Kabushiki KaishaInventors: Toshiki Ito, Natsuhiko Mizutani, Takako Yamaguchi, Yasuhisa Inao
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Patent number: 7537884Abstract: The present invention discloses a method by utilizing chemical reaction or specific attractive forces (complexation or hydrogen bonding) for forming self-synthesizing conductive or conjugated polymer film and its application. First of all, at least one photoresist layer with a first functional group and a specific pattern is formed, so that the first functional group can bond a second functional group of a conductive or conjugated polymer unit, whereby a conductive or conjugated polymer film with specific pattern is formed. Furthermore, this invention can be applied for forming emitting films, especially for forming emitting layers of OLED/PLED elements.Type: GrantFiled: October 20, 2004Date of Patent: May 26, 2009Assignee: National Taiwan UniversityInventors: Kuo-Huang Hsieh, Man-Kit Leung, King-Fu Lin, Wen-Yen Chiu, Wen-Chang Chen, Lee-Yih Wang, Wen-Bin Liau, Chi-An Dai, Wei-Fang Su, Hung-Chun Chang, Hung-Ren Wang, Chao-Hui Kuo, Chi-Shin Lee, Jun-Ming Huang, Cheng-Yuan Shih
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Patent number: 7537866Abstract: A multiple mask and a multiple masking layer technique can be used to pattern a single IC layer. A resolution enhancement technique can be used to define one or more fine-line patterns in a first masking layer, wherein each fine-line feature is sub-wavelength. Moreover, the pitch of each fine-line pattern is less than or equal to that wavelength. The portions of the fine-line features not needed to implement the circuit design are then removed or designated for removal using a mask. After patterning of the first masking layer, another mask can then be used to define coarse features in a second masking layer formed over the patterned first masking layer. At least one coarse feature is defined to connect two fine-line features. The IC layer can be patterned using the composite mask formed by the patterned first and second masking layers.Type: GrantFiled: May 24, 2006Date of Patent: May 26, 2009Assignee: Synopsys, Inc.Inventor: Tsu-Jae King Liu
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Patent number: 7534553Abstract: A method for fabricating a semiconductor device is provided. The method includes: preparing a substrate defined as active regions and inactive regions and provided with a plurality of conductive patterns; forming a buffer layer over the plurality of conductive patterns; forming an organic material having fluidity better than that of a photoresist layer on the buffer layer; flowing the organic material between the conductive patterns through a thermal treatment process, thereby filling a portion of each gap between the conductive patterns; forming the photoresist layer over the organic material and the buffer layer; forming a plurality of photoresist patterns opening the active regions through a photo-exposure process and a developing process; and performing an ion-implantation process using the plurality of photoresist patterns, thereby forming a plurality of junction regions in the active regions of the substrate.Type: GrantFiled: October 31, 2005Date of Patent: May 19, 2009Assignee: Hynix Semiconductor Inc.Inventors: Sung-Kwon Lee, Gyu-Dong Park
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Publication number: 20090117493Abstract: There is provided anti-reflective coating forming composition containing a reaction product of an isocyanuric acid compound having two or three 2,3-epoxypropyl groups with a benzoic acid compound. The anti-reflective coating obtained from the composition has a high preventive effect for reflected light, causes no intermixing with photoresists, can form a photoresist pattern having no footing at the lower part, and can use in lithography process by use of a light such as ArF excimer laser beam and F2 excimer laser beam, etc.Type: ApplicationFiled: September 27, 2005Publication date: May 7, 2009Applicant: NISSAN CHEMICAL INDUSTRIES, LTD.Inventors: Takahiro Kishioka, Rikimaru Sakamoto, Daisuke Maruyama
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Patent number: 7524595Abstract: A method for forming an anti-reflection coating (ARC) with no hole over an overlay mark is described, which applies a fluid material of the ARC onto a substrate and then conducts at least two curing steps to convert the fluid material into the ARC. Such a bottom anti-reflection coating with no hole over the overlay mark can improve accuracy of the overlay measurement of lithography, thereby improving the alignment accuracy of the lithography process.Type: GrantFiled: September 8, 2005Date of Patent: April 28, 2009Assignee: United Microelectronics Corp.Inventors: Wen-Kuang Lin, Huan-Hsin Yeh, Chung-An Chen
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Publication number: 20090104566Abstract: Methods of multiple exposure in the fields of deep ultraviolet photolithography, next generation lithography, and semiconductor fabrication comprise a spin-castable methodology for enabling multiple patterning by completing a standard lithography process for the first exposure, followed by spin casting an etch selective overcoat layer, applying a second photoresist, and subsequent lithography. Utilizing the etch selectivity of each layer, provides a cost-effective, high resolution patterning technique. The invention comprises a number of double or multiple patterning techniques, some aimed at achieving resolution benefits, as well as others that achieve cost savings, or both resolution and cost savings. These techniques include, but are not limited to, pitch splitting techniques, pattern decomposition techniques, and dual damascene structures.Type: ApplicationFiled: October 19, 2007Publication date: April 23, 2009Applicant: International Business Machines CorporationInventors: Martin Burkhardt, Sean D. Burns, Matthew E. Colburn
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Patent number: 7521094Abstract: Disclosed herein is a method of forming polymer structures comprising applying a solution of a diblock copolymer assembly comprising at least one diblock copolymer that forms lamellae, to a neutral surface of a substrate having a chemical pattern thereon, the chemical pattern comprising alternating pinning and neutral regions that are chemically distinct and which have a chemical pattern spatial frequency given by the number of paired sets of pinning and neutral regions along a given direction on the substrate; and forming domains comprising blocks of the diblock copolymer. The domains form by lateral segregation of the blocks. At least one domain has an affinity for the pinning regions and forms on the pinning region, the domains so formed on the pinning region are aligned with the underlying chemical pattern, and domains that do not form on the pinning region form adjacent to and are aligned with the domains formed on the pinning regions.Type: GrantFiled: January 14, 2008Date of Patent: April 21, 2009Assignee: International Business Machines CorporationInventors: Joy Cheng, William D. Hinsberg, Ho-Cheol Kim, Charles T. Rettner, Daniel P. Sanders
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Publication number: 20090092928Abstract: A method for producing a patterned material for electronic or photonic circuits, comprising the steps of: p) providing a substrate; q) coating the substrate with a polymer layer; r) coating a thermal resist solution over the polymer layer to form a thermal resist layer, wherein the polymer layer is substantially immiscible in the thermal resist solution; s) exposing predetermined areas of the thermal resist layer, corresponding to a desired image pattern, using infrared light; t) removing portions of the thermal resist layer corresponding to a desired image pattern, using a developer; u) removing the polymer layer where the thermal resist layer has been previously removed and undercutting a portion of the remaining thermal resist layer by an etching process; v) depositing a material using a substantially anisotropic process; and removing the remaining thermal resist layer and any overlying material with a solvent for the polymer or thermal resist layers leaving the material in a desired pattern.Type: ApplicationFiled: October 9, 2007Publication date: April 9, 2009Inventors: Mitchell S. Burberry, Lee W. Tutt
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Publication number: 20090077791Abstract: Disclosed is an apparatus and method for a magnetic component. The magnetic component includes a substrate having a feature and a first conductive pattern disposed on the feature. The magnetic component also includes a permeability material disposed within the feature. A substrate material is disposed on the substrate to facilitate substantial enclosure of the permeability material between the substrate and the substrate material, where the substrate material has a second conductive pattern. The first conductive pattern and the second conductive pattern cooperate to be capable of facilitating magnetic properties of the permeability material.Type: ApplicationFiled: December 8, 2008Publication date: March 26, 2009Applicant: RADIAL ELECTRONICS, INCInventor: James E. Quilici
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Patent number: 7504199Abstract: Disclosed herein is a method for forming a metal pattern with a low resistivity. The method comprises the steps of: (i) coating a photocatalytic compound onto a substrate to form a photocatalytic film layer; (ii) coating a water-soluble polymeric compound onto the photocatalytic film layer to form a water-soluble polymer layer; (iii) selectively exposing the two layers to light to form a latent pattern acting as a nucleus for crystal growth; and (iv) plating the latent pattern with a metal to grow metal crystals thereon. According to the method, a multilayer wiring pattern including a low resistivity metal can be formed in a relatively simple manner at low cost, and the metals constituting the respective layers can be freely selected according to the intended application. The low resistivity metal pattern can be advantageously applied to flat panel display devices, e.g., LCDs, PDPs and ELDs.Type: GrantFiled: October 7, 2004Date of Patent: March 17, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Chang Ho Noh, Ki Yong Song, Jin Young Kim, Tamara Byk, Gennady A. Branitsky, Tatyana V. Gaevskaya, Valeri G. Sokolov
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Patent number: 7501215Abstract: The present invention relates to a device manufacturing method wherein a plurality of front side marks are manufactured on the front side of the substrate. These marks are used to locally align the substrate when exposing. After certain processing steps, the positions of the front side marks are measured and compared with respect to their original positions. The measured position changes of the front side marks, i.e. their behaviour, can then be analyzed. The original positions and actual positions are defined with respect to a nominal grid which is defined using global alignment marks which are positioned at the back side of the substrate. Because the global alignment marks are positioned at the back side, they are not affected by any processing step.Type: GrantFiled: June 28, 2005Date of Patent: March 10, 2009Assignee: ASML Netherlands B.V.Inventors: Keith Frank Best, Joseph J. Consolini, Alexander Friz
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Patent number: 7498120Abstract: Vacuum compatible high frequency electromagnetic and millimeter wave source components, devices and methods of micro-fabricating such components and devices are disclosed. Embodiments of the methods may include using a UV-curable photoresist, such as SU-8 to form structures having height up to and exceeding 1 mm. High frequency electromagnetic wave sources including the inventive high frequency electromagnetic wave source components are also disclosed.Type: GrantFiled: September 15, 2004Date of Patent: March 3, 2009Assignee: Innosys, Inc.Inventors: Laurence P. Sadwick, Jehn-Huar Chern, Ruey-Jen Hwu
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Patent number: 7488570Abstract: A method for forming a metal pattern with a low resistivity. The method may include the steps of: (i) coating a photocatalytic compound onto a substrate to form a photocatalytic film layer; (ii) coating a water-soluble polymeric compound onto the photocatalytic film layer to form a water-soluble polymer layer; (iii) selectively exposing the two layers to light to form a latent pattern acting as a nucleus for crystal growth; and (iv) plating the latent pattern with a metal to grow metal crystals thereon. According to the method, a multilayer wiring pattern including a low resistivity metal may be formed in a relatively simple manner at low cost, and the metals constituting the respective layers can be freely selected according to the intended application. The low resistivity metal pattern may be advantageously applied to flat panel display devices, e.g., LCDs, PDPs and ELDs.Type: GrantFiled: November 2, 2005Date of Patent: February 10, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Chang Ho Noh, Ki Yong Song, Jin Young Kim, Sung Hen Cho, Euk Che Hwang, Tamara Byk
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Patent number: 7476412Abstract: The invention relates to a process for the metallization of an insulator and/or a dielectric, wherein the insulator is firstly activated, it is subsequently coated with another insulator and the latter is patterned, then the first is seeded and lastly metallized.Type: GrantFiled: March 27, 2001Date of Patent: January 13, 2009Assignee: Infineon Technologies AGInventors: Klaus Lowack, Günter Schmid, Recai Sezi
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Publication number: 20090004605Abstract: The invention includes a semiconductor processing method. A first material comprising silicon and nitrogen is formed. A second material is formed over the first material, and the second material comprises silicon and less nitrogen, by atom percent, than the first material. An imagable material is formed on the second material, and patterned. A pattern is then transferred from the patterned imagable material to the first and second materials. The invention also includes a structure comprising a first layer of silicon nitride over a substrate, and a second layer on the first layer. The second layer comprises silicon and is free of nitrogen. The structure further comprises a third layer consisting essentially of imagable material on the second layer.Type: ApplicationFiled: September 10, 2008Publication date: January 1, 2009Inventors: Scott Jeffrey DeBoer, John T. Moore
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Publication number: 20080315270Abstract: Multi-layer antireflection coatings, devices including multi-layer antireflection coatings and methods of forming the same are disclosed. A block copolymer is applied to a substrate and self-assembled into parallel lamellae above a substrate.Type: ApplicationFiled: June 21, 2007Publication date: December 25, 2008Applicant: Micron Technology, Inc.Inventors: Eugene P. Marsh, Dan B. Millward
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Patent number: 7459699Abstract: A laser mark which will be the positioning mark for a secondary charged particle image in the charged particle beam apparatus is applied by moving the sample processing/observation area in the charged particle beam apparatus so as to come into the view field while performing an observation by an infrared microscope, and by a using a laser optical system disposed coaxially with an optical observation system, the mark made at the periphery of the processing/observation object area. Next, by a superposition of an infrared transmission image and a CAD data, the processing/observation object area and the laser mark are registered onto the CAD data. And, by a correlation of the registered data read from the charged particle beam apparatus and the secondary charged particle image, it is possible to accurately and easily determine the processing position.Type: GrantFiled: November 23, 2005Date of Patent: December 2, 2008Assignee: SII NanoTechnology Inc.Inventors: Masahiro Kiyohara, Makoto Sato, Tatsuya Asahata
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Patent number: 7452659Abstract: Surface features are fabricated using a single layer or multi-layer molecular resist. The resist is preferably a selective adsorption resist. Selective adsorption resist is a resist that allows a deposited material to penetrate the resist such that the resist will reform on the top of the deposited material. Also, a nanofabricated system enables monitoring of the addition or removal of molecular species or proteins from a junction by monitoring the electronic properties of the junction.Type: GrantFiled: February 25, 2005Date of Patent: November 18, 2008Assignee: The Penn State Research FoundationInventor: Gregory S. McCarty
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Patent number: 7444196Abstract: A patterned structure in a wafer is created using one or more fabrication treatment processes. The patterned structure has a treated and an untreated portion. One or more diffraction sensitivity enhancement techniques are applied to the structure, the one or more diffraction sensitivity enhancement techniques adjusting one or more properties of the patterned structure to enhance diffraction contrast between the treated portion and untreated portions. A first diffraction signal is measured off an unpatterned structure on the wafer using an optical metrology device. A second diffraction signal is measured off the patterned structure on the wafer using the optical metrology device. One or more diffraction sensitivity enhancement techniques are selected based on comparisons of the first and second diffraction signals.Type: GrantFiled: April 21, 2006Date of Patent: October 28, 2008Assignee: Timbre Technologies, Inc.Inventors: Steven Scheer, Alan Nolet, Manuel Madriaga
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Publication number: 20080239580Abstract: A magnetic head incorporates: a medium facing surface; a coil; a pole layer; first and second shields disposed to sandwich the pole layer therebetween; a first gap layer disposed between the first shield and the pole layer; a second gap layer disposed between the second shield and the pole layer; and a substrate. The first shield is located closer to the substrate than the second shield. The magnetic head further incorporates an antireflection film disposed between the first shield and the first gap layer or between the first gap layer and the pole layer. The pole layer is formed by frame plating.Type: ApplicationFiled: March 26, 2007Publication date: October 2, 2008Applicants: TDK CORPORATION, SAE MAGNETICS (H.K.) LTD.Inventors: Tatsuya Harada, Koichi Otani, Hidetaka Kawano, Kenji Yokoyama, Naoto Matono
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Publication number: 20080241759Abstract: A conductor circuit (2) having a predetermined pattern is formed on a base material (1); a photosensitive resin composition layer is formed on a surface of the base material, on which the conductor circuit (2) having the predetermined pattern is formed, by using a photosensitive resin composition; a surface of the photosensitive resin composition layer is irradiated with and exposed to active light rays through a photomask having a predetermined pattern; a solder resist layer (3a) having a predetermined pattern is formed by using a developing solution; and the formed solder resist layer (3a) is irradiated with ultraviolet light by using a low-pressure mercury-vapor lamp.Type: ApplicationFiled: March 26, 2008Publication date: October 2, 2008Applicant: NITTO DENKO CORPORATIONInventors: Masaki MIZUTANI, Hirofumi FUJII
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Publication number: 20080241564Abstract: A method comprises providing a bottom electrode, depositing, on the bottom electrode, an active material comprising a first structural portion having an absorption peak at a UV wavelength, wherein such first structural portion is photo-activatable at such wavelength and which is constituted by monomers or oligomers that, when irradiated at said wavelength, undergo a photo-polymerization and/or photo-cross-linking reaction, or constituted by a polymer that at a UV wavelength undergoes a photo-degradation reaction, and a second electrically active or activatable structural portion which is substantially transparent to such predetermined UV wavelength; exposing a portion of the active material, through a photomask, to UV radiation having such UV wavelength, with photo-activation of the exposed portion of such film; selectively removing either the exposed photo-activated portion or the non-exposed portion, with exposure of a respective portion of the bottom electrode; depositing a head electrode.Type: ApplicationFiled: April 1, 2008Publication date: October 2, 2008Applicant: STMICROELECTRONICS S.R.L.Inventors: Andrea di Matteo, Angela Cimmino