Material Deposition Only Patents (Class 430/315)
  • Patent number: 8187795
    Abstract: Described herein are processing techniques for fabrication of stretchable and/or flexible electronic devices using laser ablation patterning methods. The laser ablation patterning methods utilized herein allow for efficient manufacture of large area (e.g., up to 1 mm2 or greater or 1 m2 or greater) stretchable and/or flexible electronic devices, for example manufacturing methods permitting a reduced number of steps. The techniques described herein further provide for improved heterogeneous integration of components within an electronic device, for example components having improved alignment and/or relative positioning within an electronic device. Also described herein are flexible and/or stretchable electronic devices, such as interconnects, sensors and actuators.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: May 29, 2012
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Kanti Jain, Kevin Lin
  • Patent number: 8182978
    Abstract: Compositions characterized by the presence of an aqueous base-soluble polymer having aromatic moieties and aliphatic alcohol moieties have been found which are especially useful as developable bottom antireflective coatings in 193 nm lithographic processes. The compositions enable improved lithographic processes which are especially useful in the context of subsequent ion implantation or other similar processes where avoidance of aggressive antireflective coating removal techniques is desired.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: May 22, 2012
    Assignee: International Business Machines Corporation
    Inventors: Wu-Song Huang, Libor Vyklicky, Pushkara Rao Varanasi
  • Publication number: 20120118613
    Abstract: A layout method for a bridging electrode capable of shielding a bright spot includes the steps of: providing a substrate; forming a transparent electroconductive layer, having neighboring pattern blocks, on the substrate; forming an alignment film layer, having bridging grooves for crossing between the pattern blocks, over the substrate; forming an electroconductive layer, having wires respectively correspondingly disposed over the bridging grooves, over the substrate; forming an electroconductive correspondence layer on one side of the electroconductive layer to shield the wires; and forming a protection layer over the substrate to enhance optical transmission and protect the substrate, the transparent electroconductive layer, the alignment film layer and the electroconductive layer. Meanwhile, the invention also provides a structure of the bridging electrode capable of shielding the bright spot and corresponding to the layout method.
    Type: Application
    Filed: November 12, 2010
    Publication date: May 17, 2012
    Inventor: Li-Li Fan
  • Publication number: 20120113063
    Abstract: Disclosed herein are a touch panel and a method of manufacturing the same. The touch panel 100 according to the present invention includes a transparent substrate 110; a discoloring layer 120 formed on one surface of the transparent substrate 110; and a transparent electrode 130 formed on the discoloring layer 120, wherein the transparent electrode 130 is patterned to have an opening 135 and the discoloring layer 120 selectively discolors only the portion 125 corresponding to the opening 135 into color corresponding to the transparent electrode 130. The present invention uses the discoloring layer 120 discolored into color corresponding to the transparent electrode 130 to prevent the recognition of the patterned transparent electrode 130 by a user, thereby making it possible to the improve visibility of the touch panel 100.
    Type: Application
    Filed: March 2, 2011
    Publication date: May 10, 2012
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Woon Chun Kim, Sang Hwan Oh, Yong Soo Oh, Jong Young Lee
  • Publication number: 20120103507
    Abstract: Disclosed herein is a method for manufacturing a circuit board. The method for manufacturing a circuit board includes: preparing a photosensitive composite; preparing a build-up insulating film by casting the photosensitive composite into a film made of poly ethylene terephthalate (PET) material; stacking the build-up insulation film on the board; forming via holes on the build-up insulation film by using a photolithography process; and forming conductive vias in the via holes.
    Type: Application
    Filed: September 21, 2011
    Publication date: May 3, 2012
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae Choon Cho, Hyung Mi Jung, Hwa Young Lee, Choon Keun Lee
  • Publication number: 20120091592
    Abstract: A method of forming an integrated circuit structure includes forming a first and a second plurality of tracks parallel to a first direction and on a wafer representation. The first and the second plurality of tracks are allocated in an alternating pattern. A first plurality of patterns is laid out on the first plurality of tracks and not on the second plurality of tracks. A second plurality of patterns is laid out on the second plurality of tracks and not on the first plurality of tracks. The first plurality of patterns is extended in the first direction and in a second direction perpendicular to the first direction, so that each of the second plurality of patterns is surrounded by portions of the first plurality of patterns, and substantially none of neighboring ones of the first plurality of patterns on the wafer representation have spacings greater than a pre-determined spacing.
    Type: Application
    Filed: October 19, 2010
    Publication date: April 19, 2012
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Huang-Yu Chen, Ken-Hsien Hsieh, Tsong-Hua Ou, Fang-Yu Fan, Yuan-Te Hou, Ming-Feng Shieh, Ru-Gun Liu, Lee-Chung Lu
  • Patent number: 8158335
    Abstract: The present invention includes a lithography method comprising forming a first patterned insist layer including at least one opening therein over a substrate. A water-soluble polymer layer is formed over the first patterned resist layer and the substrate, whereby a reaction occurs at the interface of the first patterned resist layer and the water-soluble polymer layer. The non-reacted water-soluble polymer layer is removed. Thereafter, a second patterned resist layer is formed over the substrate, wherein at least one portion of the second patterned resist layer is disposed within the at least one opening of the first patterned resist layer or abuts at least one portion of the first patterned resist layer. The substrate is thereafter etched using the first and second patterned resist layers as a mask.
    Type: Grant
    Filed: September 15, 2008
    Date of Patent: April 17, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiao-Wei Yeh, Ching-Yu Chang, Jian-Hong Chen, Chih-An Lin
  • Patent number: 8158332
    Abstract: A method of fabricating a semiconductor device according to an embodiment includes: forming a first resist pattern made of a first resist material on a workpiece material; irradiating an energy beam onto the first resist pattern, the energy beam exposing the first resist material to light; performing a treatment for improving resistance the first resist pattern after irradiation of the energy beam; forming a coating film on the workpiece material so as to cover the first resist pattern; and forming a second resist pattern made of a second resist material on the coating film after the treatment.
    Type: Grant
    Filed: January 19, 2010
    Date of Patent: April 17, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kentaro Matsunaga, Tomoya Oori, Eishi Shiobara
  • Patent number: 8153350
    Abstract: The present invention includes a lithography method comprising forming a first patterned resist layer including at least one opening therein over a substrate. A protective layer is formed on the first patterned resist layer and the substrate whereby a reaction occurs at the interface between the first patterned resist layer and the protective layer to form a reaction layer over the first patterned resist layer. The non-reacted protective layer is then removed. Thereafter, a second patterned resist layer is formed over the substrate, wherein at least one portion of the second patterned resist layer is disposed within the at least one opening of the first patterned resist layer. The substrate is thereafter etched using the first and second patterned resist layers as a mask.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: April 10, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 8153351
    Abstract: Photolithography methods using BARCs having graded optical properties are provided. In an exemplary embodiment, a photolithography method comprises the steps of depositing a BARC overlying a material to be patterned, the BARC having a refractive index and an absorbance. The BARC is modified such that, after the step of modifying, values of the refractive index and the absorbance are graded from first values at a first surface of the BARC to second values at a second surface of the BARC. The step of modifying is performed after the step of depositing.
    Type: Grant
    Filed: October 21, 2008
    Date of Patent: April 10, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Thomas I. Wallow, Jongwook Kye
  • Patent number: 8148052
    Abstract: A method of forming a pattern in at least one device layer in or on a substrate comprises: coating the device layer with a first photoresist layer; exposing the first photoresist using a first mask; developing the first photoresist layer to form a first pattern on the substrate; coating the substrate with a protection layer; treating the protection layer to cause a change therein where it is in contact with the first photoresist, to render the changed protection layer substantially immune to a subsequent exposure and/or developing step; coating the substrate with a second photoresist layer; exposing the second photoresist layer using a second mask; and developing the second photoresist layer to form a second pattern on the substrate without significantly affecting the first pattern in the first photoresist layer, wherein the first and second patterns together define interspersed features having a spatial frequency greater than that of the features defined in each of the first and second patterns separately.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: April 3, 2012
    Assignee: NXP B.V.
    Inventors: Anja Monique Vanleenhove, Peter Dirksen, David Van Steenwinckel, Gerben Doornbos, Casper Juffermans, Mark Van Dal
  • Patent number: 8142964
    Abstract: In a multiple-exposure lithographic process a developed resist pattern derived from a first exposure is present within a second resist layer that is exposed in a second exposure of the multiple-exposure lithographic process. The second mask pattern used in the second exposure process includes at least one localized adjustment to at least one feature thereof to compensate for scattering effects of the developed resist pattern that is present when the second exposure is performed.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: March 27, 2012
    Assignee: ASML Netherlands B.V.
    Inventors: Sander De Putter, Jozef Maria Finders, Bertus Johan Vleeming
  • Patent number: 8129096
    Abstract: A method capable of easily and simply manufacturing a conductive member pattern such as a nano-size fine wiring or electrode is disclosed. Specifically, the disclosed method for manufacturing a conductive member pattern includes the steps of: forming an ion-exchangeable resin pattern on a substrate by using a photosensitive resin; making the resin pattern absorb a metal component-containing solution; and baking the resin pattern having absorbed the metal component-containing solution, wherein the width and the ratio “width/height” of the resin pattern before baking are 1 ?m or less and 5 or less, respectively.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: March 6, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koki Nukanobu, Naofumi Aoki
  • Patent number: 8124321
    Abstract: In a lithography process using an ultraviolet process, the applied ultraviolet resist can be removed by intentionally condensing the ultraviolet resist before removing the ultraviolet resist.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: February 28, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Ronald Charles Roth, Georgina Marie Park, Rosemary Urmese Anthraper
  • Publication number: 20120044187
    Abstract: One embodiment in accordance with the invention can include a capacitive touch screen. The capacitive touch screen includes a substantially transparent substrate and a plurality of electrodes formed on the substantially transparent substrate. The plurality of electrodes are substantially parallel in a first direction and each of the plurality of electrodes includes a layer of light altering material.
    Type: Application
    Filed: March 29, 2009
    Publication date: February 23, 2012
    Applicant: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Igor Polishchuk, Edward Grivna
  • Patent number: 8114577
    Abstract: An exemplary method for making a plurality of light blocking plates is provided. Firstly, a photoresist layer is formed on a substrate. Secondly, the photoresist layer is exposed using a gray scale photomask. Thirdly, the photoresist layer is developed to form a plurality of conical frustums on the substrate, and each of the conical frustums tapers in a direction away from the substrate. Fourthly, an opaque to-be-solidified film is formed on the substrate, and each of the conical frustums extends through the to-be-solidified film. Fifthly, the to-be-solidified film is solidified. Sixthly, the solidified film is separated from the substrate and the conical frustums, thus obtaining a light blocking plate module including a plurality of light blocking plates. Lastly, the light blocking plate module is cut into a plurality of individual light blocking plates.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: February 14, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Hsin-Hung Chuang
  • Patent number: 8110322
    Abstract: The invention provides a method for forming a selective mask on a surface of a layer of AlXGaYIn1-X-YAsZP1-Z or AlXGaYIn1-X-YNZAs1-Z (0?X?1, 0?Y?1, 0?Z?1), which is a method for forming a mask with a minute width suitable for microfabrication in nano-order. (1) An energy beam 4a, 4b is selectively irradiated onto a natural oxide layer 2 formed on the surface of the layer 1 of AlXGaYIn1-X-YAsZP1-Z or AlXGaYIn1-X-YNZAs1-Z. (2) Of the natural oxide layer 2, parts other than parts onto which the energy beam 4a, 4b has been irradiated is removed by heating. (3) The natural oxide layer 2 of the parts onto which the energy beam 4a, 4b has been irradiated is partially removed by heating while alternatively carrying out a rise and fall in heating temperature.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: February 7, 2012
    Assignee: Riber
    Inventors: Naokatsu Sano, Tadaaki Kaneko
  • Patent number: 8105760
    Abstract: A pattern is formed by applying a first positive resist composition comprising a polymer comprising recurring units which become alkali soluble under the action of acid onto a substrate to form a first resist coating, heat treating, exposing, heat treating, developing to form a first resist pattern, applying a pattern surface coating composition comprising a hydroxyl-containing crosslinkable polymer onto the first resist pattern and crosslinking, thereby covering the first resist pattern with a crosslinked polymer film, applying a second positive resist composition thereon, heat treating, exposing, heat treating, and developing to form a second resist pattern.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: January 31, 2012
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Jun Hatakeyama, Takeru Watanabe, Katsuhiro Kobayashi, Kazuhiro Katayama
  • Patent number: 8105759
    Abstract: A photosensitive resin composition comprising (A) a binder polymer, (B) a photopolymerizing compound with a polymerizable ethylenic unsaturated bond, (C) a photoradical polymerization initiator containing a 2,4,5-triarylimidazole dimer or its derivative, and (D) a compound represented by the following general formula (1) (wherein R1 and R2 each independently represent C1-20 alkyl, etc., and R3, R4, R5, R6, R7, R8, R9 and R10 each independently represent hydrogen, etc.).
    Type: Grant
    Filed: January 3, 2006
    Date of Patent: January 31, 2012
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Masahiro Miyasaka, Takashi Kumaki
  • Patent number: 8101339
    Abstract: A photosensitive resin composition according to the invention comprises (A) a binder polymer, (B) a photopolymerizing compound with an ethylenic unsaturated group and (C) a photopolymerization initiator, wherein component (B) contains a compound represented by the following general formula (I). [Wherein R1-R3 each independently represent a group represented by the following general formula (II): or the following general formula (III): and at least one of R1-R3 is a group represented by general formula (III).
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: January 24, 2012
    Assignee: Hitachi Chemical Company, Ltd.
    Inventor: Yoshiki Ajioka
  • Publication number: 20120015304
    Abstract: Method for fabricating an interposer is provided. A substrate is provided having thereon at least a conductive via and at least a flange. The flange is bonded on the substrate and shades a portion of the via. A photoresist layer is formed on the interior surface of the via, on a contact surface of the flange and on an inner surface of the flange opposite to the contact surface. An opening is formed in the photoresist layer to expose a portion of the contact surface of the flange, while the photoresist layer still covers the interior surface of the via and the inner surface of the flange. A plating layer is formed on the exposed contact surface of the flange. The photoresist layer is then removed.
    Type: Application
    Filed: July 15, 2010
    Publication date: January 19, 2012
    Inventors: Chang-Ming Lee, Wen-Fang Liu, Shih-Jung Huang, Ling-Kai Su
  • Patent number: 8080314
    Abstract: Methods and articles providing for precise aligning, positioning, shaping, and linking of nanotubes and carbon nanotubes. An article comprising: a solid surface comprising at least two different surface regions including: a first surface region which comprises an outer boundary and which is adapted for carbon nanotube adsorption, and a second surface region which is adapted for preventing carbon nanotube adsorption, the second region forming an interface with the outer boundary of the first region, at least one carbon nanotube which is at least partially selectively adsorbed at the interface. The shape and size of the patterns on the surface and the length of the carbon nanotube can be controlled to provide for selective interfacial adsorption.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: December 20, 2011
    Assignee: Northwestern University
    Inventors: Chad A. Mirkin, Yuhuang Wang, Daniel Maspoch
  • Publication number: 20110304671
    Abstract: Described is a process for producing an inkjet printhead comprising an aperture face having an oleophobic surface. The process includes forming an aperture plate by disposing a silicon layer on an aperture plate; using photolithography to create a textured pattern on an outer surface of the silicon layer; and chemically modifying the textured surface by disposing a conformal, oleophobic coating on the textured surface. The oleophobic aperture plate may be used as a front face surface for an inkjet printhead.
    Type: Application
    Filed: June 15, 2010
    Publication date: December 15, 2011
    Applicant: XEROX CORPORATION
    Inventors: Kock-Yee LAW, Hong ZHAO
  • Publication number: 20110300488
    Abstract: The invention related to an antireflective coating comprising a mixture of a first polymer and a second polymer, and a thermal acid generator, where the first polymer comprises at least one fluoroalcohol moiety, at least one aliphatic hydroxyl moiety, and at least one acid moiety other than fluoroalcohol with a pKa in the range of about 8 to about 11; where the second polymer is a reaction product of an aminoplast compound with a compound comprising at least one hydroxyl and/or at least one acid group. The invention further relates to a process for using the novel composition to form an image.
    Type: Application
    Filed: June 3, 2010
    Publication date: December 8, 2011
    Inventors: Huirong Yao, Jain Yin, Guanyang Lin, Mark Neisser, David Abdallah
  • Publication number: 20110300489
    Abstract: An exemplary method for providing a conductive material structure on a carrier generally includes applying a photo sensitive material on the carrier and applying a mask on the photo sensitive material. The mask defines a conductive material structure to be formed on the carrier. The method also includes irradiating the defined structure on the carrier in order to prepare for metallization, and metalizing the defined structure for forming the conductive material structure.
    Type: Application
    Filed: August 17, 2011
    Publication date: December 8, 2011
    Applicant: LAIRD TECHNOLOGIES AB
    Inventor: Ulf Palin
  • Patent number: 8071271
    Abstract: Disclosed is a method for producing a conductive film, which includes a silver metal forming step for forming a silver metal portion by exposing and developing a photosensitive material which has a silver salt-containing layer containing a silver salt on a supporting body, and a smoothing step for smoothing the silver metal portion. The smoothing step is performed by calender roll at a line pressure of not less than 1960 N/cm (200 kgf/cm). Consequently, the surface resistance of the film after development can be reduced in production of a conductive film which is effective for shielding electromagnetic waves.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: December 6, 2011
    Assignee: Fujifilm Corporation
    Inventors: Akira Ichiki, Makoto Kusuoka
  • Patent number: 8053175
    Abstract: A method of forming measuring targets for measuring the dimensions of a substrate during a substrate manufacturing process is provided. First, a board having a base layer and a conductive layer is provided, wherein the conductive layer is disposed on a surface of the base layer. Then, at least one through hole is formed in the board as a measuring target for measuring the dimensions of the substrate. Next, a plated via is formed in the through hole as another measuring target for measuring the dimensions of the substrate. Thereafter, a patterned dielectric layer is formed on the board to expose the plated via as a next measuring target for measuring the dimensions of the substrate. In the present invention, measuring targets are formed during a substrate manufacturing process and the dimensions of the substrate are measured instantly. The accuracy in process alignment is improved without increasing the fabrication cost.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: November 8, 2011
    Assignee: ASE Electroncis Inc.
    Inventor: Hsiang-Ming Feng
  • Patent number: 8043798
    Abstract: It is disclosed a method of forming fine patterns comprising: covering a substrate having photoresist patterns thereon made of a photoresist composition which is sensitive to high energy light rays with wavelength of 200 nm or shorter or electron beam radiation, with an over-coating agent for forming fine patterns, applying heat treatment to cause thermal shrinkage of the over-coating agent so that the spacing between adjacent photoresist patterns is lessened by the resulting thermal shrinking action, and removing the over-coating agent substantially completely. The present invention provides a method of forming fine patterns whereby fine patterns having pattern width or diameter of 100 nm or shorter and being excellent in uniformity (in-plane uniformity), etc. can be formed by ultrafine processing using high energy light rays with wavelength of 200 nm or shorter or electron beams.
    Type: Grant
    Filed: August 21, 2003
    Date of Patent: October 25, 2011
    Assignee: Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Tsuyoshi Nakamura, Tasuku Matsumiya, Kiyoshi Ishikawa, Yoshiki Sugeta, Toshikazu Tachikawa
  • Patent number: 8043793
    Abstract: The present invention provides a method for manufacturing an electroluminescence element that has a light emitting layer containing a quantum dot and exhibits excellent life characteristics. In the method, patterning of the light emitting layer can be stably performed by a lift-off method. A photoresist layer is formed on a substrate having a first electrode layer. The photoresist layer is then exposed, developed, and patterned to ensure that a portion of the photoresist layer, which is located in a light emission area, is removed. A coating liquid containing a quantum dot having a silane coupling agent attached to the surface thereof is coated on the resultant substrate having the patterned photoresist layer and cured to form a light emitting layer. The remaining photoresist layer is then removed to lift off a portion of the light emitting layer, which is present on the photoresist layer.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: October 25, 2011
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Yasuhiro Iizumi, Masaya Shimogawara
  • Patent number: 8039179
    Abstract: Provided is a photolithography apparatus including a photomask. The photomask includes a pattern having a plurality, of features, in an example, dummy line features. The pattern includes a first region being in the form of a localized on-grid array and a second region where at least one of the features has an increased width. The apparatus may include a second photomask which may define an active region. The feature with an increased width may be adjacent, and outside, the defined active region.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: October 18, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Feng Shieh, Shinn-Sheng Yu, Anthony Yen, Shao-Ming Yu, Chang-Yun Chang, Jeff J. Xu, Clement Hsingjen Wann
  • Patent number: 8039204
    Abstract: A manufacturing method of a silicon carbide semiconductor apparatus is provided. The method includes forming a first resist pattern on a surface of a silicon carbide layer formed on a silicon carbide substrate, implanting a first conduction type impurity ion in the silicon carbide layer on which the first resist pattern is formed, forming a second resist pattern by decreasing a width of the first resist pattern with etching and forming a deposition layer on the surface of the silicon carbide layer which is not covered with the second resist pattern, and implanting a second conduction type impurity ion in the silicon carbide layer on which the second resist pattern is formed, through the deposition layer.
    Type: Grant
    Filed: July 14, 2008
    Date of Patent: October 18, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventor: Hiroshi Watanabe
  • Publication number: 20110250541
    Abstract: To provide a pattern forming method, which contains: forming a first resist pattern on a processing surface using a first resist composition; forming a coating layer using a coating material so as to cover a surface of the first resist pattern; applying a second resist composition over the first resist pattern above which the coating layer has been formed so as not to dissolve the first resist pattern with the second resist composition to thereby form a second resist film; and selectively exposing the second resist film to exposure light and developing the second resist film to thereby expose the first resist pattern to the air, as well as forming a second resist pattern in an area of the processing surface where the first resist pattern has not been formed.
    Type: Application
    Filed: June 24, 2011
    Publication date: October 13, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Miwa Kozawa, Koji Nozaki
  • Patent number: 8034542
    Abstract: An electromagnetic shielding film for plasma display which is excellent in electromagnetic shielding characteristics for effectively shielding electromagnetic waves, near infrared rays, stray light, external light, and the like and even when stored under a wet heat condition, is small in change of color tint and good in adhesion, with a blackening layer hardly peeled away, is provided by a transparent electromagnetic shielding film including a transparent support having thereon a conductive metal layer in a pattern-like state having an electromagnetic shielding ability and having a surface covered by a blackening layer, with the blackening layer made of an alloy of nickel and zinc in a nickel/zinc mass ratio of from 0.5 to 50.
    Type: Grant
    Filed: March 28, 2007
    Date of Patent: October 11, 2011
    Assignee: FUJIFILM Corporation
    Inventors: Hirotomo Sasaki, Jun Matsumoto, Takayasu Yamazaki, Akimitsu Haijima, Yoshihiro Fujita
  • Publication number: 20110236835
    Abstract: Antireflective coatings produced from silsesquioxane resin comprises the units (Ph(CH2)rSiO(3-x)/2(OR?)x)m (HSiO(3-x)/2(OR?)x)n (MeSiO(3-x)/2(OR?)x)o (RSiO(3-x)/2(OR?)x)p (R1SiO(3-x)/2(OR?)x)q where Ph is a phenyl group, Me is a methyl group; R? is hydrogen atom or a hydrocarbon group having from 1 to 4 carbon atoms; R is selected from a carboxylic acid group or a carboxylic acid forming group with the proviso that there is a sufficient amount of carboxylic acid groups to make the resin wet etchable after cure; and R1 is selected from substituted phenyl groups, ester groups, polyether groups; mercapto groups, sulfur-containing organic functional groups, hydroxyl producing group, aryl sulphonic ester groups, and reactive or curable organic functional groups; and r has a value of 0, 1, 2, 3, or 4; x has a value of 0, 1 or 2; wherein in the resin m has a value of 0 to 0.90; n has a value of 0.05 to 0.99; o has a value of 0 to 0.95; p has a value of 0.01 to 0.5; q has a value of 0 to 0.5; and m+n+o+p+q?1.
    Type: Application
    Filed: October 19, 2009
    Publication date: September 29, 2011
    Inventors: Peng-Fei Fu, Moyer Eric, Craig Yeakle
  • Publication number: 20110233619
    Abstract: An exposure mask according to an embodiment of the invention includes a first transmission region where a plurality of dots through which light is shielded or transmitted are arrayed into a matrix form having rows and columns and a second transmission region where a plurality of dots through which the light is shielded or transmitted are arrayed into a matrix form having rows and columns and is disposed adjacent to the first transmission region. The dots arrayed in a row or a column of the first transmission region, which is adjacent to the second transmission region, have an area intermediate between areas of dots arrayed on both sides of the row or the column.
    Type: Application
    Filed: March 16, 2011
    Publication date: September 29, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Ken TOMITA
  • Publication number: 20110236834
    Abstract: Example embodiments relate to an electrode having a transparent electrode layer, an opaque electrode layer formed on the transparent electrode layer and catalyst formed on an open surface on the transparent electrode layer, which open surface is not covered by the opaque electrode layer.
    Type: Application
    Filed: June 1, 2011
    Publication date: September 29, 2011
    Inventors: Junhee Choi, Andrei Zoulkarneev
  • Publication number: 20110229822
    Abstract: In a first aspect of the present invention, a method for manufacturing a flip chip package is provided comprising the steps of a) providing a chip having electrically conductive pads on an active surface thereof, b) coating at least a portion the chip with a protectant composition comprising a polymerizable component comprising a thermosetting epoxy resin, at least 50 weight percent of a substantially transparent filler having a coefficient of thermal expansion of less than 10 ppm/° C., a photoinitator, and a solvent carrier, wherein the protectant composition comprises a thixotropic index of less than 1.
    Type: Application
    Filed: November 25, 2009
    Publication date: September 22, 2011
    Inventor: Russell A. Stapleton
  • Publication number: 20110229823
    Abstract: A method for fabricating a fuel cell component includes the steps of providing a mask having a plurality of radiation transparent apertures, a radiation-sensitive material having a sensitivity to the plurality of radiation beams, and a flow field layer. The radiation-sensitive material is disposed on the flow field layer. The radiation-sensitive material is then exposed to the plurality of radiation beams through the radiation transparent apertures in the mask to form a diffusion medium layer with a micro-truss structure.
    Type: Application
    Filed: June 2, 2011
    Publication date: September 22, 2011
    Applicants: GM GLOBAL TECHNOLOGY OPERATIONS LLC, HRL Laboratories, LLC
    Inventors: Jeffrey A. Rock, Yeh-Hung Lai, Keith E. Newman, Gerald W. Fly, Ping Liu, Alan J. Jacobsen, William B. Carter, Peter D. Brewer
  • Patent number: 8017306
    Abstract: A conductive film producing method includes a metallic silver forming step of exposing and developing a photosensitive material having a 95-?m-thick long support and thereon a silver salt-containing emulsion layer, thereby forming a metallic silver portion to prepare a conductive film precursor, and a smoothing treatment step of subjecting the conductive film precursor to a smoothing treatment to produce a conductive film. In the smoothing treatment, the conductive film precursor is pressed by first and second calender rolls facing each other, and the first calender roll is a resin roll to be brought into contact with the support. The method satisfies the condition of 1/2?P1/P2?1, wherein P1 represents a conveying force applied when the conductive film precursor is introduced to an area where the smoothing treatment step is conducted, and P2 represents a conveying force applied when the smoothing-treated conductive film is discharged from the area.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: September 13, 2011
    Assignee: Fujifilm Corporation
    Inventors: Tsukasa Tokunaga, Hiroshi Sakuyama
  • Publication number: 20110217657
    Abstract: A method of fabrication and device with holes for electrical conduction made by preparing a photosensitive glass substrate comprising at least silica, lithium oxide, aluminum oxide, and cerium oxide, masking a design layout comprising one or more holes to form one or more electrical conduction paths on the photosensitive glass substrate, exposing at least one portion of the photosensitive glass substrate to an activating energy source, exposing the photosensitive glass substrate to a heating phase of at least ten minutes above its glass transition temperature, cooling the photosensitive glass substrate to transform at least part of the exposed glass to a crystalline material to form a glass-crystalline substrate and etching the glass-crystalline substrate with an etchant solution to form the one or more depressions or through holes for electrical conduction in the device.
    Type: Application
    Filed: March 8, 2011
    Publication date: September 8, 2011
    Applicant: LIFE BIOSCIENCE, INC.
    Inventors: Jeb H. Flemming, Colin T. Buckley, R. Blake Ridgeway, Roger Cook
  • Patent number: 8012673
    Abstract: Disclosed are organic semiconductor devices containing a copolymer layer that contains a polymer dielectric and a semiconducting polymer formed using actinic radiation. As initially formed, the copolymer layer has dielectric properties, but portions may selectively rendered conductive after those portions are exposed to actinic radiation. Also disclosed are methods of making the organic semiconductor devices. Such devices are characterized by light weight and robust reliability.
    Type: Grant
    Filed: March 1, 2005
    Date of Patent: September 6, 2011
    Assignee: Spansion LLC
    Inventors: Suzette K. Pangrle, Matthew S. Buynoski, Nicholas H. Tripsas, Uzodinma Okoroanyanwu
  • Patent number: 8007983
    Abstract: The photosensitive resin composition of the invention is characterized by comprising (A) a binder polymer, (B) a photopolymerizing compound with at least one polymerizable ethylenic unsaturated bond in the molecule, (C) a photopolymerization initiator and (D) a compound represented by the following general formula (1). In formula (1), R1, R2, R3 and R4 are each independently hydrogen or a compound of the following general formula (2). In general formula (2), R5 represents a C4-30 hydrocarbon group.
    Type: Grant
    Filed: March 14, 2007
    Date of Patent: August 30, 2011
    Assignee: Hitachi Chemical Company, Ltd.
    Inventor: Mitsuaki Watanabe
  • Patent number: 8003300
    Abstract: This invention provides processing steps, methods and materials strategies for making patterns of structures for electronic, optical and optoelectronic devices. Processing methods of the present invention are capable of making micro- and nano-scale electronic structures, such as T-gates, gamma gates, and shifted T-gates, having a selected non-uniform cross-sectional geometry. The present invention provides lithographic processing strategies for sub-pixel patterning in a single layer of photoresist useful for making and integrating device components comprising dielectric, conducting, metal or semiconductor structures having non-uniform cross-sectional geometries. Processing methods of the present invention are complementary to conventional microfabrication and nanofabrication platforms, and can be effectively integrated into existing photolithographic, etching and thin film deposition patterning strategies, systems and infrastructure.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: August 23, 2011
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Kanti Jain, Uttam Reddy
  • Patent number: 8001685
    Abstract: Disclosed are probe card needles manufactured using microfabrication technology, a method for manufacturing the probe card needles, and a probe card having the probe card needles. The probe needles are manufactured by forming, on a ceramic board, probe needle bases made of conductive metal, and a polymeric elastomer layer, by using photolithography and a photoresist, and continuously depositing conductive metal layers on the probe needle bases in such a manner as to be supported by the polymeric elastomer layer. The probe card comprises: a printed circuit board (PCB) which is connected to a test head for transmitting an electrical signal from a tester; a ceramic board located below the PCB and electrically connected to the PCB by a plurality of interface pins; a jig for mechanically holding the interface pins and the multilayer ceramic board to the PCB; and a plurality of probe needles attached to the lower surface of the multilayer ceramic board and making contact with electrical/electronic devices.
    Type: Grant
    Filed: August 19, 2005
    Date of Patent: August 23, 2011
    Assignees: Microfriend Inc.
    Inventor: Byung Ho Jo
  • Patent number: 8003306
    Abstract: A method of forming an electronic device is provided that includes forming a resist layer over a substrate having a first region, a second region, and a third region. The method further includes directing radiation through a reticle, wherein the reticle comprises different radiation zones having significantly different transmission values with respect to each other, and the first region is exposed to a significantly different amount of radiation as compared to the second region. The method also includes removing part of the resist layer to leave a remaining portion such that the second region of the resist layer is significantly thinner than the third region of the resist layer, and then ion implanting the substrate while the remaining portion of the resist layer overlies the substrate to form a first implant region and a second implant region having different depths.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: August 23, 2011
    Assignee: Spansion LLC
    Inventors: Eric Apelgren, Nabil R. Yazdani
  • Publication number: 20110200937
    Abstract: The present invention provides a positive photosensitive resin composition for spray coating, which comprises an alkali-soluble resin, a compound which generates an acid when exposed to light and a solvent, and which has a viscosity of 0.5 to 200 cP. By using the positive photosensitive resin composition, it is possible to form a coating film having a uniform thickness on the inner surface of a hole having a high aspect ratio. By using a coating film pattern, which is obtained by exposing and developing a predetermined region of the obtained coating film, as an insulating film or mask for forming an insulating film pattern, it is possible to suppress generation of leakage current in a hole and to form a through electrode with a high yield.
    Type: Application
    Filed: October 15, 2009
    Publication date: August 18, 2011
    Applicant: SUMITOMO BAKELITE CO., LTD.
    Inventors: Hideki Orihara, Toshio Banba
  • Patent number: 7998658
    Abstract: A first resist film is formed on a substrate, and first pattern exposure is performed such that the first resist film is irradiated with exposure light through a first mask. Then, the first resist film is developed, thereby forming a first resist pattern out of the first resist film. Subsequently, a nano-carbon material is attached to the surface of the first resist pattern, and then a second resist film is formed on the substrate including the first resist pattern. Thereafter, second pattern exposure is performed such that the second resist film is irradiated with exposure light through a second mask. Then, the second resist film is developed, thereby forming a second resist pattern out of the second resist film.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: August 16, 2011
    Assignee: Panasonic Corporation
    Inventors: Masayuki Endou, Masaru Sasago
  • Patent number: 7993817
    Abstract: A structure is provided with a self-aligned resist layer on an insulator surface and non-lithographic method of fabricating the same. The non-lithographic method includes applying a resist on a structure comprising at least one of interconnects formed in an insulator material. The method further comprises exposing the resist to energy and developing the resist to expose surfaces of the interconnects. The method further comprises depositing metal cap material on the exposed surfaces of the interconnects.
    Type: Grant
    Filed: January 20, 2009
    Date of Patent: August 9, 2011
    Assignee: International Business Machines Corporation
    Inventors: Daniel C. Edelstein, Elbert E. Huang, Robert D. Miller
  • Patent number: 7989143
    Abstract: An electrode substrate in which a lower electrode and an upper electrode are well positioned by way of an insulating film could not be formed by a printing method since positional displacement is caused. The cost was increased outstandingly when using photomasks for positioning. In the present invention, positional displacement does not occur even when using the printing method since the upper electrode and the lower electrode are positioned in self-alignment. Accordingly, a semiconductor device such as a flexible substrate using an organic semiconductor can be formed with low cost by using the printing method.
    Type: Grant
    Filed: May 23, 2007
    Date of Patent: August 2, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Tadashi Arai, Takeo Shiba, Masahiko Ando, Kazuyoshi Torii
  • Publication number: 20110183268
    Abstract: There is provided a process for forming a contained second layer over a first layer, including the steps: forming the first layer having a first surface energy; treating the first layer with a reactive surface-active composition to form a treated first layer having a second surface energy which is lower than the first surface energy; exposing the treated first layer with radiation; and forming the second layer. There is also provided an organic electronic device made by the process.
    Type: Application
    Filed: April 5, 2011
    Publication date: July 28, 2011
    Applicant: E. I. DU PONT DE NEMOURS AND COMPANY DUPONT DISPLAYS INC
    Inventors: Charles D. Lang, Stephen Sorich, Charles Kenneth Taylor, Douglas Robert Anton, Alberto Goenaga, Paul Anthony Sant