Material Deposition Only Patents (Class 430/315)
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Patent number: 8697342Abstract: Disclose herein is a method of modifying a positive-type chemically amplified resist pattern, including the steps of, applying to a surface of a resist pattern, an aqueous solution of a modifier for the positive-type chemically amplified resist pattern, the aqueous solution containing a water-soluble cross-linking agent and a penetration accelerator, the cross-linking agent and the penetration accelerator being dissolved in water or a mixed solvent containing water as a main ingredient, so as to permit the cross-linking agent to penetrate the resist pattern, removing a surplus of the cross-linking agent, and irradiating the resist pattern.Type: GrantFiled: March 8, 2011Date of Patent: April 15, 2014Assignee: Sony CorporationInventors: Ichiro Takemura, Isao Mita, Eriko Matsui, Nobuyuki Matsuzawa
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Patent number: 8642249Abstract: Micro-fluid ejection devices, methods for making a micro-fluid ejection device, and methods for reducing a size of a substrate for a micro-fluid ejection head. One such micro-fluid ejection device has a polymeric layer adjacent a substrate and at least one conductive layer embedded in the polymeric layer. The polymeric layer comprises at least two layers of polymeric material.Type: GrantFiled: July 23, 2010Date of Patent: February 4, 2014Assignee: Funai Electric Co., Ltd.Inventors: Frank E Anderson, Yimin Guan, Carl Edmond Sullivan, Timothy Lowell Strunk
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Patent number: 8609323Abstract: A method of forming ceramic pattern structures of silicon carbide film includes depositing an electron-beam resist or a photo-resist onto a substrate. A portion of the resist is selectively removed from the substrate to form a resist pattern on the substrate. A film of pre-ceramic polymer that includes silicon and carbon is deposited onto the substrate and resist pattern and the pre-ceramic polymer film is cured. A portion of the cured pre-ceramic polymer film on the resist pattern is removed, thereby forming a pre-ceramic polymer pattern on the substrate. The pre-ceramic polymer pattern is then converted to a ceramic pattern.Type: GrantFiled: May 30, 2012Date of Patent: December 17, 2013Assignee: University of MassachusettsInventors: Joel M. Therrien, Daniel F. Schmidt
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Publication number: 20130316291Abstract: The present invention relates to a stacked chip inductor. According to one aspect of the present invention, provided is an inductor including: a stacked structure; and an external electrode structure formed outside of the stacked structure, wherein the stacked structure: an insulating layer; and a polymer layer is stacked on the insulating layer.Type: ApplicationFiled: July 29, 2013Publication date: November 28, 2013Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Sung Kwon Wi, Young Seuck Yoo, Jeong Bok Kwak, Yong Suk Kim, Sang Moon Lee, Kang Heon Hur
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Publication number: 20130313006Abstract: The present disclosure relates to a touch panel and a producing method of the same.Type: ApplicationFiled: April 26, 2013Publication date: November 28, 2013Applicant: Research & Business Foundation Sungkyunkwan UniversityInventor: Research & Business Foundation Sungkyunkwan University
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Patent number: 8574816Abstract: The invention provides a positive resist composition comprising, as base resins contained therein, (A) a polymer having a weight-average molecular weight of 1000 to 500000 and containing a repeating unit which contains a structure having a hydrogen atom of a carboxyl group thereof substituted with an acid-labile group having a cyclic structure and (B) a novolak resin of a substituted or an unsubstituted naphtholphthalein, and in addition, a photo acid generator. There can be provided a positive resist composition having an appropriate absorption to form a pattern on a highly reflective substrate, excellent characteristics in adhesion and implantation onto a non-planar substrate, a good pattern profile after light exposure, and an ion implantation resistance at the time of ion implantation; and a patterning process.Type: GrantFiled: August 13, 2012Date of Patent: November 5, 2013Assignee: Shin-Etsu Chemical Co., Ltd.Inventors: Jun Hatakeyama, Daisuke Kori
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Patent number: 8568961Abstract: In a first aspect of the present invention, a method for manufacturing a flip chip package is provided comprising the steps of a) providing a chip having electrically conductive pads on an active surface thereof, b) coating at least a portion the chip with a protectant composition comprising a polymerizable component comprising a thermosetting epoxy resin, at least 50 weight percent of a substantially transparent filler having a coefficient of thermal expansion of less than 10 ppm/° C., a photoinitator, and a solvent carrier, wherein the protectant composition comprises a thixotropic index of less than 1.Type: GrantFiled: November 25, 2009Date of Patent: October 29, 2013Assignee: Lord CorporationInventor: Russell A. Stapleton
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Patent number: 8557507Abstract: Nanopillars with nanoscale diameters are provided where the nanopillar has uniformly aligned nano-twins either perpendicular or inclined by 1-90° to the pillar-axis with no grain-boundaries or any other features.Type: GrantFiled: November 7, 2011Date of Patent: October 15, 2013Assignee: California Institute of TechnologyInventors: Dongchan Jang, Julia R. Greer
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Patent number: 8535571Abstract: Water-soluble electrically conductive polymers and a composition comprising such polymers are provided. Also, an electrically conductive layer or film formed from the composition, and articles comprising the electrically conductive layer or film are provided. The electrically conductive polymers according to the present disclosure have one or more hydrophilic side chains. Hydrophilic side chains are covalently bonded to the conductive polymers, which allow the polymer to be stable at high temperature. Thus, the stability of electrical conductivity is prolonged. Depending on the concentration of hydrophilic side chains, the conductivity may be changed. The hydrophilic side chains provide a successful way to fabricate a ductile film exhibiting tunable conductivity. Furthermore, high levels of surface-resistance uniformity can be achieved in the field of coating technology that uses eco-friendly water-based solvents to uniformly and quickly coat the conductive polymer on to plastic film surfaces.Type: GrantFiled: December 30, 2009Date of Patent: September 17, 2013Assignee: Korea University Research and Business FoundationInventor: Dong Hoon Choi
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Patent number: 8501392Abstract: A photosensitive element comprises a support, a photosensitive layer and a protective film laminated in that order, wherein the photosensitive layer is composed of a photosensitive resin composition containing a binder polymer, a photopolymerizing compound, a photopolymerization initiator and a compound with a maximum absorption wavelength of 370-420 nm, and the protective film is composed mainly of polypropylene.Type: GrantFiled: April 13, 2007Date of Patent: August 6, 2013Assignee: Hitachi Chemical Company, Ltd.Inventors: Manabu Saitou, Junichi Iso, Tatsuya Ichikawa, Takeshi Ohashi, Hanako Yori, Masahiro Miyasaka, Takashi Kumaki
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Patent number: 8492077Abstract: An exemplary method for providing a conductive material structure on a carrier generally includes applying a photo sensitive material on the carrier and applying a mask on the photo sensitive material. The mask defines a conductive material structure to be formed on the carrier. The method also includes irradiating the defined structure on the carrier in order to prepare for metallization, and metalizing the defined structure for forming the conductive material structure.Type: GrantFiled: August 17, 2011Date of Patent: July 23, 2013Assignee: Laird Technologies, Inc.Inventor: Ulf Palin
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Patent number: 8486611Abstract: Some embodiments include methods of forming patterns. A semiconductor substrate is formed to comprise an electrically insulative material over a set of electrically conductive structures. An interconnect region is defined across the electrically conductive structures, and regions on opposing sides of the interconnect region are defined as secondary regions. A two-dimensional array of features is formed over the electrically insulative material. The two-dimensional array extends across the interconnect region and across the secondary regions. A pattern of the two-dimensional array is transferred through the electrically insulative material of the interconnect region to form contact openings that extend through the electrically insulative material and to the electrically conductive structures, and no portions of the two-dimensional array of the secondary regions is transferred into the electrically insulative material.Type: GrantFiled: July 14, 2010Date of Patent: July 16, 2013Assignee: Micron Technology, Inc.Inventors: Dan Millward, Kaveri Jain, Zishu Zhang, Lijing Gou, Anton de Villiers, Jianming Zhou, Yuan He, Michael Hyatt, Scott L. Light
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Patent number: 8461678Abstract: A structure is provided with a self-aligned resist layer on a surface of metal interconnects for use in forming air gaps in an insulator material and method of fabricating the same. The non-lithographic method includes applying a resist on a structure comprising at least one metal interconnect formed in an insulator material. The method further includes blanket-exposing the resist to energy and developing the resist to expose surfaces of the insulator material while protecting the metal interconnects. The method further includes forming air gaps in the insulator material by an etching process, while the metal interconnects remain protected by the resist.Type: GrantFiled: March 13, 2012Date of Patent: June 11, 2013Assignee: International Business Machines CorporationInventors: Daniel C. Edelstein, Elbert E. Huang, Robert D. Miller
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Patent number: 8455577Abstract: A halogen-free and flame-resistant photosensitive resin composition is provided, which has properties necessary for a solder resist (insulative property, solder heat resistance, alkali developability and the like) and is capable of forming a film that is excellent in folding endurance even after an IR reflow process. A flexible circuit board employing the photosensitive resin composition and a circuit board production method are also provided.Type: GrantFiled: August 4, 2010Date of Patent: June 4, 2013Assignee: Nitto Denko CorporationInventors: Masaki Mizutani, Toshikazu Baba, Yoshihiro Kawamura
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Publication number: 20130129986Abstract: Techniques or processes for providing markings on products are disclosed. The markings provided on products can be textual and/or graphic. The techniques or processes can provide high resolution markings on surfaces that are flat or curved. In one embodiment, the products have housings and the markings are to be provided on the housings. For example, the housing for a particular product can include an outer housing surface and the markings can be provided on the outer housing surface.Type: ApplicationFiled: January 22, 2013Publication date: May 23, 2013Applicant: Apple Inc.Inventor: Apple Inc.
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Patent number: 8420301Abstract: A method for forming a wiring pattern by laser irradiation includes the steps of coating a light-sensitive material on a substrate to form a light-sensitive layer, irradiating a laser beam on the light-sensitive material of the substrate to form a pattern including an exposed region exposed to laser irradiation and an unexposed region unexposed to laser irradiation, and forming a metallic wiring pattern by immersing the substrate into a solution having a plurality of metallic nano-particles. The metallic nano-particles are easily bonded to the straighter molecular structure of the light-sensitive material in the exposed region for forming a conducting wiring pattern. The laser irradiation method has advantages such as high-power, high-density, high-directionality and monochromaticity, such that product quality can be effectively controlled. Moreover, the laser irradiated light-sensitive material can form a molecular structure that is easily bonded to the metallic particles.Type: GrantFiled: February 28, 2011Date of Patent: April 16, 2013Assignee: Cretec Co., Ltd.Inventors: Chien-Han Ho, Hua-Min Huang
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Patent number: 8420300Abstract: A method of producing a multilayer printed wiring board by attaching a photosensitive dry film onto an interlaminar resin insulating layer having a thin-film conductor layer and conducting a light exposure and development to form a plating resist and then forming a conductor circuit on a portion not forming the plating resist. The photosensitive dry film has a nitrogen-containing heterocyclic compound layer on a first surface thereof.Type: GrantFiled: December 21, 2010Date of Patent: April 16, 2013Assignee: Ibiden Co., Ltd.Inventor: Akiyoshi Tsuda
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Patent number: 8420299Abstract: It is therefore an object of the present invention to provide a forming method for a resist pattern to reduce a resist residue in forming the resist pattern on a step whose gradient angle is equal to 90 degrees or more. A forming method for a resist pattern to reduce a resist residue on a step is provided, the method comprising: forming resist film with coating resist containing photo-acid-generator on a step formed on a substrate, where gradient angle of the step is equal to 90 degrees or more, exposing said resist film and generating acid from said photo-acid-generator.Type: GrantFiled: August 6, 2008Date of Patent: April 16, 2013Assignee: TDK CorporationInventors: Hisayoshi Watanabe, Susumu Aoki
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Patent number: 8409457Abstract: A method of forming a photoresist-comprising pattern on a substrate includes forming a patterned first photoresist having spaced first masking shields in at least one cross section over a substrate. The first masking shields are exposed to a fluorine-containing plasma effective to form a hydrogen and fluorine-containing organic polymer coating about outermost surfaces of the first masking shields. A second photoresist is deposited over and in direct physical touching contact with the hydrogen and fluorine-containing organic polymer coating. The second photoresist which is in direct physical touching contact with the hydrogen and fluorine-containing organic polymer coating is exposed to a pattern of actinic energy and thereafter spaced second masking shields are formed in the one cross section which comprise the second photoresist and correspond to the actinic energy pattern. The first and second masking shields together form at least a part of a photoresist-comprising pattern on the substrate.Type: GrantFiled: August 29, 2008Date of Patent: April 2, 2013Assignee: Micron Technology, Inc.Inventors: Zishu Zhang, Hongbin Zhu, Anton deVilliers, Alex Schrinsky
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Patent number: 8389204Abstract: To provide a method for producing a comb-shaped electrode capable of precisely carrying a large amount of active materials on a surface of current collectors with a fine shape. The method for producing comb-shaped electrodes 1a, 1b of the present invention includes a current collector forming step of forming a pair of comb-shaped current collectors 2a, 2b on a surface of a substrate 4, a resist coating step of forming a resist layer 6 on the surface of the substrate 4, and a guide hole forming step of forming guide holes 7a, 7b for forming a positive electrode 1a or a negative electrode 1b, in which a cationic polymerization type resist composition (i), a novolak type resist composition (ii), a chemically-amplified type resist composition (iii), or a radical polymerization type resist composition (iv), is used as a resist composition for forming the resist layer 6.Type: GrantFiled: April 12, 2011Date of Patent: March 5, 2013Assignees: Tokyo Ohka Kogyo Co., Ltd., Tokyo Metropolitan UniversityInventors: Takahiro Asai, Koichi Misumi, Takashi Ono, Kiyoshi Kanamura, Hirokazu Munakata
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Publication number: 20130050802Abstract: In one embodiment, the electrowetting device includes a first medium; a second medium that is not mixed with the first medium and has a refractive index different from a refractive index of the first medium; an upper electrode that adjusts an angle of a boundary surface between the first medium and the second medium; and a barrier wall that has a side surface surrounding the first and second mediums, allows the upper electrode to be disposed on a portion of the side surface, and has irregular widths.Type: ApplicationFiled: August 29, 2012Publication date: February 28, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ki-deok BAE, Jun-sik HWANG, Chang-youl MOON, Yoon-sun CHOI, Jung-mok BAE, Chang-seung LEE, Eok-su KIM
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Patent number: 8377631Abstract: Molecular glass based planarizing compositions for lithographic processing are disclosed. The processes generally include casting the planarizing composition onto a surface comprised of lithographic features, the planarizing composition comprising at least one molecular glass and at least one solvent; and heating the planarizing composition to a temperature greater than a glass transition temperature of the at least one molecular glass. Exemplary molecular glasses include polyhedral oligomeric silsesquioxane derivatives, calixarenes, cyclodextrin derivatives, and other non-polymeric large molecules.Type: GrantFiled: October 6, 2009Date of Patent: February 19, 2013Assignee: International Business Machines CorporationInventors: Robert D. Allen, Mark W. Hart, Ratnam Sooriyakumaran
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Patent number: 8372928Abstract: Disclosed is a substantially alternating copolymer that is conformal, hard, flexible, and has low oxygen permeability. Also disclosed is an iCVD-based method of coating a substrate with the substantially alternating copolymer.Type: GrantFiled: May 20, 2011Date of Patent: February 12, 2013Assignee: Massachusetts Institute of TechnologyInventors: Karen K. Gleason, Jingjing Xu
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Patent number: 8372903Abstract: A halogen-free and flame-resistant photosensitive resin composition is provided, which has properties necessary for a solder resist (insulative property, solder heat resistance, alkali developability and the like) and is capable of forming a film that is excellent in folding endurance even after an IR reflow process. A flexible circuit board employing the photosensitive resin composition and a circuit board production method are also provided.Type: GrantFiled: August 4, 2010Date of Patent: February 12, 2013Assignee: Nitto Denko CorporationInventors: Masaki Mizutani, Toshikazu Baba, Yoshihiro Kawamura
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Patent number: 8367310Abstract: A patterning process includes (1) coating and baking a first positive resist composition to form a first resist film, exposing, post-exposure baking, and alkali developing to form a first resist pattern, (2) applying a resist-modifying composition to the first resist pattern and heating to modify the first resist pattern, (3) coating and baking a second positive resist composition to form a second resist film, exposing, post-exposure baking, and alkali developing to form a second resist pattern. The modified first resist film has a contact angle with pure water of 50°-85°.Type: GrantFiled: February 18, 2010Date of Patent: February 5, 2013Assignee: Shin-Etsu Chemical Co., Ltd.Inventors: Takeru Watanabe, Masashi Iio, Jun Hatakeyama, Tsunehiro Nishi, Yoshio Kawai
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Patent number: 8367304Abstract: Techniques or processes for providing markings on products are disclosed. The markings provided on products can be textual and/or graphic. The techniques or processes can provide high resolution markings on surfaces that are flat or curved. In one embodiment, the products have housings and the markings are to be provided on the housings. For example, the housing for a particular product can include an outer housing surface and the markings can be provided on the outer housing surface.Type: GrantFiled: May 31, 2009Date of Patent: February 5, 2013Assignee: Apple Inc.Inventors: Richard Walter Heley, Erming Luo, Adam Mittleman, John Payne, Tang Yew Tan, Erik Wang
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Patent number: 8361697Abstract: [Purpose] To provide a photosensitive resin composition having satisfactory compatibility during dry film formation, exhibiting similar sensitivity for exposure with both i-line radiation and h-line radiation type exposure devices, having excellent resolution and adhesiveness, allowing development with aqueous alkali solutions, and preferably, having no generation of aggregates during development. [Solution Means] A photosensitive resin composition comprising (a) 20-90 wt % of a thermoplastic copolymer having a specific copolymerizing component copolymerized, and having a carboxyl group content of 100-600 acid equivalents and a weight-average molecular weight of 5,000-500,000, (b) 5-75 wt % of an addition polymerizable monomer having at least one terminal ethylenic unsaturated group, (c) 0.01-30 wt % of a photopolymerization initiator containing a triarylimidazolyl dimer, and (d) 0.001-10 wt % of a pyrazoline compound.Type: GrantFiled: March 19, 2009Date of Patent: January 29, 2013Assignee: Asahi Kasei E-Materials CorporationInventor: Yosuke Hata
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Patent number: 8349203Abstract: A method of forming a block copolymer pattern comprises providing a substrate comprising a topographic pre-pattern comprising a ridge surface separated by a height, h, greater than 0 nanometers from a trench surface; disposing a block copolymer comprising two or more block components on the topographic pre-pattern to form a layer having a thickness of more than 0 nanometers over the ridge surface and the trench surface; and annealing the layer to form a block copolymer pattern having a periodicity of the topographic pre-pattern, the block copolymer pattern comprising microdomains of self-assembled block copolymer disposed on the ridge surface and the trench surface, wherein the microdomains disposed on the ridge surface have a different orientation compared to the microdomains disposed on the trench surface.Type: GrantFiled: September 4, 2009Date of Patent: January 8, 2013Assignee: International Business Machines CorporationInventors: Ho-Cheol Kim, Sang-min Park, Charles T. Rettner
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Patent number: 8349545Abstract: Some embodiments include methods of forming patterns of openings. The methods may include forming spaced features over a substrate. The features may have tops and may have sidewalls extending downwardly from the tops. A first material may be formed along the tops and sidewalls of the features. The first material may be formed by spin-casting a conformal layer of the first material across the features, or by selective deposition along the features relative to the substrate. After the first material is formed, fill material may be provided between the features while leaving regions of the first material exposed. The exposed regions of the first material may then be selectively removed relative to both the fill material and the features to create the pattern of openings.Type: GrantFiled: February 8, 2012Date of Patent: January 8, 2013Assignee: Micron Technology, Inc.Inventors: Scott Sills, Gurtej Sandhu, John Smythe, Ming Zhang
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Patent number: 8349543Abstract: A pattern-forming method, including: forming a first resist film by applying a first chemically amplified resist composition onto a support, forming a plurality of resist patterns by selectively exposing and then developing the first resist film, forming a plurality of coated patterns by forming a coating film composed of a metal oxide film on the surface of each resist pattern, forming a second resist film by applying a second chemically amplified resist composition onto the support having the coated patterns formed thereon, and selectively exposing and then developing the second resist film, thereby forming a pattern composed of the plurality of coated patterns and a resist pattern formed in the second resist film onto the support.Type: GrantFiled: June 18, 2007Date of Patent: January 8, 2013Assignee: Tokyo Ohka Kogyo Co. Ltd.Inventors: Shogo Matsumaru, Ryoji Watanabe, Toshiyuki Ogata
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Patent number: 8349544Abstract: In a method of manufacturing a semiconductor device, a protection film can be formed using a double exposure technology to increase a developer resistance of the protection film without increasing the thickness of the protection film for realizing fine patterning. The method comprises forming a protection film on a first resist pattern formed on a substrate; and forming a second resist pattern on the protection film between parts of the first resist pattern. The protection film is formed in at least two layers by using different methods.Type: GrantFiled: March 4, 2010Date of Patent: January 8, 2013Assignee: Hitachi Kokusai Electric Inc.Inventor: Norikazu Mizuno
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Patent number: 8343711Abstract: There is disclosed a patterning process comprises at least (1) a step of forming an organic underlayer film on a substrate and then forming a photoresist pattern on the organic underlayer film, (2) a step of attaching an alkaline solution containing an alkaline substance onto the photoresist pattern and then removing the excess alkaline solution, (3) a step of applying a solution of a siloxane polymer crosslinkable by action of the alkaline substance onto the photoresist pattern to form a crosslinked part by crosslinking the siloxane polymer near the photoresist patterns, and (4) a step of removing the uncrosslinked siloxane polymer and the photoresist pattern. There can be provided a patterning process capable of forming a further finer pattern simply and efficiently and with a high practicability applicable to semiconductor manufacturing.Type: GrantFiled: March 30, 2010Date of Patent: January 1, 2013Assignee: Shin-Etsu Chemical Co., Ltd.Inventors: Tsutomu Ogihara, Takafumi Ueda, Toshiharu Yano
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Patent number: 8329366Abstract: A method is described for alignment of a substrate during a double patterning process. A first resist layer containing at least one alignment mark is formed on the substrate. After the first resist layer is developed, a second resist layer is deposited over the first resist layer, leaving a planar top surface (i.e., without topography). By baking the second resist layer appropriately, a symmetric alignment mark is formed in the second resist layer with little or no offset error from the alignment mark in the first resist layer. The symmetry of the alignment mark formed in the second resist can be enhanced by appropriate adjustments of the respective thicknesses of the first and second resist layers, the coating process parameters, and the baking process parameters.Type: GrantFiled: April 27, 2010Date of Patent: December 11, 2012Assignees: ASML Netherlands B.V., ASML Holding N.V.Inventors: Maya Angelova Doytcheva, Mircea Dusa, Richard Johannes Franciscus Van Haren, Harry Sewell, Robertus Wilhelmus Van Der Heijden
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Patent number: 8323878Abstract: A via hole is formed in a first cladding layer laminated on a wiring board. A conductive material is filled in the via hole so as to form a first conductor portion (a portion of a conductive via) having a mushroom-like shape projecting from a surface of the first cladding layer. Then, a second cladding layer is formed to cover the first conductor portion, the first cladding layer and a core layer, and a via hole is formed in the second cladding layer. A conductive material is filled in the via hole so as to form a second conductor portion (a remaining portion of the conductive via) connected to the first conductor portion.Type: GrantFiled: June 14, 2010Date of Patent: December 4, 2012Assignee: Shinko Electric Industries Co., Ltd.Inventor: Kenji Yanagisawa
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Publication number: 20120298411Abstract: An electronics interconnection system is provided with reduced capacitance between a signal line and the surrounding dielectric material. By using a non-homogenous dielectric, the effective dielectric constant of the material is reduced. This reduction results in less power loss from the signal line to the dielectric material, and therefore reduces the number of buffers needed on the signal line. This increases the speed of the signal, and reduces the power consumed by the interconnection system. The fabrication techniques provided are advantageous because they can be preformed using today's standard IC fabrication techniques.Type: ApplicationFiled: May 28, 2011Publication date: November 29, 2012Applicant: BANPIL PHOTONICS, INC.Inventor: ACHYUT KUMAR DUTTA
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Patent number: 8318411Abstract: Method for fabricating an interposer is provided. A substrate is provided having thereon at least a conductive via and at least a flange. The flange is bonded on the substrate and shades a portion of the via. A photoresist layer is formed on the interior surface of the via, on a contact surface of the flange and on an inner surface of the flange opposite to the contact surface. An opening is formed in the photoresist layer to expose a portion of the contact surface of the flange, while the photoresist layer still covers the interior surface of the via and the inner surface of the flange. A plating layer is formed on the exposed contact surface of the flange. The photoresist layer is then removed.Type: GrantFiled: July 15, 2010Date of Patent: November 27, 2012Assignee: Unimicron Technology Corp.Inventors: Chang-Ming Lee, Wen-Fang Liu, Shih-Jung Huang, Ling-Kai Su
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Patent number: 8318412Abstract: A semiconductor device is manufactured by a method including processes of trimming and molding resist patterns. A resist layer formed on a substrate is exposed and developed to form the resist patterns. The resist patterns are trimmed using a first gas plasma to change the profiles of the resist patterns. Widths of the trimmed resist patterns are increased using a second gas plasma to form processed resist patterns.Type: GrantFiled: August 30, 2010Date of Patent: November 27, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Tokashiki Ken, Chul-ho Shin, Sang-Kuk Kim, Do-haing Lee, Dong-seok Lee
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Publication number: 20120288786Abstract: A method includes performing a place and route operation using an electronic design automation tool to generate a preliminary layout for a photomask to be used to form a circuit pattern of a semiconductor device. The place and route operation is constrained by a plurality of single patterning spacer technique (SPST) routing rules. Dummy conductive fill patterns are emulated within the EDA tool using an RC extraction tool to predict locations and sizes of dummy conductive fill patterns to be added to the preliminary layout of the photomask. An RC timing analysis of the circuit pattern is performed within the EDA tool, based on the preliminary layout and the emulated dummy conductive fill patterns.Type: ApplicationFiled: May 9, 2011Publication date: November 15, 2012Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Cheng-I Huang, Hsiao-Shu Chao, Yi-Kan Cheng
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Patent number: 8309371Abstract: A system and method include forming an optical cavity by positioning a photonic crystal a predetermined distance from a substrate, and creating, within the cavity, a standing wave having a substantially flat wavefront. The standing wave may be created by applying an input wave to a first surface of the photonic crystal. The predetermined distance may be such that a peak intensity of the standing wave is proximate to or a calculated distance from the substrate surface. The peak intensity may vary in relation to the substrate surface. The method may include tuning the peak intensity location within the cavity by shifting the wavelength of the input wave or altering the characteristics of the photonic crystal by an external field. A second photonic crystal may be used on the other side of the substrate to replace the reflecting properties of the substrate, allowing for further smoothing of the wavefront.Type: GrantFiled: July 21, 2009Date of Patent: November 13, 2012Assignee: The United States of America as represented by the Secretary of the NavyInventors: Paul R. De La Houssaye, J. Scott Rodgers
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Patent number: 8268532Abstract: The invention relates to a method for forming microscopic structures. By scanning a focused particle beam over a substrate in the presence of a precursor fluid, a patterned seed layer is formed. By now growing this layer with Atomic Layer Deposition or Chemical Vapor Deposition, a high quality layer can be grown. An advantage of this method is that forming the seed layer takes relatively little time, as only a very thin layer needs to be deposited.Type: GrantFiled: December 18, 2009Date of Patent: September 18, 2012Assignee: FEI CompanyInventors: Alan Frank De Jong, Johannes Jacobus Lambertus Mulders, Wilhelmus Mathijs Marie Kessels, Adriaan Jacobus Martinus Mackus
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Patent number: 8263316Abstract: Electronic devices having a metal line-containing layer including an air gap region and a low-k dielectric material region where the air gap region includes a dense packing of metal lines is provided. Methods of forming such electronic devices are also provided.Type: GrantFiled: October 3, 2005Date of Patent: September 11, 2012Assignee: Rohm and Haas Electronic Materials LLCInventor: Michael K. Gallagher
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Publication number: 20120219918Abstract: A method for forming a wiring pattern by laser irradiation includes the steps of coating a light-sensitive material on a substrate to form a light-sensitive layer, irradiating a laser beam on the light-sensitive material of the substrate to form a pattern including an exposed region exposed to laser irradiation and an unexposed region unexposed to laser irradiation, and forming a metallic wiring pattern by immersing the substrate into a solution having a plurality of metallic nano-particles. The metallic nano-particles are easily bonded to the straighter molecular structure of the light-sensitive material in the exposed region for forming a conducting wiring pattern. The laser irradiation method has advantages such as high-power, high-density, high-directionality and monochromaticity, such that product quality can be effectively controlled. Moreover, the laser irradiated light-sensitive material can form a molecular structure that is easily bonded to the metallic particles.Type: ApplicationFiled: February 28, 2011Publication date: August 30, 2012Inventors: Chien-Han HO, Hua-Min HUANG
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Patent number: 8252491Abstract: A marker, for example an alignment marker or an overlay marker is formed in two steps. First, a pattern of two chemically distinct feature types having a pitch comparable to product features is formed. This pattern is then masked by resist in the form of the desired marker, which has a larger pitch than the pattern. Finally, one of the two feature types is selectively etched in the open areas. The result is a marker with a large pitch suitable to be read with long wavelength radiation but the edges of the features are defined in an exposure step having a pitch comparable to the product features.Type: GrantFiled: November 17, 2009Date of Patent: August 28, 2012Assignee: ASML Netherlands B.V.Inventors: Richard Johannes Franciscus Van Haren, Maurits Van Der Schaar
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Patent number: 8241838Abstract: A method of manufacturing a semiconductor device includes the following processes. A first resist layer covering an etching object is patterned to form a first resist pattern. Then, a filling layer that covers the first resist pattern and has a flat upper surface is formed. Then, a second resist layer covering the flat upper surface is patterned to from a second resist pattern.Type: GrantFiled: August 21, 2009Date of Patent: August 14, 2012Assignee: Elpida Memory, Inc.Inventor: Hiroshi Yoshino
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Patent number: 8236484Abstract: As the critical dimensions of liftoff patterns grow smaller, it becomes increasingly more difficult to make liftoff resists that have the required resolution. This problem has been overcome by use of a combination of ion beam processing and ozone slimming to form lift-off patterns with undercuts from a single layer of photoresist. The ion beam process serves to harden the top portion of the resist while the ozone is used to oxidize and erode the lower portion resist sidewall to form the undercut.Type: GrantFiled: November 14, 2003Date of Patent: August 7, 2012Assignee: Headway Technologies, Inc.Inventors: Jei-Wei Chang, Chao-Peng Chen, Chunping Luo, Shou-Chen Kao
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Patent number: 8227336Abstract: A structure is provided with a self-aligned resist layer on a surface of metal interconnects for use in forming air gaps in an insulator material and method of fabricating the same. The non-lithographic method includes applying a resist on a structure comprising at least one metal interconnect formed in an insulator material. The method further includes blanket-exposing the resist to energy and developing the resist to expose surfaces of the insulator material while protecting the metal interconnects. The method further includes forming air gaps in the insulator material by an etching process, while the metal interconnects remain protected by the resist.Type: GrantFiled: January 20, 2009Date of Patent: July 24, 2012Assignee: International Business Machines CorporationInventors: Daniel C. Edelstein, Elbert E. Huang, Robert D. Miller
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Patent number: 8227176Abstract: A method is used in forming a fine pattern in a semiconductor device. The method includes forming an etch target layer; forming a photoresist pattern over the etch target layer; forming a polymer pattern including silicon-oxygen (Si—O) bonds on sidewalls of the photoresist pattern; removing the photoresist pattern; and etching the etch target layer using the polymer pattern as an etch mask.Type: GrantFiled: June 30, 2008Date of Patent: July 24, 2012Assignee: Hynix Semiconductor Inc.Inventor: Sung-Kwon Lee
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Patent number: 8221962Abstract: A method of manufacturing an electronic device includes forming a photosensitive SOG oxide layer on a multi-layer ceramics substrate having a penetrating electrode, forming an opening by subjecting the photosensitive SOG oxide layer to an exposure treatment and developing treatment so that an upper face of the penetrating electrode is exposed, and forming a passive element on the photosensitive SOG oxide layer, the passive element being connected to the penetrating electrode through the opening.Type: GrantFiled: December 24, 2008Date of Patent: July 17, 2012Assignee: Taiyo Yuden Co., Ltd.Inventors: Takeo Takahashi, Xiaoyu Mi, Tsuyoshi Yokoyama, Satoshi Ueda
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Patent number: 8202684Abstract: An embodiment of the invention provides a method for manufacturing a probe sheet in which a probe tip can be arranged at a predetermined accurate position without the need for troublesome positional adjustment operations of the probe tip in coupling operations of each contactor and a probe sheet main body. It is a method for manufacturing a probe sheet comprising a probe sheet main body having conductive paths and a plurality of contactors formed to be protruded from one surface of the probe sheet main body and connected to the conductive paths.Type: GrantFiled: March 27, 2007Date of Patent: June 19, 2012Assignee: Kabushiki Kaisha Nihon MicronicsInventors: Kazuhito Hamada, Takashi Akiniwa, Satoshi Narita
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Patent number: 8202682Abstract: A method of manufacturing a semiconductor device includes: forming a resist layer on an underlayer, forming an exposed pattern in the resist layer, wherein the exposed pattern comprises a soluble layer and an insoluble layer, forming a resist pattern by removing the soluble layer from the resist layer in which the exposed pattern is formed, removing an intermediate exposed area from the resist pattern, forming a new soluble layer in a surface of the resist pattern from which the intermediate exposed area is removed by applying a reaction material to the resist pattern from which the intermediate exposed area is removed, wherein the reaction material generates a solubilization material that solubilizes the resist pattern, and removing the new soluble layer from the resist pattern.Type: GrantFiled: March 2, 2009Date of Patent: June 19, 2012Assignee: Tokyo Electron LimitedInventors: Fumiko Iwao, Satoru Shimura, Tetsu Kawasaki