Abstract: The present invention teaches a method of manufacturing an enclosed transceiver, such as a radio frequency identification ("RFID") tag. Structurally, in one embodiment, the tag comprises an integrated circuit (IC) chip, and an RF antenna mounted on a thin film substrate powered by a thin film battery. A variety of antenna geometries are compatible with the above tag construction. These include monopole antennas, dipole antennas, dual dipole antennas, a combination of dipole and loop antennas. Further, in another embodiment, the antennas are positioned either within the plane of the thin film battery or superjacent to the thin film battery.

Abstract: A method for forming a plating layer of a lead frame having excellent anti-corrosion properties is provided. At least a portion of a lead frame is plated, then a first heating of the plated portion of the lead frame to a first temperature is performed, and finally a second heating of the first heated plated portion of the lead frame to a second temperature higher than the first temperature is performed. The lead frame manufactured by this method has excellent anti-corrosion properties, such that deterioration of the plating layer, by cracking and inferior solderability, is not observed.

Abstract: An IC package suitable for high density mounting and high speed is provided, by improving the humidity resistance and mounting stress resistance at a resin-sealed type BGA package and improving the reliability lessened a warp of the package. A concave part is provided in a multi-layer wiring substrate which has an exhaling route of water vapor expanded by heat in the inside of the package and a semiconductor chip is mounted at the concave part and is connected electrically to the substrate and the upper surface and sides of the package is sealed with resin. By this constitution, the infiltration of water is prevented and the stress at receiving thermal stress is lessened and the occurrence of stripping and crack of the inside of the package is prevented. Moreover, by utilizing the concave part effectively and connecting electrically, the wiring length is shortened and the high frequency characteristic is improved.

Abstract: Methods for forming solder bumps on terminal pads of a semiconductor substrate for an integrated circuit device employ a solder bump transfer plate and a mask to form solder deposits on the plate. One embodiment of the invention employs a metal mask having a plurality of through holes for forming solder deposits on the solder bump transfer plate by vapor phase deposition through the through holes each area of which increases in step wise from the first surface of the mask to the second surface opposite to the first surface, thereby preventing solder deposits in the through holes from being removed when the mask is separated from the plate. Another embodiment of the invention is a solder bump transfer plate having a plurality of solder deposits on the surface non-wettable to molten solder both diameter and spacing of which are both smaller than diameter and spacing of the terminal pads on the semiconductor substrate, whereby a single solder bump is accurately formed on each of the terminal pads.

Abstract: A process for manufacturing a laser diode package including a laser diode, a heat sink and a lid. The laser diode has an emitting surface, a reflective surface opposing the emitting surface, and first and second surfaces between the emitting surface and the reflective surface. The laser diode has a diode height defined between the emitting surface and the reflective surface. The heat sink has an interior surface, an exterior surface opposing the interior surface, a top surface and a base surface. The height of the heat sink is defined between the top surface and the base surface and is approximately less than four times the laser diode height. The first surface of the diode is attached to the interior surface of the heat sink with a first solder. The base surface of the heat sink is coupled to a thermal reservoir. The lid is attached to the second surface of the laser diode via a second solder. An upper end of the lid is near the emitting surface of the laser diode.

Abstract: A method for flip-chip bonding an integrated circuit die to a substrate. The method includes the steps of providing the integrated circuit die with at least one gold bump, forming a barrier layer on the gold bump, forming a bronzing agent on the barrier layer, and providing the substrate with at least one conductive bonding area, which is also covered with gold. The bronzing agent on the integrated circuit die is then aligned on the conductive bonding area, and a compression force is applied to the die and substrate so as to establish contact between the bronzing agent and the conductive bonding area. While maintaining position between the gold bump and conductive bonding area, the structure is alloyed such that the bronzing agent and the gold on the conductive bonding area form an intermetallic compound, thereby forming a bond between the die and the substrate. The barrier layer functions to prevent the bronzing agent from diffusing with the gold bump.

Abstract: The present invention generally relates to the field of integrated circuit chip packaging. More particularly, the present invention relates to methods of manufacturing integrated circuit chip packages, and methods for electrically connecting and bonding or attaching semiconductor devices to an integrated circuit chip.

Abstract: A process of using a transport system for transporting substrate wafer, for making semiconductor integrated circuits and liquid crystal display panels and the like advanced devices, is presented. The object is to prevent surface degradation which may be inflicted on the surface to interfere with proper processing of the substrate. The substrate wafers are delivered to process chambers always in clean surface conditions. A method illustrated utilizes a purge gas containing an inert gas or a mixture of an inert gas and oxygen for flowing inside the tunnel space, and a semiconductor laser detection system to detect the contamination levels within the tunnel space, and the transport parameters are controlled according to the measured data.

Abstract: A process for detachment and removal of microscopic contaminant particles from a surface includes a pulsed detach light directed at the surface to excite a contaminant particle thereon at or near its resonant frequency, to thereby detach the particle from the surface; and a photophoresis light directed at the particle to move it by photophoresis, to thereby prevent its reattachment to the surface. A thermal gradient may also be applied to control the velocity and direction of particle movement by thermophoresis. Detach light is of variable pulse frequency and angle of incidence.

Abstract: A pretreatment system for analyzing impurities contained in a flat sample contains a cylindrical lower case having a stepped portion on which the flat sample is seated. The stepped portion is formed in an circumferential inner surface of the cylindrical lower case. A cylindrical upper case is detachably attached to an upper surface of the lower case, and has a supply passage through which a predetermined amount of pretreatment solution can be supplied to the flat sample. A cover closes off the upper surface of the upper case.

Abstract: A method and apparatus for removing particles and residue that build up inside a substrate processing system during a substrate processing operation, without overetching system components, is described. One method includes the steps of: flowing an etchant gas comprising chlorine trifluoride (ClF.sub.3), diluted with an inert carrier gas, into a processing chamber after completion of the substrate processing operation. The parts of the system within the chamber with the greatest amount of build-up are preferentially heated to facilitate more extensive cleaning of those parts. Parts of the system within the chamber with less build up are protected from overetching by keeping them about 200.degree. C. cooler than the heavily-deposited parts. Heating the heavily-deposited chamber parts to a temperature of at least about 400.degree. C. allows using a lower concentration of etchant gas for the cleaning process than a lower temperature process would allow.

Abstract: The present invention generally relates to the field of integrated circuit chip packaging. More particularly, the present invention relates to methods of manufacturing integrated circuit chip packages, and methods for electrically connecting and bonding or attaching semiconductor devices to an integrated circuit chip.

Abstract: In a method of manufacturing a semiconductor device comprising a semiconductor chip and a carrier film which includes an insulating film and wiring patterns formed on one of main surfaces of the insulating film, an adhesive layer is formed on a surface of a semiconductor wafer having a number of integrated circuits. Each of the integrated circuits has electrode pads for external connection on the foregoing surface of the semiconductor wafer. Subsequently, openings are formed at regions of the adhesive layer corresponding to the electrode pads, and then, the semiconductor wafer is cut per integrated circuit so as to obtain the semiconductor chips. Thereafter, the electrode pads of the semiconductor chip and the wiring patterns of the carrier film are connected to each other through the corresponding openings of the adhesive layer, respectively. Then, the semiconductor chip and the carrier film are bonded together via the adhesive layer interposed therebetween.

Abstract: Impurity distributions in microelectronic structures formed from an aluminum-containing material are determined. A passivation layer, e.g., a titanium/titanium nitride layer or a borphosphosilicate glass (BPSG) layer, is formed on a substrate. A layer of the aluminum-containing material is formed on the passivation layer. The layer of the aluminum-containing material is then exposed to a phosphoric acid solution to remove aluminum from the layer of the aluminum-containing material and leave a precipitate on the passivation layer. The precipitate is then analyzed using scanning electron microscope (SEM) photomicrograms and/or Auger analysis to determine a distribution of impurities in the layer of the aluminum-containing material.

Abstract: An improved method for packaging an integrated circuit chip is disclosed. In accordance with the invention, an integrated circuit chip (12) is mounted on a leadframe (18) having a plurality of leads (20). The integrated circuit chip is electrically connected to the leadframe with wire bonds (22). An encapsulant (26) is then molded around the integrated circuit chip and the leadframe. In a dry bake step, moisture is removed from the encapsulant (26) for dry shipment of the integrated circuit chip subsequent to the molding step. The encapsulant (26) is cured simultaneously with the dry bake step, thus reducing the time and power required to produce the integrated circuit chip package.

Abstract: The semiconductor device disclosed has a cap in which, at an undersurface periphery portion, a plurality of looped projections are formed for intercepting a continuous bubble path that may be formed for a gas to escape. The preparatory stage steps of assembling the device includes forming a plated layer on a lead frame, adhesively fixing the lead frame on a base plate, cutting and separating leads from the lead frame, and shaping the leads into a predetermined form. The assembling stage steps of the device includes mounting a semiconductor chip on the base plate and bonding electrodes on the semiconductor chip and the leads, and mounting the cap which has the looped projections for intercepting a continuous bubble path that may be formed for a gas to escape. Since the steps such as forming a plated layer and shaping the leads have been completed in the preparatory stage, the assembling steps which include the mounting of the cap having the looped projections can be efficiently carried out.

Abstract: A method of cleaning an integrated circuit chip module prior to attaching wire bonds thereto. The method involves disposing a module containing an integrated circuit chip and IC bond pads without wire bonds in an environmental process enclosure. A carbon dioxide jet spray cleaning system having a spray nozzle and orifice assembly is disposed the environmental process enclosure. A jet spray of carbon dioxide is generated using the jet spray cleaning system. The carbon dioxide jet spray is directed onto the surface of the module such that the spray impacts the IC bond pads and module bond pads to clean unwanted adhesive from the surface of the module and thus clean the IC and module bond pads.

Abstract: In a method of sealing electronic parts with molded resin, a hollow sealing member is arranged on a mold surface of an upper mold section of a mold comprising the upper mold section and a lower mold section, so that the hollow sealing member is pressurized and expanded to convexly project from the mold surface of the upper mold section. In this state, the lower mold section is upwardly moved to be brought into contact with the expanded hollow sealing member. Further, an internal space portion, including pots, cull portions, resin passages and cavities, which is enclosed with the expanded hollow sealing member is set in a state isolated from the exterior when the upper mold section and the lower mold section are closed, so that the internal space portion is forcibly evacuated in this state. Thus, air, moisture and gases are efficiently and reliably suction-discharged from the internal space portion, whereby the internal space portion is set at a prescribed degree of vacuum.