Abstract: A method of releasing a micro-electronic device formed over an insulator of a silicon-on-insulator (SOI) substrate. In one embodiment, the release method includes etching at least a portion of the insulator to separate the micro-electronic device from the SOI substrate, rinsing at least the micro-electronic device, exposing at least the micro-electronic device to a micro-sphere solution and removing the micro-electronic device from the SOI substrate. The release method may also include exposing the micro-electronic device to an etching plasma to substantially expunge the micro-sphere solution.

Abstract: A semiconductor light emitting device is packaged by forming a sealed compartment enclosing the device, at least one of the walls of the sealed compartment being formed of an elastomeric material. The elastomeric material is then penetrated with a needle and a quantity of softer material is injected through the needle into the sealed compartment. In some embodiments, a coaxial needle or two needles are used, one needle to inject the softer material and one needle to vent air from the compartment.

Abstract: A radiation detector (10) has a base (30), a frame (48), a window (46), and solder layers (50, 52) formed from a solder pre-form (58, 60) to define a vacuum chamber (56). Feedthroughs (18, 40, 44) penetrate the base (30) for electrical connection to internal components. A method for sealing the detector (10) aligns a lower detector assembly (62), the frame (48) the window (46), and the solder pre-forms (58, 60) in a non-sealed relation within a processing chamber (80, 94). High temperature and low pressure is imposed, and the getter (42) is activated by resistive heating imposed by current leads (88). The window (46), frame (48), and lower detector assembly (62) are then pressed together and sealed by the liquefied solder pre-forms (58, 60). The method eliminates the need for a seal port, combines several steps within the processing chamber (80, 94), and eliminates certain prior art cleaning steps.

Abstract: One embodiment of the invention relates to a microdevice package containing getters for maintaining a constant vacuum level within the sealed microdevice package. A stacked wafer assembly, containing a plurality of microdevice packages, is formed by aligning a bottom cover wafer with a center wafer. The bottom cover wafer includes one or more bond pads to receive one or more getters. The center wafer includes one or more vias substantially aligned and corresponding to the one or more bond pads. One or more getters are inserted into the one or more vias. The stacked wafer assembly is completed by aligning a top cover wafer opposite the bottom cover wafer to sandwich the center wafer in between. A constant vacuum level is maintained inside the microdevice packages by aligning the wafers, activating the getters, and sealing the microdevice packages in a given sequence.

Abstract: A method of manufacturing a diode assembly used in rectifier assemblies of engine-driven generators is disclosed. The diode assemblies have diode cups, semiconductor diode dies and diode leads fitted therein. The diode subassemblies are reflow soldered, such that the semiconductor diode die and diode lead are reflow soldered within a diode cup in an argon/hydrogen atmosphere. In another aspect of the present invention, a lead loader having a removable lead holder that holds diode leads therein is positioned over a diode boat such that the diode leads are aligned with respective diode cups. The lead holder is slid from the lead loader so that the diode leads fall into the center cups which also have the semiconductor die positioned therein. The diode boat is inserted within a furnace for reflow soldering.

Abstract: A cutting method for separating individual semiconductor devices by cutting boundary portions in a group of semiconductor devices made up by arranging a plurality of semiconductor devices in which a ductile first layer and a second layer are stacked on a peripheral side thereof, the cutting method comprises a cutting step of cutting the first and second layers by moving a first rotary body from the boundary portions of the group of semiconductor devices in the direction in which the first and second layers are stacked; and a burr removal step of removing burrs from the first layer by moving a second rotary body, softer than the first rotary body and wider than the first rotary body in the direction of rotational axis, from the cut boundary portions of the group of semiconductor devices in the direction in which the first and second layers are stacked.

Abstract: A method for making an IC package preferably includes providing a mold including first and second mold portions, and wherein the first mold portion carries a mold protrusion defining an IC-contact surface with peripheral edges and a bleed-through retention channel positioned inwardly from the peripheral edges. The method also preferably includes closing the first and second mold portions around the IC and injecting encapsulating material into the mold to encapsulate the IC and make the IC package having an exposed portion of the IC adjacent the mold protrusion. Morever, the bleed-through retention channel retains any encapsulating material bleeding beneath the peripheral edges of the IC contact surface, and prevents the encapsulating material from reaching further onto the exposed portion of the IC. The method may also include releasing the IC package with the exposed portion from the mold.

Abstract: A method for fabricating Surface Acoustic Wave filter packages uses a package sheet having an outline pattern and anti-bur holes. In the package sheet for a Surface Acoustic Wave filter package, the outline pattern is formed along outer peripheries of chip mounting areas where a plurality of SAW filter chips are to be mounted. The outline pattern is contacted with a metal shield layer formed on the SAW filter chips and a predetermined region of the package sheet. Circular anti-bur holes are located at the corners of the chip mounting areas and on cutting lines along which the sheet is to be singulated into individual SAW filter packages.

Abstract: An electronic device that is sealed under vacuum includes a substrate, a transistor formed on the substrate, and a dielectric layer covering at least a portion of the transistor. The electronic device further includes a layer of non-evaporable getter material disposed on a portion of the dielectric layer; and a vacuum device disposed on a portion of the substrate. Electrical power pulses activate the non-evaporable getter material.

Abstract: A method for fabricating an interposer includes providing an interposer substrate with at least one slot or aperture therethrough and forming at least one upwardly protruding dam on the interposer substrate, adjacent to the slot or aperture. The upwardly protruding dam or dams may at least partially surround the slot or aperture. Accordingly, the upwardly protruding dam or dams may laterally confine encapsulant material over the slot or aperture and over any intermediate conductive elements extending through the slot or aperture. Programmed material consolidation processes, such as stereolithography, may be used to form the at least one upwardly protruding dam.

Abstract: A protective film is applied onto a nanostructural feature supported on a sacrificial layer by energy beam assisted deposit of material from a vapor through which the beam passes. A wet etchant is applied to etch away the sacrificial layer beneath the nanostructural feature to leave it suspended as a cantilever or bridge. The film protects the structural feature from damage during etching, and may be removed after the wet etching process is completed.

Abstract: Provided is a method of manufacturing a semiconductor device, which is adapted to prevent the deposition of a material on a laser light emitting edge, thereby enabling an improvement in longevity characteristics of a laser. A base having a laser chip mounted thereon is irradiated with an energy beam having a shorter wavelength than an oscillation wavelength of the laser chip. Photolysis and oxidation caused by the energy beam cause the removal of an adherent from the overall base or the deterioration thereof, and incidentally, the adherent is derived from an adhesive sheet used to attach the laser chip to the base, or the like. Preferably, laser light or ultraviolet light, for example, is used as the energy beam. Alternatively, the base having the laser chip mounted thereon may be irradiated with plasma so as to remove the adherent utilizing an ion cleaning effect of the plasma. After irradiation, a top is mounted to the base so as to shut off the laser chip from the outside.

Abstract: The present invention provides a lubricant container inside a microelectromechanical device package. The lubricant container contains selected lubricant that evaporates from the container and contact to a surface of the microelectromechanical device for lubricating the surface.

Abstract: Packaged microelectronic devices, interconnecting units for packaged microelectronic devices, and methods and apparatuses for packaging microelectronic devices with pressure release elements. In one aspect of the invention, a packaged microelectronic device includes a microelectronic die, an interconnecting unit coupled to the die, and a protective casing over the die. The interconnecting unit can have a substrate with a first side and a second side to which the die is attached, a plurality of contact elements operatively coupled to corresponding bond-pads on the die, and a plurality of ball-pads on the first side of the substrate electrically coupled to the contact elements. The protective casing can have at least a first cover encapsulating the die on the first side of the substrate. The packaged microelectronic device can also include a pressure relief element through at least a portion of the first cover and/or the substrate.

Abstract: Disclosed herein is a process for assembling an integrated circuit, as well as the assembly resulting from the process, employing a surface treatment of bondpad surfaces. In one aspect, a method of assembling an integrated circuit includes providing a substrate having electrical terminals on a first side of the substrate and a bondpad on a second side of the substrate opposing the first side. In this embodiment, the bondpad is electrically coupled to at least one of the terminals on the first side. In addition, the method includes mounting an integrated circuit chip to the first side of the substrate, where the integrated circuit component has a lead adapted to be wire-bonded to the terminal. The method further includes removing oxidation from the bondpad, where the bondpad is adapted to be metallurgically bonded to a trace on a printed circuit board. Moreover, this embodiment of the method includes metallurgically bonding the bondpad to the trace.

Abstract: A bonded device structure including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads formed by contact bonding of the first non-metallic region to the second non-metallic region. At least one of the first and second substrates may be elastically deformed.

Abstract: A method, system and materials for use in hydrogen gettering in conjunction with microelectronic and microwave components that are generally hermetically sealed in an enclosure typically referred to as a “package”. Gettering materials that can be used include titanium with or without a hydrogen permeable coating or covering, alloys of zirconium-vanadium iron and zeolites and several ways to apply these materials to the package. In addition, the hydrogen permeable material can be used over a vent from the interior of the package to the exterior wherein hydrogen will escape from the package interior when the hydrogen concentration within the package is greater than without the package.

Abstract: Manufacturable processes and the resultant structures utilize metal hydride as an internal source of hydrogen to enhance heat removal within semiconductor packages that employ low dielectric constant materials. The use of a metal hydride heated by internal or external sources facilitates pressurizing hydrogen gas or hydrogen-helium gas mixtures within a hermetically-sealed package. The configuration of the metal hydride can include, where needed to generate the pressure required in larger packages, a relatively large area of metal hydride material on at least one or a plurality of hydrogen generation-dedicated chips. Alternatively, the configuration can include at least one or a plurality of relatively small “islands” of metal hydride material on each of at least one or a plurality of integrated circuit-bearing chips.

Abstract: A method of manufacturing a plurality of semiconductor chip packages and the resulting chip package assemblies. The method includes providing a circuitized substrate having terminals and leads. A first microelectronic element is arranged with the substrate and contacts on the microelectronic element are connected to the substrate. A conductive member is placed on top of the first microelectronic element and is used to support a second microelectronic element. The second microelectronic element is arranged with the conductive member in a top and bottom position. The second microelectronic element is then also connected by leads from contacts on the second microelectronic element to pads and terminals on the circuitized substrate. The conductive member is then connected to a third pad or set of pads on the substrate. An encapsulant material may be deposited so as to encapsulate the leads and at least one surface of the microelectronic elements.

Abstract: A method for cleaning a semiconductor wafer is provided which includes plasma etching a feature into a low K dielectric layer having a photoresist mask where the plasma etching generates etch residues. The method also includes ashing the semiconductor wafer to remove the photoresist mask where the ashing generating ashing residues. The method further includes removing the etching residues and the ashing residues from the low K dielectric layer where the removing is enhanced by scrubbing the low K dielectric layer of the semiconductor wafer with a wet brush that applies a fluid mixture including a cleaning chemistry and a wetting agent.

Abstract: The invention describes how contaminant particles may be removed from a surface without in any way damaging that surface. First, the positional co-ordinates of all particles on the surface are recorded. Optionally, only particles that can be expected to cause current or future damage to the surface are included. Then, using optical tweezers, each particle is individually removed and then disposed of. Six different ways to remove and dispose of particles are described.

Abstract: A solar cell module comprising a substrate, a filler, a photovoltaic element and a protective layer, wherein at least one of the substrate, the filler, the photovoltaic element and the protective layer is separable from other constituent members. Constituent members having been separated and still serviceable can be reused.

Abstract: A semiconductor element is formed in the major surface of a semiconductor chip. Curved surfaces having a radius of curvature of 0.5 to 50 ?m are formed at at least some of edges where the side surfaces and backside surface of the semiconductor chip cross.

Abstract: Techniques for detecting damage on an integrated circuit die using a particle suspension solution are disclosed. The particles of the suspension solution preferentially attach to damaged regions on exposed dielectric films or other portions of the die. For example, one aspect of the invention is a method of detecting damage to a dielectric film used in fabricating a die of an integrated circuit. A particle suspension solution is applied to the die and damaged regions of the dielectric film are identified as areas having an accumulation of particles of the particle suspension solution.

Abstract: A plasma processing chamber including a slip cast part having a surface thereof exposed to the interior space of the chamber. The slip cast part includes free silicon contained therein and a protective layer on the surface which protects the silicon from being attacked by plasma in the interior space of the chamber. The slip cast part can be made of slip cast silicon carbide coated with CVD silicon carbide. The slip cast part can comprise one or more parts of the chamber such as a wafer passage insert, a monolithic or tiled liner, a plasma screen, a showerhead, dielectric member, or the like. The slip cast part reduces particle contamination and reduces process drift in plasma processes such as plasma etching of dielectric materials such as silicon oxide.

Abstract: A dual panel type organic electroluminescent device includes first and second substrates bonded together by a seal pattern, the first and second substrates including a plurality of sub-pixel regions, a plurality of array elements including a plurality of thin film transistors on the first substrate, a plurality of organic electroluminescent diodes on the second substrate, each of the organic electroluminescent diodes having a first electrode on a rear surface of the second substrate, an organic electroluminescent layer on a rear surface of the first electrode, a second electrode on a rear surface of the organic electroluminescent layer that corresponds to respective ones of the sub-pixel regions, a plurality of connecting electrodes connected to the thin film transistors over the first substrate, a plurality of electrical connecting patterns formed on each of the connecting electrodes, each of the electrical connecting patterns electrically interconnecting each of the thin film transistors to one of the organ

Abstract: A 1 dimensional or 2 dimensional array of micromirror devices comprises a device substrate with a 1st surface and a 2nd surface, control circuitry disposed on said 1st surface and a plurality of micromirrors disposed on said 2nd surface. Each micromirror comprises a reflective surface that is substantially optically flat, with neither recesses nor protrusions. Such a 1 dimensional or 2 dimensional array of micromirror devices may be used as a spatial light modulator (SLM). Methods of fabricating arrays of micromirror devices are also disclosed. Such methods generally involve providing a device substrate with a 1st surface and a 2nd surface, fabricating control circuitry on the 1st surface, and fabricating micromirrors on the 2nd surface, such that the reflective surfaces of the micromirrors are substantially optically flat, with neither recesses nor protrusions.

Abstract: Integrated circuit moisture resistant apparatuses (10) are provided for preventing moisture absorption by an integrated circuit (24). The moisture resistant apparatuses include at least one integrated circuit housing (12) that has a plurality of inner walls (18), which form at least one inner cavity (28). A desiccant body (30) is coupled to at least a portion of the plurality of inner walls (18) and absorbs moisture within the inner cavity (28). A method for performing the same is provided. Also, a manufacturing method of preventing moisture absorption by the integrated circuit (24) is provided.

Abstract: The present invention provides a method for cleaning a ceramic member for use in a system for producing semiconductors. The method has the step of cleaning the ceramic member with an organic acid or a weak acid. Preferably, the ceramic member is cleaned with a strong acid before the cleaning with an organic acid or a weak acid. The ceramic member may be subjected to a blasting treatment before the cleaning with an organic acid or a weak acid. According to the method, the amount of metal transferred from the ceramic member to a semiconductor may be considerably reduced.

Abstract: A method of fabricating and mounting a flip chip includes using an environmentally friendly plasma gas, which minimizes safety hazards during an implementation of the method and does not require an additional heat source during a reflow process thereof. That is, the method includes reflowing a solder bump using an argon-hydrogen plasma process. The argon-hydrogen plasma process used to fabricate the flip chip includes maintaining a pressure in a chamber at 250 to 270 mtorr, feeding a mixed gas of argon with 10 to 20% hydrogen to the chamber to generate a plasma with power of 100 to 200 W, and exposing the flip chip to the plasma for 30 to 120 seconds. Additionally, an argon-hydrogen plasma process used to mount the flip chip includes maintaining pressure in a chamber at 100 to 400 mtorr, feeding a mixed gas of argon with 0 to 20% hydrogen to the chamber to generate a plasma with power of 10 to 50 W, and exposing the flip chip to the plasma for 10 to 120 seconds.

Abstract: Multi-color light-emissive displays in which the constituent light-emissive devices providing the multiple colors are laterally integrated on the surface of a substrate. The light-emissive devices, typically emitting light by electroluminescence, are arranged such that adjacent devices emit light of a differing wavelength or color. The semiconductor phosphor material forming the active element of each light-emissive device is laterally defined by a lift-off technique in which a patterned layer of a sacrificial material is formed on the substrate, a layer of the semiconductor phosphor material is deposited, and the sacrificial layer is removed to leave semiconductor phosphor material on the substrate in selected locations defined by the pattern. The lift-off technique is iterated to successively fabricate active elements for light-emissive devices of each differing wavelength constituting the multi-color display.

Abstract: Disclosed herein is a deflash technique for removing flash from a portion of a semiconductor package to be plated before a plating process and after a sealing process accompanied by resin molding during the manufacture of semiconductors, and more particularly a semiconductor package having grooves formed at side flash, a groove forming method, and a deflshing method using the semiconductor package, for removing the side flash formed at a side portion of a lead frame where it is difficult to perform a deflashing process. Conventionally, it is impossible to completely remove side flash remaining on the lead frame at a region where it is difficult to perform a deflashing process even by injecting water jet or media at a very high pressure, or by irradiating laser beams thereto while changing irradiation directions.

Abstract: Encapsulated electrical component assemblies and methods of electrically connecting an electrical component having a plurality of component electrical terminations to a component carrying substrate having a plurality of substrate electrical terminations at surface mount reflow soldering conditions is described. The electrical and substrate components have an encapsulant-forming composition sandwiched therebetween and encasing said pluralities of component and substrate electrical connections. The described invention relates to using an encapsulant-forming composition comprising a thermosetting resin (preferably an epoxy resin) and a cross-linking agent (preferably an anhdride) for said resin that cross-links said resin and that also acts as a fluxing agent and optionally includes a catalyst for initiating cross-linking at required conditions. The gel point of the encapsulant-forming composition is reached after solder melt.

Abstract: A method for increasing the yield of image sensor die and packaging is disclosed. The method comprises first forming a plurality of image sensor die having micro-lenses onto a semiconductor wafer. Next, a protective layer is formed over the image sensor die. The wafer is then diced to separate the image sensor die. The image sensor die are then mounted onto an integrated circuit package. Finally, the protective layer is removed from the image sensor die.

Abstract: A preventive treatment method for a multilayer semiconductor wafer is described. The semiconductor wafer includes a supporting substrate, at least one intermediate layer and a surface layer in which an intermediate layer has an exposed lateral edge and the wafer is to be subjected to a subsequent treatment. The method includes encapsulating the exposed lateral edge of the intermediate layer with a portion of the surface layer to prevent attack on the peripheral edge during the subsequent treatment.

Abstract: An apparatus and method for providing a vented blind via in pad of a printed circuit board (PCB). A vent in the blind via in pad to allow gases formed during reflow soldering to escape from the solder joint. In one embodiment, the vent extends from the outer edge of the pad to the blind via. In another embodiment, a method includes forming a blind via in pad having a vent.

Abstract: An apparatus for retaining and cleaning a circuit board array, which comprise a fixture having a generally elongated connecting surface and one or more terminating open ends, which may optionally integrate a hollow element, creating an aperture in the fixture adjacent to a tab on the circuit board array, wherein the terminating open ends extend toward a machine component having at least one cavity extending through the topside of the machine component, and a vacuum system connected to the cavity, wherein the vacuum system applies suction through the cavity and the terminating open ends.

Abstract: A method for manufacturing an image sensor includes the steps of: providing a substrate having an upper surface and a lower surface; mounting a frame layer to the upper surface of the substrate to form a cavity together with the substrate; mounting a photosensitive chip to the upper surface of the substrate and within the cavity; providing a plurality of wires to electrically connect the photosensitive chip to the substrate; supplying an adhesive layer to the upper surface of the substrate and within the cavity; mounting a transparent layer to the frame layer to cover the photosensitive chip; and illuminating an electrostatic-charge eliminating light source on the transparent layer to let particles within the cavity fall down to the adhesive layer.

Abstract: In a method for polishing leads of a semiconductor package, a plurality of semiconductor packages is arranged in a certain manner. Then, the leads are automatically polished. The semiconductor packages may be masked to expose at least a part of the leads to be polished.

Abstract: An objective of this invention is to provide a process for selecting rationally and quickly a wet process treatment in which an etchant can be shared based on a minimum preliminary investigation while eliminating cross contamination derived from a newly employed material, in a cleaning-apparatus line configuration in a process for manufacturing a silicon semiconductor device. In advance, an element which is suspected to cause cross contamination is added to an etchant used in a wet processing, a silicon substrate is immersed in the etchant, and then a correlation between a concentration of the element adhesively remaining still on the surface of the silicon substrate after the etchant is washed out with water and a concentration of the dissolved element in the etchant. On the basis of the result, the upper concentration limit of the element remaining by cross contamination is estimated when sharing the etchant.

Abstract: A method for manufacturing a semiconductor package is disclosed. A wafer including a plurality of semiconductor chips is provided. Each chip has one or more mirrors mounted thereon. Further, a plurality of bond pads formed on a periphery of the chip. Next, a photoresist is formed over the one or more mirrors. Then, the semiconductor chips are singulated from the wafer. One ore more semiconductor chips are mounted on a base substrate. The bond pads of the semiconductor chip are electrically connected with the base substrate. The photoresist is then removed from the semiconductor chips.

Abstract: A semiconductor chip is mounted in face-up disposition on a dielectric element, with thermally conductive but flexible elements disposed between the chip bottom surface and the top surface of the dielectric element so as to provide a compliant but thermally conductive path from the chip to a substrate which is bonded to the terminals. A spreader having coefficient of thermal expansion substantially equal to that of the chip overlies the front surface and constrains an encapsulant surrounding the leads so as to minimize shear deformation of the encapsulant.

Abstract: A manufacturing method of a printed wiring board. On a conductor plate 1, approximately conical conductor bumps 1a, 1a, . . . are formed, the conductor bumps 1a, 1a, . . . being caused to penetrate through a prepreg 5 to project tip ends of the conductor bumps 1a, 1a, . . . from an opposite side of the prepreg 5. The tip ends of the conductor bumps 1a, 1a, . . . and interconnection patterns 7a and 7b on surfaces of core material 17A, before bonding, are exposed to plasma to activate. The activated tip ends of the conductor bump 1a, 1a, . . . and interconnection patterns 7a and 7b on the surface of the core material are stacked to bond both.

Abstract: When leaded semiconductor packages are formed, semiconductor dies are mounted onto lead frames of a panel, via adhesive tape to be later removed. Such frames are arranged in plural snips. Each frame has plural leads, which are formed when the panel is punched and which are singulated when such strips are sawn across.

Abstract: Integrated circuit moisture resistant apparatuses (10) are provided for preventing moisture absorption by an integrated circuit (24). The moisture resistant apparatuses include at least one integrated circuit housing (12) that has a plurality of inner walls (18), which form at least one inner cavity (28). A desiccant body (30) is coupled to at least a portion of the plurality of inner walls (18) and absorbs moisture within the inner cavity (28). A method for performing the same is provided. Also, a manufacturing method of preventing moisture absorption by the integrated circuit (24) is provided.

Abstract: A new method has been developed to provide underfill to chips mounted on substrates. First, an underfill is dispensed on the substrate. Second, the bumps of the chip are dipped in a flux that does not contain filler. Third, the chip that has been dipped in a tacky thermosettable flux is placed on the substrate, and fourth, the chip is soldered to the substrate, and simultaneously the underfill is cured. This process eliminates the interference on solder joints caused by the presence of filler in filled no-flow underfill. In addition, the fluxing property of the flux allows the use of underfills with emphasis on curing and mechanical properties instead of fluxing performance. Accordingly, a mounted device with reliable solder joints and underfill encapsulation is obtained.

Abstract: A method of forming a through-hole or a recess in a silicon substrate, having a conductor pattern formed on one side thereof by irradiating a laser beam to the silicon substrate, comprising the steps of: forming a protective film for protecting the conductor pattern on the one side of the silicon substrate, forming, on the entire surface of the silicon substrate inclusive of the top of the protective film, a metal plating film adhered to the protective film, irradiating a laser beam onto a predetermined position of the silicon substrate covered with the protective film and with the metal plating film, to form a through-hole or a recess in the silicon substrate, peeling off the metal plating film and removing debris, on the metal plating film around the open periphery of the through-hole or the recess, which has been deposited thereon during the formation of the thorough-hole or the recess by the laser beam irradiation, and removing a deposit, on the inner wall of the thorough-hole or the recess, which has bee

Abstract: Disclosed is a method for simply fabricating plural surface acoustic wave filter chip packages in large quantities comprising the steps of providing a wafer, on the surface of which plural surface acoustic wave filter chips are formed, and a package substrate, on the surface of which mounting portions corresponding to surface acoustic wave filter chips are formed; providing underfill on the package substrate; mounting the wafer on the package substrate; removing wafer portions between surface acoustic wave filter chips; forming metal shield layers on outer walls of separated surface acoustic wave filter chips; molding a resin on outer walls of surface acoustic wave filter chips coated with metal layers; and dividing the package substrate molded with resin into individual surface acoustic wave filter chip packages.

Abstract: A system and method of aligning a micromirror array to the micromirror package and the micromirror package to a display system. The system and method improve the alignment of the micromirror array to the display system by using a consistent set of precision reference regions. The micromirror package substrate 700 engages an alignment fixture portion of a die mounter 702 during the die mount operation, and a similar fixture when installed in a display system. The package substrate 700 is held by the predefined regions on two edges and the three predefined regions on the top surface. When mounting the device in the package optical techniques may be used for x-y plane alignment. Spring plunger 710 biases the substrate against the contact points 708 on the top surface. In the display system or other end equipment, a socket contacts the same six points to align the device.

Abstract: A microelectromechanical circuit includes a packaging substrate having conductive features on its lower surface. The circuit may further include a microelectromechanical device formed upon the upper surface of the substrate, wherein an underside of at least one element of the device is in contact with the upper surface of the substrate. In some embodiments, the circuit may include one or more covers spaced above the substrate and the device. The circuit may further include a sealing structure laterally surrounding the device and interposed between the substrate and the covers. An array of microelectromechanical circuits may include a packaging substrate with first and second microelectromechanical devices laterally spaced upon its upper surface, first and second covers above the substrate and the first and second devices, and a sealing structure between the substrate and the first and second covers.