Abstract: At present, a forming process of a base film through an amorphous silicon film is conducted in respective film forming chambers in order to obtain satisfactory films. When continuous formation of the base film through the amorphous silicon film is performed in a single film forming chamber with the above film formation condition, crystallization is not sufficiently attained in a crystallization process. By forming the amorphous silicon film using silane gas diluted with hydrogen, crystallization is sufficiently attained in the crystallization process even with the continuous formation of the base film through the amorphous silicon film in the single film forming chamber.

Abstract: Nickel is introduced to a predetermined region of a peripheral circuit section, other than a picture element section, on an amorphous silicon film to crystallize from that region. After forming gate electrodes and others, sources, drains and channels are formed by doping impurities, and laser is irradiated to improve the crystallization. After that, electrodes/wires are formed. Thereby an active matrix type liquid crystal display whose thin film transistors (TFT) in the peripheral circuit section are composed of the crystalline silicon film whose crystal is grown in the direction parallel to the flow of carriers and whose TFTs in the picture element section are composed of the amorphous silicon film can be obtained.

Abstract: Two kinds of TFTs are fabricated by the same process with a high production yield to manufacture an active-matrix circuit and a peripheral driver circuit on the same substrate. The active-matrix circuit is required to have a high mobility and a high ON/OFF current ratio. The peripheral driver circuit needs a complex interconnection structure. The active-matrix circuit and the peripheral driver circuit comprising the TFTs are fabricated monolithically. In this step, the gate electrodes of the TFTs of the active-matrix circuit is coated with an anodic oxide on their top and side surfaces. The gate electrodes of the TFTs of the peripheral driver circuit is coated with the anodic oxide on only their top surfaces; substantially no anodic oxide is present on the side surfaces.

Abstract: A device having a raised segment, and a manufacturing method for same. An SOI wafer is provided having a substrate, an insulating layer disposed over the substrate, and a layer of semiconductor material disposed over the insulating layer. The semiconductor material is patterned to form a mesa structure. The wafer is annealed to form a raised segment on the mesa structure.

Abstract: There is provided an inexpensive light emitting device and an electronic instrument using the same. In this invention, photolithography steps relating to manufacture of a transistor are reduced, so that the yield of the light emitting device is improved and the manufacturing period thereof is shortened. A feature is that a gate electrode is formed of conductive films of plural layers, and by using the selection ratio of those at the time of etching, the concentration of an impurity region formed in an active layer is adjusted.

Abstract: The present invention provides a method of forming a low temperature polysilicon thin film transistor (LTPS TFT). A polysilicon layer including a channel region is formed first. A first and a second plasma enhanced chemical vapor deposition processes are sequentially performed to form a composite gate insulating layer composed of a TEOS-based silicon oxide layer and a silicon nitride layer on the channel region. Finally a gate electrode and a source/drain of the low temperature polysilicon thin film transistor are formed.

Abstract: A barrier layer that meets three requirements, “withstand well against etching and protect a semiconductor film from an etchant as an etching stopper”, “allow impurities to move in itself during heat treatment for gettering”, and “have excellent reproducibility”, is formed and used to getter impurities contained in a semiconductor film. The barrier layer is a silicon oxide film and the ratio of a sub-oxide contained in the barrier layer is 18% or higher.

Abstract: Various circuit devices incorporating junction-traversing dislocation regions and methods of making the same are provided. In one aspect, a method of processing is provided that includes forming an impurity region in a device region of a semiconductor-on-insulator substrate. The impurity region defines a junction. A dislocation region is formed in the device region that traverses the junction. The dislocation region provides a pathway to neutralize charge lingering in a floating body of a device.

Abstract: The invention is directed to compositions of mutated binding proteins containing reporter groups, analyte biosensor devices derived there from, and their use as analyte biosensor both in vitro and in vivo.

Abstract: A doped area is formed in the silicon substrate layer of a silicon-on-insulator stack including a silicon substrate, an insulator layer and an silicon active layer, by implanting a species through at least the insulator layer. In one embodiment, the silicon active layer is etched and the species are implanted in the silicon substrate through the exposed insulator layer. Thus, a doped region is formed in the silicon substrate under the areas where the silicon active layer was removed. In another embodiment after etching the silicon active layer, a dielectric layer is formed adjacent to the silicon active layer and on the insulator layer. In this embodiment, the species are implanted over the entire wafer through both the silicon active layer and the insulator layer. In both embodiments, the species are implanted before forming a gate electrode of a transistor.

Abstract: The present invention relates to a highly integrated SOI semiconductor device and a method for fabricating the SOI semiconductor device by reducing a distance between diodes or well resistors without any reduction in insulating characteristics. The device includes a first conductivity type semiconductor substrate and a surface silicon layer formed by inserting an insulating layer on the semiconductor substrate. A trench is formed by etching a predetermined portion of surface silicon layer, insulating layer and substrate to expose a part of the semiconductor substrate to be used for an element separating region, and a STI is formed in the trench. A transistor is constructed on the surface silicon layer surrounded by the insulating layer and STI with a gate electrode being positioned at the center thereof and with source/drain region being formed in the surface silicon layer of both edges of the gate electrode for enabling its bottom part to be in contact with the insulating layer.

Abstract: This invention improves TFT characteristics by making an interface between an active layer, especially a region forming a channel formation region and an insulating film excellent, and provides a semiconductor device provided with a semiconductor circuit made of a semiconductor element having uniform characteristics and a method of fabricating the same. In order to achieve the object, a gate wiring line is formed on a substrate or an under film, a gate insulating film, an initial semiconductor film, and an insulating film are formed into a laminate without exposing them to the atmosphere, and after the initial semiconductor film is crystallized by irradiation of infrared light or ultraviolet light (laser light) through the insulating film, patterning is carried out to obtain an active layer and a protection film each having a desired shape, and then, a resist mask is used to fabricate the semiconductor device provided with an LDD structure.

Abstract: Integrated circuit including a power component with vertical current flow and at least one low or medium voltage component, the at least one low or medium voltage component formed in a first semiconductor layer separated from a second semiconductor layer by an insulating material layer. The power component with vertical current flow is formed in the second semiconductor layer, and excavations are formed in the insulating material layer which extend from a free surface of the first semiconductor layer to the second semiconductor layer, said excavations having lateral walls of insulating material and being filled up with a conductor material in order to electrically contact active regions of the power component in the second semiconductor layer by electrodes placed on the free surface of the first semiconductor layer.

Abstract: To provide a TFT that can operate at a high speed by forming a crystalline semiconductor film while controlling the position and the size of a crystal grain in the film to use the crystalline semiconductor film for a channel forming region of the TFT. Instead of a metal or a highly heat conductive insulating film, only a conventional insulating film is used as a base film to introduce a temperature gradient. A level difference of the base insulating film is provided in a desired location to generate the temperature distribution in the semiconductor film in accordance with the arrangement of the level difference. The starting point and the direction of lateral growth are controlled utilizing the temperature distribution.

Abstract: A method of forming an LDD of a semiconductor device. A substrate having a polysilicon layer thereon is provided, wherein the polysilicon layer comprises a first region and a second region. A patterned photoresist layer is formed on the polysilicon layer for exposing the first region and covering the second region. The photoresist layer covering the second region comprises a middle portion and an edge portion, wherein the middle portion is thicker than the edge portion. Then, an ion implantation process is performed using the photoresist layer as a mask for forming a source/drain in the first region of the polysilicon layer and an LDD in the second region underneath the edge portion of the photoresist layer.

Abstract: A thin film transistor array and driving circuit structure fabricated on a substrate. The structure comprises a plurality of scanning lines, a plurality of signaling lines, a plurality of thin film transistors, a plurality of pixel electrodes, a plurality of storage capacitors and a plurality of CMOS transistors. Each thin film transistor includes a polysilicon layer, a source/drain terminal, an N+ doped thin film, a gate and a gate insulation layer. The polysilicon layer is formed on the substrate and the source/drain terminal is formed over the polysilicon layer. The N+ doped thin film is positioned between the polysilicon layer and the source/drain terminal. The gate is formed over the polysilicon layer and the gate insulation layer is positioned between the polysilicon layer and the gate.

Abstract: A fabricating method of low temperature poly-silicon film is described. An amorphous silicon layer is formed on a substrate first; then, an anneal treatment is performed on the amorphous silicon layer for forming a poly-silicon layer (poly-silicon film) from the amorphous silicon layer. Several mounds are formed on the surface of the poly-silicon layer. A surface treatment step is performed; then, another laser anneal step is conducted on the poly-silicon layer. Since the size of these mounds on the surface of the poly-silicon layer can be reduced, the issue that the mounds are too big and have different sizes in the prior art can be resolved.

Abstract: A method of forming a gate in a FinFET device includes forming a fin on an insulating layer, forming source/drain regions and forming a gate oxide on the fin. The method also includes depositing a gate material over the insulating layer and the fin, depositing a barrier layer over the gate material and depositing a bottom anti-reflective coating (BARC) layer over the barrier layer. The method further includes forming a gate mask over the BARC layer, etching the BARC layer, where the etching terminates on the barrier layer, and etching the gate material to form the gate.

Abstract: The present invention provides a thin film semiconductor element which is small in area with high on-current enough to be suitable for the power saving, miniaturization, and high definition display of a device. According to the present invention, an outer shape of a semiconductor thin film is processed and regions (a channel region, a source region, and a drain region) in the semiconductor thin film are formed by using, as masks, other element components such as a gate electrode. Specifically, ion-implanted regions are formed by implanting impurity ions into predetermined regions of the semiconductor thin film using, as a mask, the gate electrode overlapped on the thin film via an insulation film. Thereafter, the semiconductor is processed into a predetermined shape by etching using, as masks, previously formed element components such as the gate electrode.

Abstract: This invention provides a semiconductor device having high operation performance and high reliability. An LDD region 707 overlapping with a gate wiring is arranged in an n-channel TFT 802 forming a driving circuit, and a TFT structure highly resistant to hot carrier injection is achieved. LDD regions 717, 718, 719 and 720 not overlapping with a gate wiring are arranged in an n-channel TFT 804 forming a pixel unit. As a result, a TFT structure having a small OFF current value is achieved. In this instance, an element belonging to the Group 15 of the Periodic Table exists in a higher concentration in the LDD region 707 than in the LDD regions 717, 718, 719 and 720.

Abstract: A method of manufacturing a semiconductor device including: forming a semiconductor film on a substrate; forming an insulating film on the semiconductor film; forming a conductive film on the insulating film; forming a resist film, which has a sidewall, on the conductive film; forming a gate electrode which has a sidewall inside of the sidewall of the resist film by partially removing the conductive film by etching, using the resist film as a mask; forming a gate insulating film which includes an extended part having a sidewall positioned beyond the sidewall of the gate electrode by partially removing the insulating film by etching, using the resist film as a mask; forming high impurity concentration source and drain regions in regions of the semiconductor film spaced apart from the sidewall of said extended part by injecting impurities into the semiconductor film, using the resist film as a mask; removing the resist film; and forming, after removing the resist film, low impurity concentration regions in the

Abstract: To provide a manufacturing method for a field-effect transistor, such as a thin-film transistor, enabling reductions in the number patterning steps and the number of photomasks and improvements in the throughput and the yield. In the method, an oxide film is formed by processing the surface of a crystalline semiconductor with ozone water or hydrogen peroxide water. Using the oxide film thus formed as an etch stop, a gate electrode, a source electrode, and a drain electrode of the field-effect transistor are simultaneously formed from a same starting film in one patterning step by use of one photomask. After forming the gate electrode, the source electrode, and the drain electrode, heating is performed thereon at 800° C. or higher for a predetermined time. Thereby, the contact resistances between the source electrode and the crystalline semiconductor and between the drain electrode and the crystalline semiconductor are reduced, whereby improving the electrical conductivity.

Abstract: A device having a raised segment, and a manufacturing method for same. An SOI wafer is provided having a substrate, an insulating layer disposed over the substrate, and a layer of semiconductor material disposed over the insulating layer. The semiconductor material is patterned to form a mesa structure. The wafer is annealed to form a raised segment on the mesa structure.

Abstract: A semiconductor device having high operating performance and reliability is disclosed, and its fabrication process is also disclosed.

Abstract: The invention intends to provide a TFT having a gate insulating film which has a high dielectric withstand voltage and can ensure a desired carrier mobility in an adjacent semiconductor active film. A gate electrode and a semiconductor active film are formed on a transparent substrate with a gate insulating film, which is formed of two layered insulating films, held between them. The gate insulating film is made up of a first gate insulating film which improves a withstand voltage between the gate electrode and the semiconductor active film, and a second gate insulating film which improves an interface characteristic between the gate insulating film and the semiconductor active film. The first and second gate insulating films are each formed of a SiNx film. The optical band gap of the first gate insulating film has a value in the range of 3.0 to 4.5 eV, and the optical band gap of the second gate insulating film has a value in the range of 5.0 to 5.3 eV.

Abstract: To provide a method of efficiently configuring a circuit requiring high inter-device consistency by using thin-film transistors. A semiconductor layer is formed on a substrate and is patterned into desired shapes to form first semiconductor islands. The first semiconductor islands are uniformly crystallized by laser irradiation within the surface areas thereof. Thereafter, the semiconductor layers are patterned into desired shapes to become active layers of the thin-film transistors layer. Active layers of all of thin-film transistors constituting one unitary circuit are formed of one of the first semiconductor islands in this case. Thus, the TFTs mutually realize high consistency.

Abstract: In a method for producing a bonding wafer by the hydrogen ion delamination method comprising at least a step of bonding a base wafer and a bond wafer having a micro bubble layer formed by gas ion implantation and a step of delaminating them at the micro bubble layer as a border, a peripheral portion of a thin film formed on the base wafer is removed after the delamination step. Preferably, a region of 1-5 mm from the peripheral end of the base wafer is removed. In the production of a bonding wafer by the hydrogen ion delamination method, there can be provided a bonding wafer free from problems such as generation of particles from peripheral portion of the wafer and generation of cracks in the SOI layer.

Abstract: A method of forming a CMOS TFT device. The present method features that the n+-ion doping procedure is performed after defining the contact holes located in the doped areas. Thus, the source/drain region of the NMOS can be formed. The present invention requires only five photomasks, thereby reducing the number of photomasks consumed in the prior art.

Abstract: An insulated gate semiconductor device comprising an insulator substrate having provided thereon a source and a drain region; a channel region being incorporated between said source and said drain regions, said channel region comprising a polycrystalline, a single crystal, or a semi-amorphous semiconductor material; and a region provided under said channel region, said region comprising an amorphous material containing the same material as that of the channel region as the principal component, or said region comprising a material having a band gap larger than said channel region.

Abstract: A method of forming a double-gated transistor comprising the following sequential steps. A substrate having an SOI structure formed thereover is provided. The SOI structure including a lower SOI oxide layer and an upper SOI silicon layer. The SOI silicon layer is patterned to form a patterned SOI silicon layer including a source region and a drain region connected by a channel portion. An encasing oxide layer is formed over the patterned SOI silicon layer to form an encased patterned SOI silicon layer. A patterned dummy layer is formed over the encased patterned SOI silicon layer. The patterned dummy layer having an opening, with exposed side walls, exposing: the channel portion of the encased patterned SOI silicon layer; and portions of the upper surface of the SOI oxide layer. Offset spacers are over the exposed side walls of the patterned dummy layer opening.

Abstract: A method facilitates the doping of fins of a semiconductor device that includes a substrate. The method includes forming fin structures on the substrate, where each of the fin structures includes a cap formed on a fin. The method further includes performing a first tilt angle implant process to dope a first one of the fins with n-type impurities and performing a second tilt angle implant process to dope a second one of the fins with p-type impurities.

Abstract: It is an object of the present invention to enhance a selection ratio in an etching process, and provide a method for manufacturing a semiconductor device that has favorable uniform characteristics with high yield.

Abstract: A method of fabricating a thin film transistor includes forming an amorphous silicon layer as an active layer on a substrate, forming a gate insulating layer and a gate electrode on the amorphous silicon layer, doping impurities of a first conductive type in the amorphous silicon layer, forming a metal layer on the exposed portions of the amorphous silicon layer, and crystallizing the amorphous silicon layer by applying thermal treatment and electric field to the resultant substrate.

Abstract: An active matrix organic light emitting display (AM-OLED) and a method of forming the same. The AM-OLED has a plurality of pixel areas arranged in a matrix form. Each pixel area has at least two amorphous silicon TFTs, a display area and a light-shielding layer. The amorphous silicon TFT has an amorphous silicon layer serving as a channel region. The display area is formed by a transparent-conductive layer. The light-shielding layer covers at least the amorphous silicon layer of the amorphous silicon TFT and exposes the display area.

Abstract: Protrusions called ridges are formed on the surface of a crystalline semiconductor film formed by a laser crystallization method or the like. A heat absorbing layer are formed below a semiconductor film. When the semiconductor film is crystallized by laser, a temperature difference is produced between a semiconductor film 1010 positioned above a heat absorbing layer 1011 and a semiconductor film 1013 of the other region to produce a difference in thermal expansion at the boundary of the outside end 1015 of the heat absorbing layer. This difference produces a strain to form a surface wave. The surface wave starting at the outer periphery of the heat absorbing layer is formed in the vicinity of the heat absorbing layer. When the semiconductor layer is solidified after it is melted, the protrusions of the surface wave remain as protrusions after the semiconductor film is solidified.

Abstract: A target-backing plate assembly for use in physical vapor deposition (PVD) processes. The lower curved surface of the target of the assembly is received in a conformingly-shaped backing plate, while a planar upper surface is presented for PVD. The shape of the target increases the amount of material dissipated and the quality of the film and reduces the amount of necessary machining in production.

Abstract: A new Insulated-Gate Field-Effect Thin Film Transistor (Gated-FET) is disclosed. A semiconductor Gated-FET device comprises a lightly doped resistive channel region formed on a first semiconductor thin film layer; and an insulator layer deposited on said channel surface with a gate region formed on a gate material deposited on said insulator layer; said gate region receiving a gate voltage having a first level modulating said channel resistance to a substantially non-conductive state and a second level modulating said channel resistance to a substantially conductive state.

Abstract: An operating semiconductor layer is formed in such a manner that amorphous silicon layer is formed to be shaped so that it has a wide region and a narrow region and the narrow region is connected to the wide region at a position asymmetric to the wide region, and the amorphous silicon layer is crystallized by scanning a CW laser beam from the wide region toward the narrow region in a state that a polycrystalline silicon layer as a heat-retaining layer encloses the narrow region from a side face through the silicon oxide layer.

Abstract: The invention provides an active matrix substrate which allows the film quality of a MIS transistor to be evaluated easily and accurately, an electrooptical device using such an active matrix substrate, and a method of producing such an active matrix substrate. On an active matrix substrate, a film quality evaluation region with a size of 1 mm square is formed at a location where neither an image display area, a scanning line driving circuit, a data line driving circuit, nor a signal line is formed. A semiconductor film (silicon film) for film quality evaluation is formed in the film quality evaluation region using the same layer as a heavily doped source/drain region of a TFT and doped with the same impurity at the same concentration as the source/drain region. The semiconductor film for film quality evaluation is exposed through an opening formed through interlayer insulating films, so that it is possible to immediately start evaluation of the film equality.

Abstract: Island-like semiconductor films and markers are formed prior to laser irradiation. Markers are used as positional references so as not to perform laser irradiation all over the semiconductor within a substrate surface, but to perform a minimum crystallization on at least indispensable portion. Since the time required for laser crystallization can be reduced, it is possible to increase the substrate processing speed. By applying the above-described constitution to a conventional SLS method, a means for solving such problem in the conventional SLS method that the substrate processing efficiency is insufficient, is provided.

Abstract: A method of forming a polycrystalline silicon active layer for use in a thin film transistor is provided.

Abstract: In the step of forming a gate electrode in the region having the line width in which the miniaturization has been progressed, the present invention provides a method of fabricating a thin film transistor (TFT) whose patterning margin can be enlarged without requiring carrying out the photolithography multiple times. According to a fabricating method of the present invention, the mask pattern of the first layer and the mask pattern of the second layer can be formed in a self-aligned process and as a mask pattern which is analog and whose size are different from each other by performing the photolithography once. The hut shape gate can be formed in a self-aligned process by setting the line width located on the active layer so as to be Li in the mask pattern of the first layer, and so as to be L′ in the mask pattern of the second layer, and by in turn carrying out the anisotropic etching using the mask pattern of the second layer and the anisotropic etching using the mask pattern of the first layer.

Abstract: An object of this invention is to provide a manufacturing process and structure of a thin film transistor having high productivity in which the resistance of a gate electrode wiring line can be decreased, an active layer and source and drain electrodes form an ohmic contact, and the number of masks required in the manufacturing process can be decreased. An amorphous silicon layer and a 1-st gate dielectric layer are consecutively deposited on an insulating substrate by plasma CVD. The 1-st gate dielectric layer is processed together with the amorphous silicon layer into an island shape. A 2-nd gate dielectric layer and a metal interconnection layer are deposited on the 1-st gate dielectric layer. After the metal interconnection layer is etched to form a gate electrode, the 2-nd and 1-st gate dielectric layers are etched to pattern the gate dielectric layer.

Abstract: There is provided a reflection type/transflection type thin film transistor liquid crystal display, including an insulating substrate, a thin film transistor formed on the insulating substrate, a transparent electrode made of indium-tin-oxide formed on the thin film transistor and electrically contacted with a source region and a drain region of the thin film transistor, and a curved conducting structure with an inclination of 3 to 20 degrees formed on the transparent electrode.

Abstract: A method of fabricating a polysilicon film by an excimer laser annealing process is introduced. First, an amorphous silicon film is deposited on a substrate composed of glass. The amorphous silicon film includes a first region, which is located in the center, with a first thickness, and a second region, which is located in the periphery, with a slant sidewall. The thickness of the amorphous silicon film is measured so as to obtain the profile of the sidewall in the second region. According to the profile of the sidewall, a pre-cursor region is determined for performing an excimer laser annealing process wherein a second thickness in the boundary of the pre-curser regionis smaller than the first thickness so as to increase area of produced polysilicon film.

Abstract: The present invention provides a method of forming a liquid crystal display (LCD). Active layers of N-type and P-type low temperature polysilicon thin film transistors and a bottom electrode of a storage capacitor are formed first. Then a N-type source/drain is formed and the bottom electrode is doped with dopants. A gate insulator, a gate electrode, a capacitor dielectric, and a top electrode are thereafter formed. After that, a P-type source/drain is formed. Finally, a source interconnect, a drain interconnect, and a pixel electrode of the liquid crystal display are formed.

Abstract: To provide a manufacturing method for a field-effect transistor, such as a thin-film transistor, enabling reductions in the number patterning steps and the number of photomasks and improvements in the throughput and the yield. In the method, an oxide film is formed by processing the surface of a crystalline semiconductor with ozone water or hydrogen peroxide water. Using the oxide film thus formed as an etch stop, a gate electrode, a source electrode, and a drain electrode of the field-effect transistor are simultaneously formed from a same starting film in one patterning step by use of one photomask. After forming the gate electrode, the source electrode, and the drain electrode, heating is performed thereon at 800° C. or higher for a predetermined time. Thereby, the contact resistances between the source electrode and the crystalline semiconductor and between the drain electrode and the crystalline semiconductor are reduced, whereby improving the electrical conductivity.

Abstract: A plurality of thin-film transistors are formed on a substrate. An insulating layer and a metal layer are formed on the substrate, the metal layer including a source electrode and a drain electrode connecting to each of the transistors, and a channel region defined between the source electrode and the drain electrode. An organic layer is formed to cover the metal layer and the insulating layer. A transparent conductive layer is formed on the organic layer. Therein the insulating layer is simultaneously solidified when forming the organic layer, thus reducing surface leakage currents of the substrate.

Abstract: In a method of manufacturing a thin film transistor, in a first deposition step a light shield film is deposited on a substrate. In a second deposition step a semiconductor film is deposited for forming a channel of the transistor on the light shield film. In a patterning step the light shield film and the semiconductor film are simultaneously shaped into the same shape pattern. In an electrode forming step a source electrode and a drain electrode which are respectively in contact with both end-portions of the shaped semiconductor film are formed. An insulator film is formed so that the insulator film covers the source and drain electrodes and the semiconductor film. A gate electrode is formed at a location on the insulator film corresponding to the semiconductor film.

Abstract: A method of forming a polycrystalline silicon active layer for use in a thin film transistor is provided.