Abstract: The present disclosure relates, in part, to a scanning sufficiency apparatus that computes whether a handheld scanning device has scanned a volume for a sufficiently long time for there to be detections and then indicate to the user that the time is sufficient in 3-D rendered voxels. Also described is a hand held medical navigation apparatus with system and methods to map targets inside a patient's body.

Abstract: An optical assembly includes an active optical component. The active optical component includes an activation layer located between two electrodes, such as a first electrode and a second electrode distinct and separate from the first electrode. The active optical component also includes one or more substrates for providing mechanical support for at least one of the two electrodes. In some configurations, the optical assembly includes a first substrate for providing mechanical support for the first electrode, and a second substrate for providing mechanical support for the second electrode.

Abstract: A transistor that is to be provided has such a structure that a source electrode layer and a drain electrode layer between which a channel formation region is sandwiched has regions projecting in a channel length direction at lower end portions, and an insulating layer is provided, in addition to a gate insulating layer, between the source and drain electrode layers and a gate electrode layer. In the transistor, the width of the source and drain electrode layers is smaller than that of an oxide semiconductor layer in the channel width direction, so that an area where the gate electrode layer overlaps with the source and drain electrode layers can be made small. Further, the source and drain electrode layers have regions projecting in the channel length direction at lower end portions.

Abstract: According to one aspect, embodiments of the invention provide an electrical-converter system comprising a printed circuit board including at least a first layer and a second layer, a switching node disposed on the second layer, a first transistor, a second transistor, a third transistor, and a fourth transistor disposed on the first layer, a first conduction path from a source of the first transistor, through the switching node, to a drain of the fourth transistor, the first conduction path having a first length, and a second conduction path from the source of the first transistor, through the switching node, to a drain of the second transistor, the second conduction path having a second length, wherein the first length of the first conduction path is greater than the second length of the second conduction path.

Abstract: A semiconductor device includes a first pair of transistors over a substrate. The first pair of transistors includes a first transistor having a first gate structure over the substrate and a second transistor having a second gate structure stacked over the first transistor. A second pair of transistors is stacked over the first pair of transistors, resulting in a vertical stack perpendicular to a working surface of the substrate. The second pair of transistors includes a third transistor having a third gate structure stacked over the second transistor and a fourth transistor having a fourth gate structure stacked over the third transistor. The third gate structure extends from a central region of the vertical stack to a first side of the vertical stack. The second gate structure and the fourth gate structure extend from the central region to a second side of the vertical stack opposite the first side.

Abstract: An organic light emitting diode display device includes a substrate, a protection layer on the substrate, the protection layer including a trench pattern and a recessed portion, a first electrode on the protection layer, a pixel defining layer on the protection layer, the pixel defining layer defining an opening that exposes at least a part of the first electrode, an organic light emitting layer on the first electrode, and a second electrode on the organic light emitting layer. The recessed portion overlaps the opening and is spaced apart from an edge of the opening in a plan view. The trench pattern includes a plurality of trenches extending along a first direction. Each trench of the plurality of trenches is spaced apart from the first electrode in a plan view and has a concave cross-section.

Abstract: A semiconductor device includes a substrate; a first semiconductor region formed over the substrate; a second semiconductor region formed over the substrate, and electrically connected to the first semiconductor region; a third semiconductor region formed over the substrate, and positioned between the first semiconductor region and the second semiconductor region; a fourth semiconductor region formed over the first semiconductor region; a fifth semiconductor region formed over the second semiconductor region, and electrically connected to the fourth semiconductor region; a sixth semiconductor region formed over the third semiconductor region, and positioned between the fourth semiconductor region and the fifth semiconductor region; and wires formed between the first semiconductor region and the second semiconductor region, and between the fourth semiconductor region and the fifth semiconductor region, to cover the third semiconductor region and the sixth semiconductor region, the wires including conductors.

Abstract: A semiconductor device includes a thin-film transistor. The thin-film transistor comprises an oxide semiconductor layer, a gate insulating layer, a gate electrode overlapped on the oxide semiconductor layer through the gate insulating layer, a source electrode in contact with the oxide semiconductor layer, a drain electrode in contact with the oxide semiconductor layer and a first metal layer in contact with the oxide semiconductor layer and disposed between the source electrode and the drain electrode at a distance from the source electrode and the drain electrode.

Abstract: A semiconductor device has a first conductivity type semiconductor substrate. A second conductivity type first impurity diffusion layer is disposed in a surface region of the semiconductor substrate. A resistance element is configured with a first conductivity type second impurity diffusion layer disposed in the first impurity diffusion layer in the surface region of the semiconductor substrate. In a transistor, a gate is connected to an input portion of the resistance element, a source is connected to the first impurity diffusion layer, and a drain is connected to a voltage source higher than the voltage of the input portion. A current source is connected to the source.

Abstract: A detection device includes a photodiode, and a thin-film transistor coupled to the photodiode. The thin-film transistor includes a semiconductor layer between a light-blocking layer and the photodiode, and an electrode layer between the semiconductor layer and the photodiode, and the electric layer includes a source electrode and a drain electrode of the thin-film transistor. The source electrode extends to a position facing the light-blocking layer with the semiconductor layer interposed therebetween.

Abstract: A method for manufacturing a light-emitting element includes: providing a semiconductor stacked body including a first semiconductor layer, an active layer, and a second semiconductor layer, formed in this order on a substrate; exposing a surface of the first semiconductor layer by removing the substrate; and forming a protective film on the surface of the first semiconductor layer by performing steps including: forming a first layer on the surface of the first semiconductor layer by chemical vapor deposition while introducing a source gas to a film formation chamber at a first flow rate, and forming a second layer on the first layer by chemical vapor deposition while introducing a source gas to the film formation chamber at a second flow rate, the second flow rate being less than the first flow rate.

Abstract: A method for modifying a strain state of at least one semiconductor layer includes providing a support over which is arranged at least one stack of layers including the semiconductor layer and a fusible layer, arranged between the semiconductor layer and the support. The method also includes melting at least one portion of the fusible layer including the passage of said at least one portion of the fusible layer from a solid state into a liquid state, the semiconductor layer remaining in the solid state during the melting step. A laser beam may be used for the melting. The melting with the laser beam may also cause the modification of the strain state of the semiconductor layer.

Abstract: An array substrate and a manufacturing method thereof, and a display panel are provided. A first thin film transistor includes a first electrode, a second electrode, a first active pattern, and a first gate electrode. The first active pattern extends in a thickness direction of the array substrate. The first gate extends in the thickness direction of the array substrate. At least two of first sidewalls of the first electrode of the first thin film transistor and at least two second sidewalls of the second electrode of the first thin film transistor are disposed surround a first opening which penetrating the first thin film transistor.

Abstract: A semiconductor device includes first to fourth semiconductor fins, a first gate structure, and a second gate structure. The first and second semiconductor fins are substantially aligned along a first direction. The third and fourth semiconductor fins are substantially aligned along the first direction. The third and fourth semiconductor fins have a conductivity type different from that of the first and second semiconductor fins. The first gate structure extends across the first and third semiconductor fins substantially along a second direction. The second gate structure extends across the second and fourth semiconductor fins substantially along the second direction. The first and fourth semiconductor fins are substantially aligned along a third direction crossing the first and second directions, and the third direction is substantially parallel with a <100> crystallographic direction.

Abstract: A display device may include a substrate including a display area and a bending area, a buffer layer disposed on the substrate, a first dummy pattern disposed in the bending area on the buffer layer; a first insulating layer disposed on the buffer layer, the first insulating layer exposing an upper surface of the first dummy pattern, a second insulating layer disposed on the first insulating layer, the second insulating layer having an opening exposing an upper surface of the first dummy pattern, a second dummy pattern disposed on the first dummy pattern, and a transmission line disposed on the second dummy pattern.

Abstract: A transistor is described. The transistor includes a substrate, a first semiconductor structure above the substrate, a second semiconductor structure above the substrate, a source contact that includes a first metal structure that contacts a plurality of surfaces of the first semiconductor structure and a drain contact that includes a second metal structure that contacts a plurality of surfaces of the second semiconductor structure. The transistor also includes a gate below a back side of the substrate.

Abstract: To provide a light-emitting element having high luminous efficiency and to provide a light-emitting device and an electronic device which consumes low power and is driven at low voltage, a carbazole derivative represented by the general formula (1) is provided. In the formula, ?1, ?2, ?3, and ?4 each represent an arylene group having less than or equal to 13 carbon atoms; Ar1 and Ar2 each represent an aryl group having less than or equal to 13 carbon atoms; R1 represents any of a hydrogen atom, an alkyl group having 1 to 6 carbon atoms, a substituted or unsubstituted phenyl group, and a substituted or unsubstituted biphenyl group; and R2 represents any of an alkyl group having 1 to 6 carbon atoms, a substituted or unsubstituted phenyl group, and a substituted or unsubstituted biphenyl group. In addition, l, n, and n are each independently 0 or 1.

Abstract: A thin lightweight imaging device is provided. A highly convenient imaging device is provided. The imaging unit includes an imaging unit, a memory, and an arithmetic circuit. The imaging unit includes a light-receiving device, a first light-emitting device, and a second light-emitting device. The first light-emitting device has a function of emitting light in a wavelength range that is different from a wavelength range of light emitted by the second light-emitting device. The imaging unit has a function of making the first light-emitting device emit light and acquiring first image data. The imaging unit has a function of making the second light-emitting device emit light and acquiring second image data. The memory has a function of retaining the first reference data and the second reference data. The arithmetic circuit has a function of correcting the first image data with the use of the first reference data retained in the memory and calculating first correction image data.

Abstract: A semiconductor device includes an oxide semiconductor film having a corundum structure or containing as a major component gallium oxide or a mixed crystal of gallium oxide, and the semiconductor device is a normally-off semiconductor device with a threshold voltage that is 3V or more.

Abstract: The object of the present invention is to make it possible to form an LTPS TFT and an oxide semiconductor TFT on the same substrate. A display device includes a substrate having a display region in which pixels are formed. The pixel includes a first TFT using an oxide semiconductor 109. An oxide film 110 as an insulating material is formed on the oxide semiconductor 109. A gate electrode 111 is formed on the oxide film 110. A first electrode 115 is connected to a drain of the first TFT via a first through hole formed in the oxide film 110. A second electrode 116 is connected to a source of the first TFT via a second through hole formed in the oxide film 110.

Abstract: Various methods and various staircase structures formed out of the active strips of a memory structure (e.g., a memory array having a three-dimensional arrangement of NOR memory strings) above a semiconductor substrate allows efficient electrical connections to semiconductor layers within the active strips.

Abstract: A display substrate having a plurality of subpixels is provided. A respective one of the plurality of subpixels includes a light emitting element; a first thin film transistor configured to driving light emission of the light emitting element; and a light emitting brightness value detector. The light emitting brightness value detector includes a second thin film transistor; and a photosensor electrically connected to the second thin film transistor and configured to detect a light emitting brightness value. The display substrate further includes a silicon organic glass layer on a side of at least one of the first thin film transistor or the second thin film transistor away from a base substrate; and the photosensor is on a side of the silicon organic glass layer away from the base substrate.

Abstract: A semiconductor device includes a first silicon layer. The semiconductor device includes a plurality of first buried oxide layers embedded in the first silicon layer. The semiconductor device includes a second silicon layer disposed over the plurality of first buried oxide layers. Vertical distances between the plurality of first buried oxide layers and the second silicon layer, respectively, are different.

Abstract: This invention relates to integrating pixelated micro-devices into a system substrate. Defined are methods of transferring a plurality of micro-devices into a receiver substrate where a plurality of micro-devices is arranged in one or more cartridges that are aligned and bonded to a template. Further, defining the transfer process, the micro-devices may be selected, identified as defective and a transfer adjustment made based on defective micro-devices.

Abstract: A semiconductor device including an oxide semiconductor in which on-state current is high is provided. The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. Furthermore, the first transistor and the second transistor are transistors having a top-gate structure. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. The first transistor provided in the driver circuit portion includes two gate electrodes between which the oxide semiconductor film is provided.

Abstract: A display device includes: pixels arranged in a display region; photodiodes provided in two or more of the pixels, respectively; a shift register circuit configured to sequentially output an output signal to the pixels and the photodiodes; a switching circuit configured to switch coupling between the shift register circuit and the pixels, and coupling between the shift register circuit and the photodiodes; and a control circuit configured to control a display period for display by the pixels and a detection period for detection by the photodiodes in a time division manner. The control circuit is configured to sequentially output a gate drive signal to the pixels by an operation of the shift register circuit and the switching circuit in the display period, and sequentially output a sensor control signal to the photodiodes by an operation of the shift register circuit and the switching circuit in the detection period.

Abstract: Methods of forming a semiconductor device are provided. A method according to the present disclosure includes forming, over a workpiece, a dummy gate stack comprising a first semiconductor material, depositing a first dielectric layer over the dummy gate stack using a first process, implanting the workpiece with a second semiconductor material different from the first semiconductor material, annealing the dummy gate stack after the implanting, and replacing the dummy gate stack with a metal gate stack.

Abstract: A method for making a radio frequency (RF) semiconductor device may include forming an RF ground plane layer on a semiconductor-on-insulator substrate and including a conductive superlattice. The conductive superlattice may include stacked groups of layers, with each group of layers including stacked doped base semiconductor monolayers defining a doped base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent doped base semiconductor portions. The method may further include forming a body above the RF ground plane layer, forming spaced apart source and drain regions adjacent the body and defining a channel region in the body, and forming a gate overlying the channel region.

Abstract: A temporal Atomic Layer Deposition system and method utilizing precursor pulses applied to a moving substrate. The precursor pulses are self-exhausting.

Abstract: An array substrate is provided. The array substrate includes a plurality of pixel drive circuits. The plurality of pixel drive circuits include a first pixel drive circuit and a second pixel drive circuit that are adjacent to each other. The first electrode plate of the first pixel drive circuit and the pixel electrode of the second pixel drive circuit are laminated in an overlapping region and isolated by the insulating layer.

Abstract: An organic light emitting display device may include a first thin film transistor disposed above a substrate and including a first active layer that is formed of a first material and includes a first source region, a first channel region, and a first drain region, a first gate electrode, and a first source electrode and a first drain electrode, at least one insulating layer disposed on the first gate electrode and a second thin film transistor disposed on the insulating layer and including a second active layer that is formed of a second material and includes a second source region, a second channel region, and a second drain region, a second gate electrode, and a second source electrode and a second drain electrode, wherein the first source electrode and the first drain electrode are electrically connected to the first active layer through a first contact hole, and wherein the first active layer under the first contact hole has an asymmetric structure.

Abstract: According to one aspect, embodiments of the invention provide an electrical-converter system comprising a printed circuit board including at least a first layer and a second layer, a switching node disposed on the second layer, a first transistor, a second transistor, a third transistor, and a fourth transistor disposed on the first layer, a first conduction path from a source of the first transistor, through the switching node, to a drain of the fourth transistor, the first conduction path having a first length, and a second conduction path from the source of the first transistor, through the switching node, to a drain of the second transistor, the second conduction path having a second length, wherein the first length of the first conduction path is greater than the second length of the second conduction path.

Abstract: The impurity concentration in the oxide semiconductor film is reduced, and a highly reliability can be obtained.

Abstract: Methods for forming a semiconductor device are disclosed. According to some aspects, a first implantation is performed on a first of a first semiconductor structure to form a buried stop layer in the first substrate. A second semiconductor device is formed. The first semiconductor structure and the second semiconductor device are bonded. The first substrate is thinned and the buried stop layer is removed, and an interconnect layer is formed above the thinned first substrate.

Abstract: A semiconductor device includes a substrate; a first semiconductor region formed over the substrate; a second semiconductor region formed over the substrate, and electrically connected to the first semiconductor region; a third semiconductor region formed over the substrate, and positioned between the first semiconductor region and the second semiconductor region; a fourth semiconductor region formed over the first semiconductor region; a fifth semiconductor region formed over the second semiconductor region, and electrically connected to the fourth semiconductor region; a sixth semiconductor region formed over the third semiconductor region, and positioned between the fourth semiconductor region and the fifth semiconductor region; and wires formed between the first semiconductor region and the second semiconductor region, and between the fourth semiconductor region and the fifth semiconductor region, to cover the third semiconductor region and the sixth semiconductor region, the wires including conductors.

Abstract: In a transistor that includes an oxide semiconductor, a change in electrical characteristics is suppressed and the reliability is improved. A semiconductor device that includes a transistor is provided. The transistor includes a first conductive film that functions as a first gate electrode, a first gate insulating film, a first oxide semiconductor film that includes a channel region, a second gate insulating film, and a second oxide semiconductor film and a second conductive film that function as a second gate electrode. The second oxide semiconductor film includes a region higher in carrier density than the first oxide semiconductor film. The second conductive film includes a region in contact with the first conductive film.

Abstract: A semiconductor device structure includes a first MOSFET device disposed at a first region of a semiconductor substrate, the first MOSFET device comprises a bulk semiconductor layer contacting the semiconductor substrate, and the bulk semiconductor layer has a first height, a first gate structure disposed over the bulk semiconductor layer, and first S/D regions disposed in the bulk semiconductor layer on opposite sides of the first gate structure; a second MOSFET device disposed at a second region of the semiconductor substrate, the second MOSFET device comprises a semiconductor layer disposed over the semiconductor substrate, and the semiconductor layer has a second height different than the first height, a second gate structure disposed over the semiconductor layer, and second S/D regions disposed in the semiconductor layer on opposite sides of the second gate structure; an insulator between and in contact with the semiconductor substrate and semiconductor layer; and a spacer layer isolating the first and s

Abstract: Disclosed are a compound represented by Chemical Formula 1, a composition comprising the same, an organic optoelectronic diode, and a display device. Chemical formula 1 is as defined in the specification.

Abstract: A semiconductor Schottky rectifier built in an epitaxial semiconductor layer over a substrate has an anode structure and a cathode structure extending from the surface of the epitaxial layer. The cathode contact structure has a trench structure near the epi-layer and a vertical sidewall surface covered with a gate oxide layer. The cathode structure further comprises a polysilicon element adjacent to the gate oxide layer.

Abstract: A semiconductor device including a FET includes an isolation insulating layer disposed in a trench of the substrate, a gate dielectric layer disposed over a channel region of the substrate, a gate electrode disposed over the gate dielectric layer, a source and a drain disposed adjacent to the channel region, and an embedded insulating layer disposed below the source, the drain and the gate electrode and both ends of the embedded insulating layer are connected to the isolation insulating layer.

Abstract: A memory circuit includes: (i) a semiconductor substrate having a planar surface, the semiconductor substrate having formed therein circuitry for memory operations; (ii) a memory array formed above the planar surface, the memory array having one or more electrodes to memory circuits in the memory array, the conductors each extending along a direction substantially parallel to the planar surface; and (iii) one or more transistors each formed above, alongside or below a corresponding one of the electrodes but above the planar surface of the semiconductor substrate, each transistor (a) having first and second drain/source region and a gate region each formed out of a semiconductor material, wherein the first drain/source region, the second drain/source region or the gate region has formed thereon a metal silicide layer; and (b) selectively connecting the corresponding electrode to the circuitry for memory operations.

Abstract: A method of manufacturing an array substrate, includes: providing a substrate; forming a gate conductive layer including at least one first alignment mark; forming a source-drain conductive thin film; aligning a first mask and the substrate on which the gate conductive layer and the source-drain conductive thin film have been formed according to the at least one first alignment mark; patterning the source-drain conductive thin film by using the first mask to form at least one second alignment mark to obtain a source-drain conductive layer; forming a black matrix thin film; aligning a second mask and the substrate on which the gate conductive layer, the source-drain conductive layer and the black matrix thin film have been formed according to the at least one second alignment mark; patterning the black matrix thin film by using the second mask to form a black matrix; and forming a color filter layer.

Abstract: Disclosed is a semiconductor device comprising a thin film transistor and wirings connected to the thin film transistor, in which the thin film transistor has a channel formation region in an oxide semiconductor layer, and a copper metal is used for at least one of a gate electrode, a source electrode, a drain electrode, a gate wiring, a source wiring, and a drain wiring. The extremely low off current of the transistor with the oxide semiconductor layer contributes to reduction in power consumption of the semiconductor device. Additionally, the use of the copper metal allows the combination of the semiconductor device with a display element to provide a display device with high display quality and negligible defects, which results from the low electrical resistance of the wirings and electrodes formed with the copper metal.

Abstract: A display device may include a substrate including a display area and a bending area, a buffer layer disposed on the substrate, a first dummy pattern disposed in the bending area on the buffer layer; a first insulating layer disposed on the buffer layer, the first insulating layer exposing an upper surface of the first dummy pattern, a second insulating layer disposed on the first insulating layer, the second insulating layer having an opening exposing an upper surface of the first dummy pattern, a second dummy pattern disposed on the first dummy pattern, and a transmission line disposed on the second dummy pattern.

Abstract: In a described example, a method includes: forming a metal layer on a backside surface of a semiconductor wafer, the semiconductor wafer having semiconductor dies spaced apart by scribe lanes on an active surface of the semiconductor wafer opposite the backside surface; forming a layer with a modulus greater than about 4000 MPa up to about 8000 MPa over the metal layer; mounting the backside of the semiconductor wafer on a first side of a dicing tape having an adhesive; cutting through the semiconductor wafer, the metal layer, and the layer with a modulus greater than about 4000 MPa up to about 8000 MPa along scribe lanes; separating the semiconductor dies from the semiconductor wafer and from one another by stretching the dicing tape, expanding the cuts in the semiconductor wafer along the scribe lanes between the semiconductor dies; and removing the separated semiconductor dies from the dicing tape.

Abstract: According to one embodiment, a display device includes a signal line, a scanning line, a semiconductor layer, a first insulating layer which covers the semiconductor layer, a color filter above the first insulating layer, a pixel electrode above the color filter and a common electrode. The first insulating layer includes a first contact hole for connecting the semiconductor layer and the pixel electrode to each other. The first contact hole is provided at a position displaced from the color filter in plan view.

Abstract: An apparatus for providing electrostatic discharge (ESD) immunity and a method for fabricating the same are disclosed herein. The apparatus comprises a field effect transistor (FET) formed on a semiconductor substrate in a front-end-of-line (FEOL) layer during an FEOL process, a metal interconnect layer formed on top of the FEOL layer during a back-end-of-line (BEOL) process, wherein the metal interconnect layer comprises a plurality interconnects configured to interconnect the FET to a plurality of components formed on the semiconductor substrate, a power delivery network (PDN) formed under the semiconductor substrate in a backside layer during a backside back-end-of-line (B-BEOL) process, and a through substrate resistive component formed between the FEOL and B-BEOL layers, wherein a first contact of the through substrate resistive component is connected to a drain terminal of the FET and second contact is connected, through the PDN, to a power supply rail.

Abstract: The present disclosure discloses a silicon-based nanowire, a preparation method thereof, and a thin film transistor. By using a eutectic point of catalyst particles and silicon, and a driving factor that the Gibbs free energy of amorphous silicon is greater than that of crystalline silicon, and due to absorption of the amorphous silicon by the molten catalyst particles to form a supersaturated silicon eutectoid, the silicon nucleates and grows into silicon-based nanowires. Moreover, during the growth of the silicon-based nanowire, the amorphous silicon film grows linearly along guide slots under the action of the catalyst particles, and reverse growth of the silicon-based nanowire is restricted by the retaining walls, thus obtaining silicon-based nanowires with a high density and high uniformity. Furthermore, by controlling the size of the catalyst particles and the thickness of the amorphous silicon film, the width of the silicon-based nanowire may also be controlled.

Abstract: The present application relates to the technical field of solar cells, and in particular, to a method for preparing a solar cell, the solar cell, and a photovoltaic module. The method for preparing the solar cell includes: providing a substrate; forming a doped amorphous silicon layer on the first side of the substrate; performing laser treatment N times on the doped amorphous silicon layer to form N doped polysilicon layers ranging from a first doped polysilicon layer to a Nth doped polysilicon layer stacked in a direction away from the substrate, where N>1, a power, a wavelength and a pulse irradiation number of a nth laser treatment are respectively smaller than a power, a wavelength and a pulse irradiation number of a (n?1)th laser treatment, where n?N, and the first doped polysilicon layer is disposed closer to the substrate than the Nth doped polysilicon layer. The embodiments of the present application are conducive to simplify the process of forming the solar cell.

Abstract: A transistor display panel including: a driving voltage line and a first electrode disposed on a substrate; a semiconductor overlapping the first electrode; and an electrode layer overlapping the semiconductor, the electrode layer including a drain electrode, a gate electrode, and a source electrode. The first electrode and the semiconductor are connected through the source electrode.