Abstract: Methods for quantitatively measuring the performance of a plasma immersion process are provided herein. In some embodiments, a method of quantitatively measuring the performance of a plasma immersion process, using a first substrate comprising an oxide layer deposited atop a silicon layer, may include subjecting the first substrate to a plasma immersion process in a first plasma immersion chamber to form a doped oxide layer atop the first substrate; and determining a thickness of the doped oxide layer by shining a beam of light upon a reflective surface of the doped oxide layer; detecting reflected beams of light off of the reflective surface of the doped oxide layer; and analyzing the reflected beams of light to determine the thickness of the doped oxide layer on the first substrate.

Abstract: Systems and method for monitoring semiconductor wafer fabrication processing, for example based upon EBR line inspection, including capturing at least one image of a wafer at an intermediate stage of fabrication. The captured image(s) are compressed to generate a composite representation of at least an edge zone of the wafer. An edge bead removal area is identified in the representation, and at least one feature attribute is extracted from the identified area. The extracted feature attribute is automatically assessed, and information relating to a status of the fabrication processing in generated based upon the assessment. For example, recommended modifications to the fabrication processing, either upstream or downstream of the current stage of fabrication (or both) can be generated and implemented.

Abstract: A method for testing an integrated circuit includes determining performance data of the integrated circuit, wherein at least first and second derivatives of S parameters of the integrated circuit are taken into account when determining the expected performance data. The performance data can be determined by measuring S parameters of the integrated circuit. An equivalent non-linear model of the integrated circuit can be determined from the provided S parameters and first and second derivatives of the provided S parameters. The non-linear behavior of the integrated circuit can be quantified from the equivalent non-linear model.

Abstract: A process for producing at least one photonic component (32, 33, 35, 39, 41), includes inserting the photonic component (32, 33, 35, 39, 41) into a surface layer (12) of a semiconductor wafer and/or within a semiconductor wafer, especially of a semiconductor chip (11, 31, 34, 38, 40) for the simpler and more cost-effective production with the most desired possible three-dimensional structures. At least one laser beam (22) is coupled into the material of the surface layer (12) and/or of the semiconductor wafer, in which the laser beam (22) is focused at a predetermined depth in the material. At least one property of the material and/or the material structure is changed in the area of focus (23, 36).

Abstract: A method of manufacturing a photovoltaic cell using a semiconductor wafer having a front side and a rear side, wherein the photovoltaic cell produces electricity when the front side of the semiconductor wafer is illuminated.

Abstract: There is provided an etching apparatus in which, without setting the information of the substance and the chemical reaction, a small number of representative wavelengths can be selected from a waveform at a lot of wavelengths, and an analysis process of etching data which needs large man-hours can be eliminated to efficiently set the monitoring of the etching.

Abstract: An emission analysis device has an image obtaining module configured to obtain a plurality of first images and a plurality of second images by changing multiple times an end test pattern address, the first images being obtained by integrating an emission from a nondefective semiconductor device determined to be nondefective by a function test while test patterns from a predetermined start test pattern address to the end test pattern address are inputted to the nondefective semiconductor device, the second images being obtained by integrating an emission from a defective semiconductor device determined to be defective by the function test while the test patterns from the predetermined start test pattern address to the end test pattern address are inputted to the defective semiconductor device, and a comparator configured to compare each of the first images with each of the second images by the end test pattern address to determine whether there is a difference between the first images and the second images.

Abstract: Methods are provided for fabricating integrated circuits. In accordance with one embodiment an integrated circuit feature is formed overlying a semiconductor substrate. A layer of low dielectric constant insulator is deposited overlying the circuit feature and is subjected to a plasma environment. Properties of the low dielectric constant material are measured by scatterometry. The low dielectric constant material is heated to drive off adsorbed water and then the properties of the material are remeasured by scatterometry. The results of the measuring and the remeasuring are compared to determine whether the low dielectric constant material was damaged by the plasma environment.

Abstract: A method reconstructs the charge collection from regions beneath opaque metallization of a semiconductor device, as determined from focused laser charge collection response images, and thereby derives a dose-rate dependent correction factor for subsequent broad-area, dose-rate equivalent, laser measurements. The position- and dose-rate dependencies of the charge-collection magnitude of the device are determined empirically and can be combined with a digital reconstruction methodology to derive an accurate metal-correction factor that permits subsequent absolute dose-rate response measurements to be derived from laser measurements alone. Broad-area laser dose-rate testing can thereby be used to accurately determine the peak transient current, dose-rate response of semiconductor devices to penetrating electron, gamma- and x-ray irradiation.

Abstract: A light emitting apparatus is fabricated by measuring light output of a semiconductor light emitting device, and selectively applying luminous material to the light emitting device based on the measured output of the light emitting device. An amount of luminous material, different compositions of luminous material and/or different doping levels of luminous material may be selectively applied based on the measured output of the light emitting device.

Abstract: A method for bonding a first wafer on a second wafer by molecular adhesion, where the wafers have an initial radial misalignment between them. The method includes bringing the two wafers into contact so as to initiate the propagation of a bonding wave between the two wafers while a predefined bonding curvature is imposed on at least one of the two wafers during the contacting step as a function of the initial radial misalignment.

Abstract: The present disclosure relates to methods for performing wafer-level measurement and wafer-level binning of LED devices. The present disclosure also relates to methods for reducing thermal resistance of LED devices. The methods include growing epitaxial layers consisting of an n-doped layer, an active layer, and a p-doped layer on a wafer of a growth substrate. The method further includes forming p-contact and n-contact to the p-doped layer and the n-doped layer, respectively. The method further includes performing a wafer-level measurement of the LED by supplying power to the LED through the n-contact and the p-contact. The method further includes dicing the wafer to generate diced LED dies, bonding the diced LED dies to a chip substrate, and removing the growth substrate from the diced LED dies.

Abstract: A method of inspecting a bonded wafer 3 arrangement comprises: directing measuring radiation through the bonded wafer arrangement 3; imaging at least a portion of the bonded wafer arrangement onto a detector 19 using the measuring radiation having traversed the bonded wafer arrangement, wherein an object side numerical aperture ? of the imaging 16, 18 is less than 0.05; and simultaneously detecting, using the detector 19, at least a portion of the measuring radiation having traversed the bonded wafer arrangement at a multitude of different spaced apart locations 23 within the field of view; wherein the detected radiation has an intensity spectrum such that an intensity of the detected radiation having wavelengths less than 700 nm is less than 10% of a total intensity of the detected radiation and an intensity of the detected radiation having wavelengths greater than 1200 nm is less than 10% of the total intensity of the detected radiation.

Abstract: An ion implantation method includes transporting ions to a wafer as an ion beam, causing the wafer to undergo wafer mechanical slow scanning and also causing the ion beam to undergo beam fast scanning or causing the wafer to undergo wafer mechanical fast scanning in a direction perpendicular to a wafer slow scanning direction, irradiating the wafer with the ion beam by using the wafer slow scanning in the wafer slow scanning direction and the beam fast scanning of the ion beam or the wafer fast scanning of the wafer in the direction perpendicular to the wafer slow scanning direction, measuring a two-dimensional beam shape of the ion beam before ion implantation into the wafer, and defining an implantation and irradiation region of the ion beam by using the measured two-dimensional beam shape to thereby regulate the implantation and irradiation region.

Abstract: A method for managing UV irradiation for treating substrates in the course of treating multiple substrates consecutively with UV light, includes: exposing a first UV sensor to the UV light at first intervals to measure illumination intensity of the UV light so as to adjust the illumination intensity to a desired level based on the measured illumination intensity; and exposing a second UV sensor to the UV light at second intervals to measure illumination intensity of the UV light so as to calibrate the first UV sensor by equalizing the illumination intensity measured by the first UV sensor substantially with the illumination intensity measured by the second UV sensor, wherein each second interval is longer than each first interval.

Abstract: A method of manufacturing a light-emitting device includes forming a wave length conversion portion on a light-emitting element. The light emitting device includes a light-emitting element which emits light of a predetermined wavelength and a wavelength conversion portion which includes a fluorescent substance which is excited by the light emitted from the light-emitting element so as to emit fluorescence of a wavelength different from the predetermined wavelength, which wavelength conversion portion is formed by including the fluorescent substance, a layered silicate mineral, and an organometallic compound.

Abstract: Methods and apparatus for aligning a substrate in a process chamber are provided herein. In some embodiments, an apparatus may include a process chamber having an interior volume for processing a substrate therein; and a substrate positioning system configured to determine a substrate position within the interior volume, wherein the substrate positioning system determines the substrate position in two dimensions by the interaction of a first position and a second position along an edge of a substrate with two beams of electromagnetic radiation provided by the substrate positioning system.

Abstract: A method of inspecting a semiconductor substrate having a back surface and including at least one piece of metal embedded in the substrate comprises directing measuring light towards the back surface of the substrate and detecting a portion of the measuring light received back from the substrate. The method also includes determining a distance between the piece of metal and the back surface based upon the detected measuring light received back from the substrate.

Abstract: A process of forming three-dimensional (3D) die. A plurality of wafers are tested for die that pass (good die) or fail (bad die) predetermined test criteria. Two tested wafers are placed in proximity to each other. The wafers are aligned in such a manner so as to maximize the number of good die aligned between the two wafers. The two wafers are then bonded together and diced into individual stacks of bonded good die.

Abstract: A method for manufacturing a silicon carbide semiconductor device includes the following steps. There is prepared a silicon carbide substrate having a first main surface and a second main surface. On the first main surface, an electrode is formed. The silicon carbide substrate has a hexagonal crystal structure. The first main surface has an off angle of ±8° or smaller relative to a {0001} plane. The first main surface has such a property that when irradiated with excitation light having energy equal to or greater than a band gap of silicon carbide, luminous regions in a wavelength range of 750 nm or greater are generated in the first main surface at a density of 1×104 cm?2 or smaller. In this way, a yield of a silicon carbide semiconductor device can be improved.

Abstract: Methods for quantitatively measuring the performance of a plasma immersion process are provided herein. In some embodiments, a method of quantitatively measuring the performance of a plasma immersion process, using a first substrate comprising an oxide layer deposited atop a silicon layer, may include subjecting the first substrate to a plasma immersion process in a first plasma immersion chamber to form a doped oxide layer atop the first substrate; and determining a thickness of the doped oxide layer by shining a beam of light upon a reflective surface of the doped oxide layer; detecting reflected beams of light off of the reflective surface of the doped oxide layer; and analyzing the reflected beams of light to determine the thickness of the doped oxide layer on the first substrate.

Abstract: An endpoint detection method includes processing an outer surface of a substrate, directing an incident light beam through a window in an opaque metal body onto the surface being processed, receiving at a detector a reflected light beam from the substrate and generating a signal from the detector, and generating a signal based on the reflected light beam received at the detector, and detecting a processing endpoint. The signal is a time-varying cyclic signal that varies as the thickness of the layer varies over time, and detecting the processing endpoint includes detecting that a portion of a cycle of the cyclic signal has passed, the portion being less than a full cycle of the cyclic signal.

Abstract: A light emitting diode module is produced using at least one LED and at least two selectable components that form a light mixing chamber. First and second selectable components have first and second types of wavelength converting materials with different wavelength converting characteristics. The first and second wavelength converting characteristics alter the spectral power distribution of the light produced by the LED to produce light with a color point that is a predetermined tolerance from a predetermined color point. Moreover, a set of LED modules may be produced such that each LED module has the same color point within a predetermined tolerance. The LED module may be produced by pre-measuring the wavelength converting characteristics of the different components selecting components with wavelength converting characteristics that convert the spectral power distribution of the LED to a color point that is a predetermined tolerance from a predetermined color point.

Abstract: A method of manufacturing a modified structure comprising a semiconducting modified graphene layer on a substrate, comprising the subsequent following steps: supply of an initial structure comprising at least one substrate, formation of a graphene layer on the substrate, hydrogenation of the initial structure by exposure to atomic hydrogen, characterised in that the hydrogenation step of the graphene layer is done with an exposure dose between 100 and 4000 Langmuirs, and forms a modified graphene layer.

Abstract: A method of fabricating a chip may include the step of providing a first electrical part. The method may also include the step of forming a shell with the first electrical part embedded in a first side portion of the shell and a cavity in a second side portion of the shell. The method may include the step of testing the embedded first electrical part to determine whether the first electrical part is defective or functional. The method may also include the steps of providing a second electrical part, inserting the second electrical part within the cavity of the shell second side portion, establishing electrical communication between the first and second electrical parts if a test result of the first electrical part indicates that the first electrical part is functional, and finishing the chip. Also, the method may include the step of rejecting the first electrical part if the test result of the first electrical part indicates that the first electrical part is defective.

Abstract: A technique is provided which can exactly recognize a chip to be picked up when picking up the chip from a wafer sheet in a process of die bonding a thin chip. A camera is coupled to one end of a lens barrel, an objective lens is attached to an opposite end of the lens barrel, and an image of a main surface of a chip is photographed through the objective lens. A surface-emitting lighting unit, a diffusing plate and a half mirror are internally provided between the lens barrel and the chip. Further, another lens barrel having a coaxial drop lighting function of radiating light to the main surface of the chip along the same optical axis as that of the camera is disposed.

Abstract: A method and system includes a first substrate and a second substrate, each substrate comprising a predetermined baseline transmittance value at a predetermine wavelength of light, processing regions on the first substrate by combinatorially varying at least one of materials, process conditions, unit processes, and process sequences associated with the graphene production, performing a first characterization test on the processed regions on the first substrate to generate first results, processing regions on a second substrate in a combinatorial manner by varying at least one of materials, process conditions, unit processes, and process sequences associated with the graphene production based on the first results of the first characterization test, performing a second characterization test on the processed regions on the second substrate to generate second results, and determining whether at least one of the first substrate and the second substrate meet a predetermined quality threshold based on the second res

Abstract: A chip quality determination method includes the steps of (a) determining the continuity of defective chips in at least four directions of an X-axis and a Y-axis on a wafer based on the wafer test result of determining the acceptability of chips arranged in a matrix in the four directions on the wafer, and dividing the defective chips into one or more defective groups so that successive ones of the defective chips are in the same defective group; (b) calculating a quality determination index of each of one or more determination target wafer periphery neighboring chips among wafer periphery neighboring chips located within a predetermined range from the periphery of the wafer based on the distance from a corresponding one of the defective groups; and (c) determining the quality of the determination target wafer periphery neighboring chips by comparing the quality determination indexes thereof with a preset threshold.

Abstract: Alignment data from an exposure tool suitable for exposing a plurality of semiconductor wafers are provided, the alignment data including alignment values applied by the exposure tool to respective ones of the plurality of semiconductor wafers at a plurality of measured positions.

Abstract: A method of inspecting a substrate with first and second layers thereon is disclosed. The method includes directing a beam of electromagnetic radiation at an acute angle towards an edge of the layers, detecting scattered and/or reflected electromagnetic radiation, and establishing, from results of the detecting, whether an edge of the second layer overlaps an edge of the first layer.

Abstract: A nitride semiconductor light-emitting device includes a support base and a diode structure. The support base has a primary surface of a hexagonal nitride semiconductor. The diode structure is provided on the primary surface of the support base. The diode structure includes a first conductivity type group-III nitride semiconductor layer provided on the primary surface of the support base, a light-emitting layer provided on the first conductivity type group-III nitride semiconductor layer, and a second conductivity type group-III nitride semiconductor layer provided on the light-emitting layer. The light-emitting layer has a multiple quantum well structure including first and second well layers and a barrier layer. The thickness of the barrier layer is 4.5 nm or less. The primary surface of the support base tilts at a tilt angle in the range of 50 to 80 degrees or 130 to 170 degrees from a c-plane of the hexagonal nitride semiconductor.

Abstract: A method for producing a photovoltaic module having backside-contacted semiconductor cells which have contact regions provided on a contact side includes: providing a foil-type, non-conducting substrate having an at least one-sided and at least sectionally electrically conductive substrate coating on a first substrate side; placing the contact sides of the semiconductor cells on a second substrate side; implementing a local perforation which penetrates the substrate and the substrate coating, to generate openings at the contact regions of the semiconductor cells; applying a contact element to fill the openings and to form a contact point between the substrate coating on the first substrate side and the semiconductor cells on the second substrate side.

Abstract: The present invention provides a method and apparatus for etching a photomask substrate with enhanced process monitoring, for example, by providing for optical monitoring at different regions of the photomask to obtain desired etch rate or thickness loss. In one embodiment, the method includes etching a first substrate through a patterned mask layer in a plasma etch chamber, the first substrate having a backside disposed on a substrate support and a front side facing away from the substrate support, directing a first radiation source from the backside of the first substrate to a first area covered by the patterned mask layer, directing a second radiation source from the backside of the first substrate to a second area uncovered by the patterned mask layer, collecting a first signal reflected from the first area covered by the patterned mask layer, collecting a second signal reflected from the second area uncovered by the patterned mask layer, and analyzing the combined first and the second signal.

Abstract: The manufacturing yield of semiconductor devices (CMUTs) is improved. Before a polyimide film serving as a protective film is formed, a membrane is repeatedly vibrated to evaluate the breakdown voltage between an upper electrode and a lower electrode, and the upper electrode of a defective CMUT cell whose breakdown voltage between the upper electrode and the lower electrode is reduced due to the repeated vibrations of the membrane is removed in advance to cut off the electrical connection with other normal CMUT cells. By this means, in a block RB or a channel RCH including the recovered CMUT cell RC, reduction in the breakdown voltage between the upper electrode and the lower electrode after the repeated vibrations of the membrane is prevented.

Abstract: An organic EL device (OELD) having a defective portion is irradiated with a laser beam; first luminance of light emitted from the OELD is measured after the OELD is irradiated with the laser beam, while supplying, to the OELD, a first amount of current with which the OELD in a normal state would emit light having luminance corresponding to a first grayscale level smaller than a reference level; the OELD is re-irradiated with the laser beam when the first luminance is smaller than a threshold; and second luminance of light emitted from the OELD is measured when the first luminance is greater than or equal to the threshold, while supplying, to the OELD, a second amount of current with which the OELD in the normal state would emit light having luminance corresponding to a second grayscale level greater than or equal to the reference level.

Abstract: A method for producing a semiconductor device comprising a process step of forming a device configuration pattern in a device formation region in a chip formation region on a film side of a semiconductor wafer having the film for forming a pattern, and forming inspection patterns in a plurality of inspection regions in the chip formation region, and an inspection step, wherein the inspection patterns have a repeat pattern and a uniform pattern formed in a first inspection region in the plurality of inspection regions, the inspection step has at least a pattern inspection step including a first inspection to measure a parameter of the repeat pattern, by using an optical measurement method capable of measuring a three-dimensional pattern shape, and a second inspection to measure a film thickness of the uniform pattern by using an optical measurement method capable of measuring the film thickness.

Abstract: Methods and apparatus for forming solar cells with selective emitters are provided. A method includes positioning a substrate on a substrate receiving surface. The substrate has a surface comprising a first patterned heavily doped region having a first dopant concentration that defines the selective emitters, and a second doped emitter region having a second dopant concentration that is less than the first dopant concentration, wherein the second doped emitter region surrounds the first patterned heavily doped region. The method further comprises determining a position of the first patterned heavily doped region by using a Fourier transform to process a filtered optical image, aligning one or more distinctive elements in a screen printing mask with the first patterned heavily doped region by using information received from the determined position of the first patterned heavily doped region, and depositing a layer of material on a portion of the first patterned heavily doped region.

Abstract: An alignment method of chips that are formed on a surface of a semiconductor wafer with alignment marks corresponding to the chips includes the steps of irradiating an alignment mark corresponding to a predetermined alignment chip in a predetermined area including the chips with a laser light; detecting reflected waves from the alignment mark of the predetermined alignment chip to obtain a position of the alignment mark of the predetermined alignment chip; irradiating an alignment mark of an alternative chip different from the predetermined alignment chip with the laser light in case of not being able to obtain the position of the alignment mark of the predetermined alignment chip; obtaining a position of the alignment mark of the alternative chip by detecting the reflected waves from the alignment mark of the alternative chip; and aligning the chips in the predetermined area based on positions of alignment marks including the position of the alignment mark of the alternative chip.

Abstract: In a light-emitting element provided with a thick layer of a plurality of EL layers which are partitioned by a charge generation layer between a pair of electrodes, a portion which a conductive foreign substance enters between the pair of electrodes emits stronger light at a voltage lower than a voltage required when a normal portion starts emitting light. In a light-emitting element provided with a plurality of EL layers which are partitioned by a charge generation layer between a pair of electrodes, a voltage may be applied thereto in the forward direction. Then, an abnormal light-emission portion may be detected because the portion emits light at a luminance of 1 (cd/m2) or higher when the applied voltage is lower than a voltage required when a normal portion starts emitting light. The portion may be irradiated with laser light so as to be insulated.

Abstract: Method form via chain and serpentine/comb test structures in kerf areas of a wafer. The via chain test structures comprise a first via chain and a second via chain in a first kerf area. The via chain test structures are formed such that geometrically shaped portions of the first via chain and geometrically shaped portions of the second via chain alternate along the length of the first kerf area. The methods perform relatively low (first) magnification testing to identify a defective geometrically shaped portion that contains a defective via structure. The methods then perform relatively high (second) magnification testing only within the defective geometrically shaped portion. The first magnification testing is performed at a lower magnification relative to the second magnification testing.

Abstract: A method for producing a semiconductor optical device, includes the steps of: (a) forming a semiconductor region on a substrate, the substrate including first and second areas; the first area including device sections (b) forming a first mask on the semiconductor region, the first mask including first patterns periodically arranged in the first area and a second pattern provided in the second area; (c) forming a plurality of periodic structures in each of the device sections and a monitoring structure in the second area by using the first mask, the periodic structures respectively corresponding to the first patterns, the monitoring structure corresponding to the second pattern; (d) measuring a shape of the monitoring structure; (e) selecting a desired periodic structure from the plurality of periodic structures on a basis of a result of measuring the shape of the monitoring structure; (f) forming a second mask including a pattern on the desired periodic structure; and (g) forming stripe mesas including the de

Abstract: Correction of reticle defects, such as EUV reticle defects, is accomplished with a second exposure. Embodiments include obtaining a reticle with a first pattern corresponding to a design for a wafer pattern, detecting dark defects and/or design/OPC weak spots in the first pattern, exposing a resist covered wafer using the reticle, and exposing the wafer using a second reticle with a second pattern or a second image field with openings corresponding to the dark defects, with a repair pattern on the reticle or on another reticle, or with a programmed e-beam or laser writer.

Abstract: A semiconductor wafer has a die area and a scribe area. A first dummy pad is formed in a first test line area of the scribe area and filled with a first material as part of a first metal layer. A first interlayer dielectric is formed over the first metal layer. A first interconnect pattern is formed in the die area and above the first interlayer dielectric, and a first trench pattern is formed in the first test line area of the scribe area and above the interlayer dielectric. The first interconnect pattern and the first trench pattern are filled with a second metal layer, and the first trench pattern is aligned above the first dummy pad. An enhanced test line structure including the first trench pattern and the first dummy pad is formed and probed in a back end of line (BEOL) process.

Abstract: Embodiments of the present invention pertain to substrate processing equipment and methods incorporating light emitting diodes (LEDs) for thermally processing substrates. Such light sources offer a variety of advantages including higher efficiency and more rapid response times. Pulse widths are selectable down to under a millisecond but can be for long pulses up to and exceeding a second. LEDs are preferable to tungsten-halogen lamps even in circumstances that allow longer processing times, since LEDs produce light with greater than 50% efficiency and tungsten-halogen lamps operate with less than 5% efficiency.

Abstract: A method of forming a semiconductor thin film includes: a step of forming an amorphous semiconductor thin film over a transparent substrate; a step of forming a crystalline semiconductor thin film by irradiating the amorphous semiconductor thin film with laser light to provide heat treatment and thereby crystallizing the amorphous semiconductor thin film; and an inspection step of inspecting the crystalline semiconductor thin film. The inspection step includes a step of obtaining a transmission image of the crystalline semiconductor thin film by irradiating the crystalline semiconductor thin film with light from a rear side of the transparent substrate and taking an image, and a screening step of performing screening of the crystalline semiconductor thin film based on the obtained transmission image.

Abstract: An expansion/contraction measuring apparatus includes a transport section which transports a flexible substrate along a surface of the substrate; a detecting section detecting first and second marks which are formed on the substrate while being separated from each other by a predetermined spacing distance in a transport direction of the substrate and which are moved, in accordance with the transport of the substrate, to first and second detection areas disposed on a transport route for the substrate respectively; a substrate length setting section which sets a length of the substrate along the transport route between the first and second detection areas to a reference length; and a deriving section which derives information about expansion/contraction of the substrate in relation to the transport direction based on a detection result of the first and second marks. Accordingly, the expansion/contraction state of an expandable/contractible substrate is measured highly accurately.

Abstract: According to one embodiment, a method for manufacturing a semiconductor light emitting device is disclosed. The method can include forming a first interconnect layer, a second interconnect layer, a first metal pillar, a second metal pillar, a second insulating layer, a transparent material and a phosphor layer. The transparent material is formed on the first major surface of a semiconductor layer selected from the plurality of semiconductor layers on the basis of an emission spectrum of a light obtained from the first major surface side. The transparent material transmits the light. The phosphor layer is formed on the transparent material and the first major surface of the plurality of the semiconductor layers.

Abstract: The present disclosure relates to the field of microelectronic substrate fabrication and, more particularly, to alignment inspection for vias formed in the microelectronic substrates. The alignment inspection may be achieved by determining the relative positions of fluorescing and non-fluorescing elements in a microelectronic substrate.

Abstract: A method of manufacturing a nano device by directly printing a plurality of NW devices in a desired shape on a predesigned gate substrate. The method includes preparing an NW solution, preparing a building block for performing decaling onto the substrate by carrying an NW device, forming the NW device by connecting electrodes of each of building block units of the building block using NWs by dropping the NW solution between the electrodes and then through dielectrophoresis, visually inspecting the numbers of NW bridges that are formed between the electrodes of each of the building block units through the dielectrophoresis, grouping the building block units according to the numbers, and decaling the NW device formed on each of the building block units onto the gate substrate by bringing the grouped building block units into contact with the predesigned gate substrate and then detaching the grouped building block units.

Abstract: A laser diode includes a junction surface configured to interface with an integrated optics slider. Cathode and anode electrical junctions are disposed on the junction surface. The cathode and anode electrical junctions are configured for electrical and mechanical coupling to the integrated optics slider. At least one test pad is disposed on the junction surface that is physically separate from and electrically coupled to one of the cathode and anode electrical junctions. The test pad is configured to be contacted by a test probe and is not configured for electrical or mechanical coupling to the integrated optics slider.