Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged Semiconductor Patents (Class 438/25)
  • Patent number: 8067254
    Abstract: A device is provided with an array of a plurality of phosphor converted light emitting devices (LEDs) that produce broad spectrum light. The phosphor converted LEDs may produce light with different correlated color temperature (CCT) and are covered with an optical element that assists in mixing the light from the LEDs to produce a desired correlated color temperature. The optical element may be bonded to the phosphor converted light emitting devices. The optical element may be a dome mounted over the phosphor converted light emitting devices and filled with an encapsulant.
    Type: Grant
    Filed: January 12, 2010
    Date of Patent: November 29, 2011
    Assignee: Philips Lumileds Lighting Company LLC
    Inventors: Michael D. Camras, William R. Imler, Franklin J. Wall, Jr., Frank M. Steranka, Michael R. Krames, Helena Ticha, Ladislav Tichy, Robertus G. Alferink
  • Patent number: 8062925
    Abstract: A process for preparing a semiconductor light-emitting device for mounting is disclosed. The light-emitting device has a mounting face for mounting to a sub-mount. The process involves treating at least one surface of the light-emitting device other than the mounting face to lower a surface energy of the at least one surface, such that when mounting the light-emitting device, an underfill material applied between the mounting face and the sub-mount is inhibited from contaminating the at least one surface.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: November 22, 2011
    Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company LLC
    Inventors: Oleg Borisovich Shchekin, Xiaolin Sun, Decai Sun
  • Patent number: 8062912
    Abstract: A method of making a semiconductor chip assembly includes providing a post and a base, mounting an adhesive on the base including inserting the post through an opening in the adhesive, mounting a substrate on the adhesive including inserting the post into an aperture in the substrate to form a gap in the aperture between the post and the substrate, then flowing the adhesive into and upward in the gap, solidifying the adhesive, then mounting a semiconductor device on a heat spreader that includes the post and the base, electrically connecting the semiconductor device to the substrate and thermally connecting the semiconductor device to the heat spreader. The substrate includes first and second conductive layers and a dielectric layer therebetween and provides horizontal signal routing between a pad and a terminal at the first conductive layer.
    Type: Grant
    Filed: September 13, 2009
    Date of Patent: November 22, 2011
    Assignee: Bridge Semiconductor Corporation
    Inventors: Chia-Chung Wang, Charles W. C. Lin
  • Patent number: 8053253
    Abstract: An object is to provide a highly reliable semiconductor device that has tolerance to external stress and electrostatic discharge. Another object is to prevent defective shapes and defective characteristics due to the external stress or an electrostatic discharge in the manufacturing process, and to manufacture a semiconductor device with high yield. Still another object is to manufacture a semiconductor device at low cost and with high productivity. With the use of a conductive shield covering a semiconductor integrated circuit, electrostatic breakdown due to electrostatic discharge of the semiconductor integrated circuit is prevented. The conductive shield is formed so that at least the conductive shields on the top and bottom surfaces are electrically connected by a plating method. In addition, a semiconductor device can be formed at low cost with high productivity because a plating method is used for the formation of the conductive shield.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: November 8, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuugo Goto, Teruyuki Fujii
  • Patent number: 8053259
    Abstract: Disclosed is a manufacturing method of a light emitting diode. The manufacturing method comprises the steps of preparing a substrate and mounting light emitting chips on the substrate. An intermediate plate is positioned on the substrate. The intermediate plate has through-holes for receiving the light emitting chips and grooves for connecting the through-holes to one another on its upper surface. A transfer molding process is performed with a transparent molding material by using the grooves as runners to form first molding portions filling the through-holes. Thereafter, the intermediate plate is removed, and the substrate is separated into individual light emitting diodes. Accordingly, it is possible to provide a light emitting diode in which the first molding portion formed through a transfer molding process is positioned within a region encompassed by cut surfaces of the substrate.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: November 8, 2011
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Sang Min Lee, Hyuck Jung Choi, Won Il Kim
  • Publication number: 20110266559
    Abstract: The application relates to a semiconductor component, a photo-reflective sensor, and also a method for producing a housing for a photo-reflective sensor, wherein the housing lower part is monolithic and has at least two cavities into which an emitter and a detector are introduced.
    Type: Application
    Filed: April 17, 2009
    Publication date: November 3, 2011
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Michael Zitzlsperger, Thomas Zeiler
  • Publication number: 20110254808
    Abstract: A reflective touch display panel and a manufacturing method thereof are provided. An incident light enters the display panel through a front substrate thereof. A plurality of pixel structures and a plurality of light sensing devices are disposed on an inner surface of the front substrate. The light sensing device includes a light sensing transistor having a transparent gate electrode. The manufacturing method for the reflective touch display panel includes the following steps. A first patterned transparent conductive layer, including the transparent gate electrode and a capacitance lower electrode, is formed on the front substrate. A first patterned conductive layer, a dielectric layer, a patterned semi-conductive layer, a second patterned conductive layer and a second patterned transparent conductive layer are sequentially formed on the front substrate to respectively form the light sensing device and the pixel structure. A reflective material layer and a back substrate are.
    Type: Application
    Filed: June 8, 2010
    Publication date: October 20, 2011
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Hsiang-Lin LIN, Chih-Jen HU, Wei-Ming HUANG
  • Patent number: 8039303
    Abstract: A semiconductor device is made by forming a first conductive layer over a sacrificial carrier. A conductive pillar is formed over the first conductive layer. An active surface of a semiconductor die is mounted to the carrier. An encapsulant is deposited over the semiconductor die and around the conductive pillar. The carrier and adhesive layer are removed. A stress relief insulating layer is formed over the active surface of the semiconductor die and a first surface of the encapsulant. The stress relief insulating layer has a first thickness over the semiconductor die and a second thickness less than the first thickness over the encapsulant. A first interconnect structure is formed over the stress relief insulating layer. A second interconnect structure is formed over a second surface of encapsulant opposite the first interconnect structure. The first and second interconnect structures are electrically connected through the conductive pillar.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: October 18, 2011
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Il Kwon Shim, Seng Guan Chow, Yaojian Lin
  • Publication number: 20110241023
    Abstract: The present invention provides a multichip LED and method of manufacture in which white light is produced. Specifically, a plurality of electrically interconnected LED chips (e.g., interconnected via red metal wire) is selected for conversion of light to white light. In a typical embodiment, the LED chips comprise: a blue LED chip, a red LED chip, a green LED chip, and a target LED chip whose light output is converted to white light. A wavelength of a light output by one or more of the plurality of chips will be measured. Based on the wavelength measurement, a conformal coating is applied to the one or more of the LED chips. The conformal coating has a phosphor ratio that is based on the wavelength. Moreover, the phosphor ratio is comprised of at least one of the following colors: yellow, green, or red. Using the conformal coating the light output of the target LED is then converted to white light.
    Type: Application
    Filed: March 31, 2010
    Publication date: October 6, 2011
    Inventor: Byoung gu Cho
  • Patent number: 8030175
    Abstract: A method of bonding an integrated circuit to an adhesive substrate. The integrated circuit is one of a plurality of integrated circuits, each having a respective frontside releasably attached to a film frame tape supported by a wafer film frame. The method includes the steps of: (a) selecting one of the integrated circuits for bonding to the adhesive substrate; (b) positioning the adhesive substrate at a backside of the selected integrated circuit; (c) positioning a bonding tool on a zone of the film frame tape, the zone being aligned with the selected integrated circuit; and (d) applying a bonding force from the bonding tool through the film frame tape and the selected integrated circuit onto the adhesive substrate, so as to bond the backside of the selected integrated circuit to the substrate.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: October 4, 2011
    Assignee: Silverbrook Research Pty Ltd
    Inventors: Roger Mervyn Lloyd Foote, Kia Silverbrook
  • Publication number: 20110233549
    Abstract: A display apparatus including gyro sensors with a simple structure, and a method of manufacturing the same are disclosed. The display apparatus includes a first substrate and a second substrate, a space between the first substrate and second substrate, including a display area and a non-display area, and a first gyro sensor formed in a sensor area disposed within the non-display area, where the first gyro sensor includes: a first lower base electrode placed at a central portion of the first gyro sensor on the first substrate, a pair of first lower direction electrodes formed to be symmetrical to each other around the first lower base electrode in a first direction on the first substrate, and a first conductor configured to contact with the first lower base electrode within the first gyro sensor.
    Type: Application
    Filed: February 1, 2011
    Publication date: September 29, 2011
    Applicant: SAMSUNG MOBILE DISPLAY CO., LTD.
    Inventor: Sang-Min YI
  • Patent number: 8017436
    Abstract: A method of forming a package includes forming a circuit pattern on a first carrier and embedding the circuit pattern in a dielectric material on a second carrier. The first carrier is removed and a buildup dielectric material is mounted to the dielectric material and the circuit pattern. Laser-ablated artifacts are formed in the buildup dielectric material and filled with an electrically conductive material to form a buildup circuit pattern. The second carrier is patterned into a stiffener, which provides rigidity to the thin package.
    Type: Grant
    Filed: December 10, 2007
    Date of Patent: September 13, 2011
    Assignee: Amkor Technology, Inc.
    Inventors: Ronald Patrick Huemoeller, Sukianto Rusli, Bob Shih-Wei Kuo, Jon Gregory Aday, Lee John Smith, Robert F. Darveaux
  • Patent number: 8017960
    Abstract: An infrared emitting diode that can be utilized as a high power and rapidly responsive infrared light source for both infrared and remote control communications is disclosed which comprises at least one p-type clad layer containing AlxGa1-xAs of p type where 0.15?x?0.45, an active layer containing AlyGa1-yAs of p type where 0?y?0.01 and at least one n-type clad layer containing AlzGa1-zAs where 0.15?z?0.45 wherein said active layer has a thickness of 2 to 6 ?m and which has an emission peak wavelength of 880 to 890 nm at room temperature.
    Type: Grant
    Filed: December 26, 2005
    Date of Patent: September 13, 2011
    Assignee: Dowa Electronics Materials Co., Ltd.
    Inventors: Haruhiko Watanabe, Yoshinori Kurosawa, Takashi Araki
  • Patent number: 8017955
    Abstract: A composite multi-color light emitting diode device includes a first light emitting diode unit and a second light emitting diode unit that is arranged on top of the first light emitting diode unit for emitting two different wavelengths of electromagnetic radiation. A third light emitting diode unit may be arranged on top of the second light emitting diode unit, thereby providing a stack of three light emitting diode units. Alternatively, the third light emitting diode unit may be arranged on the first light emitting diode unit, thereby providing two light emitting diode units side-by-side on top of the first light emitting diode unit.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: September 13, 2011
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Lingli Wang, Koen Van Os, Johannes Petrus Maria Ansems
  • Patent number: 8017450
    Abstract: A method of forming an asymmetrical encapsulant bead on a series of wire bonds electrically connecting a micro-electronic device to a series of conductors, the micro-electronic device having a planar active surface. The method has the steps of positioning the die and the wire bonds beneath an encapsulant jetter that jets drops of encapsulant on to the wire bonds, the drops of encapsulant following a vertical trajectory, tilting the die such that the active surface is inclined to the horizontal and, jetting the drops of encapsulant to form a bead of encapsulant material covering the series of wire bonds, the bead having a cross sectional profile that is asymmetrical about an axis parallel to a normal to the active surface.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: September 13, 2011
    Assignee: Silverbrook Research Pty Ltd
    Inventors: Nadine Lee-Yen Chew, Elmer Dimaculangan Perez, Kiangkai Tankongchumruskul
  • Publication number: 20110217798
    Abstract: [Problems] To accommodate a plurality of optical semiconductor elements in one package with their optical axes aligned highly precisely. [Means for Solving the Problems] An optical transmission module includes an optical transmission unit, a carrier to become a base, a semiconductor optical amplification element mounted on the carrier through a first sub-carrier, first and second lenses fixed on the carrier through first and second lens holders, an element supporting member and an optical isolator fixed on the carrier, a third lens holder supported by the element supporting member, a third lens and a small carrier individually fixed in the third lens holder, and a semiconductor laser element mounted on the small carrier through a second sub-carrier.
    Type: Application
    Filed: May 20, 2011
    Publication date: September 8, 2011
    Applicant: NEC CORPORATION
    Inventors: Mitsunori KANEMOTO, Tarou KANEKO
  • Patent number: 8012776
    Abstract: Methods of manufacturing an imaging device package are provided. In accordance with an embodiment a sensor die may be coupled to bond pads on a transparent substrate. Electrically conductive paths comprising bond wires are formed through the bond pads from the sensor die to an outer surface of the imaging device package.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: September 6, 2011
    Assignee: Micron Technology, Inc.
    Inventor: James Derderian
  • Patent number: 8003415
    Abstract: A method of making a semiconductor chip assembly includes providing a post and a base, mounting an adhesive on the base including inserting the post through an opening in the adhesive, mounting a substrate on the adhesive including inserting the post into an aperture in the substrate to form a gap in the aperture between the post and the substrate, then flowing the adhesive into and upward in the gap, solidifying the adhesive, then mounting a semiconductor device on a heat spreader that includes the post and the base, electrically connecting the semiconductor device to the substrate and thermally connecting the semiconductor device to the heat spreader. The substrate includes first and second conductive layers and a dielectric layer therebetween, and the assembly provides the vertical signal routing between a pad at the first conductive layer and a terminal below the adhesive.
    Type: Grant
    Filed: September 13, 2009
    Date of Patent: August 23, 2011
    Assignee: Bridge Semiconductor Corporation
    Inventors: Chia-Chung Wang, Charles W. C. Lin
  • Patent number: 7998763
    Abstract: A method for manufacturing a semiconductor apparatus which does not hamper the miniaturization of products and can simplify the manufacturing process without the optical performance deteriorating is described. Furthermore, a mold assembly for use in molding a semiconductor apparatus can be provided. A substrate can be set within a lower mold, wherein a plurality of optical semiconductor elements are mounted on the substrate at predetermined intervals. Primary transfer molding using the lower mold and a primary upper mold can be carried out to form a plurality of frame bodies so as to surround the respective optical semiconductor elements. While the substrate is set on the lower mold, secondary transfer molding using the lower mold and the secondary upper mold can be carried out to form the light-transmitting portions so as to cover the optical semiconductor elements and the frame bodies on the substrate.
    Type: Grant
    Filed: November 17, 2009
    Date of Patent: August 16, 2011
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Kazuyuki Iwasaki, Ryuichi Goto, Shogo Sakuma
  • Patent number: 7994628
    Abstract: A package structure for photoelectronic devices comprises a silicon substrate, a first insulating layer, a reflective layer, a second insulating layer, a first conductive layer, a second conductive layer and a die. The silicon substrate has a first surface and a second surface, wherein the first surface is opposed to the second surface. The first surface has a reflective opening, and the second surface has at least two electrode via holes connected to the reflective opening and a recess disposed outside the electrode via holes. The first insulating layer overlays the first surface, the second surface and the recesses. The reflective layer is disposed on the reflective opening. The second insulating layer is disposed on the reflective layer. The first conductive layer is disposed on the surface of the second insulating layer. The second conductive layer is disposed on the surface of the second surface and inside the electrode via holes.
    Type: Grant
    Filed: October 21, 2008
    Date of Patent: August 9, 2011
    Assignee: Advanced Optoelectric Technology, Inc.
    Inventors: Wen Liang Tseng, Lung Hsin Chen, Jian Shihn Tsang
  • Patent number: 7994526
    Abstract: There is provided a light emitting diode package having at least two heat sinks. The light emitting diode package includes a main body, at least two lead terminals fixed to the main body, and at least two heat sinks of electrically and thermally conductive materials, the heat sinks being fixed to the main body. The at least two heat sinks are separated from each other. Thus, high luminous power can be obtained mounting a plurality of light emitting diode dies in one LED package. Further, it is possible to embody polychromatic lights mounting LED dies emitting different wavelengths of light each other in the LED package.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: August 9, 2011
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Kwan Young Han, Kwang Il Park, Jae Ho Cho, Jung Hoo Seo, Seong Ryeol Ryu
  • Patent number: 7994531
    Abstract: A white-light LED chip and a fabrication method thereof are provided. The white-light LED chip comprises a blue-light LED chip and a phosphor layer directly disposed on a top surface of the blue-light LED chip. The method comprises providing a plurality of blue-light LED chips attached to a substrate, wherein at least one contact pad is formed on the top surface of each blue-light LED chip. A protective layer is formed on the contact pad. A phosphor layer is formed on the top surface of the blue-light LED chip by a molding process, exposing the contact pad. Finally, the protective layer and the substrate are removed from the blue-light LED chip to form a white-light LED chip.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: August 9, 2011
    Assignee: VisEra Technologies Company Limited
    Inventors: Chun-Chi Lin, Tzu-Han Lin, Wei-Hung Kang
  • Publication number: 20110186736
    Abstract: Various embodiments of an optical proximity sensor having a lead frame and no overlying metal shield are disclosed. In one embodiment, a light emitter and a light detector are mounted on a lead frame comprising a plurality of discrete electrically conductive elements having upper and lower surfaces, at least some of the elements not being electrically connected to one another. An integrated circuit is die-attached to an underside of the lead frame. An optically-transmissive infrared pass compound is molded over the light detector and the light emitter and portions of the lead frame. Next, an optically non-transmissive infrared cut compound is molded over the optically-transmissive infrared pass compound to provide an optical proximity sensor having no metal shield but exhibiting very low crosstalk characteristics.
    Type: Application
    Filed: January 31, 2010
    Publication date: August 4, 2011
    Applicant: Avago Technologies ECBU (Singapore) Pte. Ltd.
    Inventors: Yufeng Yao, Junhua He, Wee Sin Tan
  • Patent number: 7989950
    Abstract: An integrated circuit packaging system includes: attaching a carrier, having a carrier top side and a carrier bottom side, and an interconnect without an active device attached to the carrier bottom side; and forming a first encapsulation, having a cavity, around the interconnect over the carrier top side with the interconnect partially exposed from the first encapsulation and with the carrier top side partially exposed with the cavity.
    Type: Grant
    Filed: August 14, 2008
    Date of Patent: August 2, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: DongSam Park, Dongjin Jung
  • Patent number: 7981722
    Abstract: A semiconductor device and a fabrication method thereof are provided. A semiconductor device which is packaged as it includes a semiconductor in which an electronic circuit is disposed, the semiconductor device including: a substrate; a semiconductor chip which has a semiconductor main body having the electronic circuit formed thereon, a pad electrode formed on the semiconductor main body and a projected electrode that is connected to the pad electrode and projected from a surface of the semiconductor main body, wherein the semiconductor chip is mounted on the substrate from the back side of the surface to form the projected electrode thereon; and an insulating layer which is formed as the semiconductor chip buried therein and is polished from a top surface of the insulating layer to a height at which a top of the projected electrode is exposed.
    Type: Grant
    Filed: January 7, 2008
    Date of Patent: July 19, 2011
    Assignee: Sony Corporation
    Inventor: Osamu Yamagata
  • Patent number: 7982238
    Abstract: A light-emitting diode (LED) is provided, wherein the LED comprises an epitaxial structure, a bonding layer and a composite substrate. The composite substrate comprises a patterned substrate having a pattern and a conductive material layer disposed around the patterned substrate. The bonding layer is formed on the composite substrate. The epitaxial structure is formed on the bonding layer.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: July 19, 2011
    Assignee: Epistar Corporation
    Inventors: Chang-Hsing Chu, Kui-Hui Yu, Shi-Ming Chen
  • Publication number: 20110170396
    Abstract: In the present invention, to improve CD read/write characteristics having poor image height characteristics, a third light emitting source emitting a third laser beam for CD is disposed on an optical axis of an objective lens. Thereby, the third laser beam emitted from the third light emitting source travels along the optical axis of the objective lens, thus generating no coma aberration in the third laser beam. Furthermore, in the present invention, a second light emitting source emitting a second laser beam for DVD and a first light emitting source emitting a first laser beam for BD are disposed across the third light emitting source. Thereby the phase propagation directions of coma aberrations in the first and second laser beams coincide with each other. Adjustment of the coma aberration in one of the laser beams enables the coma aberration in the other laser beam to be adjusted.
    Type: Application
    Filed: January 7, 2011
    Publication date: July 14, 2011
    Applicants: SANYO Electric Co., Ltd.
    Inventors: Ryoichi KAWASAKI, Tohru Hotta
  • Patent number: 7977126
    Abstract: A method for manufacturing an organic light emitting device including a photo diode and a transistor includes forming a first semiconductor layer and a second semiconductor layer on separate portions of a buffer layer formed on the substrate; forming a gate metal layer on the first semiconductor layer, the gate metal layer covering a central region of the first semiconductor layer; forming a high-concentration P doping region and a high-concentration N doping region in the first semiconductor layer by injecting impurities into regions of the first semiconductor layer not covered by the gate metal layer to form the photodiode; forming a source and drain region and a channel region in the second semiconductor layer; and removing the gate metal layer from the central region of the first semiconductor layer by etching and simultaneously forming a gate electrode by etching, the gate electrode being insulated from the channel region of the second semiconductor layer, to form the transistor.
    Type: Grant
    Filed: April 7, 2008
    Date of Patent: July 12, 2011
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Yun-gyu Lee, Hye-hyang Park, Ki-ju Im, Byoung-deog Choi
  • Publication number: 20110164850
    Abstract: In a manufacturing method of a housing-integrated optical semiconductor component, an optical device (26, 27) is packaged on a lead frame (24, 25) having a leg portion (28), and a periphery of the optical device (26, 27) is scaled by an optically transmissive material, whereby an optical semiconductor component (22) is manufactured. Thereafter, a housing (23) is integrally molded to the optical semiconductor component (22) so that the housing (23) covers a portion (30) of the optical semiconductor component, which is sealed by the optically transmissive material.
    Type: Application
    Filed: August 22, 2008
    Publication date: July 7, 2011
    Inventors: Wataru Matsuo, Kazuya Ikegaya, Tatsuzo Torii
  • Patent number: 7972881
    Abstract: A heat spreader for an LED can include a thermally conductive and optically transparent member. The bottom side of the heat spreader can be configured to attach to a light emitting side of the LED. The top and/or bottom surface of the heat spreader can have a phosphor layer formed thereon. The heat spreader can be configured to conduct heat from the LED to a package. The heat spreader can be configured to conduct heat from the phosphors to the package. By facilitating the removal of heat from the LED and phosphors, more current can be used to drive the LED. The use of more current facilitates the construction of a brighter LED, which can be used in applications such as flashlights, displays, and general illumination. By facilitating the removal of heat from the phosphors, desired colors can be better provided.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: July 5, 2011
    Assignee: Bridgelux, Inc.
    Inventor: Wei Shi
  • Patent number: 7968869
    Abstract: Optoelectronic device modules, arrays optoelectronic device modules and methods for fabricating optoelectronic device modules are disclosed. The device modules are made using a starting substrate having an insulator layer sandwiched between a bottom electrode made of a flexible bulk conductor and a conductive back plane. An active layer is disposed between the bottom electrode and a transparent conducting layer. One or more electrical contacts between the transparent conducting layer and the back plane are formed through the transparent conducting layer, the active layer, the flexible bulk conductor and the insulating layer. The electrical contacts are electrically isolated from the active layer, the bottom electrode and the insulating layer.
    Type: Grant
    Filed: October 4, 2008
    Date of Patent: June 28, 2011
    Assignee: Nanosolar, Inc.
    Inventors: James R. Sheats, Sam Kao, Martin R. Roscheisen
  • Patent number: 7964885
    Abstract: A white light emitting device including: a blue light emitting diode chip having a dominant wavelength of 443 to 455 nm; a red phosphor disposed around the blue light emitting diode chip, the red phosphor excited by the blue light emitting diode chip to emit red light; and a green phosphor disposed around the blue light emitting diode chip, the green phosphor excited by the blue light emitting diode chip to emit green light, wherein the red light emitted from the red phosphor has a color coordinate falling within a space defined by four coordinate points (0.5448, 0.4544), (0.7079, 0.2920), (0.6427, 0.2905) and (0.4794, 0.4633) based on the CIE 1931 chromaticity diagram, and the green light emitted from the green phosphor has a color coordinate falling within a space defined by four coordinate points (0.1270, 0.8037), (0.4117, 0.5861), (0.4197, 0.5316) and (0.2555, 0.5030) based on the CIE 1931 color chromaticity diagram.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: June 21, 2011
    Assignee: Samsung LED Co., Ltd.
    Inventors: Chul Hee Yoo, Young June Jeong, Young Sam Park, Seong Yeon Han, Ho Yeon Kim, Hun Joo Hahm, Hyung Suk Kim
  • Patent number: 7964936
    Abstract: Electronic device packages with electromagnetic compatibility (EMC) coating thereon are presented. An electronic device package includes a chip scale package having a CMOS image sensor (CIS) array chip and a set of lenses configured with an aperture. An encapsulation is molded overlying the chip scale package. A shield is atop the encapsulation. A frame fixes the set of lenses to the encapsulation. An electromagnetic compatibility (EMC) coating is formed on the encapsulation to prevent electromagnetic interference.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: June 21, 2011
    Assignee: VisEra Technologies Company Limited
    Inventors: Shin-Chang Shiung, Tzu-Han Lin, Chieh-Yuan Cheng, Li-Hsin Tseng
  • Patent number: 7960196
    Abstract: Provided are a light-emitting element and a light-emitting device, and methods of fabricating the same. The method of fabricating a light-emitting element includes forming a buffer layer on a substrate and forming photonic crystal patterns and a pad pattern on the buffer layer. Each of the pad pattern and the photonic crystal patterns are made of a metal material, and the pad pattern is physically connected to the photonic crystal patterns. Forming a light-emitting structure includes sequentially stacking a first conductive pattern of a first conductivity type, a light-emitting pattern, and a second conductive pattern of a second conductivity type on the buffer layer. And the method also includes forming a first electrode that is electrically connected to the first conductive pattern and forming a second electrode that is electrically connected to the second conductive pattern.
    Type: Grant
    Filed: August 10, 2009
    Date of Patent: June 14, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yu-Sik Kim
  • Patent number: 7955881
    Abstract: In the method of fabricating a quantum well structure which includes a well layer and a barrier layer, the well layer is grown at a first temperature on a sapphire substrate. The well layer comprises a group III nitride semiconductor which contains indium as a constituent. An intermediate layer is grown on the InGaN well layer while monotonically increasing the sapphire substrate temperature from the first temperature. The group III nitride semiconductor of the intermediate layer has a band gap energy larger than the band gap energy of the InGaN well layer, and a thickness of the intermediate layer is greater than 1 nm and less than 3 nm in thickness. The barrier layer is grown on the intermediate layer at a second temperature higher than the first temperature. The barrier layer comprising a group III nitride semiconductor and the group III nitride semiconductor of the barrier layer has a band gap energy larger than the band gap energy of the well layer.
    Type: Grant
    Filed: July 9, 2009
    Date of Patent: June 7, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Akita, Takamichi Sumitomo, Yohei Enya, Takashi Kyono, Masaki Ueno
  • Patent number: 7954215
    Abstract: A method for manufacturing an acceleration sensing unit includes: providing an element support substrate in which a plurality of element supporting members is arranged so as to form a plane, each of the element supporting members being coupled to the other element supporting member through a supporting part and having a fixed part and a movable part that is supported by the fixed part through a beam, the beam having a flexibility with which the movable part is displaced along an acceleration detection axis direction when an acceleration is applied to the movable part; providing an stress sensing element substrate in which a plurality of stress sensing elements is arranged so as to form a plane, each of the stress sensing elements being coupled to the other stress sensing element through an element supporting part and having a stress sensing part and fixed ends that are formed so as to have a single body with the stress sensing part at both ends of the stress sensing part; disposing the stress sensing element
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: June 7, 2011
    Assignee: Epson Toyocom Corporation
    Inventor: Yoshikuni Saito
  • Publication number: 20110127431
    Abstract: A photoconductor device and a method of manufacturing the same are provided. The photoconductor device includes a photoconductor substrate, a photoconductor thin film deposited on the photoconductor substrate, and a photoconductive antenna electrode formed on the photoconductor thin film. The photoconductor thin film includes polycrystalline GaAs.
    Type: Application
    Filed: May 26, 2010
    Publication date: June 2, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventor: Mun Cheol PAEK
  • Publication number: 20110127546
    Abstract: The present invention relates to a reflective and/or refractive secondary lens system for focusing sunlight onto semiconductor elements, the secondary lens system being characterised according to the invention by a projection which is disposed around the basic body forming the secondary lens system. Furthermore, the present invention relates to a semiconductor assembly which includes the secondary lens system according to the invention, and also to a method for the production of this semiconductor assembly. In particular, this semiconductor assembly represents a concentrating solar cell module.
    Type: Application
    Filed: December 22, 2008
    Publication date: June 2, 2011
    Applicant: FRAUNHOFER-GESELLSCHAFT ZUR FOERDERLING DERANGEWAN FORSCHUNG E.V.
    Inventors: Joachim Jaus, Andreas Bett, Michael Passig, Gerhard Peharz, Peter Nitz, Wolfgang Graf
  • Patent number: 7951624
    Abstract: A method of manufacturing light emitting diode has steps of providing a package base, providing a light emitting structure and bonding the light emitting structure on the package base. The package base has a first metal layer and a second metal layer respectively formed on a top and a bottom thereon. The light emitting structure has a substrate, a light emitting lamination and a reflective metal layer. The light emitting lamination is formed on the substrate and has an n-type semiconductor layer, a light emitting layer, a p-type semiconductor layer and a transparent electrode layer deposited on the substrate in sequence. The reflective metal layer is formed on a bottom of the substrate. The first metal layer is connected to the reflective metal layer by an ultrasonic thermal press technique. Therefore, the thermal resistance of the finished LED reduces.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: May 31, 2011
    Assignee: He Shan Lide Electronic Enterprise Company Ltd.
    Inventors: Ben Fan, Hsin-Chuan Weng, Kuo-Kuang Yeh
  • Patent number: 7943403
    Abstract: AN LED chip package body provides an LED chip with a pad-installed surface, a plurality of pads disposed on the pad-installed surface and a rear surface formed opposite the pad-installed surface. The LED chip package body further has a light-reflecting coating disposed on the pad-installed surface of the LED chip and a plurality of pad-exposed holes for exposure of the corresponding pads of the LED chip. The LED chip package body further comprises a light-transparent element disposed on the rear surface of the LED chip and a plurality of conductive projecting blocks. Each of the conductive projecting blocks is disposed on the corresponding pad of the LED chip.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: May 17, 2011
    Assignee: Suzhou Industrial Park Tony Lighting Technology Co., Ltd.
    Inventor: Yu-Nung Shen
  • Patent number: 7943408
    Abstract: The present invention is related to a surface-mounting ceramic LED package and a method for its production comprising: layering a ceramic green sheet which has a hole and a second ceramic green sheet, inserting a mold with a groove to form a partition in the bottom of the ceramic green sheet substrate, and firing the ceramic green sheet substrate.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: May 17, 2011
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: Naoto Nakajima, Shuichi Tsunoda, Akira Inaba
  • Publication number: 20110108856
    Abstract: This disclosure relates to an organic solar cell and an organic light emitting diode stack. The stack comprises a solar cell portion having a substrate, an electrode, an active layer, and a second electrode. The stack also comprises a light emitting diode portion having a substrate, an electrode, an active layer, and a second electrode. The solar cell portion is laminated to the light emitting diode portion to form a stack. In a variation, the stack comprises a solar cell portion that includes a substrate, an electrode and an active layer. In this variation, there is a connection portion that includes a second substrate, having a second electrode on one side and a third electrode on the other side of the second substrate. Also in this variation, there is also a light emitting diode portion, which includes a third substrate, an electrode on the third substrate and a second active layer.
    Type: Application
    Filed: November 9, 2009
    Publication date: May 12, 2011
    Applicant: SOLARMER ENERGY, INC.
    Inventors: Yue Wu, Travis Currier, Yuyi Li, Szu-Ting Tsai
  • Patent number: 7935570
    Abstract: A semiconductor device has a first insulation layer formed over a sacrificial substrate. A first conductive layer is formed over the first insulating layer. Conductive pillars are formed over the first conductive layer. A pre-fabricated IPD is disposed between the conductive pillars. An encapsulant is formed around the IPD and conductive pillars. A second insulation layer is formed over the encapsulant. The conductive pillars are electrically connected to the first and second conductive layers. The first and second conductive layers each include an inductor. Semiconductor devices are mounted over the first and second insulating layer and electrically connected to the first and second conductive layers, respectively. An interconnect structure is formed over the first and second insulating layers, respectively, and electrically connected to the first and second conductive layers. The sacrificial substrate is removed.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: May 3, 2011
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Yaojian Lin, Jianmin Fang, Kang Chen, Haijing Cao
  • Publication number: 20110089438
    Abstract: Provided is a method of providing an opto-electrical assembly. The method comprises attaching a second electrical element to a carrier using a second attachment region at a second attaching temperature. The second attaching temperature is associated with the melting temperature of the second attachment region, such as the melting temperature of solder or the like. The carrier already comprises a first opto-electrical element having been attached to the carrier using a first attachment region at a first attaching temperature, whereby the first attaching temperature is associated with the melting temperature of the first attachment region. The method is provided such that the second attachment region has a lower melting temperature than the first attachment region such that the second attaching temperature is lower than the first attaching temperature.
    Type: Application
    Filed: October 19, 2009
    Publication date: April 21, 2011
    Applicant: ZARLINK SEMICONDUCTOR AB
    Inventors: Odd Robert Steijer, Hans Magnus Emil Andersson, Asa Christina Johansson, Lennart Per Olof Lundqvist, Sylvia Anna-Karin Ek, Maria Elisabeth Källén
  • Publication number: 20110085760
    Abstract: Provided is an optical device. The optical device includes a substrate having a waveguide region and a mounting region, a planar lightwave circuit (PLC) waveguide including a lower-clad layer and an upper-clad layer on the waveguide region of the substrate and a platform core between the lower-clad layer and the upper-clad layer, a terrace defined by etching the lower-clad layer on the mounting region of the substrate, the terrace including an interlocking part, an optical active chip mounted on the mounting region of the substrate, the optical active chip including a chip core therein, and a chip alignment mark disposed on a mounting surface of the optical active chip. The optical active chip is aligned by interlocking between the interlocking part of the terrace and the chip alignment mark of the optical active chip and mounted on the mounting region.
    Type: Application
    Filed: February 11, 2010
    Publication date: April 14, 2011
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Young-Tak HAN, Sang Ho Park, Dong-Hun Lee, Jang Uk Shin, Sang-Pil Han, Yongsoon Baek
  • Patent number: 7923277
    Abstract: The present invention is related to a surface-mounting ceramic LED package and a method for its production comprising: layering a ceramic green sheet which has a hole and a second ceramic green sheet, inserting a mold with a groove to form a partition in the bottom of the ceramic green sheet substrate, and firing the ceramic green sheet substrate.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: April 12, 2011
    Assignee: E.I. du Pont de Nemours and Company
    Inventors: Naoto Nakajima, Shuichi Tsunoda, Akira Inaba
  • Patent number: 7919337
    Abstract: Optoelectronic device modules, arrays optoelectronic device modules and methods for fabricating optoelectronic device modules are disclosed. The device modules are made using a starting substrate having an insulator layer sandwiched between a bottom electrode made of a flexible bulk conductor and a conductive back plane. An active layer is disposed between the bottom electrode and a transparent conducting layer. One or more electrical contacts between the transparent conducting layer and the back plane are formed through the transparent conducting layer, the active layer, the flexible bulk conductor and the insulating layer. The electrical contacts are electrically isolated from the active layer, the bottom electrode and the insulating layer.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: April 5, 2011
    Assignee: Nanosolar, Inc.
    Inventors: James R. Sheats, Sam Kao, Martin R. Roscheisen
  • Patent number: 7915619
    Abstract: A transparent-substrate light-emitting diode (10) has a light-emitting layer (133) made of a compound semiconductor, wherein the area (A) of a light-extracting surface having formed thereon a first electrode (15) and a second electrode (16) differing in polarity from the first electrode (15), the area (B) of a light-emitting layer (133) formed as approximating to the light-extracting surface and the area (C) of the back surface of a light-emitting diode falling on the side opposite the side for forming the first electrode (15) and the second electrode (16) are so related as to satisfy the relation of A>C>B. The light-emitting diode (10) of this invention, owing to the relation of the area of the light-emitting layer (133) and the area of the back surface (23) of the transparent substrate and the optimization of the shape of a side face of the transparent substrate (14), exhibits high brightness and high exoergic property never attained heretofore and fits use with an electric current of high degree.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: March 29, 2011
    Assignee: Showa Denko K.K.
    Inventors: Wataru Nabekura, Ryouichi Takeuchi
  • Publication number: 20110057129
    Abstract: Various embodiments of a package-on-package optical sensor comprising three distinct different packages are disclosed. The three different packages are combined to form the optical proximity sensor, where the first package is a light emitter package, the second package is a light detector package, and the third package is an integrated circuit package. First and second infrared light pass components are molded or casted atop the light emitter package and the light detector package after they have been mounted atop the integrated circuit package. An infrared light cut component is then molded or casted between and over portions of the light emitter package and the light detector package.
    Type: Application
    Filed: September 10, 2009
    Publication date: March 10, 2011
    Applicant: Avago Technologies ECBU (Singapore) Pte. Ltd.
    Inventors: Yufeng Yao, Chi Boon Ong
  • Publication number: 20110057108
    Abstract: Various embodiments of a compact optical proximity sensor with a ball grid array and windowed or apertured substrate are disclosed. In one embodiment, the optical proximity sensor comprises a printed circuit board (“PCB”) substrate comprising an aperture and a lower surface having electrical contacts disposed thereon, an infrared light emitter and an infrared light detector mounted on an upper surface of the substrate, an integrated circuit located at least partially within the aperture, a molding compound being disposed between portions of the integrated circuit and substrate, an ambient light detector mounted on an upper surface of the integrated circuit, first and second molded infrared light pass components disposed over and covering the infrared light emitter and the infrared light detector, respectively, and a molded infrared light cut component disposed between and over portions of the first and second infrared light pass components.
    Type: Application
    Filed: September 10, 2009
    Publication date: March 10, 2011
    Applicant: Avago Technologies ECBU (Singapore) Pte. Ltd.
    Inventors: Yufeng Yao, Chi Boon Ong, Wee Sin Tan