Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged Semiconductor Patents (Class 438/25)
  • Publication number: 20120207426
    Abstract: A chip system and method includes a photonics chip and an electrical integrated circuit (IC) flip-chip coupled to the photonics chip to form an optochip. The IC or the photonics chip includes an array of bond pads for attachment to the other. The optochip has an array of bond pads for subsequent attachment to a carrier where the photonics chip includes an exposed edge to connect with at least one waveguide.
    Type: Application
    Filed: February 16, 2011
    Publication date: August 16, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: FUAD E. DOANY, BENJAMIN G. LEE, CLINT L. SCHOW
  • Patent number: 8242518
    Abstract: A solid state light sheet and method of fabricating the sheet are disclosed. In one embodiment, bare LED chips have top and bottom electrodes, where the bottom electrode is a large reflective electrode. The bottom electrodes of an array of LEDs (e.g., 500 LEDs) are bonded to an array of electrodes formed on a flexible bottom substrate. Conductive traces are formed on the bottom substrate connected to the electrodes. A transparent top substrate is then formed over the bottom substrate. Various ways to connect the LEDs in series are described along with many embodiments. In one method, the top substrate contains a conductor pattern that connects to LED electrodes and conductors on the bottom substrate.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: August 14, 2012
    Assignee: Quarkstar LLC
    Inventors: Louis Lerman, Allan Brent York, Michael David Henry, Robert Steele, Brian D. Ogonowsky
  • Publication number: 20120199761
    Abstract: Provided is an optical pickup device with which a short-circuit can be released from above and below. The optical pickup device (15) is provided with: a housing (15B) formed by ejecting a resin material in a prescribed shape; an actuator (15D) that is positioned on the top surface of the housing (15B) so as to hold an objective lens (17); a circuit board (15A) that is fixed to the main surface of the housing (15B); and a connector (15C) that is attached to the top surface of the circuit board (15A). A second short-circuit part (25) and a first short-circuit part (24) are disposed on the top surface and the bottom surface of the circuit board (15A), and a built-in light-emitting chip is protected from electrostatic discharge damage by shorting either one of the short-circuit parts.
    Type: Application
    Filed: June 13, 2011
    Publication date: August 9, 2012
    Inventors: Keita Takanashi, Noriyuki Hiramatsu
  • Patent number: 8232573
    Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The semiconductor device is electrically connected to the conductive trace and thermally connected to the heat spreader. The heat spreader is aluminum and includes a post and a base. The post extends upwardly from the base into an opening in the adhesive, and the base extends laterally from the post. The adhesive extends between the post and the conductive trace and between the base and the conductive trace. The conductive trace includes a silver coating and a copper core and provides signal routing between a pad and a terminal.
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: July 31, 2012
    Assignee: Bridge Semiconductor Corporation
    Inventors: Charles W. C. Lin, Chia-Chung Wang
  • Patent number: 8222054
    Abstract: There is provided an LED light source whose chromaticity can be adjusted easily without changing its outer shape and suffering damage in the process of chromaticity adjustment. An LED light source includes an LED device, a fluorescent material that absorbs and wavelength-converts a portion of light emitted from the LED device to emit light from itself, a sealing material that includes the fluorescent material and that is disposed around the LED device, and light scattering sections that are formed at a portion of a surface of the sealing material and scatter a portion of the light emitted from the LED device for adjusting chromaticity of the LED light source, and a chromaticity adjustment method for such LED light source.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: July 17, 2012
    Assignee: Citizen Holdings Co., Ltd.
    Inventor: Keisuke Sakai
  • Patent number: 8217482
    Abstract: Disclosed are various embodiments of an infrared proximity sensor package comprising an infrared transmitter die, an infrared receiver die, a housing comprising outer sidewalls, a first recess, a second recess and a partitioning divider disposed between the first and second recesses. The transmitter die is positioned in the first recess, the receiver die is positioned within the second recess, and at least the partitioning divider of the housing comprises liquid crystal polymer (LCP) such that infrared light internally-reflected within the housing in the direction of the partitioning divider is substantially attenuated or absorbed by the LCP contained therein.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: July 10, 2012
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Suresh Basoor, Peng Yam Ng, Deng Peng Chen
  • Publication number: 20120168776
    Abstract: To prevent a point defect and a line defect in forming a light-emitting device, thereby improving the yield. A light-emitting element and a driver circuit of the light-emitting element, which are provided over different substrates, are electrically connected. That is, a light-emitting element and a driver circuit of the light-emitting element are formed over different substrates first, and then electrically connected. By providing a light-emitting element and a driver circuit of the light-emitting element over different substrates, the step of forming the light-emitting element and the step of forming the driver circuit of the light-emitting element can be performed separately. Therefore, degrees of freedom of each step can be increased, and the process can be flexibly changed. Further, steps (irregularities) on the surface for forming the light-emitting element can be reduced than in the conventional technique.
    Type: Application
    Filed: March 9, 2012
    Publication date: July 5, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Osamu Nakamura, Miyuki HIGUCHI, Yasuko WATANABE, Yasuyuki Arai
  • Patent number: 8212264
    Abstract: A module and method of its production in which areal electronic components are formed. The module includes (a) a cover electrode covering the electronic components; (b) a flexibly deformable substrate; (c) a base electrode formed on the substrate; and (d) an optically active layer formed on the base electrode. The electronic components are formed on the flexibly deformable substrate by the optically active layer, the cover electrode; and the base electrode. The cover electrode projects over the optically active layer at a first side and the base electrode extends beyond the optically active layer at a second side which is oppositely disposed with regards to the first side.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: July 3, 2012
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der Angewandten Forschung E.V.
    Inventor: Olaf Ruediger Hild
  • Patent number: 8202742
    Abstract: A light emitting device is produced by depositing a layer of wavelength converting material over the light emitting device, testing the device to determine the wavelength spectrum produced and correcting the wavelength converting member to produce the desired wavelength spectrum. The wavelength converting member may be corrected by reducing or increasing the amount of wavelength converting material. In one embodiment, the amount of wavelength converting material in the wavelength converting member is reduced, e.g., through laser ablation or etching, to produce the desired wavelength spectrum.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: June 19, 2012
    Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company, LLC
    Inventors: Steven Paolini, Michael D. Camras, Oscar A. Chao Pujol, Frank M. Steranka, John E. Epler
  • Publication number: 20120138961
    Abstract: A semiconductor package structure includes a package substrate, at least a chip, solder balls, a light emitting/receiving device, a optical intermediary device and an optical transmission device. The package substrate has a first surface, a second surface, a circuit and solder ball pads, wherein each solder ball pad is electrically connected to the circuit. The chip is disposed on the first surface and electrically connected to the circuit. The solder balls are respectively disposed on the solder ball pads. The light emitting/receiving device is disposed on the package substrate and electrically connected to the circuit. The optical intermediary device is disposed above the light emitting/receiving device. The optical transmission device is inserted in the optical intermediary device, wherein a light emitting by the light emitting/receiving device is emitted to the optical transmission device via the optical intermediary device so that an optical signal is transmitted through the optical transmission device.
    Type: Application
    Filed: December 7, 2010
    Publication date: June 7, 2012
    Applicant: FARADAY TECHNOLOGY CORP.
    Inventors: Po-Yao Huang, Chia-Yu Jin, Yeong-Jar Chang
  • Patent number: 8193012
    Abstract: A method of fabricating a LED module by: bonding one or multiple LED chips and multiple conducting terminals to a circuit substrate, and then molding a packing cup on the circuit substrate over by over molding for enabling the LED chip(s) and the conducting terminals to be exposed to the outside of the packing cup, and then molding a lens on the packing cup and the LED chip(s) by over-molding. By means of directly molding the lens on the packing cup and the LED chip(s), no any gap is left in the lens, avoiding deflection, total reflection or light attenuation and enhancing luminous brightness and assuring uniform distribution of output light.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: June 5, 2012
    Assignee: KWO Ger Metal Technology, Inc.
    Inventor: Hsuan-Chih Lin
  • Publication number: 20120132793
    Abstract: A proximity sensor includes a sensor package having an attachment pad with a radiation source and a radiation detector housed within the sensor package. The source and the detector are held in a fixed relation to the attachment pad, and are mounted by one of a direct or indirect attachment to the attachment pad. A portion of the attachment pad is adapted to form a baffle which forms at least part of an optical isolator. The optical isolator is adapted to substantially prevent the internal propagation of radiation between the source and the detector within the sensor package.
    Type: Application
    Filed: September 23, 2011
    Publication date: May 31, 2012
    Applicant: STMicroelectronics (Research & Development) Limited
    Inventors: Colin Campbell, Ewan Findlay
  • Patent number: 8187899
    Abstract: An LED package structure for increasing light-emitting efficiency and controlling light-projecting angle includes a substrate unit, a light-emitting unit, a light-reflecting unit and a package unit. The substrate unit has a substrate body and a chip-placing area disposed on a top surface of the substrate body. The light-emitting unit has a plurality of LED chips electrically disposed on the chip-placing area. The light-reflecting unit has an annular reflecting resin body surroundingly formed on the top surface of the substrate body by coating. The annular reflecting resin body surrounds the LED chips that are disposed on the chip-placing area to form a resin position limiting space above the chip-placing area. The package unit has a translucent package resin body disposed on the top surface of the substrate body in order to cover the LED chips. The position of the translucent package resin body is limited in the resin position limiting space.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: May 29, 2012
    Assignee: Paragon Semiconductor Lighting Technology Co., Ltd.
    Inventors: Chia-Tin Chung, Chao-Chin Wu, Fang-Kuei Wu
  • Patent number: 8187920
    Abstract: One aspect of the present invention relates to an integrated circuit package that includes multiple layers of a planarizing, photo-imageable epoxy that are formed over a substrate. In some designs, the substrate is a silicon wafer. An integrated circuit is embedded in the epoxy. An antenna, which is electrically coupled to the active face of the integrated circuit through an interconnect layer, is formed over one of the epoxy layers. In various embodiments, at least some of the epoxy layers are positioned between the substrate and the antenna such that there is a distance of at least approximately 100 microns between the substrate and the antenna.
    Type: Grant
    Filed: February 7, 2011
    Date of Patent: May 29, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Anuraag Mohan, Peter Smeys
  • Patent number: 8178895
    Abstract: A semiconductor light-emitting device can include a submount on which a semiconductor light-emitting element is mounted. The device can have a high light utilization efficiency with high reliability and can achieve a reduction in manufacturing cost as well as a decrease in size. The submount can have a reverse trapezoidal cross section having an upper surface that is larger than a bottom surface of the semiconductor light-emitting element. An adhesive can be used to fix the submount to the base board such that, when the submount is observed from above the semiconductor light-emitting element, the adhesive is not seen from above. In this state, the semiconductor light-emitting element can be connected to the base board via a bonding wire.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: May 15, 2012
    Assignee: Stanley Electric Co., Ltd.
    Inventor: Kaori Namioka
  • Patent number: 8178888
    Abstract: A packaged light emitting device (LED) includes a light emitting diode configured to emit primary light having a peak wavelength that is less than about 465 nm and having a shoulder emission component at a wavelength that is greater than the peak wavelength, and a wavelength conversion material configured to receive the primary light emitted by the light emitting diode and to responsively emit light having a color point with a ccx greater than about 0.4 and a ccy less than about 0.6.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: May 15, 2012
    Assignee: Cree, Inc.
    Inventor: Arpan Chakraborty
  • Publication number: 20120101540
    Abstract: A medical device includes a first substrate, a second substrate, a control module, and an energy storage device. The first substrate includes at least one of a first semiconductor material and a first insulating material. The second substrate includes at least one of a second semiconductor material and a second insulating material. The second substrate is bonded to the first substrate such that the first and second substrates define an enclosed cavity between the first and second substrates. The control module is disposed within the enclosed cavity. The control module is configured to at least one of determine a physiological parameter of a patient and deliver electrical stimulation to the patient. The energy storage device is disposed within the cavity and is configured to supply power to the control module.
    Type: Application
    Filed: January 28, 2011
    Publication date: April 26, 2012
    Applicant: MEDTRONIC, INC.
    Inventors: Richard J. O'Brien, John K. Day, Paul F. Gerrish, Michael F. Mattes, David A. Ruben, Malcolm K. Grief
  • Publication number: 20120097983
    Abstract: Re-emitting semiconductor constructions (RSCs) for use with LEDs, and related devices, systems, and methods are disclosed. A method of fabrication includes providing a semiconductor substrate, forming on a first side of the substrate a semiconductor layer stack, attaching a carrier window to the stack, and removing the substrate after the attaching step. The stack includes an active region adapted to convert light at a first wavelength ?1 to visible light at a second wavelength ?2, the active region including at least a first potential well. The attaching step is carried out such that the stack is disposed between the substrate and the carrier window, which is transparent to the second wavelength ?2. The carrier window may also have a lateral dimension greater than that of the stack. The removal step is carried out so as to provide an RSC carrier device that includes the carrier window and the stack.
    Type: Application
    Filed: May 3, 2010
    Publication date: April 26, 2012
    Applicant: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Terry L. Smith, Catherine A. Leatherdale, Michael A. Haase, Thomas J. Miller, Xiaoguang Sun, Zhaohui Yang, Todd A. Ballen, Amy S. Barnes
  • Patent number: 8158987
    Abstract: A transparent-substrate light-emitting diode (10) has a light-emitting layer (133) made of a compound semiconductor, wherein the area (A) of a light-extracting surface having formed thereon a first electrode (15) and a second electrode (16) differing in polarity from the first electrode (15), the area (B) of a light-emitting layer (133) formed as approximating to the light-extracting surface and the area (C) of the back surface of a light-emitting diode falling on the side opposite the side for forming the first electrode (15) and the second electrode (16) are so related as to satisfy the relation of A>C>B. The light-emitting diode (10) of this invention, owing to the relation of the area of the light-emitting layer (133) and the area of the back surface (23) of the transparent substrate and the optimization of the shape of a side face of the transparent substrate (14), exhibits high brightness and high exoergic property never attained heretofore and fits use with an electric current of high degree.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: April 17, 2012
    Assignee: Showa Denko K.K.
    Inventors: Wataru Nabekura, Ryouichi Takeuchi
  • Publication number: 20120086023
    Abstract: Certain example embodiments of this invention relate to techniques for improving the performance of Lambertian and non-Lambertian light sources. In certain example embodiments, this is accomplished by (1) providing an organic-inorganic hybrid material on LEDs (which in certain example embodiments may be a high index of refraction material), (2) enhancing the light scattering ability of the LEDs (e.g., by fractal embossing, patterning, or the like, and/or by providing randomly dispersed elements thereon), and/or (3) improving performance through advanced cooling techniques. In certain example instances, performance enhancements may include, for example, better color production (e.g., in terms of a high CRI), better light production (e.g., in terms of lumens and non-Lambertian lighting), higher internal and/or external efficiency, etc.
    Type: Application
    Filed: October 8, 2010
    Publication date: April 12, 2012
    Applicant: Guardian Industries Corp.
    Inventors: Vijayen S. Veerasamy, Jemssy Alvarez
  • Patent number: 8153458
    Abstract: Image sensing devices and methods for fabricating the same are provided. An exemplary image sensing device comprises a first substrate having a first side and a second side opposing each other. A plurality of image sensing elements is formed in the first substrate at the first side. A conductive via is formed through the first substrate, having a first surface exposed by the first substrate at the first side and a second surface exposed by the first substrate at the second side. A conductive pad overlies the conductive via at the first side and is electrically connecting the image sensing elements. A conductive layer overlies the conductive via at the second side and electrically connects with the conductive pad. A conductive bump is formed over a portion of the conductive layer. A second substrate is bonded with the first substrate at the first side.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: April 10, 2012
    Assignee: Visera Technologies Company Limited
    Inventors: Jui-Ping Weng, Tzu-Han Lin, Pai-Chun Peter Zung
  • Patent number: 8148745
    Abstract: A light emitting module includes a semiconductor light source, a first lead with a bonding pad to which the light source is attached, and a second lead spaced from the first lead in a first direction contained in the plane of the first die bonding pad. The second lead includes a wire bonding pad connected to the light source via a wire. The module also includes a case formed with a space elongated in the first direction for accommodating the light source. The first lead includes an extension extending from the first die bonding pad, and a mounting terminal connected to the extension. The extension extends in a second direction that is perpendicular to the first direction and contained in the plane of the first die bonding pad. The mounting terminal extends perpendicularly to the second direction. The extension overlaps the light source in the first direction.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: April 3, 2012
    Assignee: Rohm Co., Ltd.
    Inventors: Masahiko Kobayakawa, Shintaro Yasuda
  • Patent number: 8143608
    Abstract: Various embodiments of a package-on-package optical sensor comprising three distinct different packages are disclosed. The three different packages are combined to form the optical proximity sensor, where the first package is a light emitter package, the second package is a light detector package, and the third package is an integrated circuit package. First and second infrared light pass components are molded or casted atop the light emitter package and the light detector package after they have been mounted atop the integrated circuit package. An infrared light cut component is then molded or casted between and over portions of the light emitter package and the light detector package.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: March 27, 2012
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Yufeng Yao, Chi Boon Ong
  • Patent number: 8141786
    Abstract: A Smart Card module with flip-assembled chip (101) on a metallic strap (112) adhering to an insulating substrate (111). Chip (101) is in the gap (122) of a metal carrier (120), strap (112) conductively attached to the carrier. Carrier (120) is designed to practically surround the chip, and has a thickness about equal to the chip thickness. Overall module thickness is less than 250 ?m without dangerously thinning the chip. Additional strength may be acquired by filling any space of gap (122) not occupied by chip (101) with encapsulation compound (150). Metal carrier (120) further provides contact areas (120a, 120b) for higher level system interconnection (stacking of modules).
    Type: Grant
    Filed: January 18, 2008
    Date of Patent: March 27, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Sarvotham Bhandarkar, Hoang Hoang
  • Patent number: 8138025
    Abstract: A method of fabricating an apparatus including a sealed cavity and an apparatus embodying the method are disclosed. To fabricate the apparatus, a device chip including a substrate and at least one circuit element on the substrate is fabricated. Also, a cap is fabricated. Next, the device chip and the cap are bonded such that a sealed cavity is formed by the device chip and the cap. The bond is accomplished using thermo compression technique. Gold or other suitable metal can be used as a bonding agent. Then or at the same time, caulking agent is reflowed over the bonding agent, over portions of the cap, or both to further seal the cavity. In the resultant device, the sealed cavity is sealed by the bonding agent, the caulking agent, or both. The caulking agent increases hermeticity of the cavity and provides for even higher level of protection of the cavity against adverse environmental conditions.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: March 20, 2012
    Assignee: Avago Technologies Wireless IP (Singapore) Pte. Ltd.
    Inventor: R Shane Fazzio
  • Patent number: 8137999
    Abstract: A method for fabricating a LED includes: providing a metal substrate; etching the metal substrate to form a first terminal, a second terminal, and a gap between the first terminal and the second terminal, wherein the first terminal has at least one first etching concave and the second terminal has at least one second etching concave; placing at least one LED chip in the at least one first etching concave, wherein the at least one LED chip has a first electrode and a second electrode; electrically connecting the first electrode with the first terminal, and electrically connecting the second electrode with the second terminal; and then covering the at least one LED chip with synthetic polymer, wherein the synthetic polymer is filled into the at least one first etching concave, the at least one second etching concave and the gap to connect the first terminal with the second terminal.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: March 20, 2012
    Assignee: Harvatek Corporation
    Inventors: Bily Wang, Jonnie Chuang, Hui-Yen Huang
  • Patent number: 8134160
    Abstract: An embodiment of the present invention has an insulating substrate in which a first concave hole for mounting an LED chip and a second concave hole for connecting a metallic small-gauge wire are formed, where a metallic sheet that serves as a first wiring pattern is formed at a portion that includes the first concave hole, a metallic sheet that serves as a second wiring pattern is formed at a portion that includes the second concave hole, an LED chip is mounted upon the metallic sheet inside the first concave hole, the LED chip is electrically connected to the metallic sheet inside the second concave hole via a metallic small-gauge wire, and the chip-type LED is sealed with a clear resin.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: March 13, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Makoto Matsuda
  • Patent number: 8129739
    Abstract: In a semiconductor light emitting device having a matrix of a plurality of bumps composed of one n-bump formed on an n-electrode layer and of a large number of p-bumps formed on p-electrode layers, the occurrence of a faulty junction after mounting can be suppressed by placement of the n-bump at center of the bump array, because the position at the center is most resistant to occurrence of stress after the mounting. Employment of such a configuration of bump array increases reliability of mounting thereof while improving uniformity of light emission intensity in the semiconductor light emitting device having an increased size.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: March 6, 2012
    Assignee: Panasonic Corporation
    Inventors: Kazushi Higashi, Shinji Ishitani
  • Publication number: 20120051000
    Abstract: A MMIC package is disclosed comprising: a leadframe based overmolded package, a die positioned within the overmolded package; and a partial waveguide interface, wherein the partial waveguide interface is integral with the overmolded package facilitating low cost and reliable assembly. Also disclosed is an overmolded package where the die sits on a metal portion exposed on the bottom of the package and the package is configured for attachment to a chassis of a transceiver such that heat from the die is easily dissipated to the chassis with a direct thermal path. The disclosure facilitates parallel assembly of MMIC packages and use of pick and place/surface mounting technology for attaching the MMIC packages to the chassis of transceivers. This facilitates reliable and low cost transceivers.
    Type: Application
    Filed: August 30, 2011
    Publication date: March 1, 2012
    Applicant: VIASAT, INC.
    Inventors: David R. Laidig, Kenneth V. Buer, Michael R. Lyons, Noel Lopez
  • Patent number: 8114690
    Abstract: Aspects concerning a method of making electrical contact to a region of semiconductor in which one or more LEDs are formed include that a dielectric region can be formed on a p region of the semiconductor, and that a metallic electrode can be formed on (at least partially on) the region of dielectric material. A transparent layer of a material such as Indium Tin Oxide can be used to make ohmic contact between the semiconductor and the metallic electrode, as the metallic electrode is separated from physical contact with the semiconductor by one or more of the dielectric material and the transparent ohmic contact layer (e.g., ITO layer). The dielectric material can enhance total internal reflection of light and reduce an amount of light that is absorbed by the metallic electrode.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: February 14, 2012
    Assignee: Bridgelux, Inc.
    Inventors: Frank T. Shum, William W. So, Steven D. Lester
  • Patent number: 8115226
    Abstract: An electrode structure is disclosed for enhancing the brightness and/or efficiency of an LED. The electrode structure can have a metal electrode and an dielectric material formed intermediate the electrode and a light emitting semiconductor material. Electrical continuity between the semiconductor material and the metal electrode is provided by an optically transmissive ohmic contact layer, such as a layer of Indium Tin Oxide. The metal electrode thus can be physically separated from the semiconductor material by one or more of the dielectric material and the ohmic contact layer. The dielectric layer can increase total internal reflection of light at the interface between the semiconductor and the dielectric layer, which can reduce absorption of light by the electrode. Such LED can have enhanced utility and can be suitable for uses such as general illumination.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: February 14, 2012
    Assignee: Bridgelux, Inc.
    Inventors: Frank T. Shum, William W. So, Steven D. Lester
  • Patent number: 8114689
    Abstract: The present invention relates to a method for manufacturing a light emitting diode (LED) chip for a chip on board and a method for manufacturing an LED light source module in a chip on board fashion. The method of the present invention includes forming a plurality of LED chips on a wafer, molding a region of each LED chip, cutting the wafer into each LED chip, and testing each LED chip for operating characteristics.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: February 14, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun Jeong Kang, Gi Cherl Kim, Moon Hwan Chang, Eun Chae Jeon, Young Keun Lee
  • Patent number: 8110419
    Abstract: An inline process for manufacturing a photovoltaic device on a removable substrate is disclosed. The process discloses two semiconductor layers forming an active region; at least one of the semiconductor layers is formed by a high-purity plasma spray process; optional layers include a release layer, one or more barrier layers, a cap layer, a conductive support layer, a mechanical support layer, an anti-reflection layer, and distributed Bragg reflector. The process may also be used to form multiple active regions.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: February 7, 2012
    Assignee: Integrated Photovoltaic, Inc.
    Inventors: Sharone Zehavi, Jerome S. Culik
  • Patent number: 8110842
    Abstract: A method for manufacturing a light-emitting diode (LED) module is provided. Plural LED package structures are formed on a substrate first. A space is located between two adjacent LED package structures. A Lens laminated plate is subsequently bonded onto the LED package structures. The lens laminated plate includes plural lenses, and each lens is located right above a LED of each LED package structure. Finally, plural LED modules are formed by cutting the substrate along the space. A LED module structure is also disclosed.
    Type: Grant
    Filed: July 12, 2007
    Date of Patent: February 7, 2012
    Assignee: Everlight Electronics Co., Ltd.
    Inventor: Ssu-Yuan Weng
  • Publication number: 20120025209
    Abstract: A system includes an optical transceiver assembly, including a flip chip connection of a semiconductor die with a photonic transceiver that overhangs a substrate to which it is to be connected. The assembly further includes an alignment pin that is held to the semiconductor die at a micro-engineered structure in the semiconductor die. The alignment pin provides passive alignment of the photonic transceiver with an optical lens that interfaces the photonic transceiver to one or more optical channels.
    Type: Application
    Filed: July 27, 2010
    Publication date: February 2, 2012
    Inventors: Brian H. Kim, Simon S. Lee
  • Patent number: 8105857
    Abstract: A method for fabricating a III-nitride semiconductor laser device includes: forming a substrate product having a laser structure; scribing a first surface of the substrate product to form a scribed mark, which extends along a reference line indicative of a direction of the a-axis of the hexagonal III-nitride semiconductor, on the first surface, a scribed mark; mounting the substrate product on a breaking device to support first and second regions of the substrate product by first and second support portions, respectively, of the breaking device; and carrying out breakup of the substrate product by press in alignment with the scribed mark in a third region, without supporting the third region of the substrate product located between the first and second regions, to form another substrate product and a laser bar. First and second end faces of the laser bar form a laser cavity of the III-nitride semiconductor laser device.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: January 31, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shimpei Takagi, Yusuke Yoshizumi, Koji Katayama, Masaki Ueno, Takatoshi Ikegami
  • Patent number: 8101962
    Abstract: A carrying structure of semiconductor includes a carrier made of a plastic material with a heat conduction region, each surface of the carrier has an interface layer formed on, and an electrically insulation circuit and a metal layer are defined on the interface layer. The insulation circuit is located on the surface of the heat conduction region and on an encircling annular region extended from two surfaces of the heat conduction region, and at the same time exposing parts of the carrier surface thereby splitting the metal layer on the interface layer into at least two electrodes. A thermal conductor formed in the heat conduction region has a LED chip adhered on it which has at least a contact point connected with the corresponding metal layer with a metal wiring so as to dissipate the heat generated by the chip rapidly with the thermal conductor.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: January 24, 2012
    Assignee: Kuang Hong Precision Co., Ltd.
    Inventor: Cheng-Feng Chiang
  • Patent number: 8097898
    Abstract: The outer peripheral portion of a substrate is provided with a first peripheral edge and a second peripheral edge. The first peripheral edge is provided on the edge portion of a first upper surface of the substrate on which a light-emitting diode element is mounted. The second peripheral edge is formed either on an extension of an imaginary line connecting an edge of the light-emitting facet of the light-emitting diode element and the first peripheral edge or inwardly of the extension. The second peripheral edge is located at a position where the first peripheral edge blocks direct light from the light-emitting diode element. This configuration prevents the second upper surface of the substrate provided between the first peripheral edge and the second peripheral edge from becoming deteriorated due to the direct light.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: January 17, 2012
    Assignee: Citizen Electronics Co., Ltd.
    Inventor: Nodoka Oishi
  • Patent number: 8097894
    Abstract: A submount wafer, having mounted on it an array of LEDs with a phosphor layer, is positioned with respect to a mold having an array of indentions. A mixture of silicone and 10%-50%, by weight, TiO2, is dispensed between the wafer and the indentions, creating a molded substantially reflective material. The molded mixture forms a reflective wall covering the sidewalls of the LED. The reflective material is then cured, and the submount wafer is separated from the mold such that the reflective material covering the sidewalls contains light emitted from the LED. The submount wafer is then diced. A piece (e.g., a reflector, support bracket, etc.) may then be affixed to the submount so the LED protrudes through a center hole in the piece. The inner edge of the piece is easily formed so that it is located at any height above or below the top surface of the LED.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: January 17, 2012
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Serge J. Bierhuizen, Gregory W. Eng
  • Patent number: 8097476
    Abstract: This invention discloses a light emitting diode, a wafer level package method, a wafer level bonding method, and a circuit structure for a wafer level package. The light emitting diode includes a package carrier, a conducting material, at least one light emitting diode structure and a package material. The package carrier has at least one package unit and two through holes on the package carrier and corresponding to the package unit. The conducting material is disposed in the through holes and formed at the bottom of the package unit. The light emitting diode structure is formed on a substrate. The substrate having a light emitting diode structure is flipped over in the package unit, and the electrodes of the light emitting diode structure are bonded with the conducting material. After the substrate is removed, a package material is stuffed in the package unit or on the light emitting diode structure.
    Type: Grant
    Filed: May 16, 2007
    Date of Patent: January 17, 2012
    Assignees: Epileds Technologies Inc., Silicon Base Developmen Inc.
    Inventors: Charng-Shyang Jong, Ming-Sen Hsu, Chin-Fu Ku, Chih-Ming Chen, Deng-Huei Hwang
  • Patent number: 8088647
    Abstract: Methods, systems, and apparatuses for an integrated circuit package assembly process are provided. A wafer is received having a surface defined by a plurality of integrated circuit regions. Electrical conductors are accessible through corresponding first openings in a first passivation layer on the surface of the wafer. Solderable metal layer features are formed on the electrical conductors through the first openings. The wafer is singulated to form a plurality of flip chip dies. A plurality of package substrates is received. Each package substrate has a plurality of solder on pad (SOP) features on a respective surface. Each flip chip die is mounted to a corresponding package substrate such that each SOP feature is coupled to a corresponding solderable metal layer feature, to form a plurality of integrated circuit packages.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: January 3, 2012
    Assignee: Broadcom Corporation
    Inventors: Kunzhong (Kevin) Hu, Edward Law
  • Patent number: 8088635
    Abstract: There are provided a vertical geometry light emitting diode package aggregate useful for the production of a light emitting device having a vertical geometry light emitting diode as the light source, the light emitting device satisfying requirements in terms of current capacity flowed for light emission, dissipation of heat generated due to flow of a large current, resistance to thermal stress, strength of device and light emission efficiency, and a method for producing a light emitting device having a vertical geometry light emitting diode as the light source by using the package aggregate.
    Type: Grant
    Filed: October 16, 2007
    Date of Patent: January 3, 2012
    Assignee: C.I. Kasei Company, Limited
    Inventors: Hiroshi Fushimi, Kengo Nishiyama, Kouji Kudou, Itsuki Yamamoto, Kazuma Mitsuyama
  • Patent number: 8090229
    Abstract: A MEMS-based display device is described, wherein an array of interferometric modulators are configured to reflect light through a transparent substrate. The transparent substrate is sealed to a backplate and the backplate may contain electronic circuitry fabricated on the backplane. The electronic circuitry is placed in electrical communication with the array of interferometric modulators and is configured to control the state of the array of interferometric modulators.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: January 3, 2012
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventor: Karen Tyger
  • Patent number: 8084777
    Abstract: An apparatus having a substrate, an LED light source attached to the substrate, an electrical connector attached to the substrate and electrically connected to the LED light source, a potting material on the substrate and covering at least a portion of the electrical connector; and a barrier separating the potting material from the LED light source, the barrier having a height that exceeds the thickness of the potting material on the substrate.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: December 27, 2011
    Assignee: Bridgelux, Inc.
    Inventor: Jason Posselt
  • Publication number: 20110309893
    Abstract: Provided is an in-millimeter-wave dielectric transmission device. The in-millimeter-wave dielectric transmission device includes a semiconductor chip provided on one interposer substrate and capable of in-millimeter-wave dielectric transmission, an antenna structure connected to the semiconductor chip, two semiconductor packages including a molded resin configured to cover the semiconductor chip and the antenna structure, and a dielectric transmission path provided between the two semiconductor packages to transmit a millimeter wave signal. The semiconductor packages are mounted such that the antenna structures thereof are arranged with the dielectric transmission path interposed therebetween.
    Type: Application
    Filed: December 8, 2009
    Publication date: December 22, 2011
    Applicant: SONY CORPORATION
    Inventors: Hirofumi Kawamura, Yasuhiro Okada
  • Patent number: 8080444
    Abstract: A method of placing a die includes providing an embedded plane. The embedded plane has a openings, grid lines, and protruding portions. Each of the plurality of openings are surrounding by a subset of the plurality of grid lines. At least one of the protruding portions extends into one of the openings. A die is placed into one of the openings and at least one of the protruding portions bends during such placement so that it is in contact with at least a portion of a minor surface of the die.
    Type: Grant
    Filed: January 14, 2010
    Date of Patent: December 20, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Vijay Sarihan
  • Patent number: 8080442
    Abstract: The Vertical System Integration (VSI) invention herein is a method for integration of disparate electronic, optical and MEMS technologies into a single integrated circuit die or component and wherein the individual device layers used in the VSI fabrication processes are preferably previously fabricated components intended for generic multiple application use and not necessarily limited in its use to a specific application. The VSI method of integration lowers the cost difference between lower volume custom electronic products and high volume generic use electronic products by eliminating or reducing circuit design, layout, tooling and fabrication costs.
    Type: Grant
    Filed: June 21, 2008
    Date of Patent: December 20, 2011
    Assignee: Elm Technology Corporation
    Inventor: Glenn J Leedy
  • Publication number: 20110297831
    Abstract: In an embodiment, the invention provides a proximity sensor including a transmitter die, a receiver die, an ASIC die, a lead frame, wire bonds, a first transparent encapsulant, a second transparent encapsulant, and an opaque encapsulant. The transmitter die, the receiver die and the ASIC die are attached to portions of the lead frame. Wire bonds electrically connect the transmitter die, the receiver die, the ASIC die, and the lead frame. The first transparent encapsulant covers the receiver die, the ASIC die, the wire bonds, and a portion of the lead frame. The second transparent encapsulant covers the transmitter die, the wire bonds, and a portion of the lead frame. The opaque encapsulant covers portions of the first and second encapsulants and a portion of the lead frame.
    Type: Application
    Filed: June 8, 2010
    Publication date: December 8, 2011
    Applicant: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Yufeng Yao, Chi Boon Ong, Rani Saravanan
  • Patent number: 8071987
    Abstract: A housing for an optoelectronic component is disclosed, having a plastic base body that has a front side with an assembly region for at least one radiation emitting or radiation detecting body, wherein the plastic base body is formed from at least one first plastic component and at least one second plastic component. The second plastic component is disposed on the front side of the plastic base body, and is formed from a material that differs from the first plastic component in at least one optical property, and forms an optically functional region of the plastic base body. Further, a method for producing a housing for an optoelectronic component and a light emitting diode component is disclosed.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: December 6, 2011
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Georg Bogner
  • Patent number: RE43112
    Abstract: A stackable FBGA package is configured such that conductive elements are placed along the outside perimeter of an integrated circuit (IC) device mounted to the FBGA. The conductive elements also are of sufficient size so that they extend beyond the bottom or top surface of the IC device, including the wiring interconnect and encapsulate material, as the conductive elements make contact with the FBGA positioned below or above to form a stack. The IC device, such as a memory chip, is mounted upon a first surface of a printed circuit board substrate forming part of the FBGA. Lead wires are used to attach the IC device to the printed board substrate and encapsulant is used to contain the IC device and wires within and below the matrix and profile of the conductive elements.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: January 17, 2012
    Assignee: Round Rock Research, LLC
    Inventors: David J. Corisis, Jerry M. Brooks, Walter L. Moden