Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged Semiconductor Patents (Class 438/25)
  • Publication number: 20140038322
    Abstract: An electronic device comprising at least one die stack having at least a first die (D1) comprising a first array of light emitting units (OLED) for emitting light, a second layer (D2) comprising a second array of via holes (VH) and a third die (D3) comprising a third array of light detecting units (PD) for detecting light from the first array of light emitting units (OELD) is provided. The second layer (D2) is arranged between the first die (D1) and the third die (D3). The first, second and third array are aligned such that light emitted from the first array of light emitting units (OLED) passed through the second array of via holes (VH) and is detected by the third array of light detecting units (PD). The first array of light emitting units and/or the third array of light detecting units are manufactured based on standard semiconductor manufacturing processes.
    Type: Application
    Filed: October 22, 2013
    Publication date: February 6, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Fred Roozeboom, Herbert Lifka, Fredrik Vanhelmont, Wouter Dekkers
  • Publication number: 20140021491
    Abstract: In certain embodiments, a semiconductor package includes a leadframe, a light emitter die disposed on the leadframe, and a light detector die disposed on the leadframe adjacent to the light emitter die. In some embodiments, a first transparent molding compound is disposed over the light emitter die and a second transparent molding compound is disposed over the light detector die. The first and second transparent molding compound may be disposed such that a space between them forms a cavity between the die and above the leadframe. In other embodiments a transparent molding compound is disposed simultaneously over the light emitter and light detector die and a subsequent material removal process forms a cavity within the compound between the die. In both embodiments, an opaque molding compound is disposed in the cavity between the die, and is configured to block optical cross-talk between the light emitter and light detector die.
    Type: Application
    Filed: January 28, 2013
    Publication date: January 23, 2014
    Applicant: CARSEM (M) SDN. BHD.
    Inventors: Chan Boon Meng, Lee Yoke Foo, Kum Chun Cheong
  • Patent number: 8630326
    Abstract: A hybrid integrated optical device includes a substrate comprising a silicon layer and a compound semiconductor device bonded to the silicon layer. The device also includes a bonding region disposed between the silicon layer and the compound semiconductor device. The bonding region includes a metal-semiconductor bond at a first portion of the bonding region. The metal-semiconductor bond includes a first pad bonded to the silicon layer, a bonding metal bonded to the first pad, and a second pad bonded to the bonding metal and the compound semiconductor device. The bonding region also includes an interface assisted bond at a second portion of the bonding region. The interface assisted bond includes an interface layer positioned between the silicon layer and the compound semiconductor device, wherein the interface assisted bond provides an ohmic contact between the silicon layer and the compound semiconductor device.
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: January 14, 2014
    Assignee: Skorpios Technologies, Inc.
    Inventors: Stephen B. Krasulick, John Dallesasse
  • Patent number: 8629475
    Abstract: In accordance with certain embodiments, semiconductor dies are embedded within polymeric binder to form, e.g., freestanding white light-emitting dies and/or composite wafers containing multiple light-emitting dies embedded in a single volume of binder.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: January 14, 2014
    Assignee: Cooledge Lighting Inc.
    Inventor: Michael A. Tischler
  • Patent number: 8628983
    Abstract: Disclosed herein is a light emitting diode. The light emitting diode includes a support substrate, semiconductor layers formed on the support substrate, and a metal pattern located between the support substrate and the lower semiconductor layer. The semiconductor layers include an upper semiconductor layer of a first conductive type, an active layer, and a lower semiconductor layer of a second conductive type. The semiconductor layers are grown on a sacrificial substrate and the support substrate is homogeneous with the sacrificial substrate.
    Type: Grant
    Filed: February 7, 2012
    Date of Patent: January 14, 2014
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Won Cheol Seo, Chang Youn Kim, Yeo Jin Yoon
  • Patent number: 8624268
    Abstract: A light emitting device package is provided. The light emitting device package comprises a substrate comprising a plurality of protrusions, an insulating layer on the substrate, a metal layer on the insulating layer, and a light emitting device on the substrate electrically connected to the metal layer.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: January 7, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Bum Chul Cho, Jin Soo Park
  • Patent number: 8624370
    Abstract: A method of manufacture of an integrated circuit packaging system includes: mounting a device over an integrated circuit having a through via; attaching an interposer, having an opening, and the integrated circuit with the device within the opening; and forming an encapsulation at least partially covering the integrated circuit and the interposer facing the integrated circuit.
    Type: Grant
    Filed: March 20, 2009
    Date of Patent: January 7, 2014
    Assignee: Stats Chippac Ltd.
    Inventors: HeeJo Chi, NamJu Cho, Taewoo Lee
  • Patent number: 8611388
    Abstract: A composite integrated optical device includes a substrate including a silicon layer and a waveguide disposed in the silicon layer. The composite integrated optical device also includes an optical detector bonded to the silicon layer and a bonding region disposed between the silicon layer and the optical detector. The bonding region includes a metal-assisted bond at a first portion of the bonding region. The metal-assisted bond includes an interface layer positioned between the silicon layer and the optical detector. The bonding region also includes a direct semiconductor-semiconductor bond at a second portion of the bonding region.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: December 17, 2013
    Assignee: Skorpios Technologies, Inc.
    Inventors: Stephen B. Krasulick, John Dallesasse
  • Patent number: 8610150
    Abstract: A leadframe includes two spaced apart conductive legs, each of which includes a base section, and a first extension section extending from a bottom end of the base section in a direction away from the other one of the conductive legs. At least one of the conductive legs further includes a second extension section that extends from a top end of the base section thereof in the same direction as the first extension section for fixing the light-emitting diode chip. The heat generated by the light-emitting diode chip can be dissipated through a shortest heat-dissipating route, thereby increasing the heat-dissipating rate.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: December 17, 2013
    Assignee: Lextar Electronics Corporation
    Inventors: Wei-An Chen, Yen-Chih Chou
  • Publication number: 20130330851
    Abstract: A method for manufacturing a nerve-stimulating and signal-monitoring device includes the steps of forming a first silicon oxide layer on a surface of a flexible substrate; forming a patterned doped p-type poly-silicon layer on the first silicon oxide layer; forming a second silicon oxide layer on the patterned doped p-type poly-silicon layer; forming a circuit layer on the second silicon oxide layer; forming a plurality of openings on the second silicon oxide layer; forming a gold layer on the circuit layer and on the plurality of contact pads on the patterned doped p-type poly-silicon layer; attaching a chip to the plurality of chip pads of the circuit layer by using a flip-chip bonding technology; forming a plurality of through holes on the at least one probe pad; and securely and correspondingly attaching a plurality of stimulation probes into the plurality of through holes.
    Type: Application
    Filed: August 12, 2013
    Publication date: December 12, 2013
    Applicant: CHUNG HUA UNIVERSITY
    Inventor: Jium Ming LIN
  • Publication number: 20130330034
    Abstract: An optical system includes a silicon substrate, a 45-degree or 54.7-degree reflector formed in the silicon substrate, deeply etched double U-shape trenches formed in the silicon substrate, a thin film disposed on the reflector surface with total or partial optical refection, a top and bottom surface contacted p-i-n structure formed in the silicon substrate for optical power monitoring, a plurality of rectangular or wedge shaped spacers formed on top surface of the silicon substrate, and a surface emitting light source flip-chip bonded on the silicon substrate via the spacers.
    Type: Application
    Filed: June 12, 2012
    Publication date: December 12, 2013
    Applicant: LAXENSE INC.
    Inventors: Ningning Feng, Xiaochen Sun, Dawei Zheng
  • Patent number: 8602661
    Abstract: In a manufacturing method of a housing-integrated optical semiconductor component, an optical device (26, 27) is packaged on a lead frame (24, 25) having a leg portion (28), and a periphery of the optical device (26, 27) is sealed by an optically transmissive material, whereby an optical semiconductor component (22) is manufactured. Thereafter, a housing (23) is integrally molded to the optical semiconductor component (22) so that the housing (23) covers a portion (30) of the optical semiconductor component, which is sealed by the optically transmissive material.
    Type: Grant
    Filed: August 22, 2008
    Date of Patent: December 10, 2013
    Assignee: Yazaki Corporation
    Inventors: Wataru Matsuo, Kazuya Ikegaya, Tatsuzo Torii
  • Patent number: 8604597
    Abstract: The present technology discloses a multi-die package. The package comprises a lead frame structure and three dies including a first flip chip die, a second flip chip die and a third flip chip die stacked vertically. The first flip chip die is mounted on the bottom surface of the lead frame structure through the flip chip bumps; the second flip chip is mounted on the top surface of the first flip chip die through flip chip bumps; and the third flip chip die is mounted on the top surface of the lead frame structure through flip chip bumps.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: December 10, 2013
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Hunt Hang Jiang
  • Patent number: 8604605
    Abstract: A method of forming a microelectronic assembly includes positioning a support structure adjacent to an active region of a device but not extending onto the active region. The support structure has planar sections. Each planar section has a substantially uniform composition. The composition of at least one of the planar sections differs from the composition of at least one of the other planar sections. A lid is positioned in contact with the support structure and extends over the active region. The support structure is bonded to the device and to the lid.
    Type: Grant
    Filed: January 5, 2007
    Date of Patent: December 10, 2013
    Assignee: Invensas Corp.
    Inventors: Michael J. Nystrom, Giles Humpston
  • Patent number: 8586421
    Abstract: A semiconductor device package includes a semiconductor device having connection pads formed thereon, with the connection pads being formed on first and second surfaces of the semiconductor device with edges of the semiconductor device extending therebetween. A first passivation layer is applied on the semiconductor device and a base dielectric laminate is affixed to the first surface of the semiconductor device that has a thickness greater than that of the first passivation layer. A second passivation layer having a thickness greater than that of the first passivation layer is applied over the first passivation layer and the semiconductor device to cover the second surface and the edges of the semiconductor device, and metal interconnects are coupled to the connection pads, with the metal interconnects extending through vias formed through the first and second passivation layers and the base dielectric laminate sheet to form a connection with the connection pads.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: November 19, 2013
    Assignee: General Electric Company
    Inventors: Richard Alfred Beaupre, Paul Alan McConnelee, Arun Virupaksha Gowda, Thomas Bert Gorczyca
  • Publication number: 20130292706
    Abstract: An optical proximity sensor is provided that comprises an infrared light emitter an infrared light detector, a first molded optically transmissive infrared light pass component disposed over and covering the light emitter and a second molded optically transmissive infrared light pass component disposed over and covering the light detector. Located in-between the light emitter and the first molded optically transmissive infrared light pass component, and the light detector and the second molded optically transmissive infrared light pass component is a gap. Layers of infrared opaque, attenuating or blocking material are disposed on at least some of the external surfaces forming the gap to substantially attenuate or block the transmission of undesired direct, scattered or reflected light between the light emitter and the light detector, and thereby minimize optical crosstalk and interference between the light emitter and the light detector.
    Type: Application
    Filed: July 2, 2013
    Publication date: November 7, 2013
    Inventors: James Costello, Rani Ramamoorthy Saravanan, Boon Keat Tan
  • Publication number: 20130292553
    Abstract: The present invention is an optical proximity sensor and manufacturing method thereof. The optical proximity sensor has an optical sensing unit, an illuminating unit, multiple transparent gels and a package. The package encapsulates the optical sensing unit and the illuminating unit. The transparent gels are respectively formed on top surfaces of the optical sensing unit and the illuminating unit. The transparent gels respectively have a convex part and a recess formed in the convex part. The package has through holes communicating with the recesses of the transparent gels to form openings. In a step of injecting encapsulant gel, because the transparent gels are still plastic, the protrusions can closely attach to the transparent gels. The encapsulant gel is prevented from forming above the sensing part and the illuminating part.
    Type: Application
    Filed: February 18, 2013
    Publication date: November 7, 2013
    Inventors: Yi-Hua Chang, Sue-Ping Lin, Chun-Chi Chen, Tsung-Yu Hung
  • Patent number: 8573469
    Abstract: A method of fabricating and transferring a micro device and an array of micro devices to a receiving substrate are described. In an embodiment, an electrically insulating layer is utilized as an etch stop layer during etching of a p-n diode layer to form a plurality of micro p-n diodes. In an embodiment, an electrically conductive intermediate bonding layer is utilized during the formation and transfer of the micro devices to the receiving substrate.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: November 5, 2013
    Assignee: LuxVue Technology Corporation
    Inventors: Hsin-Hua Hu, Andreas Bibl, John A. Higginson, Hung-Fai Stephen Law
  • Patent number: 8569080
    Abstract: A method of packaging a light emitting diode comprising: providing a flexible substrate with a heat-conducting layer, an insulating layer covering on a surface of the heat-conducting layer and an electrically conductive layer positioned on the insulating layer; etching the conductive layer to form a gap in the conductive layer and expose a part of the insulating layer, the conductive layer being separated by the gap into a first electrode and a second electrode isolated from each other; stamping the flexible substrate with a mold at the position of the gap to form a recess in the flexible substrate; positioning a light emitting element on the conductive layer and electrically connecting the light emitting element to the conductive layer; and forming an encapsulation to cover the light emitting element.
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: October 29, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Li-Hsiang Chen, Hsin-Chiang Lin, Pin-Chuan Chen
  • Patent number: 8564012
    Abstract: A method for manufacturing an optoelectronic apparatus includes attaching bottom surfaces of first and second packaged optoelectronic semiconductor devices (POSDs) to a carrier substrate (e.g., a tape) so that there is a space between the first and second POSDs. An opaque molding compound is molded around portions of the first and second POSDs attached to the carrier substrate, so that peripheral surfaces of the first POSD and the second POSD are surrounded by the opaque molding compound, the space between the first and second POSDs is filled with the opaque molding compound, and the first and second POSDs are attached to one another by the opaque molding compound. The carrier substrate is thereafter removed so that electrical contacts on the bottom surfaces of the first and second POSDs are exposed. A window for each of the POSDs is formed during the molding process or thereafter.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: October 22, 2013
    Assignee: Intersil Americas LLC
    Inventors: Seshasayee S. Ankireddi, Lynn K. Wiese
  • Patent number: 8564001
    Abstract: A first device that may include one or more organic light emitting devices. At least 65 percent of the photons emitted by the organic light emitting devices are emitted from an organic phosphorescent emitting material. An outcoupling enhancer is optically coupled to each organic light emitting device. In one embodiment, the light panel is not attached to a heat management structure. In one embodiment, the light panel is capable of exhibiting less than a 10 degree C. rise in junction temperature when operated at a luminous emittance of 9,000 lm/m2 without the use of heat management structures, regardless of whether the light panel is actually attached to a heat management structure or not. The light panel may be attached to a heat management structure. The light panel may be not attached to a heat management structure.
    Type: Grant
    Filed: May 18, 2011
    Date of Patent: October 22, 2013
    Assignee: Universal Display Corporation
    Inventors: Michael Hack, Julia J. Brown, Peter Levermore, Michael S. Weaver
  • Publication number: 20130270580
    Abstract: A flat panel display device and method of manufacturing the display device. The display device comprises a first substrate and a connection pad located along a side of the first substrate. A second substrate overlaps with the first substrate, wherein the second substrate does not overlap with an exposed portion of the first substrate. A first contact pad electrically couples the second substrate and the first substrate. A first distance from the side of the first substrate to a boundary between the exposed portion of the first substrate and the second substrate is greater than a second distance from the side of the first substrate to the first contact pad. The display device may be, for example, a touch capable display device that uses the first contact pad to transfer touch sensing signals from the second substrate to the first substrate.
    Type: Application
    Filed: April 10, 2013
    Publication date: October 17, 2013
    Applicant: LG Display Co., Ltd.
    Inventors: Bong Ki CHOI, Kwang Su LIM, Hyo Dae BAE, Chang Nam KIM, Sang Kyu LEE, Joon Won PARK, Kyung Joon YOON
  • Publication number: 20130264586
    Abstract: An optical proximity sensor module includes a substrate, a light emitter mounted on a first surface of the substrate, the light emitter being operable to emit light at a first wavelength, and a light detector mounted on the first surface of the substrate, the light detector being operable to detect light at the first wavelength. The module includes an optics member disposed substantially parallel to the substrate, and a separation member disposed between the substrate and the optics member. The separation member may surround the light emitter and the light detector, and may include a wall portion that extends from the substrate to the optics member and that separates the light emitter and the light detector from one another. The separation member may be composed, for example, of a non-transparent polymer material containing a pigment, such as carbon black.
    Type: Application
    Filed: March 14, 2013
    Publication date: October 10, 2013
    Inventors: Hartmut Rudmann, Alexander Bietsch, Susanne Westenhoefer, Simon Gubser
  • Patent number: 8551003
    Abstract: An ultrasonic probe and an ultrasonic diagnosis device which can improve electrical safety for an operator are provided. The ultrasonic probe 2 has an insulating portion 62 between a mounting board 43 and a case 25. Since electrical leakage from the internal device of the ultrasonic probe 2 can be prevented, electrical safety of the ultrasonic probe 2 for the operator can be improved. A conductive film 61 is provided on the ultrasonic wave radiation side of a cMUT chip 20, and a conductive member 63 is provided along the insulating member 62. A conductive film 61 and a conductive member 63 are connected by a conductive member 64. A closed space having a ground potential is formed by the conductive film 61, the conductive member 63 and a coaxial cable 55 connected to ground. Main components or the body circuits of the ultrasonic probe 2 are contained in the closed space having the ground potential and shielded electrically from the outside.
    Type: Grant
    Filed: May 14, 2008
    Date of Patent: October 8, 2013
    Assignee: Hitachi Medical Corporation
    Inventors: Makoto Fukada, Shuzo Sano, Akifumi Sako
  • Patent number: 8546153
    Abstract: There is provided a resin dispensing apparatus for a light emitting device package and a method of manufacturing a light emitting device package using the same. The resin dispensing apparatus includes a resin dispensing part including a resin storage portion filled with a resin therein and a resin discharge portion combined with the resin storage portion and discharging the resin therefrom; a supporting part having a light emitting device package disposed on an upper surface thereof and electrically connected to the light emitting device package; a voltage applying part having both terminals respectively connected to the resin dispensing part and the supporting part to apply a voltage thereto; and a sensing part electrically connected to the resin dispensing part and the supporting part individually and sensing a contact between the resin dispensing part and the light emitting device package with an electrical signal.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: October 1, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo Yong Kim, Seung Ki Choi, Jee Hun Hong
  • Patent number: 8546262
    Abstract: Disclosed herein is a solid-state image pickup device including: a trench formed in an insulating film above a light-receiving portion; a first waveguide core portion provided on an inner wall side of the trench; a second waveguide core portion filled in the trench via the first waveguide core portion; and a rectangular lens formed of the same material as that of the second waveguide core portion and provided integrally with the second waveguide core portion.
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: October 1, 2013
    Assignee: Sony Corporation
    Inventors: Akiko Ogino, Yukihiro Sayama, Takayuki Shoya, Masaya Shimoji
  • Publication number: 20130248887
    Abstract: An optical electronic package includes transmitting chip and a receiving chip fixed to a wafer. A transparent encapsulation structure is formed by a transparent plate and a transparent encapsulation block that are formed over the transmitter chip and at least a portion of the receiver chip, with the transparent encapsulation block embedding the transmitter chip. An opaque encapsulation block extends over the transparent plate and includes an opening that reveals a front area of the transparent plate. The front area is situated above an optical transmitter of the transmitting chip and is offset laterally relative to an optical sensor of the receiving chip.
    Type: Application
    Filed: March 18, 2013
    Publication date: September 26, 2013
    Applicants: STMICROELECTRONICS PTE LTD, STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Romain Coffy, Eric Saugier, Hk Looi, Norbert Chevrier
  • Patent number: 8530249
    Abstract: In one implementation, a chamber is selected that accommodates an array of die structures that comprises one or more cavities. An inner chamber of the chamber is maintained at a first temperature. An alkali metal source of the chamber is maintained at a second temperature greater than the first temperature. An outer chamber of the chamber is maintained at a third temperature greater than the first temperature and the second temperature. The one or more cavities of the array of die structures are filled with a portion of the alkali metal source. The one or more cavities of the array of die structures are sealed to comprise the portion of the alkali metal source.
    Type: Grant
    Filed: May 16, 2011
    Date of Patent: September 10, 2013
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Henry C. Abbink, William P. Debley, Christine E. Geosling, Daryl K. Sakaida, Robert E. Stewart
  • Patent number: 8525204
    Abstract: A semiconductor light emitting element, including: an n-type semiconductor layer having optical transparency with an emission wavelength of a light emitting layer, the light emitting layer and a p-type semiconductor layer, which are laminated; and a reflection film which is disposed on a side opposite to a surface from which light emitted from the light emitting layer is extracted, wherein the reflection film comprises: a transparent layer having optical transparency with the emission wavelength of the light emitting layer, and a metal layer, which is laminated on the transparent layer on a side opposite to the light emitting layer and is constituted by a metal material having a high reflectance, the transparent layer has a refractive index lower than a refractive index of a layer disposed on a side of the light emitting layer when viewed from the transparent layer, with the emission wavelength, and a thickness of the transparent layer is equal to or more than a value obtained by dividing a value of ¾ of the
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: September 3, 2013
    Assignee: Panasonic Corporation
    Inventors: Hiroshi Fukshima, Kazuyuki Yamae, Masaharu Yasuda, Tomoya Iwahashi, Akihiko Murai
  • Publication number: 20130223800
    Abstract: Self alignment of Optoelectronic (OE) chips, such as photodiode (PD) modules and vertical cavity surface emitting laser (VCSEL) modules, to external waveguides or fiber arrays may be realized by packaging the OE chips directly in the fiber optic connector.
    Type: Application
    Filed: April 2, 2013
    Publication date: August 29, 2013
    Inventor: Edris M. Mohammed
  • Patent number: 8513692
    Abstract: Light-emitting devices, and related components, systems and methods are disclosed.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: August 20, 2013
    Assignee: Luminus Devices, Inc.
    Inventors: Alexei A. Erchak, Elefterios Lidorikis, Chiyan Luo
  • Patent number: 8507930
    Abstract: An organic light emitting diode (OLED) display includes: a first substrate including an OLED; a second substrate that is opposite to the first substrate; a sealant that is positioned between the first substrate and the second substrate and that couples the first substrate and the second substrate; and a sealant contraction reinforcement auxiliary structure that is positioned in at least one of a position between the first substrate and the sealant and a position between the second substrate and the sealant.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: August 13, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byung-Uk Han, Hee-Chul Jeon
  • Patent number: 8502151
    Abstract: Various embodiments of an optical proximity sensor having a lead frame and no overlying metal shield are disclosed. In one embodiment, a light emitter and a light detector are mounted on a lead frame comprising a plurality of discrete electrically conductive elements having upper and lower surfaces, at least some of the elements not being electrically connected to one another. An integrated circuit is die-attached to an underside of the lead frame. An optically-transmissive infrared pass compound is molded over the light detector and the light emitter and portions of the lead frame. Next, an optically non-transmissive infrared cut compound is molded over the optically-transmissive infrared pass compound to provide an optical proximity sensor having no metal shield but exhibiting very low crosstalk characteristics.
    Type: Grant
    Filed: January 31, 2010
    Date of Patent: August 6, 2013
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Yufeng Yao, Junhua He, Wee Sin Tan
  • Patent number: 8501509
    Abstract: A multi-dimensional solid state lighting (SSL) device array system and method are disclosed. An SSL device includes a support, a pillar having several sloped facets mounted to the support, and a flexible substrate pressed against the pillar. The substrate can carry a plurality of solid state emitters (SSEs) facing in various directions corresponding to the sloped facets of the pillar. The flexible substrate can be a flat substrate prepared using planar mounting techniques, such as wirebonding techniques, before bending the substrate against the pillar.
    Type: Grant
    Filed: August 25, 2010
    Date of Patent: August 6, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Alan Mondada, Fernando Gonzalez, Willard L. Hofer
  • Patent number: 8492181
    Abstract: A method of forming an embedded wafer level optical package includes attaching a sensor die, PCB bars and an LED on adhesive tape laminated on a carrier, attaching a dam between two light sensitive sensors of the sensor die, encapsulating the sensor die, the PCB bars, the LED, and the dam in an encapsulation layer, debonding the carrier, grinding a top surface of the encapsulation layer, forming vias through the encapsulation layer to the sensor die and the LED, filling the vias with conductive material, metalizing the top surface of the encapsulation layer, dielectric coating of the top surface of the encapsulation layer, dielectric coating of a bottom surface of the encapsulation layer, patterning the dielectric coating of the bottom surface of the encapsulation layer, and plating the patterned dielectric coating of the bottom surface of the encapsulation layer.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: July 23, 2013
    Assignee: STMicroelectronics Pte Ltd.
    Inventors: Anandan Ramasamy, KahWee Gan, Hk Looi, David Gani
  • Publication number: 20130181232
    Abstract: Various embodiments of methods and devices are provided for an optocoupler comprising an optically reflective compound comprising silicone and inner and outer surfaces. A molding compound surrounds and encapsulates at least portions of the outer surfaces of the optically reflective compound to form an enclosure. A surface functional coating layer is provided in the optically reflective compound to promote adhesion and increase breakdown voltages between inner walls of the enclosure and the outer surfaces of the optically reflective compound.
    Type: Application
    Filed: January 17, 2012
    Publication date: July 18, 2013
    Applicant: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Premkumar Jeromerajan, Gopinath Maasi, Gary Tay Thiam Siew
  • Patent number: 8486731
    Abstract: A light-emitting device includes: a substrate; a light-emitting section provided on an upper surface of the substrate, the light-emitting section including an LED chip and a sealing resin containing fluorescent material covering the LED chip; and a silicon oxide insulating film provided between the substrate and the light-emitting section, the silicon oxide insulating film being formed directly on an upper surface of the substrate or an alumina insulating film, the sealing resin containing fluorescent material formed directly on an upper surface of the silicon oxide insulating film so as to cover the LED chip. Thus, this invention provides the light-emitting device capable of making the sealing resin difficult to be separated from the substrate and a method for manufacturing the light-emitting device.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: July 16, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Nobuyuki Yoshizumi, Shinji Yamaguchi
  • Patent number: 8476644
    Abstract: An optoelectronic component with a semiconductor body includes an active region suitable for generating radiation, and two electrical contacts arranged on the semiconductor body. The contacts are electrically connected to the active region. The contacts each have a connecting face that faces away from the semiconductor body. The contact faces are located on a connection side of the component and a side of the component that is different from the connection side is mirror-coated. A method for the manufacture of multiple components of this sort is also disclosed.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: July 2, 2013
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Stefan Illek, Andreas Ploessl, Alexander Heindl, Patrick Rode, Dieter Eissler
  • Patent number: 8476114
    Abstract: A method for making a housing for an optoelectronic component is disclosed. The housing has a plastic base body that has a front side with an assembly region for at least one radiation emitting or radiation detecting body. The plastic base body is formed from at least one first plastic component and at least one second plastic component. The second plastic component is disposed on the front side of the plastic base body, and is formed from a material that differs from the first plastic component in at least one optical property, and forms an optically functional region of the plastic base body.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: July 2, 2013
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Georg Bogner
  • Publication number: 20130164867
    Abstract: A method of forming an embedded wafer level optical package includes attaching a sensor die, PCB bars and an LED on adhesive tape laminated on a carrier, attaching a dam between two light sensitive sensors of the sensor die, encapsulating the sensor die, the PCB bars, the LED, and the dam in an encapsulation layer, debonding the carrier, grinding a top surface of the encapsulation layer, forming vias through the encapsulation layer to the sensor die and the LED, filling the vias with conductive material, metalizing the top surface of the encapsulation layer, dielectric coating of the top surface of the encapsulation layer, dielectric coating of a bottom surface of the encapsulation layer, patterning the dielectric coating of the bottom surface of the encapsulation layer, and plating the patterned dielectric coating of the bottom surface of the encapsulation layer.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 27, 2013
    Applicant: STMicroelectronics Pte Ltd.
    Inventors: Anandan Ramasamy, KahWee Gan, Hk Looi, David Gani
  • Patent number: 8470619
    Abstract: A method of texturing a surface within or immediately adjacent to a template layer of a LED is described. The method uses a texturing laser directed through a substrate to decompose and pit a semiconductor material at the surface to be textured. By texturing the surface, light trapping within the template layer is reduced. Furthermore, by patterning the arrangement of pits, metal coating each pit can be arranged to spread current through the template layer and thus through the n-doped region of a LED.
    Type: Grant
    Filed: October 21, 2010
    Date of Patent: June 25, 2013
    Assignee: Palo Alto Research Center Incorporated
    Inventors: David P. Bour, Clifford F. Knollenberg, Christopher L. Chua
  • Publication number: 20130153933
    Abstract: An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and a second surface; a sensor region formed in the semiconductor substrate; a light emitting device disposed on the second surface of the semiconductor substrate; at least one first conducting bump disposed on the first surface of the semiconductor substrate and electrically connected to the sensor region; at least one second conducting bump disposed on the first surface of the semiconductor substrate and electrically connected to the light emitting device; and an insulating layer located on the semiconductor substrate to electrically insulate the semiconductor substrate from the at least one first conducting bump and the at least one second conducting bump.
    Type: Application
    Filed: December 19, 2012
    Publication date: June 20, 2013
    Applicant: XINTEC INC.
    Inventor: XINTEC INC.
  • Publication number: 20130153932
    Abstract: A method for manufacturing a photocoupler includes: mounting light emitting devices and light receiving devices on a lead frame sheet; positioning the lead frame sheet with respect to a die by cutting off the one set of column portions from a linking portion and inserting a first pilot pin formed on the die into a second pilot hole; opposing the light emitting devices and the light receiving devices to each other; connecting the light emitting side coupling bars and the light receiving side coupling bars to each other on the die; forming a resin body so as to cover a pair of the light emitting device and the light receiving device; and cutting off the light emitting side lead frame portion from the light emitting column portion and cutting off the light receiving side lead frame portion from the light receiving column portion.
    Type: Application
    Filed: May 18, 2012
    Publication date: June 20, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Teruo Takeuchi, Atsushi Takeshita
  • Patent number: 8461614
    Abstract: A packaging substrate device includes: a first laminate including a first ceramic substrate and a first copper pattern disposed on an upper surface of the first ceramic substrate; and a second laminate disposed over the first copper pattern and including a second ceramic substrate, a second copper pattern that is disposed on an upper surface of the second ceramic substrate, and a through hole extending through the second ceramic substrate and the second copper pattern to expose a copper portion of the first copper pattern. A light emitting semiconductor die can be mounted on the copper portion within the through hole. Efficient heat dissipation can be achieved through the first laminate.
    Type: Grant
    Filed: April 2, 2010
    Date of Patent: June 11, 2013
    Assignee: Tong Hsing Electronic Industries, Ltd.
    Inventors: Wen-Chung Chiang, Keng-Chung Wu, Ying-Chi Hsieh, Cheng-Kang Lu, Ming-Huang Fu
  • Patent number: 8460951
    Abstract: An embodiment of the present invention has an insulating substrate in which a first concave hole for mounting an LED chip and a second concave hole for connecting a metallic small-gauge wire are formed, where a metallic sheet that serves as a first wiring pattern is formed at a portion that includes the first concave hole, a metallic sheet that serves as a second wiring pattern is formed at a portion that includes the second concave hole, an LED chip is mounted upon the metallic sheet inside the first concave hole, the LED chip is electrically connected to the metallic sheet inside the second concave hole via a metallic small-gauge wire, and the chip-type LED is sealed with a clear resin.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: June 11, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Makoto Matsuda
  • Patent number: 8455907
    Abstract: A semiconductor light-emitting device and a method for manufacturing the same can include a wavelength converting layer in order to emit various colored lights including white light. The semiconductor light-emitting device can include a base board, a frame located on the base board, at least one light-emitting chip mounted on the base board, the wavelength converting layer located between an optical plate and each outside surface of the chips so as to extend toward the optical plate using a meniscus control structure, and a reflective material layer disposed at least between the frame and both side surfaces of the wavelength converting layer and the optical plate. The semiconductor light-emitting device can be configured to improve light-emitting efficiency and color variability between the light-emitting chips by using the reflective material layer as each reflector, and therefore can emit a wavelength-converted light having a high light-emitting efficiency from various small light-emitting surfaces.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: June 4, 2013
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Takeshi Waragawa, Kosaburo Ito
  • Patent number: 8450147
    Abstract: A process is described for wavelength conversion of LED light using phosphors. LED dies are tested for correlated color temperature (CCT), and binned according to their color emission. The LEDs in each_bin are mounted on a single submount to form an array of LEDs. Various thin sheets of a flexible encapsulant (e.g., silicone) infused with one or more phosphors are preformed, where each sheet has different color conversion properties. An appropriate sheet is placed over an array of LED mounted on a submount, and the LEDs are energized. The resulting light is measured for CCT. If the CCT is acceptable, the phosphor sheet is permanently laminated onto the LEDs and submount. By selecting a different phosphor sheet for each bin of LEDs, the resulting CCT is very uniform across all bins.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: May 28, 2013
    Assignee: Philips Lumileds Lighting Company LLC
    Inventor: Haryanto Chandra
  • Patent number: 8445926
    Abstract: Disclosed are a LED package, a method of fabricating the same, and a backlight unit having the same. The light emitting diode package comprises a light emitting diode, a printed circuit board provided with a circuit pattern used for driving the light emitting diode and a through hole formed in an area where the light emitting diode is mounted, and a heat sink provided in the through hole and contacted with a bottom surface of the light emitting diode.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: May 21, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Jun Seok Park, Yong Seok Choi
  • Patent number: 8441022
    Abstract: An outer lead connected to an inner lead penetrating a molded resin section, and another outer lead connected to another inner lead penetrating the molded resin section are provided on an outer wall surface of the molded resin section. The outer lead has a surface area greater than that of the another outer lead.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: May 14, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Nobuhiro Nishiyama, Masaaki Katoh
  • Patent number: 8435808
    Abstract: A method for manufacturing a light emitting diode (LED) package is provided. The method includes preparing a package body including a first lead frame formed with a cavity and inserted on one side of a bottom surface of the cavity and a second lead frame inserted on the other side, mounting an LED chip on the bottom surface and electrically connecting the LED chip with the first lead frame and the second lead frame, forming a molding portion by a molding resin in the cavity, connecting, to the package body, a first mold corresponding to the molding portion and including a through hole having an inner surface linearly or non-linearly inclined, connecting a second mold to an upper surface of the first mold, forming a lens portion on the molding portion by a transparent resin, and separating the first mold and the second mold from the package body.
    Type: Grant
    Filed: October 25, 2011
    Date of Patent: May 7, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won Ho Jung, Hun Yong Park, Jung Chul Kang, Kyung Taeg Han