Optical Grating Structure Patents (Class 438/32)
  • Patent number: 9853295
    Abstract: The present invention inexpensively provides an electrode material for a fuel electrode, the electrode material having CO2 resistance and being capable of forming a fuel cell having high electricity generation performance. An electrode material for a fuel electrode, the electrode material constituting a fuel electrode of a fuel cell including a proton-conductive solid electrolyte layer, includes a perovskite-type solid electrolyte component and a nickel (Ni) catalyst component, in which the solid electrolyte component includes a barium component, a zirconium component, a cerium component, and a yttrium component, and the mixture ratio of the zirconium component to the cerium component in the solid electrolyte component is set to be 1:7 to 7:1 in terms of molar ratio.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: December 26, 2017
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takahiro Higashino, Masatoshi Majima, Naho Mizuhara, Chihiro Hiraiwa
  • Patent number: 9184558
    Abstract: An optical semiconductor device, includes: a plurality of first diffraction grating layers disposed at a spacing from each other along first direction above first semiconductor layer, length of a lower surface of each of a plurality of first diffraction gratings along first direction being longer than a length of an upper surface of first diffraction grating; second diffraction grating layer disposed along first direction above first semiconductor layer, first and second diffraction grating layers being alternately disposed at a spacing from each other, a length of an upper surface of second diffraction grating layer along first direction being longer than the length of a lower surface of second diffraction layer; a diffraction grating including first and second diffraction grating layers; a second semiconductor layer disposed between first and second diffraction grating layers and under second diffraction grating layer; and third semiconductor layer disposed on first and second diffraction grating layers.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: November 10, 2015
    Assignee: FUJITSU LIMITED
    Inventor: Takeshi Matsumoto
  • Patent number: 9099613
    Abstract: Aspects include Light Emitting Diodes that have a GaN-based light emitting region and a metallic electrode. The metallic electrode can be physically separated from the GaN-based light emitted region by a layer of porous dielectric, which provides a reflecting region between at least a portion of the metallic electrode and the GaN-based light emitting region.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: August 4, 2015
    Assignee: BRIDGELUX, INC.
    Inventors: Frank T. Shum, William W. So, Steven D. Lester
  • Patent number: 9065239
    Abstract: A top emitting VCSEL array may be coupled to a separate heat spreading superstrate that may be positioned above the apertures of the array and that may be able to transmit the emitted beams through the heat spreading superstrate. The VCSEL devices in the array may be controlled by an electrical connection to a pattern of conductive elements positioned in close contact with, but electrically isolated from, the heat spreading superstrate. The conductive elements may electrically control one or more of the VCSEL devices to enable sectional control of the light output. The elements may also be arraigned in a ground-signal-ground or coplanar waveguide configuration to improve the frequency response of the array.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: June 23, 2015
    Assignee: TriLumina Corp.
    Inventors: John R. Joseph, Kevin L. Lear
  • Patent number: 9040329
    Abstract: A manufacturing method for an LED with roughened lateral surfaces comprises following steps: providing an LED wafer with an electrically conductive layer disposed thereon; providing a photoresist layer on the electrically conductive layer; roughening a lateral surface of the electrically conductive layer by wet etching; forming a depression in the LED wafer by dry etching and roughening a sidewall of the LED wafer defining the depression; and disposing two pads respectively in the depression and the conducting layer. The disclosure also provides an LED with roughened lateral surfaces. A roughness of the roughened lateral surfaces is measurable in micrometers.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: May 26, 2015
    Assignee: Zhongshan Innocloud Intellectual Property Services Co., Ltd.
    Inventors: Chia-Hui Shen, Tzu-Chien Hung
  • Patent number: 9034720
    Abstract: A method and a device are provided for diffracting incident light from a lithographic scanner in an IC process flow. Embodiments include forming a diffraction grating in a first layer on a semiconductor substrate; and forming a plurality of lithographic alignment marks in a second layer, overlying the first layer, wherein the diffraction grating has a width and a length greater than or equal to a width and length, respectively, of the plurality of lithographic alignment marks.
    Type: Grant
    Filed: August 17, 2012
    Date of Patent: May 19, 2015
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Hui Liu, Wen Zhan Zhou, Zheng Zou, Qun Ying Lin, Alex Kai Hung See
  • Patent number: 9029890
    Abstract: A light-emitting device disclosed herein comprises a patterned substrate having a plurality of cones, wherein a space is between two adjacent cones. A light-emitting stack formed on the cones. Furthermore, the cones comprise an area ratio of a top area of the cone and a bottom area of the cone which is less than 0.0064.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: May 12, 2015
    Assignee: Epistar Corporation
    Inventors: Chung-Ying Chang, Dennis Wang, Jenq-Dar Tsay
  • Patent number: 9023677
    Abstract: A method for producing a spot size converter includes the steps of forming a first insulator mask on a stacked semiconductor layer; forming first and second terraces, and a waveguide mesa disposed between the first and second terraces by etching the stacked semiconductor layer using the first insulator mask, the first terrace having first to fourth terrace portions, the second terrace having fifth to eighth terrace portions, the waveguide mesa having first to fourth mesa portions; forming a second insulator mask including a first pattern on the first terrace portion, a second pattern on the fifth terrace portion, a third pattern on the third and fourth mesa portions, and a fourth pattern that integrally covers a region extending from the fourth terrace portion to the eighth terrace portion through the fourth mesa portion; and selectively growing a semiconductor layer by using the second insulator mask.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: May 5, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Naoko Konishi, Hideki Yagi, Ryuji Masuyama, Yoshihiro Yoneda
  • Publication number: 20150115226
    Abstract: According to various embodiments, an optoelectronic component may be provided, the optoelectronic component including: an electrode structure disposed at least one of over and in a carrier; and a grating structure disposed over the electrode structure, the grating structure including at least a first region and a second region, wherein the first region of the grating structure includes amorphous silicon; and wherein the second region of the grating structure includes a material having a refractive index different from the refractive index of the amorphous silicon.
    Type: Application
    Filed: October 28, 2013
    Publication date: April 30, 2015
    Applicant: Infineon Technologies Dresden GmbH
    Inventors: Alessia Scire, Dieter Kaiser, Tarja Hauck, Frank Zschorlich
  • Patent number: 9006007
    Abstract: A method for producing an optoelectronic assembly (12) is provided, in which an optoelectronic component (16) is arranged on a carrier (14). Electrical terminals of the optoelectronic component (16) are electrically coupled to electrical contacts of the carrier (14) corresponding thereto. A dummy body (20) is arranged on a first side of the optoelectronic component (16) facing away from the carrier (14). A potting material (22) is arranged on the carrier (14), which potting material at least partially encloses the optoelectronic component (16) and at least partially encloses the dummy body (20). The dummy body (20) is removed, after the potting material (22) is dimensionally stable, whereby a recess (23) results, which is at least partially enclosed by the dimensionally stable potting material (22). An optically functional material (24) is decanted into the recess (23).
    Type: Grant
    Filed: April 17, 2014
    Date of Patent: April 14, 2015
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Markus Schneider
  • Patent number: 9006008
    Abstract: A method for manufacturing an organic electroluminescent element including, in the following order, an anode, a light-emitting layer, an electron injection layer, and a cathode, the method including the steps of: (A) forming the anode; (B) forming the light-emitting layer; (C) forming the electron injection layer; and (D) forming the cathode, in which the step (C) includes (i) applying an application liquid containing an ionic polymer to form a thin film, (ii) heating the thin film formed, (iii) storing a partially finished organic electroluminescent element obtained in (ii), and thereafter, (iv) heating the thin film again.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: April 14, 2015
    Assignee: Sumitomo Chemical Company, Limited
    Inventor: Shuichi Sassa
  • Patent number: 9001859
    Abstract: The ridge semiconductor laser is a semiconductor laser in which a carrier stopper layer made of an AlInAs compound, a clad layer made of an AlGaInAs compound, and an etching stopper layer made of an InGaAsP compound are stacked in sequence on one side of an active layer made of an AlGaInAs compound. The ridge semiconductor laser is provided with a ridge waveguide including, in a layer made of an InP compound, a diffraction grating made of an InGaAsP compound on the opposite side of the clad layer of the etching stopper layer.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: April 7, 2015
    Assignee: NTT Electronics Corporation
    Inventors: Atsuo Kozen, Yasuyoshi Ote, Jun-ichi Asaoka, Kenji Hirai, Hiroshi Yokoyama
  • Patent number: 9000445
    Abstract: An exemplary light emitting diode includes a substrate and a first undoped GaN layer formed on the substrate. The first undoped GaN layer has ion implanted areas on an upper surface thereof. A plurality of second undoped GaN layers is formed on the first undoped GaN layer. Each of the second undoped GaN layers is island shaped and partly covers at least one corresponding ion implanted area. A Bragg reflective layer is formed on the second undoped GaN layer and on portions of upper surfaces of the ion implanted areas not covered by the second undoped GaN layers. An n-type GaN layer, an active layer and a p-type GaN layer are formed on an upper surface of the Bragg reflective layer in that sequence. A method for manufacturing the light emitting diode is also provided.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: April 7, 2015
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Ching-Hsueh Chiu, Ya-Wen Lin, Po-Min Tu, Shih-Cheng Huang
  • Patent number: 8993359
    Abstract: A method for manufacturing a semiconductor optical device includes the steps of preparing a mold having an imprint pattern; forming a substrate product including a semiconductor layer; forming a first resin layer on the semiconductor layer; forming a diffraction grating pattern having periodic projections and recesses in the first resin layer using the mold, the projection of the diffraction grating pattern having a top portion and a base portion; changing a duty ratio of the diffraction grating pattern by dry-etching the first resin layer; forming a second resin layer on the first resin layer so as to cover the projection and the recess; removing the top portion by etching back the first and second resin layers; and selectively etching the first resin layer so as to have a reverse pattern to the diffraction grating pattern; and etching the semiconductor layer through the first resin layer.
    Type: Grant
    Filed: January 7, 2014
    Date of Patent: March 31, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Kenji Sakurai
  • Publication number: 20150078751
    Abstract: A tunable laser with multiple in-line sections including sampled gratings generally includes a semiconductor laser body with a plurality of in-line laser sections configured to be driven independently to generate laser light at a wavelength within a different respective wavelength range. Sampled gratings in the respective in-line sections have the same grating period and a different sampling period to produce the different wavelengths. The wavelength of the light generated in the respective laser sections may be tuned, in response to a temperature change, to a channel wavelength within the respective wavelength range. By selectively generating light in one or more of the laser sections, one or more channel wavelengths may be selected for lasing and transmission. By using sampled gratings with the same grating period in the multiple in-line sections, the multiple section tunable laser may be fabricated more easily.
    Type: Application
    Filed: November 24, 2014
    Publication date: March 19, 2015
    Inventors: Jun Zheng, Klaus Alexander Anselm, Huanlin Zhang, Dion McIntosh-Dorsey
  • Publication number: 20150063753
    Abstract: The present invention includes an optical waveguide with a grating and a method of making the same for increasing the effectiveness of the grating. In one example, the grating is at least partially covered by a liner layer disposed on at least a portion of a grating; and a cover layer disposed on the liner layer, wherein a first material selected for the core and ridges and a second material selected for the liner layer are selected to provide a difference in the index of refraction between the first and second material that is sufficient to provide a contrast therebetween.
    Type: Application
    Filed: September 5, 2014
    Publication date: March 5, 2015
    Inventors: Gary A. Evans, Jerome K. Butler, Jay B. Kirk, Ruo-Hua He, Jin Yao, Guoliang Li, Xuezhe Zheng, Ashok V. Krishnamoorthy
  • Patent number: 8952400
    Abstract: A light emitting diode is disclosed. The disclosed light emitting diode includes a light emitting structure including a first-conductivity-type semiconductor layer, an active layer, and a second-conductivity-type semiconductor layer. The first-conductivity-type semiconductor layer, active layer, and second-conductivity-type semiconductor layer are disposed to be adjacent to one another in a same direction. The active layer includes well and barrier layers alternately stacked at least one time. The well layer has a narrower energy bandgap than the barrier layer. The light emitting diode also includes a mask layer disposed in the first-conductivity-type semiconductor layer, a first electrode disposed on the first-conductivity-type semiconductor layer, and a second electrode disposed on the second-conductivity-type semiconductor layer. The first-conductivity-type semiconductor layer is formed with at least one recess portion.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: February 10, 2015
    Assignee: LG Innotek Co., Ltd.
    Inventors: Myung Hoon Jung, Hyun chul Lim, Sul Hee Kim, Rak Jun Choi
  • Patent number: 8948562
    Abstract: The present invention provides templating methods for replicating patterned metal films from a template substrate such as for use in plasmonic devices and metamaterials. Advantageously, the template substrate is reusable and can provide plural copies of the structure of the template substrate. Because high-quality substrates that are inherently smooth and flat are available, patterned metal films in accordance with the present invention can advantageously provide surfaces that replicate the surface characteristics of the template substrate both in the patterned regions and in the unpatterned regions.
    Type: Grant
    Filed: November 24, 2009
    Date of Patent: February 3, 2015
    Assignee: Regents of the University of Minnesota
    Inventors: David J. Norris, Sang Eon Han, Aditya Bhan, Prashant Nagpal, Nathan Charles Lindquist, Sang-Hyun Oh
  • Patent number: 8932888
    Abstract: A method of applying a conversion means to an optoelectronic semiconductor chip includes preparing the optoelectronic semiconductor chip having a main radiation face, preparing the conversion means, the conversion means being applied to a main carrier face of a carrier, arranging the conversion means such that it faces the main radiation face and has a spacing relative to the main radiation face, and releasing the conversion means from the carrier and applying the conversion means to the main radiation face by irradiation and heating of an absorber constituent of the conversion means and/or of a release layer located between the conversion means and the carrier with a pulsed laser radiation which passes through the carrier.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: January 13, 2015
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Ralph Wagner
  • Publication number: 20150010271
    Abstract: An integrated grating element system includes a first transparent layer formed on an optoelectronic substrate layer which includes at least two optoelectronic components, a first grating layer disposed on the first transparent layer which includes at least two sub-wavelength grating elements formed therein aligned with active regions of the optoelectronic components, and a second grating layer placed at a distance from the first grating layer such that light propagates between a diffraction grating element formed within the second grating layer and the at least two sub-wavelength grating elements.
    Type: Application
    Filed: January 12, 2012
    Publication date: January 8, 2015
    Inventors: David A. Fattal, Raymond G. Beausoleil, Marco Fiorentino, Paul Kessler Rosenberg, Terrel Morris
  • Patent number: 8921136
    Abstract: The present disclosure relates to methods of forming a self-aligned contact and related apparatus. In some embodiments, the method forms a plurality of gate lines interspersed between a plurality of dielectric lines, wherein the gate lines and the dielectric lines extend in a first direction over an active area. One or more of the plurality of gate lines are into a plurality of gate line sections aligned in the first direction. One or more of the plurality of dielectric lines are cut into a plurality of dielectric lines sections aligned in the first direction. A dummy isolation material is deposited between adjacent dielectric sections in the first direction and between adjacent gate line sections in the first direction. One or more self-aligned metal contacts are then formed by replacing a part of one or more of the plurality of dielectric lines over the active area with a contact metal.
    Type: Grant
    Filed: January 17, 2013
    Date of Patent: December 30, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Neng-Kuo Chen, Shao-Ming Yu, Gin-Chen Huang, Chia-Jung Hsu, Sey-Ping Sun, Clement Hsingjen Wann
  • Patent number: 8918746
    Abstract: Methodologies and an apparatus enabling a selection of design rules to improve a density of features of an IC design are disclosed. Embodiments include: determining a feature overlapping a grating pattern of an IC design, the grating pattern including a plurality of grating structures; determining a shape of a cut pattern overlapping the grating pattern; and selecting one of a plurality of rules for the feature based on the determined shape.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: December 23, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Lei Yuan, Jongwook Kye, Harry J. Levinson
  • Patent number: 8912022
    Abstract: A method for making a LED comprises following steps. A substrate having a surface is provided. A first semiconductor layer, an active layer and a second semiconductor pre-layer is formed on the surface of the substrate. A first electrode and a second electrode are formed to electrically connect with the first semiconductor layer and the second semiconductor pre-layer respectively. A patterned mask layer is applied on a surface of the second semiconductor pre-layer. A number of three-dimensional nano-structures are formed on the second semiconductor pre-layer and the patterned mask layer is removed. A method for making an optical element is also provided.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: December 16, 2014
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Yuan-Hao Jin, Qun-Qing Li, Shou-Shan Fan
  • Patent number: 8906721
    Abstract: A method for manufacturing a semiconductor light emitting device includes forming a lower cladding layer over a GaAs substrate; forming a quantum dot active layer over the lower cladding layer; forming a first semiconductor layer over the quantum dot active layer; forming a diffraction grating by etching the first semiconductor layer; forming a second semiconductor layer burying the diffraction grating; and forming an upper cladding layer having a conductive type different from that of the lower cladding layer over the second semiconductor layer, wherein the processes after forming the quantum dot active layer are performed at a temperature not thermally deteriorating or degrading quantum dots included in the quantum dot active layer.
    Type: Grant
    Filed: May 21, 2013
    Date of Patent: December 9, 2014
    Assignees: Fujitsu Limited, The University of Tokyo
    Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Manabu Matsuda, Yasuhiko Arakawa
  • Patent number: 8900899
    Abstract: Novel processing methods for production of high-refractive index contrast and low loss optical waveguides are disclosed. In one embodiment, a “channel” waveguide is produced by first depositing a lower cladding material layer with a low refractive index on a base substrate, a refractory metal layer, and a top diffusion barrier layer. Then, a trench is formed with an open surface to the refractory metal layer. The open surface is subsequently oxidized to form an oxidized refractory metal region, and the top diffusion barrier layer and the non-oxidized refractory metal region are removed. Then, a low-refractive-index top cladding layer is deposited on this waveguide structure to encapsulate the oxidized refractory metal region. In another embodiment, a “ridge” waveguide is produced by using similar process steps with an added step of depositing a high-refractive-index material layer and an optional optically-transparent layer.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: December 2, 2014
    Inventor: Payam Rabiei
  • Patent number: 8896001
    Abstract: A nitride semiconductor light-emitting device includes a nitride semiconductor light-emitting chip including an active layer for outputting polarized light, the active layer having a non-polar plane or a semi-polar plane as a growth plane; and a light-transmissive cover for transmitting light from the active layer. The light-transmissive cover includes a first light-transmissive member located in an area, among areas to the side of the nitride semiconductor light-emitting chip, and in a direction perpendicular to a polarization direction of the polarized light, and a second light-transmissive member located in an area above the nitride semiconductor light-emitting chip. The first light-transmissive member has a higher diffuse transmittance than the second light-transmissive member.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: November 25, 2014
    Assignee: Panasonic Corporation
    Inventors: Akira Inoue, Masaki Fujikane, Toshiya Yokogawa
  • Patent number: 8891578
    Abstract: An active layer (18) is formed over a semiconductor substrate having a pair of facets (15A, 15B) mutually facing opposite directions. An upper cladding layer (19) is formed on the active layer, having a refractive index lower than that of the active layer. A diffraction grating (25) is disposed in the upper cladding layer on both sides of a distributed feedback region in a waveguide region (22), the waveguide region extending from one facet to the other of the semiconductor substrate. End regions (22B) are defined at both ends of the waveguide region and the distributed feedback region (22A) is disposed between the end regions. Low refractive index regions (26) are disposed in the upper cladding layer on both sides of each of the end regions of the waveguide region, the low refractive index regions having a refractive index lower than that of the upper cladding layer.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: November 18, 2014
    Assignees: Fujitsu Limited, University of Tokyo
    Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Yasuhiko Arakawa
  • Patent number: 8890185
    Abstract: A nitride-based semiconductor light-emitting element disclosed in the present application includes: an active layer having a growing plane which is an m-plane and which is made of a GaN-based semiconductor; and at least one radiation surface at which light from the active layer is to be radiated. The radiation surface has a plurality of protrusions on the m-plane. A base of each of the plurality of protrusions is a region inside a closed curve, and a shape of the base has a major axis and a minor axis. An angle between the major axis and an extending direction of an a-axis of a crystal is not more than 45°.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: November 18, 2014
    Assignee: Panasonic Corporation
    Inventors: Atsushi Yamada, Akira Inoue, Toshiya Yokogawa
  • Publication number: 20140269800
    Abstract: Examples of the present invention include integrated erbium-doped waveguide lasers designed for silicon photonic systems. In some examples, these lasers include laser cavities defined by distributed Bragg reflectors (DBRs) formed in silicon nitride-based waveguides. These DBRs may include grating features defined by wafer-scale immersion lithography, with an upper layer of erbium-doped aluminum oxide deposited as the final step in the fabrication process. The resulting inverted ridge-waveguide yields high optical intensity overlap with the active medium for both the 980 nm pump (89%) and 1.5 ?m laser (87%) wavelengths with a pump-laser intensity overlap of over 93%. The output powers can be 5 mW or higher and show lasing at widely-spaced wavelengths within both the C- and L-bands of the erbium gain spectrum (1536, 1561 and 1596 nm).
    Type: Application
    Filed: March 7, 2014
    Publication date: September 18, 2014
    Inventors: Purnawirman Purnawirman, Michael R. Watts, Ehsan Sha Hosseini, Jonathan D. Bradley, Jie Sun, Matteo Cherchi
  • Patent number: 8835204
    Abstract: A method for manufacturing a multi-dimensional target waveguide grating and volume grating with micro-structure quasi-phase-matching. An ordinary waveguide grating is used as a seed grating, and on this basis, a two-dimensional or three-dimensional sampling structure modulated with a refractive index, that is, a sampling grating, is formed. The sampling grating comprises multiple shadow gratings, and one of the shadow gratings is selected as a target equivalent grating. A sampled grating comprises Fourier components in many orders, that is, shadow gratings, a corresponding grating wave vector is [Formula 1], and the grating profile of all the shadow gratings changes with the sampling structure [Formula 2]. In a case where a seed grating wave vector [Formula 3] and a required two-dimensional or three-dimensional grating wave vector do not match, a certain Fourier periodic structure component of the Fourier components of the sampling structure is used to compensate for the wave vector mismatch.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: September 16, 2014
    Assignee: Nanjing University
    Inventors: Yuechun Shi, Xiangfei Chen
  • Patent number: 8828760
    Abstract: Provided is a method of fabricating an organic light emitting device that may form a light scattering layer having an irregular random structure at a low temperature. The method includes providing a substrate coated with a precursor layer; sequentially forming a metal layer and an organic layer on the precursor layer; performing a heat treatment of the organic layer to form an organic mask from the organic layer; patterning the metal layer by using the organic mask to form a metal mask; patterning the precursor layer by using the metal mask to form a light scattering layer having an irregular random structure; removing the metal mask and the organic mask; and sequentially stacking a planarization layer, a first electrode, an organic light emitting layer, a second electrode, and a passivation layer on the light scattering layer.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: September 9, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Bong Joon Lee, Doo-Hee Cho, Jaehyun Moon, Jeong Ik Lee, Hye Yong Chu, Seung Koo Park, Jin Wook Shin, Jin Woo Huh, Nam Sung Cho, Joon Tae Ahn, Jun-Han Han, Chul Woong Joo, Joo Hyun Hwang
  • Patent number: 8828764
    Abstract: Implementations and techniques for coupled asymmetric quantum confinement structures are generally disclosed.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: September 9, 2014
    Assignee: University of Seoul Industry Cooperation Foundation
    Inventor: Doyeol Ahn
  • Publication number: 20140203258
    Abstract: An electroluminescent device, comprising: a substrate; a first electrode and a second electrode disposed on the substrate; and an electroluminescent layer sandwiched between the first electrode and the second electrode, wherein at least one of the first and second electrodes is configured to have a grating structure; and wherein the grating structure has a grating period within a range of 0.9˜1.1 times of a wavelength of a light wave generated in the electroluminescent layer.
    Type: Application
    Filed: January 17, 2014
    Publication date: July 24, 2014
    Inventors: Yuanhui Guo, Hui Wang, Chun Wang, Yisan Zhang
  • Publication number: 20140199798
    Abstract: A quantum cascade laser manufacturing method includes: a step of pressing a mother stamper against a resin film having flexibility to make a resin stamper 201 having a second groove pattern P2; a step of making a wafer with an active layer formed on a semiconductor substrate; a step of forming a resist film 304 on a surface on the active layer side of the wafer; a step of pressing the resin stamper against the resist film 304 by air pressure to form a third groove pattern P3 on the resist film 304; and a step of etching the wafer with the resist film 304 serving as a mask to form a diffraction grating on a surface of the wafer.
    Type: Application
    Filed: July 4, 2012
    Publication date: July 17, 2014
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Atsushi Sugiyama, Naota Akikusa, Tadataka Edamura
  • Publication number: 20140193933
    Abstract: A method for manufacturing a semiconductor optical device includes the steps of preparing a mold having an imprint pattern; forming a substrate product including a semiconductor layer; forming a first resin layer on the semiconductor layer; forming a diffraction grating pattern having periodic projections and recesses in the first resin layer using the mold, the projection of the diffraction grating pattern having a top portion and a base portion; changing a duty ratio of the diffraction grating pattern by dry-etching the first resin layer; forming a second resin layer on the first resin layer so as to cover the projection and the recess; removing the top portion by etching back the first and second resin layers; and selectively etching the first resin layer so as to have a reverse pattern to the diffraction grating pattern; and etching the semiconductor layer through the first resin layer.
    Type: Application
    Filed: January 7, 2014
    Publication date: July 10, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Kenji SAKURAI
  • Patent number: 8766301
    Abstract: A light extracting member for an organic electroluminescent element, to be provided on a side for extracting light emitted by the organic electroluminescent element, wherein a light extracting surface of the member has a concave-convex structure which is configured such that when comparing an intensity of light that enters the member and is output from the light extracting surface with an intensity of light that is output from a flat light extracting surface of a virtual member, a frontal intensity and an integrated intensity of the former are each greater by a factor of 1.3 or more.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: July 1, 2014
    Assignee: Sumitomo Chemical Company, Limited
    Inventor: Kyoko Yamamoto
  • Patent number: 8765503
    Abstract: Forming an adhesive layer on a part of a surface of the flexible substrate; forming a magnetic material layer on the surface of the flexible substrate in a part other than the part on which the adhesive layer is formed; temporarily holding, using magnetic force, the flexible substrate on which the adhesive layer and the magnetic material layer are formed, above an inflexible substrate having magnetic property; fixing the flexible substrate with the inflexible substrate via the adhesive layer; forming a layer composing an organic EL unit on the flexible substrate temporarily held using the magnetic force and fixed via the adhesive layer; removing the part in which the flexible substrate and the inflexible substrate are fixed via the adhesive layer; separating the flexible substrate from the inflexible substrate; and separating the magnetic material layer from the flexible substrate separated from the inflexible substrate are included.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: July 1, 2014
    Assignee: Panasonic Corporation
    Inventors: Kouhei Koresawa, Yuji Tanaka, Takashi Ohta
  • Patent number: 8729571
    Abstract: A light emitting device includes a number of light emitting diode dies (LEDs) mounted on a shared submount and covered with a single lens element that includes a corresponding number of lens elements. The LEDs are separated from each other by a distance that is sufficient for lens element to include separate lens elements for each LED. The separation of the LEDs and lens elements may be configured to produce a desired amount of light on a target at a predefined distance. In one embodiment, the lens elements are approximately flat type lens elements, such as Fresnel, TIR, diffractive lens, photonic crystal type lenses, prism, or reflective lens.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: May 20, 2014
    Assignee: Philips Lumileds Lighting Company LLC
    Inventors: Walter Daschner, Xina Quan, Nanze P. Wang
  • Publication number: 20140131727
    Abstract: A method for manufacturing a light emitting diode chip includes following steps: providing a sapphire substrate, the sapphire substrate having a plurality of protrusions on an upper surface thereof; forming an un-doped GaN layer on the upper surface of the sapphire substrate, the un-doped GaN layer having an upper part covering top ends of the protrusions; forming a distributed bragg reflective layer on the un-doped GaN layer until the distributed bragg reflective layer totally covering the protrusions and the un-doped GaN layer; etching the distributed bragg reflective layer and the upper part of the un-doped GaN layer to expose the top ends of the protrusions; and forming an n-type GaN layer, an active layer, and a p-type GaN layer sequentially on the top ends of the protrusions and the distributed bragg reflective layer. An LED chip formed by the method described above is also provided.
    Type: Application
    Filed: August 30, 2013
    Publication date: May 15, 2014
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: CHING-HSUEH CHIU, YA-WEN LIN, PO-MIN TU, SHIH-CHENG HUANG
  • Patent number: 8710524
    Abstract: Fine asperities are simply formed in the surface of a light emission surface to improve an luminous efficiency of a light emitting element. An LED element 10 is prepared as an example of a luminous body, and a thermally deformable heat mode recording material layer 12 is formed in the light emission surface 18 of the LED element 10. The recording material layer 12 is then illuminated with condensed light so that a plurality of recessed portions 15 are formed at a pitch of 0.01-100 times a center wavelength of the light emitted from the LED element 10.
    Type: Grant
    Filed: March 5, 2008
    Date of Patent: April 29, 2014
    Assignee: Fujifilm Corporation
    Inventors: Yoshihisa Usami, Tadasuke Takahashi, Tetsuya Watanabe
  • Publication number: 20140111842
    Abstract: A display device provided with an MEMS light valve, comprising: a substrate, a fixed grating located on the substrate, an MEMS light valve for controlling the opening and closing of the fixed grating; a guide is disposed on the substrate. The MEMS light valve comprises: a movable grating, a movable electrode and fixed electrodes; the moveable grating is located in the guide and is electrically connected to the guide when contacting the guide; one end of the movable electrode is fixedly connected with the movable grating, and the other end is suspended; and the fixed electrodes and the movable electrode form a capacitor. When a potential difference forms between the fixed electrodes and the movable electrode, the movable electrode drives the movable grating to move in the guide, thereby opening and closing the fixed grating. Therefore, the MEMS light valve sensitivity can be enhanced and reliability is improved.
    Type: Application
    Filed: December 28, 2011
    Publication date: April 24, 2014
    Applicant: LEXVU OPTO MICROELECTRONICS TECHNOLOGY (SHANGHAI) LTD
    Inventors: Jianhong Mao, Deming Tang
  • Patent number: 8704248
    Abstract: Implementations and techniques for coupled asymmetric quantum confinement structures are generally disclosed.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: April 22, 2014
    Assignee: University of Seoul Industry Cooperation Foundation
    Inventor: Doyeol Ahn
  • Patent number: 8698182
    Abstract: A light emitting device having auto-cloning photonic crystal structures comprises a substrate, a first semiconductor layer, an active emitting layer, a second semiconductor layer and a saw-toothed multilayer film comprising auto-cloning photonic crystal structures. The saw-toothed multilayer film provides a high reflection interface and a diffraction mechanism to prevent total internal reflection and enhance light extraction efficiency.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: April 15, 2014
    Assignee: National Tsing Hua University
    Inventors: Shiuh Chao, Hao-Min Ku, Chen-Yang Huang
  • Patent number: 8697462
    Abstract: A light emitting device having auto-cloning photonic crystal structures comprises a substrate, a first semiconductor layer, an active emitting layer, a second semiconductor layer and a saw-toothed multilayer film comprising auto-cloning photonic crystal structures. The saw-toothed multilayer film provides a high reflection interface and a diffraction mechanism to prevent total internal reflection and enhance light extraction efficiency. The manufacturing method of the light emitting device having auto-cloning photonic crystal structures is presented here.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: April 15, 2014
    Assignee: National Tsing Hua University
    Inventors: Shiuh Chao, Hao-Min Ku, Chen-Yang Huang
  • Patent number: 8679873
    Abstract: The present invention discloses a method for fabricating a heat-resistant, humidity-resistant oxide-confined vertical-cavity surface-emitting laser (VCSEL) by slowing down the oxidizing rate during a VCSEL oxidation process to thereby reduce stress concentration of an oxidation layer and by preventing moisture invasion using a passivation layer disposed on a laser window. The VCSEL device thus fabricated is heat-resistant, humidity-resistant, and highly reliable. In a preferred embodiment, the oxidation process takes place at an oxidizing rate of less than 0.4 ?m/min, and the passivation layer is a SiON passivation layer.
    Type: Grant
    Filed: December 11, 2009
    Date of Patent: March 25, 2014
    Assignee: TrueLight Corp.
    Inventors: Jin Shan Pan, Cheng Ju Wu, I Han Wu, Kuo Fong Tseng
  • Patent number: 8679392
    Abstract: A process using the nanoimprint technique to form the diffraction grating for the DFB-LD is disclosed. The process includes (a) coating a resist for the EB exposure on a dummy substrate, (b) irradiating the resist as varying the acceleration voltage, (c) forming a resist pattern by developing the irradiated resist, (d) coating the SOG film on the patterned resist, (e) attaching the silica substrate on the cured SOG film, and (f) removing the dummy substrate with the resist from the SOG film and the silica substrate. Using the mold thus formed, the diffraction grating for the DFB-LD is formed by the nanoimprint technique.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: March 25, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Masaki Yanagisawa
  • Publication number: 20140073073
    Abstract: A method for forming a diffraction grating includes the steps of preparing a mold including a pattern portion having a pattern for forming a diffraction grating; forming a first semiconductor layer on a substrate; forming a resin layer on the first semiconductor layer; pressing the pattern portion of the mold against the resin layer; forming the pattern for the diffraction grating in the resin layer by curing the resin layer; and forming the diffraction grating in the first semiconductor layer by etching the first semiconductor layer using the patterned resin layer. The mold includes a first base and a plurality of second bases disposed on the first base. The first base is made of a flexible material. The second base is made of a rigid material. The plurality of second bases each include the pattern portion and are spaced apart from each other with a predetermined distance.
    Type: Application
    Filed: September 3, 2013
    Publication date: March 13, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Masaki YANAGISAWA
  • Publication number: 20140050439
    Abstract: A method and a device are provided for diffracting incident light from a lithographic scanner in an IC process flow. Embodiments include forming a diffraction grating in a first layer on a semiconductor substrate; and forming a plurality of lithographic alignment marks in a second layer, overlying the first layer, wherein the diffraction grating has a width and a length greater than or equal to a width and length, respectively, of the plurality of lithographic alignment marks.
    Type: Application
    Filed: August 17, 2012
    Publication date: February 20, 2014
    Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Hui LIU, Wen Zhan Zhou, Zheng Zou, Qun Ying Lin, Alex Kai Hung See
  • Patent number: 8652936
    Abstract: A method of forming an optoelectronic device comprising growing a first multi-layer 2 representing a reflector on a first substrate and a second multilayer 4 representing an active region on a second substrate, the first and second substrates being lattice mismatched, fusing the first multi-layer 2 to a third substrate 3, wherein the material of the third substrate 3 is lattice matched with respect to the material of the second multi-layer 4, removing the first substrate to expose the first multi-layer 2, and fusing the first multi-layer to the second multi-layer 4.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: February 18, 2014
    Assignee: Ecole Polytechnique Federale de Lausanne
    Inventors: Alexei Sirbu, Alexandru Mereuta, Andrei Caliman
  • Patent number: 8652862
    Abstract: A method for etching an insulating film includes the steps of forming an insulating film; forming a first resin layer composed of a non-silicon-containing resin on the insulating film; forming a pattern including projections and recesses in the first resin layer; forming a second resin layer composed of a silicon-containing resin to cover the projections and the recesses of the pattern in the first resin layer; etching the second resin layer by reactive ion etching with etching gas containing CF4 gas and oxygen gas until the projections of the first resin layer are exposed, a Si component of the second resin layer being oxidized in etching the second resin layer; selectively etching the first resin layer until the insulating film is exposed using as a mask the second resin layer buried in the recesses of the first resin layer to form a resin layer mask; and etching the insulating film using the resin layer mask.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: February 18, 2014
    Assignee: Sumitomo Electronic Industries Ltd.
    Inventor: Yukihiro Tsuji