Optical Grating Structure Patents (Class 438/32)
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Patent number: 8697462Abstract: A light emitting device having auto-cloning photonic crystal structures comprises a substrate, a first semiconductor layer, an active emitting layer, a second semiconductor layer and a saw-toothed multilayer film comprising auto-cloning photonic crystal structures. The saw-toothed multilayer film provides a high reflection interface and a diffraction mechanism to prevent total internal reflection and enhance light extraction efficiency. The manufacturing method of the light emitting device having auto-cloning photonic crystal structures is presented here.Type: GrantFiled: June 7, 2013Date of Patent: April 15, 2014Assignee: National Tsing Hua UniversityInventors: Shiuh Chao, Hao-Min Ku, Chen-Yang Huang
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Patent number: 8698182Abstract: A light emitting device having auto-cloning photonic crystal structures comprises a substrate, a first semiconductor layer, an active emitting layer, a second semiconductor layer and a saw-toothed multilayer film comprising auto-cloning photonic crystal structures. The saw-toothed multilayer film provides a high reflection interface and a diffraction mechanism to prevent total internal reflection and enhance light extraction efficiency.Type: GrantFiled: June 7, 2013Date of Patent: April 15, 2014Assignee: National Tsing Hua UniversityInventors: Shiuh Chao, Hao-Min Ku, Chen-Yang Huang
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Patent number: 8679873Abstract: The present invention discloses a method for fabricating a heat-resistant, humidity-resistant oxide-confined vertical-cavity surface-emitting laser (VCSEL) by slowing down the oxidizing rate during a VCSEL oxidation process to thereby reduce stress concentration of an oxidation layer and by preventing moisture invasion using a passivation layer disposed on a laser window. The VCSEL device thus fabricated is heat-resistant, humidity-resistant, and highly reliable. In a preferred embodiment, the oxidation process takes place at an oxidizing rate of less than 0.4 ?m/min, and the passivation layer is a SiON passivation layer.Type: GrantFiled: December 11, 2009Date of Patent: March 25, 2014Assignee: TrueLight Corp.Inventors: Jin Shan Pan, Cheng Ju Wu, I Han Wu, Kuo Fong Tseng
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Patent number: 8679392Abstract: A process using the nanoimprint technique to form the diffraction grating for the DFB-LD is disclosed. The process includes (a) coating a resist for the EB exposure on a dummy substrate, (b) irradiating the resist as varying the acceleration voltage, (c) forming a resist pattern by developing the irradiated resist, (d) coating the SOG film on the patterned resist, (e) attaching the silica substrate on the cured SOG film, and (f) removing the dummy substrate with the resist from the SOG film and the silica substrate. Using the mold thus formed, the diffraction grating for the DFB-LD is formed by the nanoimprint technique.Type: GrantFiled: May 11, 2011Date of Patent: March 25, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventor: Masaki Yanagisawa
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Publication number: 20140073073Abstract: A method for forming a diffraction grating includes the steps of preparing a mold including a pattern portion having a pattern for forming a diffraction grating; forming a first semiconductor layer on a substrate; forming a resin layer on the first semiconductor layer; pressing the pattern portion of the mold against the resin layer; forming the pattern for the diffraction grating in the resin layer by curing the resin layer; and forming the diffraction grating in the first semiconductor layer by etching the first semiconductor layer using the patterned resin layer. The mold includes a first base and a plurality of second bases disposed on the first base. The first base is made of a flexible material. The second base is made of a rigid material. The plurality of second bases each include the pattern portion and are spaced apart from each other with a predetermined distance.Type: ApplicationFiled: September 3, 2013Publication date: March 13, 2014Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventor: Masaki YANAGISAWA
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Publication number: 20140050439Abstract: A method and a device are provided for diffracting incident light from a lithographic scanner in an IC process flow. Embodiments include forming a diffraction grating in a first layer on a semiconductor substrate; and forming a plurality of lithographic alignment marks in a second layer, overlying the first layer, wherein the diffraction grating has a width and a length greater than or equal to a width and length, respectively, of the plurality of lithographic alignment marks.Type: ApplicationFiled: August 17, 2012Publication date: February 20, 2014Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.Inventors: Hui LIU, Wen Zhan Zhou, Zheng Zou, Qun Ying Lin, Alex Kai Hung See
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Patent number: 8652936Abstract: A method of forming an optoelectronic device comprising growing a first multi-layer 2 representing a reflector on a first substrate and a second multilayer 4 representing an active region on a second substrate, the first and second substrates being lattice mismatched, fusing the first multi-layer 2 to a third substrate 3, wherein the material of the third substrate 3 is lattice matched with respect to the material of the second multi-layer 4, removing the first substrate to expose the first multi-layer 2, and fusing the first multi-layer to the second multi-layer 4.Type: GrantFiled: July 1, 2010Date of Patent: February 18, 2014Assignee: Ecole Polytechnique Federale de LausanneInventors: Alexei Sirbu, Alexandru Mereuta, Andrei Caliman
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Patent number: 8652862Abstract: A method for etching an insulating film includes the steps of forming an insulating film; forming a first resin layer composed of a non-silicon-containing resin on the insulating film; forming a pattern including projections and recesses in the first resin layer; forming a second resin layer composed of a silicon-containing resin to cover the projections and the recesses of the pattern in the first resin layer; etching the second resin layer by reactive ion etching with etching gas containing CF4 gas and oxygen gas until the projections of the first resin layer are exposed, a Si component of the second resin layer being oxidized in etching the second resin layer; selectively etching the first resin layer until the insulating film is exposed using as a mask the second resin layer buried in the recesses of the first resin layer to form a resin layer mask; and etching the insulating film using the resin layer mask.Type: GrantFiled: September 1, 2011Date of Patent: February 18, 2014Assignee: Sumitomo Electronic Industries Ltd.Inventor: Yukihiro Tsuji
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Patent number: 8647903Abstract: A method of fabricating an antireflective grating pattern and a method of fabricating an optical device integrated with an antireflective grating pattern are provided. The method of fabricating the antireflective grating pattern includes forming a photoresist (PR) pattern on a substrate using a hologram lithography process, forming a PR lens pattern having a predetermined radius of curvature by reflowing the PR pattern, and etching the entire surface of the substrate including the PR lens pattern to form a wedge-type or parabola-type antireflective subwavelength grating (SWG) pattern having a pointed tip on a top surface of the substrate. In this method, a fabrication process is simplified, the reflection of light caused by a difference in refractive index between the air and a semiconductor material can be minimized, and the antireflective grating pattern can be easily applied to optical devices.Type: GrantFiled: December 22, 2009Date of Patent: February 11, 2014Assignee: Gwangju Institute of Science and TechnologyInventors: Yong Tak Lee, Young Min Song
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Publication number: 20140036948Abstract: An optical semiconductor device includes a semiconductor substrate; a lower cladding layer formed over the semiconductor substrate; a quantum well active layer formed on the lower cladding layer; a diffraction grating layer formed over the quantum well active layer and having diffraction gratings formed in a surface thereof; and an upper cladding layer formed on the diffraction gratings of the diffraction grating layer. Further, a band gap in outer regions of the quantum well active layer that are adjacent to outer end surfaces of the optical semiconductor device is greater than the band gap in an inner region of the quantum well active layer that is located between the outer regions, and a thickness of one or more layers, which include the lower cladding layer and positioned between the semiconductor substrate and the quantum well active layer, is greater than or equal to 2.3 ?m.Type: ApplicationFiled: July 17, 2013Publication date: February 6, 2014Inventors: Akinori HAYAKAWA, Takeshi Matsumoto
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Patent number: 8642365Abstract: A method of manufacturing a ridge-type semiconductor laser includes the steps of forming a stacked semiconductor layer including an active layer and an etch stop layer on first and second surfaces of a substrate, etching the stacked semiconductor layer on the second surface, forming a semiconductor portion on the second surface, forming a ridge waveguide portion by etching the stacked semiconductor layer on the first surface to a first depth, forming semiconductor diffraction grating portions by etching the semiconductor portion to a second depth, and forming a diffraction grating section by providing resin diffraction grating portions between the semiconductor diffraction grating portions. The etching of the stacked semiconductor layer on the first surface and the etching of the semiconductor portion are performed simultaneously by using first and second mask portions.Type: GrantFiled: April 11, 2012Date of Patent: February 4, 2014Assignee: Sumitomo Electric Industries LtdInventor: Hideki Yagi
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Patent number: 8637329Abstract: A method for producing a semiconductor optical integrated device includes the steps of forming a substrate product including first and second stacked semiconductor layer portions; forming a first mask on the first and second stacked semiconductor layer portions, the first mask including a stripe-shaped first pattern region and a second pattern region, the second pattern region including a first end edge; forming a stripe-shaped mesa structure; removing the second pattern region of the first mask; forming a second mask on the second stacked semiconductor layer portion; and selectively growing a buried semiconductor layer with the first and second masks. The second mask includes a second end edge separated from the first end edge of the first mask, the second end edge being located on the side of the second stacked semiconductor layer portion in the predetermined direction with respect to the first end edge of the first mask.Type: GrantFiled: June 29, 2012Date of Patent: January 28, 2014Assignee: Sumitomo Electric Industries LtdInventors: Yoshihiro Yoneda, Hirohiko Kobayashi, Kenji Koyama, Masaki Yanagisawa, Kenji Hiratsuka
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Publication number: 20140017836Abstract: A method of making a LED includes steps of providing a substrate having an epitaxial growth surface. A buffer layer and an intrinsic semiconductor layer are grown thereon in that order. A carbon nanotube layer is placed on the intrinsic semiconductor layer. A first semiconductor layer, an active layer, and a second semiconductor layer are grown in that order on the intrinsic semiconductor layer, the first semiconductor layer covering the carbon nanotube layer. A first electrode is applied to a surface of the second semiconductor layer and the substrate, the buffer layer, and the intrinsic semiconductor layer are removed to expose the carbon nanotube layer. A second electrode is applied to make electrical connections with the carbon nanotube layer.Type: ApplicationFiled: September 18, 2013Publication date: January 16, 2014Applicants: HON HAI PRECISION INDUSTRY CO., LTD., Tsinghua UniversityInventors: YANG WEI, SHOU-SHAN FAN
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Patent number: 8617912Abstract: A method for manufacturing a semiconductor laser includes the steps of preparing a mold with a pattern surface having recesses, forming a stacked semiconductor layer including a grating layer, forming a resin part on the grating layer, forming a resin pattern portion on the resin part, forming a diffraction grating by etching the grating layer using the resin part as a mask, and forming a mesa-structure on the stacked semiconductor layer. Each of the recesses includes two end portions and a middle portion between the two end portions. A depth of at least one of the two end portions from the pattern surface is greater than that of the middle portion. The step of forming the mesa-structure includes the step of etching the stacked semiconductor layer so as to remove end portions of the diffraction grating in a direction orthogonal to a periodic direction thereof.Type: GrantFiled: June 21, 2012Date of Patent: December 31, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventor: Masaki Yanagisawa
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Patent number: 8598599Abstract: The present invention provides a Group III nitride semiconductor light-emitting device whose main surface is a plane which provides an internal electric field of zero, and which exhibits improved emission performance. The light-emitting device includes a sapphire substrate which has, in a surface thereof, a plurality of dents which are arranged in a stripe pattern as viewed from above; an n-contact layer formed on the dented surface of the sapphire substrate; a light-emitting layer formed on the n-contact layer; an electron blocking layer formed on the light-emitting layer; a p-contact layer formed on the electron blocking layer; a p-electrode; and an n-electrode. The electron blocking layer has a thickness of 2 to 8 nm and is formed of Mg-doped AlGaN having an Al compositional proportion of 20 to 30%.Type: GrantFiled: March 25, 2011Date of Patent: December 3, 2013Assignee: Toyoda Gosei Co., Ltd.Inventors: Yoshiki Saito, Koji Okuno, Yasuhisa Ushida
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Patent number: 8592854Abstract: The invention relates to a substantially transparent electronic device comprising a first contact surface provided with a first pattern of electrically conductive lines and a second contact surface provided with a second pattern of electrically conductive lines, the first contact surface extending parallel to the second contact surface, wherein the first pattern is rotationally displaced with respect to the second pattern by an angle between 15 and 165 degrees. The electrically conductive lines of the said first pattern and the said second pattern are substantially not transparent for visible light and are preferably used as shunting lines. The invention further relates to a method of manufacturing such device.Type: GrantFiled: April 21, 2010Date of Patent: November 26, 2013Assignee: Nederlandse Organisatie Voor toegepast-natuurwetenschappelijk Onderzoek TNOInventors: Peter G. M. Kruijt, Eric Rubingh, Andrea Maione, Joanne Sarah Wilson
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Publication number: 20130299796Abstract: A method for producing a mold includes: applying a block copolymer solution made of first and second polymers on a base member; performing a first annealing process at a temperature higher than Tg of the block copolymer after drying the coating film; forming a concavity and convexity structure on the base member by removing the second polymer by an etching process; performing a second annealing process of the concavity and convexity structure at a temperature higher than Tg of the first polymer; forming a seed layer on the structure; laminating or stacking a metal layer on the seed layer by an electroforming; and peeling off the metal layer from the base member. The second annealing process enables satisfactory transfer of a concavity and convexity structure on the base member onto the metal layer.Type: ApplicationFiled: July 10, 2013Publication date: November 14, 2013Inventors: Satoshi MASUYAMA, Madoka TAKAHASHI, Suzushi NISHIMURA, Maki FUKUDA, Takashi SEKI
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Publication number: 20130295703Abstract: A method for manufacturing a multi-dimensional target waveguide grating and volume grating with micro-structure quasi-phase-matching. An ordinary waveguide grating is used as a seed grating, and on this basis, a two-dimensional or three-dimensional sampling structure modulated with a refractive index, that is, a sampling grating, is formed. The sampling grating comprises multiple shadow gratings, and one of the shadow gratings is selected as a target equivalent grating. A sampled grating comprises Fourier components in many orders, that is, shadow gratings, a corresponding grating wave vector is [Formula 1], and the grating profile of all the shadow gratings changes with the sampling structure [Formula 2]. In a case where a seed grating wave vector [Formula 3] and a required two-dimensional or three-dimensional grating wave vector do not match, a certain Fourier periodic structure component of the Fourier components of the sampling structure is used to compensate for the wave vector mismatch.Type: ApplicationFiled: December 30, 2011Publication date: November 7, 2013Applicant: NANJING UNIVERSITYInventors: Yuechun Shi, Xiangfei Chen
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Publication number: 20130285100Abstract: A method for producing at least one conversion lamina for a radiation-emitting semiconductor component is specified. A base material including a conversion substance contained therein is applied to a substrate by means of a double-layered stencil. Furthermore, a conversion lamina for a radiation-emitting semiconductor component includes a base material and a conversion substance embedded therein. The thickness of the conversion lamina is in a range of between 60 ?m and 170 ?m inclusive.Type: ApplicationFiled: September 28, 2011Publication date: October 31, 2013Applicant: OSRAM Opto Semiconductors GmbHInventor: Markus Richter
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Patent number: 8558257Abstract: Implementations and techniques for coupled asymmetric quantum confinement structures are generally disclosed.Type: GrantFiled: November 24, 2009Date of Patent: October 15, 2013Assignee: University of Seoul Industry Cooperation FoundationInventor: Doyeol Ahn
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Publication number: 20130267052Abstract: A method for manufacturing a semiconductor light emitting device includes forming a lower cladding layer over a GaAs substrate; forming a quantum dot active layer over the lower cladding layer; forming a first semiconductor layer over the quantum dot active layer; forming a diffraction grating by etching the first semiconductor layer; forming a second semiconductor layer burying the diffraction grating; and forming an upper cladding layer having a conductive type different from that of the lower cladding layer over the second semiconductor layer, wherein the processes after forming the quantum dot active layer are performed at a temperature not thermally deteriorating or degrading quantum dots included in the quantum dot active layer.Type: ApplicationFiled: May 21, 2013Publication date: October 10, 2013Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Manabu Matsuda, Yasuhiko Arakawa
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Publication number: 20130252360Abstract: Provided is a method of manufacturing a photonic crystal, including: a first step of forming, on a surface of a substrate, a protective mask for selective growth, the protective mask having an opening pattern opened therein; a second step of selectively growing a columnar semiconductor from an exposed portion of the surface of the substrate not having the mask formed thereon, laterally overgrowing the semiconductor layer on the mask, and embedding the mask; a third step of forming a photonic crystal in the semiconductor layer so that openings in the opening pattern and the one of pores and grooves which form the photonic crystal are at least partly overlapped each other when seen from a direction perpendicular to the surface of the substrate; a fourth step of removing at least part of the columnar semiconductor; and a fifth step of removing at least part of the mask.Type: ApplicationFiled: March 12, 2013Publication date: September 26, 2013Applicant: CANON KABUSHIKI KAISHAInventor: Katsuyuki Hoshino
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Patent number: 8541735Abstract: An optical material is inlaid into a supporting substrate, with the top surface of the optical material flush with the top surface of the substrate, wherein the optical element is used to shape a beam of light travelling substantially parallel to the top surface of the substrate, but with the central axis of the beam below the top surface of the substrate. The optical elements serve to shape the beam of light for delivery to or from a microfabricated structure within the device.Type: GrantFiled: April 7, 2010Date of Patent: September 24, 2013Assignee: Innovative Micro TechnologyInventors: John S. Foster, John C. Harley, Ian R. Johnston, Jeffery F. Summers
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Patent number: 8536603Abstract: An optoelectronic semiconductor chip having a semiconductor layer sequence with a plurality of layers arranged over one another includes an active layer with an active region which emits electromagnetic radiation in an emission direction when in operation, a first grating layer on the active layer which, in an emission direction, has a plurality of stripes in the form of grating lines extending perpendicularly to the emission direction with spaces arranged therebetween, and a second grating layer on the first grating layer which covers the stripes of the first grating layer and the spaces and which comprises a transparent material applied by non-epitaxial application.Type: GrantFiled: October 12, 2009Date of Patent: September 17, 2013Assignee: OSRAM Opto Semiconductors GmbHInventors: Stefan Illek, Uwe Strauss
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Patent number: 8535963Abstract: A method for manufacturing an electronic device comprises a step for forming a coating film (100) on a surface of a conductor portion-containing body (500), a step for forming a photosensitive film (110) on the conductor (500) on which the coating film (100) has been formed, a step for exposing the photosensitive film (110) to a pattern corresponding to a patterned recessed or protruded portion, a step for developing the exposed photosensitive film (110), and a step for baking the developed photosensitive film (110). With this method, an excessive removal of a metal film can be prevented or suppressed.Type: GrantFiled: March 12, 2012Date of Patent: September 17, 2013Assignee: TPO Hong Kong Holding LimitedInventor: Naoki Sumi
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Publication number: 20130207149Abstract: The present invention relates to a semiconductor light-emitting device having a two-stage photonic crystal pattern formed thereon, and to a method for manufacturing same. According to the present invention, a second photonic crystal pattern is formed inside a first photonic crystal pattern formed on a semiconductor layer or transparent electrode layer, in order to improve light extraction efficiency. Also, according to the present invention, in order to form a second fine nanoscale photonic crystal pattern in the first photonic crystal pattern, a nanosphere lithography process employing polymer beads is used, and a trapping layer made of a thermoplastic resin was used to conveniently form polymer beads in a single layer so as to eliminate the inconvenience of having to calculate and change process variables according to polymer bead sizes in traditional nanosphere lithography processes.Type: ApplicationFiled: August 17, 2011Publication date: August 15, 2013Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATIONInventors: Taegeun Kim, Homyoung An, Jaein Sim
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Publication number: 20130209026Abstract: An optoelectronic integrated circuit for coupling light to or from an optical waveguide formed in an optical device layer in a near-normal angle to that layer. In an embodiment, the integrated circuit comprises a semiconductor body including a metal-dielectric stack, an optical device layer, a buried oxide layer and a semiconductor substrate arranged in series between first and second opposite sides of the semiconductor body. At least one optical waveguide is formed in the optical device layer for guiding light in a defined plane in that device layer. Diffractive coupling elements are disposed in the optical device layer to couple light from the waveguide toward the second surface of the semiconductor body at a near-normal angle to the defined plane in the optical device layer. In an embodiment, an optical fiber is positioned against the semiconductor body for receiving the light from the coupling elements.Type: ApplicationFiled: February 10, 2012Publication date: August 15, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Fuad Doany, Benjamin G. Lee, Clint L. Schow
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Patent number: 8509277Abstract: A multiwavelength optical device includes a substrate; a first mirror section including a plurality of first mirror layers stacked on the substrate; an active layer stacked on the first mirror section, the active layer including a light emission portion; a second mirror section including a plurality of second mirror layers stacked on the active layer; a first electrode disposed between the active layer and the second mirror section; and a second electrode disposed between the first mirror section and the active layer.Type: GrantFiled: February 23, 2010Date of Patent: August 13, 2013Assignee: Fujitsu LimitedInventor: Yoshikazu Hattori
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Patent number: 8486809Abstract: A method for producing a semiconductor device includes the steps of forming a semiconductor layer; forming a non-silicon-containing resin layer on the semiconductor layer; forming a pattern in the non-silicon-containing resin layer; forming a silicon-containing resin layer on the non-silicon-containing resin layer; etching the silicon-containing resin layer; selectively etching the non-silicon-containing resin layer; and etching the semiconductor layer.Type: GrantFiled: June 2, 2011Date of Patent: July 16, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventor: Yukihiro Tsuji
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Patent number: 8486738Abstract: A light emitting device having auto-cloning photonic crystal structures comprises a substrate, a first semiconductor layer, an active emitting layer, a second semiconductor layer and a saw-toothed multilayer film comprising auto-cloning photonic crystal structures. The saw-toothed multilayer film provides a high reflection interface and a diffraction mechanism to prevent total internal reflection and enhance light extraction efficiency. The manufacturing methods of the light emitting device having auto-cloning photonic crystal structures are also presented.Type: GrantFiled: June 1, 2011Date of Patent: July 16, 2013Assignee: National Tsing Hua UniversityInventors: Shiuh Chao, Hao-Min Ku, Chen-Yang Huang
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Patent number: 8482024Abstract: A light emitting device includes a light emitting layer made of semiconductor; an upper electrode including a bonding electrode capable of connecting a wire thereto and a thin-wire electrode surrounding the bonding electrode with a spacing and including a junction with the bonding electrode, and a current diffusion layer provided between the light emitting layer and the upper electrode and made of semiconductor, the current diffusion layer including a recess that is formed in a non-forming region of the upper electrode and capable of emitting light emitted from the light emitting layer.Type: GrantFiled: February 3, 2009Date of Patent: July 9, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Chisato Furukawa, Takafumi Nakamura
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Publication number: 20130161677Abstract: The invention is directed to an integrated polarized light emitting diode device that has a light emitting diode, a metal grating, an oxide layer, and a built-in photonic crystal rotator. Additional teachings include a method for making the integrated polarized light emitting diode, a method for improving the polarization selectivity and energy efficiency of a light emitting diode, and a method for rotating polarization of a light emitting diode.Type: ApplicationFiled: July 19, 2011Publication date: June 27, 2013Applicant: RENSSELAER POLYTECHNIC INSTITUTEInventors: Shawn-Yu Lin, Yong Sung Kim, Mei-Li Hsieh
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Publication number: 20130156057Abstract: The inventive concept provides semiconductor laser devices and methods of fabricating the same. According to the method, a silicon-crystalline germanium layer for emitting a laser may be formed in a selected region by a selective epitaxial growth (SEG) method. Thus, surface roughness of both ends of a Fabry Perot cavity formed of the silicon-crystalline germanium layer may be reduced or minimized, and a cutting process and a polishing process may be omitted in the method of fabricating the semiconductor laser device.Type: ApplicationFiled: July 10, 2012Publication date: June 20, 2013Applicant: Electronics and Telecommunications Research InstituteInventors: In Gyoo KIM, Gyungock KIM, Sang Hoon KIM, JiHo JOO, Ki Seok JANG
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Patent number: 8460089Abstract: A triggering method for a win outcome on a gaming device includes determining an amount of credit on commencement of game play. A number of symbols displayed in the game is adjusted as a function of the amount bet, to thereby affect the probability of a win outcome being generated.Type: GrantFiled: April 27, 2009Date of Patent: June 11, 2013Assignee: Aristocrat Technologies Australia PTY LimitedInventor: Claudio Daniel Dias Pires
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Patent number: 8455279Abstract: Methods for manufacturing a polarization pinned vertical cavity surface emitting laser (VCSEL). Steps include growing a lower mirror on a substrate; growing an active region on the lower mirror; growing an upper mirror on the active region; depositing a grating layer on the upper mirror; and etching a grating into the grating layer.Type: GrantFiled: August 15, 2011Date of Patent: June 4, 2013Assignee: Finisar CorporationInventors: Ralph H. Johnson, James K. Guenter
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Patent number: 8436384Abstract: Disclosed are a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises a substrate, in which concave-convex patterns are in at least a portion of a backside of the substrate, and a light emitting structure on the substrate and comprising a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer.Type: GrantFiled: February 16, 2011Date of Patent: May 7, 2013Assignee: LG Innotek Co., Ltd.Inventor: Ho Sang Yoon
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Patent number: 8409889Abstract: A method for producing a semiconductor optical device, includes the steps of: (a) forming a semiconductor region on a substrate, the substrate including first and second areas; the first area including device sections (b) forming a first mask on the semiconductor region, the first mask including first patterns periodically arranged in the first area and a second pattern provided in the second area; (c) forming a plurality of periodic structures in each of the device sections and a monitoring structure in the second area by using the first mask, the periodic structures respectively corresponding to the first patterns, the monitoring structure corresponding to the second pattern; (d) measuring a shape of the monitoring structure; (e) selecting a desired periodic structure from the plurality of periodic structures on a basis of a result of measuring the shape of the monitoring structure; (f) forming a second mask including a pattern on the desired periodic structure; and (g) forming stripe mesas including the deType: GrantFiled: May 18, 2010Date of Patent: April 2, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventor: Kenji Hiratsuka
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Patent number: 8405065Abstract: An LED semiconductor body includes a semiconductor layer sequence which comprises a quantum structure which is intended to produce radiation and comprises at least one quantum layer and at least one barrier layer, wherein the quantum layer and the barrier layer are strained with mutually opposite mathematical signs.Type: GrantFiled: July 27, 2007Date of Patent: March 26, 2013Assignee: OSRAM Opto Semiconductors GmbHInventors: Günther Grönninger, Christian Jung, Peter Heidborn, Alexander Behres
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Patent number: 8402789Abstract: A method of producing a thermally stable grating allows the grating to be placed in environments where temperatures reach 1000° C. These gratings may be concatenated so as to form a sensor array. The method requires a step of lowering the characteristic intensity threshold of a waveguide by at least 25%, followed by irradiating the waveguide with femtosecond pulses of light having a sufficient intensity and for a sufficient duration to write the grating so that at least 60% of the grating remains after exposures of at least 10 hours at a temperature of at least 1000° C. Pre-writing a Type I grating before writing a minimal damage Type II grating lowers the characteristic threshold of the waveguide so that a stable low damage type II grating can be written; alternatively providing a hydrogen or deuterium loaded waveguide before writing the grating lowers the characteristic threshold of the waveguide.Type: GrantFiled: August 23, 2012Date of Patent: March 26, 2013Assignee: Her Majesty the Queen in Right of Canada, as Represented by the Minister of Industry, Through the Communications Research Centre CanadaInventors: Christopher W. Smelser, Stephen J. Mihailov, Dan Grobnic, Ping Lu, Robert B. Walker, Gino Cuglietta, Huimin Ding, Xiaoli Dai
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Patent number: 8394708Abstract: A method and system for assembling a quasicrystalline heterostructure. A plurality of particles is provided with desirable predetermined character. The particles are suspended in a medium, and holographic optical traps are used to position the particles in a way to achieve an arrangement which provides a desired property.Type: GrantFiled: June 17, 2011Date of Patent: March 12, 2013Assignees: New York University, The Trustees of Princeton UniversityInventors: David G. Grier, Yael Roichman, Weining Man, Paul Michael Chaikin, Paul Joseph Steinhardt
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Publication number: 20130038937Abstract: A tunable optical diffraction grating apparatus, such as but not limited to a tunable Fresnel zone lens apparatus, includes a plurality of symmetric repeating structures (i.e., typically concentric rings) located over a substrate and comprising a material susceptible to a transparent to opaque transition for a designated radiation wavelength. The tunable optical diffraction grating apparatus also includes a means for separately effecting the transparent to opaque transition for each of the plurality of symmetric repeating structures to provide a plurality of transparent zones each comprising a variable first sub-plurality of adjacent transparent symmetric repeating structures alternating and interposed between a plurality of opaque zones each comprising a variable second sub-plurality of adjacent opaque symmetric repeating structures. Also included are a method for fabricating the tunable optical diffraction grating apparatus and a method for operating the tunable optical diffraction grating apparatus.Type: ApplicationFiled: August 10, 2011Publication date: February 14, 2013Applicant: UNIVERSITY OF CENTRAL FLORIDAInventors: Glenn Boreman, David Shelton
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Publication number: 20130033752Abstract: A diffraction-type 3D display element is arranged on an image output face of a 3D display device and comprises a first diffraction area and a second diffraction area. The first diffraction area has a plurality of first stepped gratings spaced apart from each other. The second diffraction area has a plurality of second stepped gratings spaced apart from each other. The second diffraction area is adjacent to the first diffraction area and is arranged symmetrically to the first diffraction area with a central line being the symmetric axis. The diffraction-type 3D display element of the invention diffracts the images output by the 3D display device and projects the diffracted images to two different viewing areas to provide 3D images for users.Type: ApplicationFiled: August 4, 2011Publication date: February 7, 2013Inventors: Chien-Yue CHEN, Wen-Chen Hung, Yao-Ru Chang
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Patent number: 8367434Abstract: Method for fabricating a substrate comprising a nanostructured surface for an organic light emitting diode OLED, in which a layer of an organic resin or of a mineral material having a first nanostructuration is prepared by nano-imprint; the organic resin or mineral material is heated to a temperature equal to or higher than its glass transition temperature Tg or its melting point, and the organic resin or the mineral material is maintained at this temperature for a time tR called annealing time, whereby the organic resin or the mineral material flows and the first nanostructuration of the layer of organic resin or of mineral material is modified to produce a second nanostructuration; the organic resin or the mineral material is cooled.Type: GrantFiled: November 24, 2009Date of Patent: February 5, 2013Assignee: Commissariat a l'Energie AtomiqueInventors: Alexandre Mary, Luc Andre, Stefan Landis
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Patent number: 8368097Abstract: An LED package comprises a frame having a concave portion formed in the center thereof; one or more LED chips mounted on the bottom surface of the concave portion; and a lens filled in the concave portion, the lens having an upper surface formed of continuous prismatic irregularities forming concentric circles.Type: GrantFiled: July 13, 2007Date of Patent: February 5, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun Jun Kim, Chang Hwan Choi, Jong Myeon Lee, Dong Woohn Kim, Won Ha Moon
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Patent number: 8357555Abstract: A method for producing a semiconductor optical device includes the steps of forming a semiconductor layer; forming a non-silicon-containing resin layer; forming a first pattern in the non-silicon-containing resin layer; forming a silicon-containing resin layer; etching the silicon-containing resin layer to have a second pattern reverse to the first pattern; selectively etching the non-silicon-containing resin layer by a RIE method employing a gas mixture containing CF4 gas and O2 gas, the non-silicon-containing resin layer having the second pattern; and etching the semiconductor layer.Type: GrantFiled: June 2, 2011Date of Patent: January 22, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventor: Yukihiro Tsuji
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Publication number: 20130005062Abstract: A method for manufacturing a semiconductor laser includes the steps of preparing a mold with a pattern surface having recesses, forming a stacked semiconductor layer including a grating layer, forming a resin part on the grating layer, forming a resin pattern portion on the resin part, forming a diffraction grating by etching the grating layer using the resin part as a mask, and forming a mesa-structure on the stacked semiconductor layer. Each of the recesses includes two end portions and a middle portion between the two end portions. A depth of at least one of the two end portions from the pattern surface is greater than that of the middle portion. The step of forming the mesa-structure includes the step of etching the stacked semiconductor layer so as to remove end portions of the diffraction grating in a direction orthogonal to a periodic direction thereof.Type: ApplicationFiled: June 21, 2012Publication date: January 3, 2013Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventor: Masaki YANAGISAWA
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Patent number: 8338203Abstract: A compound semiconductor light-emitting device has a light-emitting layer, on a substrate, wherein at least a part of a substrate portion of the device side surface has recessed portions in a side direction of the device.Type: GrantFiled: June 23, 2010Date of Patent: December 25, 2012Assignee: Showa Denko K.K.Inventor: Katsuki Kusunoki
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Publication number: 20120320940Abstract: A laser device includes a substrate, a lower cladding layer on the substrate, an active layer on the lower cladding layer and having a disordered portion spaced from an end face of a resonator of the laser device, an upper cladding layer located on the active layer, and a diffraction grating located in a portion of a layer lying above or below the active layer, with respect to the substrate. The disordered portion intersects a boundary between a diffraction grating section, in which the diffraction grating is located, and a bulk section, in which no diffraction grating is located.Type: ApplicationFiled: February 22, 2012Publication date: December 20, 2012Applicant: MITSUBISHI ELECTRIC CORPORATIONInventor: Takashi MOTODA
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Patent number: 8319238Abstract: A light emitting device having a high degree of light extraction efficiency includes a substrate, and a light emitting structure disposed on one surface of the substrate, the substrate having an internal reformed region where the index of refraction differs from the remainder the substrate. The ratio of the depth of the reformed region (distance between the other surface of the substrate and the reformed region) to the thickness of the substrate is in a range of between 1/8 and 9/11.Type: GrantFiled: January 13, 2010Date of Patent: November 27, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Seung-Jae Lee, Seong-Deok Hwang, Yu-sik Kim, Sun-Pil Youn
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Patent number: 8319229Abstract: An optical semiconductor device is disclosed including an active region including an active layer and a diffraction grating having a ?/4 phase shift; passive waveguide regions each including a passive waveguide and a diffraction grating, disposed on the side of an emission facet and on the side of a rear facet sandwiching the active region between the passive waveguide regions, respectively; and an anti-reflection coating applied on the emission facet, wherein the passive waveguide region on the side of the emission facet has a length shorter than a length of the passive waveguide region on the side of the rear facet side.Type: GrantFiled: September 13, 2010Date of Patent: November 27, 2012Assignee: Fujitsu LimitedInventors: Tsuyoshi Yamamoto, Manabu Matsuda