Passivating Of Surface Patents (Class 438/38)
  • Patent number: 7781240
    Abstract: An integrally packaged optronic integrated circuit device (310) including an integrated circuit die (322) containing at least one of a radiation emitter and radiation receiver and having top and bottom surfaces formed of electrically insulative and mechanically protective material, at least one of the surfaces (317) being transparent to radiation, and electrically insulative edge surfaces (314) having pads.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: August 24, 2010
    Assignee: Tessera Technologies Hungary Kft.
    Inventor: Avner Badehi
  • Publication number: 20100207549
    Abstract: Visible and infrared light sources on silicon that have several attractive properties with respect to integrated optics. First, the devices are operational at room temperature and strictly require no thermal processing in their synthesis (although low temperature annealing can be used to form Ohmic contacts). These devices could therefore be included at any stage of chip fabrication. The special ease of synthesis of these silicon LEDs enables simple fabrication of surface structures such as patterned emitters and photonic crystal surfaces that enhance light emission in the forward direction. The LEDs are color-switchable—by reversing the current one can switch from infrared emission to visible emission. The lifetime of the luminescence is much shorter than the standard carrier recombination time in silicon, suggesting direct modulation of the emitted light.
    Type: Application
    Filed: September 10, 2008
    Publication date: August 19, 2010
    Applicant: THE GOVERNORS OF THE UNIVERSITY OF ALBERTA
    Inventors: Al Meldrum, Sulan Kuai
  • Publication number: 20100193827
    Abstract: A pixel structure includes a first patterned metal layer, a gate insulating layer, a semiconductor channel layer, a second patterned metal layer, a passivation layer, and a conducting layer. A gate line of the second patterned metal layer is electrically connected by the conducting layer to a gate extension electrode of the first patterned metal layer. A source electrode of the second patterned metal layer is electrically connected by the conducting layer to a second data line segment of the first patterned metal layer. A method for fabricating a pixel structure is also disclosed herein.
    Type: Application
    Filed: July 23, 2009
    Publication date: August 5, 2010
    Applicant: AU OPTRONICS CORPORATION
    Inventor: Hsiang-Lin Lin
  • Patent number: 7767572
    Abstract: Methods of forming a barrier layer for an interconnection structure are provided. In one embodiment, a method for forming an interconnect structure includes providing a substrate having a first conductive layer disposed thereon, incorporating oxygen into an upper portion of the first conductive layer, depositing a first barrier layer on the first conductive layer, and diffusing the oxygen incorporated into the upper portion of the first conductive layer into a lower portion of the first barrier layer. In another embodiment, a method for forming an interconnection structure includes providing a substrate having a first conductive layer disposed thereon, treating an upper surface of the first conductive layer with an oxygen containing gas, depositing a first barrier layer on the treated conductive layer, and depositing a second conductive layer on the first barrier layer while driving a portion of oxygen atoms from the treated conductive layer into the first barrier layer.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: August 3, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Chong Jiang, Anthony Chih-Tung Chan
  • Patent number: 7749820
    Abstract: Disclosed is a manufacturing method of a thin film transistor, which enables the formation of a thin film transistor by using only one photomask. The method includes: over a substrate sequentially forming a first insulating film, a first conductive film, a second insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film; forming a resist mask thereover using a first photomask; performing a first etching to allow the side surface of the layers including an upper portion of the first insulating film, the first conductive film, the second insulating film, the semiconductor film, the impurity semiconductor film, and the second conductive film to be coplanar to a side surface of the resist mask; and performing a second etching to selectively etch the first conductive film to allow the side surface of the first conductive film is located inside the side surface of the layers.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: July 6, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hidekazu Miyairi
  • Publication number: 20100155730
    Abstract: In the manufacturing process of the thin film transistor array panel according to an exemplary embodiment of the present invention using three masks, the metal oxide semiconductor or the transparent conductive oxide is used, thereby executing an efficient lift-off process.
    Type: Application
    Filed: June 9, 2009
    Publication date: June 24, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sun-Young HONG, Young-Joo CHOI, Nam-Seok SUH, Hong-Sick PARK, Jong-Hyun CHOUNG, Bong-Kyun KIM, Byeong-Jin LEE
  • Publication number: 20100132762
    Abstract: Improved environmental barrier coatings and improved organic semiconductor devices employing the improved environmental barrier coatings are disclosed herein. Methods of making and using the improved coatings and devices are also described. An improved environmental barrier coating generally includes a primary barrier layer, a secondary barrier layer disposed on the primary barrier layer, and a passivation layer disposed on the secondary barrier layer. The secondary barrier layer is formed using atomic layer deposition.
    Type: Application
    Filed: December 1, 2009
    Publication date: June 3, 2010
    Applicant: Georgia Tech Research Corporation
    Inventors: SAMUEL GRAHAM, JR., Bernard Kippelen, Namsu Kim, Benoit Domercq
  • Publication number: 20100133990
    Abstract: An organic light emitting device includes a substrate including a display area and a peripheral area, a first signal line and a second signal line intersecting the first signal line, a switching thin film transistor electrically connected to the first signal line and the second signal line, a driving thin film transistor electrically connected to the switching thin film transistor, a pixel electrode electrically connected to the driving thin film transistor, a light emitting member disposed on the pixel electrode, a common electrode disposed on the light emitting member, a blocking member disposed on at least one of the first signal line and the second signal line in the peripheral area, the blocking member comprising protruding and recessed portions, and a sealant disposed on the blocking member, the sealant overlapping a portion of the blocking member.
    Type: Application
    Filed: April 23, 2009
    Publication date: June 3, 2010
    Inventors: Sun PARK, Yul-Kyu LEE, Min-Hyuk CHOI, Young-Dong KWON
  • Publication number: 20100117115
    Abstract: A method includes steps of: sequentially growing a first semiconductor layer of a first conductivity type, an active layer, and a second semiconductor layer of a second conductivity type on a growth substrate to form a layered structure; separating the substrate from the layered structure to expose the first layer; performing wet etching on an exposed surface to form defect depressions; forming an insulating layer on the exposed surface; polishing the insulating layer and the first layer to flatten the surface of the first layer; and performing wet etching on the surface of the first layer to form protrusions deriving from a crystal structure.
    Type: Application
    Filed: November 9, 2009
    Publication date: May 13, 2010
    Applicant: Stanley Electric Co., Ltd.
    Inventors: Satoshi TANAKA, Yusuke Yokobayashi
  • Patent number: 7709283
    Abstract: The invention provides a semiconductor device, a method of manufacturing the same, an electro-optic device and an electronic apparatus which are capable of addressing or solving a problem of mechanical mounting of a semiconductor element chip on a substrate. A semiconductor device includes a tile-shaped microelement bonded to a substrate, and an insulating functional film provided to cover at least a portion of the tile-shaped microelement.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: May 4, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Takayuki Kondo
  • Patent number: 7709280
    Abstract: The invention relates to a method of reducing vertical divergence of a high-power semiconductor laser with a negligible threshold current and conversion efficiency penalty. The low divergence is achieved by increasing the thickness of the n-cladding layer in an asymmetric laser diode stack structure, to a value ranging from 1 to 4 times the laser mode size measured at 10% level. The divergence may be tuned by adjusting the n-cladding layer parameters in an area of the tail the optical mode, measuring 0.03% or less of the maximal optical power density of said optical mode.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: May 4, 2010
    Assignee: JDS Uniphase Corporation
    Inventor: Guowen Yang
  • Patent number: 7693382
    Abstract: A device for optical communication includes an organic optical waveguide having a core part and a cladding part. The core part and the cladding part comprise a polymer material, and the cladding part includes particles.
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: April 6, 2010
    Assignee: Ibiden Co., Ltd.
    Inventor: Motoo Asai
  • Patent number: 7687291
    Abstract: Methods of preparing front and back facets of a diode laser include controlling an atmosphere within a first chamber, such that an oxygen content and a water vapor content are controlled to within predetermined levels and cleaving the diode laser from a wafer within the controlled atmosphere of the first chamber to form a native oxide layer hating a predetermined thickness on the front and back facets of the diode laser. After cleavage, the diode laser is transported from the first chamber to a second chamber within a controlled atmosphere, the native oxide layer on the front and back facets of the diode laser is partially removed, an amorphous surface layer is formed on the front and back facets of the diode laser, and the front and back facets of the diode laser are passivated.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: March 30, 2010
    Assignee: Trumpf Photonics Inc.
    Inventors: Greg Charache, John Hostetler, Ching-Long Jiang, Raymond J. Menna, Radosveta Radionova, Robert W. Roff, Holger Schlüter
  • Patent number: 7670860
    Abstract: A method of manufacturing a semiconductor device, the semiconductor device comprising: a semiconductor substrate; a pixel portion including an in-layer lens; and a peripheral circuit portion including a metal wiring portion, the pixel portion and the peripheral circuit portion being on the semiconductor substrate, the method comprising: forming an insulating film in the pixel portion and the peripheral circuit portion, so as to cover the metal wiring portion; providing, on the insulating film, a lens material layer for forming the in-layer lens; forming a resist layer for etching the lens material layer; curing the resist layer; and forming a first region and a second region in the resist layer, wherein a portion of the resist layer in the first region is thicker than that of the resist layer in the second region, the first region being in the peripheral circuit portion and the second region being in the pixel portion.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: March 2, 2010
    Assignee: FUJIFILM Corporation
    Inventor: Takeo Yoshida
  • Publication number: 20100035418
    Abstract: The present invention provides, in part, methods producing multilayer semiconductor structures having one or more at least partially relaxed strained layers, where the strained layer is at least partially relaxed by annealing. In particular, the invention forms diffusion barriers that prevent diffusion of contaminants during annealing. The invention also includes embodiments where the at least partially relaxed strained layer is patterned into islands by etching trenches and the like. The invention also provides semiconductor structures resulting from these methods, and further, provides such structures where the semiconductor materials are suitable for application to LED devices, laser devices, photovoltaic devices, and other optoelectronic devices.
    Type: Application
    Filed: December 22, 2008
    Publication date: February 11, 2010
    Inventors: Bruce FAURE, Pascal Guenard
  • Patent number: 7659475
    Abstract: The present invention provides a method for dielectric passivating the surface of a solar cell by accumulation of negative fixed charges of a first type at the interface between semiconductor material and a passivating material. According to the invention the passivating material comprises an oxide system, for example a binary oxide system, comprising Al2O3 and at least one metal oxide or metalloid oxide which enhances the tetrahedral structure of Al2O3, for example, an (Al2O3)x(TiO2)1-x alloy. In this way it is possible to combine the desirable properties from at least two different oxides, while eliminating the undesirable properties of each individual material. The oxide system can be deposited onto the semiconductor surface by means of a sol-gel method, comprising the steps of formation of the metal oxide and/or metalloid oxide sol and the aluminum solution and then carefully mixing these together under stirring and ultrasonic treatment.
    Type: Grant
    Filed: June 17, 2004
    Date of Patent: February 9, 2010
    Assignee: IMEC
    Inventors: Guido Agostinelli, Jozef Szlufcik, Petko Vitanov, Antoaneta Harizanova
  • Patent number: 7659130
    Abstract: A gate conductor including a gate line, a gate pad and a gate electrode is formed on a substrate. A gate insulating layer, a semiconductor layer, a doped amorphous silicon layer and a conductive layer are deposited in sequence, and then a photoresist film pattern is formed thereon. The photoresist film pattern includes a first portion positioned between the to be formed source electrode and drain electrode, a second portion thicker than the first portion, and the third portion with no photoresist. A data conductor including a data line, a data pad, a source electrode, a drain electrode and a conductor pattern for a storage capacitor, an ohmic contact layer pattern and a semiconductor pattern are formed by etching the conductive layer, the doped amorphous silicon layer and the semiconductor layer using the photoresist film pattern. A plurality of color filters of red, green and blue having apertures exposing part of the drain electrode are formed thereon.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: February 9, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Joon Rhee, Jong-Soo Yoon
  • Publication number: 20100012938
    Abstract: A thin film transistor (TFT) substrate includes gate lines, data lines intersecting with the gate lines, a plurality of TFTs, pixel electrodes, and a common electrode insulating the gate lines, the data lines, the TFTs, and the pixel electrode. Each pixel electrode is connected to one of the gate lines and one of the data lines via one of the TFTs. A layer stack including an insulating layer and a passivation layer is sandwiched between the pixel electrodes and the common electrode.
    Type: Application
    Filed: July 20, 2009
    Publication date: January 21, 2010
    Inventors: Yu-Cheng Chang, Shuo-Ting Yan, Chao-Yi Hung
  • Publication number: 20100006884
    Abstract: The application relates to a structure of a light emitting device and the manufacturing method thereof. The application discloses a method of forming a bonding pad of the light emitting device by chemical deposition method. The light emitting device includes a substrate, a semiconductor stack deposited on the substrate wherein the semiconductor stack includes at least a p-type semiconductor layer, an n-type semiconductor layer, and an active layer disposed between the p-type semiconductor layer and the n-type semiconductor layer. A bonding pad is formed on at least one of the p-type semiconductor layer and the n-type semiconductor layer wherein the bonding pad includes a seed layer formed by physical deposition method, and a chemically-deposited layer formed by chemical deposition method. The thickness of the seed layer is smaller than that of the chemically-deposited layer.
    Type: Application
    Filed: September 15, 2009
    Publication date: January 14, 2010
    Applicant: Epistar Corporation
    Inventors: Chen Ou, Chen-Ke Hsu, Chia-Ming Chuang
  • Patent number: 7645625
    Abstract: The present invention provides a method for fine processing of a substrate, a method for fabrication of a substrate, and a light emitting device. In the method for fine processing of a substrate, after removing a single particle layer from the substrate having the single particle layer, a hole having an inner diameter smaller than a diameter of a particle and centering on a position on the substrate where each particle constructing the single particle layer has been placed is formed by etching.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: January 12, 2010
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Yoshinobu Ono, Kenji Kasahara, Kazumasa Ueda
  • Publication number: 20090321740
    Abstract: A TFT-LCD array substrate and a manufacturing method thereof. The array substrate comprises a gate line, a data line, and a pixel electrode, and the pixel electrode is disposed in a pixel region defined by the intersection between the gate line and the data line. In the pixel region, a partition groove for forming a pixel electrode pattern is provided at the periphery of the pixel electrode. This structure is helpful to form a pixel electrode pattern by a lift-off process, which significantly reduces the production cost and improves the production yield.
    Type: Application
    Filed: June 24, 2009
    Publication date: December 31, 2009
    Inventors: Hongxi XIAO, Jae Yun JUNG, Zuhong LIU, Taek Ho HONG, Jeong Hun RHEE
  • Publication number: 20090325333
    Abstract: According to one aspect of the present invention, at least one or more of patterns required for manufacturing a display device, such as a conductive layer which forms a wiring or an electrode and a mask, is formed by a droplet discharging method. At that time, a portion of the gate insulating film where is not located under the semiconductor layer is removed during manufacturing steps of the present invention.
    Type: Application
    Filed: September 2, 2009
    Publication date: December 31, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kunihiko Fukuchi, Gen Fujii, Osamu Nakamura, Shinji Maekawa
  • Publication number: 20090311817
    Abstract: A vertical nitride-based semiconductor LED comprises a structure support layer; a p-electrode formed on the structure support layer; a p-type nitride semiconductor layer formed on the p-electrode; an active layer formed on the p-type nitride semiconductor layer; an n-type nitride semiconductor layer formed on the active layer; an n-electrode formed on a portion of the n-type nitride semiconductor layer; and a buffer layer formed on a region of the n-type nitride semiconductor layer on which the n-electrode is not formed, the buffer layer having irregularities formed thereon. The surface of the n-type nitride semiconductor layer coming in contact with the n-electrode is flat.
    Type: Application
    Filed: August 20, 2009
    Publication date: December 17, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sang Ho YOON, Su Yeol Lee, Doo Go Baik, Seok Beom Choi, Tae Sung Jang, Jong Gun Woo
  • Publication number: 20090278163
    Abstract: A light-emitting device (1) is provided having a current blocking layer (9) of buried structure, a portion of the current blocking layer (9) having an oxygen concentration higher than that of a light-emitting layer, the current blocking layer being of a thickness of not less than 5 nm and not more than 100 nm. It includes an etching stop layer (24) below the current blocking layer (9), the etching stop layer being good in oxidation resistance. The light-emitting device (1) and its manufacturing method are provided such that the device has its current confinement effect improved and its output increased at lower forward voltage.
    Type: Application
    Filed: September 28, 2006
    Publication date: November 12, 2009
    Inventors: Ryo Sakamoto, Masatoshi Iwata, Susumu Tsujikawa, Yoshiyuki Kobayashi
  • Publication number: 20090272977
    Abstract: A method of fabricating a pixel structure of a thin film transistor liquid crystal display is provided. A transparent conductive layer and a first metallic layer are sequentially formed over a substrate. The first metallic layer and the transparent conductive layer are patterned to form a gate pattern and a pixel electrode pattern. A gate insulating layer and a semiconductor layer are sequentially formed over the substrate. A patterning process is performed to remove the first metallic layer in the pixel electrode pattern while remaining the gate insulating layer and the semiconductor layer over the gate pattern. A second metallic layer is formed over the substrate. The second metallic layer is patterned to form a source/drain pattern over the semiconductor layer. A passivation layer is formed over the substrate and then the passivation layer is patterned to expose the transparent conductive layer in the pixel electrode pattern.
    Type: Application
    Filed: July 16, 2009
    Publication date: November 5, 2009
    Applicant: Au Optronics Corporation
    Inventors: MAO-TSUN HUANG, Tzufong Huang
  • Publication number: 20090268134
    Abstract: A liquid crystal display includes a first substrate, a plurality of gate lines formed on the first substrate, a plurality of data lines intersecting the gate lines, a plurality of thin film transistors connected to the gate lines and the data lines, a plurality of color filters formed on the gate lines, the data lines, and the thin film transistors, a plurality of first electrodes made of a transparent conductor formed on the color filters, and electrically connected to the thin film transistors, a first passivation layer formed on the first electrodes, a second electrode formed on the first passivation layer, and including a plurality of branch electrodes, a second substrate facing the first substrate, and a liquid crystal layer disposed between the first substrate and the second substrate.
    Type: Application
    Filed: July 8, 2009
    Publication date: October 29, 2009
    Inventors: Young-Wook Lee, Jang-Soo Kim, Kang-Woo Kim, Youn-Hak Jeong
  • Publication number: 20090257466
    Abstract: In at least one embodiment, the optoelectronic semiconductor component includes an optically active area that is formed with a crystalline semiconductor material that contains at least one of the substances gallium or aluminum. Furthermore, the semiconductor component contains at least one facet on the optically active area. Furthermore, the semiconductor component contains at least one boundary layer, containing sulfur or selenium, with a thickness of up to five monolayers, wherein the boundary layer is located on the facet. Such a semiconductor component has a high destruction threshold relative to the optical powers that occur during operation of the semiconductor component.
    Type: Application
    Filed: April 8, 2009
    Publication date: October 15, 2009
    Inventors: Franz Eberhard, Berthold Hahn, Stephan Kaiser, Bernd Mayer
  • Patent number: 7598102
    Abstract: A fabricating method for a pixel structure including following procedures is provided. First, a gate and a gate insulator layer are formed sequentially on a substrate. Next, a semiconductor layer, a conductive layer and a photosensitive black matrix having a color filter containing opening are sequentially formed on the gate insulator layer. The photosensitive black matrix includes a first portion and a second portion. A thickness of the first portion is smaller than that of the second portion. A channel, a source and a drain are formed simultaneously using the photosensitive black matrix as a mask. A passivation is formed on the substrate, and a color filer layer is formed within the color filter containing opening via an inkjet printing process and a dielectric layer is formed thereon. Next, a patterning process is applied to expose the drain. Ultimately, a pixel electrode connected to the drain is formed.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: October 6, 2009
    Assignee: Au Optronics Corporation
    Inventors: Chou-Huan Yu, Chun-Yi Chiang, Chia-Chi Tsai, Chen-Pang Tung, Hsiang-Chih Hsiao, Chia-Ming Chang, Zong-Long Jhang, Che-Yung Lai, Han-Tang Chou, Jun-Kai Chang, Ta-Wen Liao
  • Publication number: 20090236977
    Abstract: An organic light emitting diode (OLED) display device and a method of fabricating the same. The OLED display device includes a substrate, a thin film transistor on the substrate and including a semiconductor layer, a gate electrode, a gate insulating layer, a source electrode and a drain electrode. A passivation layer is on an entire surface of the substrate including the thin film transistor. A planarization layer is on the passivation layer. A first electrode is on the planarization layer and electrically coupled to any one of the source electrode or the drain electrode. A metal mixture layer is on substantially the entire surface of the substrate and includes a conductive region and a non-conductive region. An organic emitting layer and a second electrode both are on the metal mixture layer.
    Type: Application
    Filed: January 21, 2009
    Publication date: September 24, 2009
    Inventors: Min-Chul Suh, Seong-Taek Lee
  • Publication number: 20090225804
    Abstract: A semiconductor laser comprises an active section for generating light, and a peripheral section as resonator for producing laser light from the generated light, and includes an InP substrate. The active section has a lower cladding layer formed of AlInAs or AlGaInAs, a core layer including an active layer formed of AlGaInAs or InGaAsP, and an upper cladding layer formed of AlInAs or AlGaInAs. The peripheral section has a first cladding layer formed by oxidizing AlInAs or AlGaInAs, a core layer, and a second clad layer formed by oxidizing AlInAs or AlGaInAs, and a two-dimensional photonic crystal defined by an array of regularly spaced apart holes the peripheral section.
    Type: Application
    Filed: February 25, 2009
    Publication date: September 10, 2009
    Applicants: MITSUBISHI ELECTRIC CORPORATION, OSAKA UNIVERSITY
    Inventors: Yoshifumi Sasahata, Keisuke Matsumoto, Toshitaka Aoyagi, Masahiko Kondow, Masato Morifuji, Hideki Momose
  • Publication number: 20090212298
    Abstract: Disclosed are a thin film transistor substrate of an LCD device and a method of manufacturing the same. The thin film transistor substrate includes a nickel-silicide layer formed on an insulating layer pattern including silicon and a metal layer formed on the nickel-silicide layer. Nickel is coated on the insulating layer pattern including silicon and a metal material is coated on the nickel-coated layer. After that, a heat treatment is performed at about 200 to about 350° C. to obtain the nickel-silicide layer. Since the thin film transistor substrate of the LCD device is manufactured by applying the nickel-silicide wiring, a device having low resistivity and good ohmic contact property can be obtained.
    Type: Application
    Filed: December 18, 2008
    Publication date: August 27, 2009
    Inventors: Chang-Oh Jeong, Beom-Seok Cho, Hee-Hwan Choe
  • Patent number: 7566636
    Abstract: There is provided a method of scribing a stuck mother substrate for obtaining a plurality of stuck substrates formed by sticking a first square substrate and a second square substrate together so that one side of opposing two sides of the square substrates is aligned and the other side is not aligned so that the first substrate is set back to the second substrate from a stuck mother substrate in which a first mother substrate and a second mother substrate are stuck together. In the method of scribing a stuck mother substrate, the second mother substrate is strongly scribed for a full scribe line and the first mother substrate is strongly scribed for a half scribe line. On the other hand, the first mother substrate is weakly scribed for the full scribe line.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: July 28, 2009
    Assignee: Seiko Epson Corporation
    Inventors: Makoto Nakadate, Norihiko Kato, Yoichi Miyasaka
  • Patent number: 7563629
    Abstract: A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal semiconductor processing techniques. Trenches that define the boundaries of the individual devices are then formed through the semiconductor layers and into the insulating substrate, beneficially by using inductive coupled plasma reactive ion etching. The trenches are then filled with an easily removed layer. A metal support structure is then formed on the semiconductor layers (such as by plating or by deposition) and the insulating substrate is removed. Electrical contacts, a passivation layer, and metallic pads are then added to the individual devices, and the individual devices are then diced out.
    Type: Grant
    Filed: September 23, 2005
    Date of Patent: July 21, 2009
    Assignee: LG Electronics Inc.
    Inventors: Jong-Lam Lee, In-Kwon Jeong, Myung Cheol Yoo
  • Publication number: 20090181226
    Abstract: A method for manufacturing a metal line embedded in a substrate includes forming a trench in the substrate, bringing a stenciling plate having a through hole corresponding to the trench into contact with the substrate with the through hole being aligned to and exposing the trench, applying a fluidic and solidifiable metallic coating material through the through hole and into the trench, separating the stenciling plate from the substrate and solidifying the metallic coating material in the trench.
    Type: Application
    Filed: January 15, 2009
    Publication date: July 16, 2009
    Inventors: Hong-Long Ning, Chang-Oh Jeong, Pil-Sang Yun, Byeong-Beom Kim, Je-Hun Lee, Do-Hyun Kim
  • Publication number: 20090174322
    Abstract: An organic light-emitting device and a method for forming the same are provided. The organic light-emitting device includes: a substrate including a pixel area and a peripheral circuit area; a passivation layer on the substrate, the passivation layer including a first part in the pixel area and a second part in the peripheral circuit area; a pixel definition layer defining a plurality of pixel openings corresponding to the pixel area of the substrate; a plurality of first electrodes in the pixel openings; an adhesion layer on the second part; an organic layer on the first electrodes; and a second electrode layer on the organic light emitting layer, wherein the second electrode extends to the peripheral circuit area to connect with the adhesion layer.
    Type: Application
    Filed: January 2, 2009
    Publication date: July 9, 2009
    Applicant: TPO Displays Corp.
    Inventors: Chuan-Yi CHAN, Du-Zen Peng, Po-Kun Su, Ryuji Nishikawa
  • Publication number: 20090174928
    Abstract: A display substrate, an electrophoretic display (EPD) device including the same, and a method for manufacturing the same are disclosed. The display substrate includes a display region and a non-display region. The display region includes a plurality of gate lines, a plurality of data lines, and a plurality of thin film transistors (TFTs) and a plurality of pixel electrodes disposed at crossings of the gate lines and the data lines. The non-display region is located at a peripheral region of the display region and includes a solar battery. The solar battery includes at least one semiconductor layer arranged between a lower electrode and an upper electrode that oppose each other.
    Type: Application
    Filed: December 2, 2008
    Publication date: July 9, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kyu-Young KIM, Nam-Seok Roh, Ho-Yong Jung
  • Publication number: 20090127544
    Abstract: The invention relates to the production of organic field-effect transistors (OFETs), solar cells or light-emitting diodes (OLEDs) and circuits based thereon on the surface of solvent- and/or temperature-sensitive plastics, e.g. thermoplastic injection-moulded bodies. A protective layer, which comprises a polymer compound, such as polyacrylate, polyphenol, melamine resin or polyester resin, which is applied from an aqueous-alcoholic solution or without solvent to the substrate surface or one of the function-determining layers of the electronic semiconductor component in a low-temperature process at temperatures of less than 100° C. and dried, protects the substrate against undesirable action of solvents and may simultaneously serve as a planarization layer and/or as as electrical insulation layer.
    Type: Application
    Filed: July 26, 2006
    Publication date: May 21, 2009
    Inventors: Mario Schrodner, Karin Schultheis, Hannes Schache
  • Patent number: 7535621
    Abstract: A microelectromechanical systems (MEMS) device utilizing an aluminum fluoride layer as an etch stop is disclosed. In one embodiment, a MEMS device includes a first electrode having a first surface; and a second electrode having a second surface facing the first surface and defining a gap therebetween. The second electrode is movable in the gap between a first position and a second position. At least one of the electrodes includes an aluminum fluoride layer facing the other of the electrodes. During fabrication of the MEMS device, a sacrificial layer is formed between the first and second electrodes and is released to define the gap. The aluminum fluoride layer serves as an etch stop to protect the first or second electrode during the release of the sacrificial layer.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: May 19, 2009
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventor: Chih-Wei Chiang
  • Publication number: 20090111204
    Abstract: A plurality of gate lines and a plurality of data lines intersecting each other are formed on a first insulating substrate having a plurality of first cutouts are formed on the respective pixel areas defined by the data lines and the gate lines. A thin film transistor is connected to each pixel electrode. A reference electrode having a plurality of second cutouts is formed on a second substrate opposite the first substrate. The first cutouts and the second cutouts in the adjacent two pixel areas opposite each other with respect to one data line have an inversion symmetry with respect to the data line.
    Type: Application
    Filed: December 19, 2008
    Publication date: April 30, 2009
    Inventors: Sahng-Ik JUN, Woon-Yong Park
  • Publication number: 20090085039
    Abstract: The invention provides a method for fabricating a low-temperature polysilicon (LTPS) driving circuit and thin film transistor. The method includes: providing a substrate, forming an active layer, forming a gate insulating layer, forming a dielectric layer having an extending portion and forming a gate electrode. The extending portion of the dielectric layer and the gate electrode are formed during the same step, and they can serve as a mask during a later doping process so that a lightly doped source/drain region and a source/drain region are formed during the same time without forming extra masks.
    Type: Application
    Filed: September 22, 2008
    Publication date: April 2, 2009
    Inventors: Ming-Yu Chung, Shan-Hung Tsai, Su-Fen Chen, Kuan-Shiang Wong, Hsiao-Po Chang, Jung-Huang Chien, Hsiu-Hsiu Chen
  • Publication number: 20090085040
    Abstract: A thin film transistor substrate and a fabricating method simplify a process and enlarge a capacitance value of a storage capacitor without any reduction of aperture ratio. A transparent first conductive layer and an opaque second conductive layer of a double-layer structured gate line are formed having a step coverage. A pixel electrode is provided on the gate insulating film within a pixel hole of said pixel area passing through the passivation film to be connected to the thin film transistor. A storage capacitor overlaps with the pixel electrode with having the gate insulating film therebetween and has a lower storage electrode protruded from the first conductive layer.
    Type: Application
    Filed: December 1, 2008
    Publication date: April 2, 2009
    Inventor: Byung Chul Ahn
  • Patent number: 7510891
    Abstract: A method of manufacturing an organic light emitting display device and the organic light emitting display device which reduces generation of dark spots by particles are disclosed.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: March 31, 2009
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Pil-Geun Chun, Eun-Ah Kim
  • Publication number: 20090053844
    Abstract: A method for fabricating a pixel structure is provided. A substrate having a gate thereon is provided. Next, a gate dielectric layer is formed to cover the gate. A channel layer is formed on the gate dielectric layer above the gate. A source and a drain are formed on the channel layer at two sides of the gate, wherein the gate, the channel layer, the source and the drain constitute a thin film transistor (TFT). A passivation layer is formed on the gate dielectric layer and the TFT. A first shadow mask exposing parts of the passivation layer is provided thereabove. The drain is exposed by a laser applied via the first shadow mask to partially remove the passivation layer. A conductive layer is formed to cover the passivation layer and the drain. The conductive layer is then automatically patterned by the patterned passivation layer to form a pixel electrode.
    Type: Application
    Filed: March 18, 2008
    Publication date: February 26, 2009
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Ming-Yuan Huang, Chih-Chun Yang, Han-Tu Lin, Chih-Hung Shih, Ta-Wen Liao, Chin-Yueh Liao, Chia-Chi Tsai
  • Patent number: 7492012
    Abstract: A light emitting device is provided which has a structure for preventing degradation of a light emitting element due to water and oxygen contained in an interlayer insulating film formed between a TFT and the light emitting element. A TFT is formed on a substrate, an inorganic insulating film is formed on the TFT from an inorganic material and serves as a first insulating film, an organic insulating film is formed on the first insulating film from an organic material and serves as a second insulating film, and an inorganic insulating film is formed on the second insulating film from an inorganic material and serves as a third insulating film. Thus obtained is a structure for preventing the second insulating film from releasing moisture and oxygen. In order to avoid defect in forming the film, a portion of the third insulating film where a contact hole is formed is removed alone.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: February 17, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Murakami, Toru Takayama, Kengo Akimoto
  • Publication number: 20080315213
    Abstract: A method for making an electroluminescent PN junction includes molecular bonding a face in a crystalline semiconducting material doped with a first type of a first element with a face in a crystalline semiconducting material doped with a second type opposite to the first type, of a second element, at a bonding interface. The semiconducting material has an indirect forbidden band. The crystalline lattices shown by the faces are shifted in rotation by a predetermined angle so as to at least cause formation of a network of screw type dislocations at the bonding interface.
    Type: Application
    Filed: December 26, 2006
    Publication date: December 25, 2008
    Applicant: Commissariat A L'energie Atomique
    Inventor: Pierre Noe
  • Patent number: 7468529
    Abstract: A filter for trapping, sterilizing, and decomposing organic matter, bacteria, viruses, and other harmful substances is provided at low cost and extremely high efficiency. A semiconductor material having a light emitting function is formed in the interior or on the surface of a porous ceramic material substrate by deposition from a suspension of semiconductor particles, and an electrode provided to serve as a filter. Voltage is applied so that ultraviolet light is emitted while a fluid is being filtered, and any harmful substances are filtered and simultaneously sterilized and decomposed.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: December 23, 2008
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Chihiro Kawai, Masami Tatsumi
  • Patent number: 7468541
    Abstract: A magnetic random access memory includes a magnetic recording element which includes a fixed layer whose magnetization direction is fixed, a recording layer whose magnetization direction changes, and a nonmagnetic layer provided between the fixed layer and the recording layer, the recording layer having a first running portion, a first projecting portion and a second projecting portion, the first running portion which runs in a direction of axis of easy magnetization, the first and second projecting portions which project from two side surfaces of the first running portion, a mask layer which is arranged above the first running portion, and a first sidewall layer and a second sidewall layer which are formed on two side surfaces of the mask layer, respectively, and arranged on the first projecting portion and the second projecting portion, respectively.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: December 23, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshiaki Fukuzumi
  • Patent number: 7462504
    Abstract: A surface-emitting type light-emitting diode includes a substrate, a p-n junction layer elevated on a portion of the substrate to emit light, and a first isolator layer formed on a sidewall of the p-n junction layer as well as a periphery portion of a top surface of the p-n junction layer except for a central region of the top surface.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: December 9, 2008
    Assignee: LG Electronics Inc.
    Inventors: Kie Young Lee, Shi Jong Leem
  • Patent number: 7459325
    Abstract: Organic surfactants are employed to passivate the surfaces of MEMS devices, such as digital micromirrors. The binding of these surfactants to the surface is improved by first associating with the surface transition metal atoms or ions from Groups IVB, VB, and IVB of the periodic table.
    Type: Grant
    Filed: January 5, 2005
    Date of Patent: December 2, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Simon Joshua Jacobs, Seth Adrian Miller
  • Patent number: 7460851
    Abstract: A method and an apparatus for integrating a surface acoustic wave (SAW) filter and a transceiver are provided to solve the problem of having a large area of the prior-art integration of a SAW filter and a transceiver; wherein a device for integrating a SAW filter and a transceiver is provided and a component stack method is used to accomplish the integration of the SAW filter and the transceiver, and thus besides featuring a low cost and a small area as well as avoiding a signal loss, the invention can further include a design of encapsulating other components and chips, or even suitable to be used for various integrated circuit packaging technologies (such as QFP and BGA, etc.
    Type: Grant
    Filed: November 9, 2005
    Date of Patent: December 2, 2008
    Assignee: Richwave Technology Corp.
    Inventors: Yu-Ling Chiu, Tsyr-Shyang Liou