Groove Formation Patents (Class 438/42)
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Publication number: 20140315340Abstract: A method and device for emitting electromagnetic radiation using semipolar or nonpolar gallium containing substrates is described where the backside of the substrate includes multiple scribes that reduce stray light leaking.Type: ApplicationFiled: April 29, 2014Publication date: October 23, 2014Applicant: Soraa Laser Diode, Inc.Inventors: James W. Raring, Nick Pfister, Yu-Chia Chang, Mathew C. Schmidt, Drew Felker
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Patent number: 8866153Abstract: Provided is a functional element which is obtained by forming a lamination film on a substrate and then dividing the substrate and the lamination film into a desired shape. The functional element has a hexagonal substrate, a lamination film formed on a C surface of the substrate, and a plurality of divided surfaces which are exposed by dividing the substrate into quadrilaterals. At least one line of division lines in the case of dividing the substrate into quadrilaterals is perpendicular to any one of equivalent directions of [1-100], [?1010], and [01-01] of the substrate from a [0001] direction of the substrate, and the divided surfaces formed by the division lines are inclined in a direction of other divided surfaces to which at least a part thereof is opposed.Type: GrantFiled: January 18, 2011Date of Patent: October 21, 2014Assignee: Sharp Kabushiki KaishaInventors: Akihiro Urata, Masahiro Araki, Takaaki Utsumi, Masahiro Shiota
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Patent number: 8852974Abstract: A method for manufacturing semiconductor light-emitting devices comprising the steps of: providing a multi-layer semiconductor film comprising a surface; roughening the surface of the multi-layer semiconductor film to form a scattering surface; re-growing a semiconductor layer on the scattering surface; and roughening the semiconductor layer to form a sub-scattering portion on the scattering surface; wherein the sub-scattering portion is structurally smaller than the scattering surface.Type: GrantFiled: December 6, 2012Date of Patent: October 7, 2014Assignee: Epistar CorporationInventors: Chien-Fu Huang, Yi-Ming Chen, Yi-Tang Lai, Chia-Liang Hsu, Tsung-Hsien Yang, Tzu-Chieh Hsu
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Publication number: 20140291632Abstract: A method of manufacturing an organic light emitting diode display according to an exemplary embodiment of the present invention includes: forming a first electrode on a substrate; forming an insulation layer on the first electrode; etching the insulation layer to expose the first electrode so as to form a pixel defining layer having the same height as the first electrode; forming an organic layer including one or more emission layers on the first electrode of a sub-pixel region defined by the pixel defining layer by applying a laser-induced thermal imaging (LITI) method; and forming a second electrode on the organic layer.Type: ApplicationFiled: October 18, 2013Publication date: October 2, 2014Inventors: VALERIY PRUSHINSKIY, Min-Soo KIM, Won-Sik HYUN, Heung-Yeol NA, Jin-Won SUN
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Patent number: 8841150Abstract: In an aspect, an array substrate for a flexible display device and a method of manufacturing the array substrate, the method including operations of arranging at least one lower protective film on which a plurality of display units that are covered by thin-film encapsulation (TFE) units are arrayed; performing half cutting and full cutting on the at least one lower protective film; and completing the manufacture of each of the plurality of display units by removing remaining parts on the at least one lower protective film from the half cutting and full cutting is provided.Type: GrantFiled: January 23, 2013Date of Patent: September 23, 2014Assignee: Samsung Display Co., Ltd.Inventors: Dong-Ho Kim, Sung-Un Park
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Patent number: 8836082Abstract: A novel reversal lithography process without etch back is described. The reversal material comprises nanoparticles that are selectively deposited into the gaps between features without overcoating the tops of the features. As a result, a patterned imaging layer can be removed using solvent, blanket exposure followed by developer washing, or dry etching directly, without an etch-back process, and the original bright field lithography pattern can be reversed into dark field features, and transferred into subsequent layers using the nanoparticle reversal material as an etch mask.Type: GrantFiled: January 31, 2011Date of Patent: September 16, 2014Assignee: Brewer Science Inc.Inventors: Qin Lin, Daniel M. Sullivan, Hao Xu, Tony D. Flaim
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Patent number: 8835937Abstract: Disclosed is an optoelectronic component (1) comprising a semiconductor function region (2) with an active zone (400) and a lateral main direction of extension, said semiconductor function region including at least one opening (9, 27, 29) through the active zone, and there being disposed in the region of the opening a connecting conductor material (8) that is electrically isolated (10) from the active zone in at least in a subregion of the opening. Further disclosed are a method for producing such an optoelectronic component and a device comprising a plurality of optoelectronic components. The component and the device can be produced entirely on-wafer.Type: GrantFiled: February 18, 2005Date of Patent: September 16, 2014Assignee: Osram Opto Semiconductors GmbHInventors: Ralph Wirth, Herbert Brunner, Stefan Illek, Dieter Eissler
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Patent number: 8828752Abstract: A light emitting diode (LED) comprises an n-type Group III-V semiconductor layer, an active layer adjacent to the n-type Group III-V semiconductor layer, and a p-type Group III-V semiconductor layer adjacent to the active layer. The active layer includes one or more V-pits. A portion of the p-type Group III-V semiconductor layer is in the V-pits. A p-type dopant injection layer provided during the formation of the p-type Group III-V layer aids in providing a predetermined concentration, distribution and/or uniformity of the p-type dopant in the V-pits.Type: GrantFiled: December 18, 2013Date of Patent: September 9, 2014Assignee: Manutius IP Inc.Inventor: Steve Ting
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Patent number: 8828250Abstract: A method of manufacturing an optical element module in which an optical element and a semiconductor circuit element are mounted on one surface of a silicon substrate, a mirror surface inclined at approximately 45 degrees is formed on the other surface, and an optical fiber facing the mirror surface is disposed in a V groove formed along the other surface, the method of manufacturing includes the steps of forming the mirror surface and V-shaped side surfaces of the V groove simultaneously by first crystal anisotropic etching on the other surface, and forming an attaching surface substantially perpendicular to the one surface and the other surface, which is formed at an end side of the V groove, and for attaching an end of the optical fiber, by second crystal anisotropic etching in a crystal plane orientation different from that of the first crystal anisotropic etching.Type: GrantFiled: December 21, 2012Date of Patent: September 9, 2014Assignee: Hamamatsu Photonics K.K.Inventors: Yoshihisa Warashina, Masayuki Ishida
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Patent number: 8822249Abstract: A light-emitting device and a method of manufacturing the same are provided. The light-emitting device includes a compound semiconductor structure having a first N-type compound semiconductor layer, an active layer, and a P-type compound semiconductor layer, a P-type electrode layer that is disposed on the P-type compound semiconductor layer and electrically connects with the P-type compound semiconductor layer, a plurality of insulation walls disposed at two sides of the compound semiconductor structure and the P-type electrode layer, a plurality of N-type electrode layers penetrating the plurality of insulation walls, and a conductive substrate on which a plurality of N-type electrode connecting layers respectively corresponding to a plurality of N-type electrode layers are separated from a P-type electrode connecting layer corresponding to the P-type electrode layer.Type: GrantFiled: March 30, 2012Date of Patent: September 2, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Ho-sun Paek, Hak-hwan Kim, Sung-kyong Oh
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Publication number: 20140231832Abstract: A three-terminal light emitting device (LED) chip, associated fabrication method, and LED array are provided. The method forms an n-doped semiconductor layer overlying a substrate, an active semiconductor layer overlying the n-doped semiconductor layer, and a p-doped semiconductor layer overlying the active semiconductor layer. A trench is formed through the p-doped and active semiconductor layers, exposing the n-doped semiconductor layer. In one aspect, the trench is formed at least part way, but not completely, through the n-doped semiconductor layer. Then, an LED P electrode is formed overlying a first region of the p-doped semiconductor layer, a diode P electrode is formed overlying a second region of the p-doped semiconductor layer that is separated from the first region of the p-doped semiconductor layer by the trench, and an N electrode is formed overlying a top surface of the exposed n-doped semiconductor layer in the trench, shared by the LED and diode.Type: ApplicationFiled: February 21, 2013Publication date: August 21, 2014Inventor: Jong-Jan Lee
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Patent number: 8802463Abstract: An optical device wafer has a plurality of optical devices formed on a front side and a plurality of crossing division lines for partitioning the optical devices, each optical device having electrodes formed on the front side. A processing method includes: forming a groove on a back side of the wafer along each division line so as to form a slightly remaining portion on the front side of the wafer along each division line; forming a reflective film on the back side of the wafer to thereby form the reflective film on at least side surfaces of the groove; grinding the back side of the wafer to thereby reduce the thickness of the wafer to a finished thickness; and cutting the slightly remaining portion along each division line to thereby divide the wafer into individual optical device chips.Type: GrantFiled: June 4, 2013Date of Patent: August 12, 2014Assignee: Disco CorporationInventor: Kazuma Sekiya
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Patent number: 8802470Abstract: An optical device processing method including a protective layer includes forming a protective layer of an insulator on the front side of an optical device wafer so as to insulate at least the electrodes from each other, forming a groove on the front side of the wafer along each division line, forming a reflective film on the front side of the wafer to thereby form the reflective film on at least the side surfaces of the groove, removing the protective layer formed on the electrodes on the front side of the wafer to thereby expose the electrodes, and grinding a back side of the wafer to thereby reduce the thickness of the wafer to the finished thickness until the groove is exposed to the back side of the wafer to divide the wafer into individual optical device chips.Type: GrantFiled: June 4, 2013Date of Patent: August 12, 2014Assignee: Disco, CorporationInventor: Kazuma Sekiya
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Patent number: 8790939Abstract: A method for producing a plurality of radiation-emitting components includes A) providing a carrier layer having a plurality of mounting regions separated from one another by separating regions; B) applying an interlayer to the separating regions; C) applying a respective radiation-emitting device to each of the plurality of mounting regions; D) applying a continuous potting layer to the radiation-emitting device and the separating regions; E) severing the potting layer and partially severing the interlayer in the separating regions of the carrier layer in a first separating step; and F) partially severing the interlayer and severing the carrier layer in a second separating step, wherein the interlayer is completely severed by the first and the second separating step.Type: GrantFiled: February 19, 2009Date of Patent: July 29, 2014Assignee: OSRAM Opto Semiconductors GmbHInventors: Stephan Preuss, Harald Jaeger
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Publication number: 20140197423Abstract: The invention provides a substrate structure for manufacturing a light-emitting diode and a method for manufacturing the light-emitting diode. The substrate structure comprises a substrate having a first surface and a second surface opposite to the first surface; and a plurality of grooving structure formed on the first surface of the substrate. In which, the light-emitting diode is formed on the first surface of the substrate.Type: ApplicationFiled: July 1, 2013Publication date: July 17, 2014Inventors: Jui-Yi Chu, Shih-Pu Yang
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Publication number: 20140183606Abstract: According to an embodiment of the invention, there is provided a method of manufacturing a semiconductor device. The method of manufacturing the semiconductor device includes forming a trench downward from an upper face of a semiconductor layer at a position where an element isolation area is formed in the semiconductor layer, and melting the upper face of the trench-formed semiconductor layer to close an open end of the trench.Type: ApplicationFiled: May 29, 2013Publication date: July 3, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Kazunori KAKEHI, Hisashi Aikawa, Yosuke Kitamura
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Patent number: 8766281Abstract: A light emitting diode chip includes a substrate, an epitaxial layer, two inclined plane units, and two electrode units. The substrate has top and bottom surfaces. The epitaxial layer is disposed on the top surface of the substrate. Each of the inclined plane units is inclined downwardly and outwardly from the epitaxial layer toward the bottom surface of the substrate, and includes an inclined sidewall formed on the epitaxial layer, and a substrate inclined wall formed on the substrate. Each of the electrode units includes an electrode disposed on the epitaxial layer, and a conductive portion extending from the electrode to the substrate inclined wall along corresponding one of the inclined plane units.Type: GrantFiled: December 13, 2012Date of Patent: July 1, 2014Assignees: Lite-On Electronics (Guangzhou) Limited, Lite-On Technology Corp.Inventor: Chih-Chiang Kao
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Publication number: 20140175497Abstract: An LED chip includes a substrate and an epitaxy structure formed on the substrate. The epitaxy structure includes a first semiconductor layer, a light emitting layer and a second semiconductor layer. A plurality of grooves are defined through the first semiconductor layer, the light emitting layer and the second semiconductor layer. The light emitting layer is exposed from the grooves. A transparent insulative layer is filled in the grooves. An electrode is further formed on the transparent insulative layer.Type: ApplicationFiled: June 19, 2013Publication date: June 26, 2014Inventor: CHIH-CHEN LAI
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Publication number: 20140175487Abstract: A light emitting device package is provided. The light emitting device includes: a substrate; a light emitting device disposed at one side of the substrate; and a formation layer formed on the substrate and having a slope at an edge portion of the formation layer.Type: ApplicationFiled: October 3, 2013Publication date: June 26, 2014Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: Sung-Uk ZHANG
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Publication number: 20140159089Abstract: Exemplary embodiments of the present invention disclose a light-emitting diode (LED) including a semiconductor stack structure including a first semiconductor layer, an active layer, and a second semiconductor layer, the semiconductor stack disposed on a substrate, a conductive substrate disposed on the semiconductor stack structure, and an electrode disposed on the conductive substrate and in ohmic contact with the conductive substrate, wherein the electrode comprises grooves penetrating the electrode and a portion of the conductive substrate.Type: ApplicationFiled: December 6, 2013Publication date: June 12, 2014Applicant: SEOUL VIOSYS CO., LTD.Inventors: Jin Woong LEE, Kyoung Wan KIM, Yeo Jin YOON, Ye Seul KIM, Tae Kyoon KIM
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Patent number: 8748203Abstract: A method of making a LED includes steps of providing a substrate having an epitaxial growth surface. A buffer layer and an intrinsic semiconductor layer are grown thereon in that order. A carbon nanotube layer is placed on the intrinsic semiconductor layer. A first semiconductor layer, an active layer, and a second semiconductor layer are grown in that order on the intrinsic semiconductor layer, the first semiconductor layer covering the carbon nanotube layer. A first electrode is applied to a surface of the second semiconductor layer and the substrate, the buffer layer, and the intrinsic semiconductor layer are removed to expose the carbon nanotube layer. A second electrode is applied to make electrical connections with the carbon nanotube layer.Type: GrantFiled: September 18, 2013Date of Patent: June 10, 2014Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.Inventors: Yang Wei, Shou-Shan Fan
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Patent number: 8742429Abstract: A semiconductor light emitting device includes a first semiconductor layer having a bottom surface with uneven patterns, an active layer formed on the first semiconductor layer, a second semiconductor layer formed on the active layer, a second electrode formed on the second semiconductor layer, and a first electrode formed under the first semiconductor layer.Type: GrantFiled: July 25, 2006Date of Patent: June 3, 2014Assignee: LG Innotek Co., Ltd.Inventor: Jin Sik Choi
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Patent number: 8729539Abstract: Provided is a light-emitting apparatus which, without using an insulating film for separating pixels, inhibits leakage current between adjacent pixels and which accommodates higher resolution. By providing a groove in an insulating layer along an edge of a first electrode, the thickness of a first charge transport layer is reduced to inhibit leakage current between adjacent pixels.Type: GrantFiled: February 14, 2013Date of Patent: May 20, 2014Assignee: Canon Kabushiki KaishaInventors: Nobuaki Kakinuma, Seishi Miura, Koichi Ishige, Nobuhiko Sato
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Publication number: 20140117401Abstract: A method for ablating a first area of a light emitting diode (LED) device which includes an array of nanowires on a support with a laser is provided. The laser ablation exposes a conductive layer of the support that is electrically connected to a first conductivity type semiconductor nanowire core in the nanowires, to form a first electrode for the LED device. In embodiments, the nanowires are aligned at least 20 degrees from the plane of the support. A light emitting diode (LED) structure includes a first electrode for contacting a first conductivity type nanowire core, and a second electrode for contacting a second conductivity type shell enclosing the nanowire core, where the first electrode and/or at least a portion of the second electrode are flat.Type: ApplicationFiled: October 22, 2013Publication date: May 1, 2014Applicant: Glo ABInventor: Scott Brad Herner
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Patent number: 8709835Abstract: A method for manufacturing the LEDs is disclosed, whereby the light extraction efficiency of the device can be enhanced by forming patterns on a top surface of a substrate, a light emitting structure is formed on the top surface of the substrate formed with the patterns, the substrate is removed from the light emitting structure, and patterns corresponding to those formed on top surface of the substrate are formed on the surface of the light emitting structure.Type: GrantFiled: June 12, 2006Date of Patent: April 29, 2014Assignee: LG Electronics Inc.Inventor: See jong Leem
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Patent number: 8703512Abstract: A light emitting device may include a substrate, an n-type clad layer, an active layer, and a p-type clad layer. A concave-convex pattern having a plurality of grooves and a mesa between each of the plurality of grooves may be formed on the substrate, and a reflective layer may be formed on the surfaces of the plurality of grooves or the mesa between each of the plurality of grooves. Therefore, light generated in the active layer may be reflected by the reflective layer, and extracted to an external location.Type: GrantFiled: July 25, 2013Date of Patent: April 22, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-won Lee, Bok-ki Min, Jun-youn Kim, Young-jo Tak, Hyung-su Jeong
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Patent number: 8697461Abstract: There is provided a manufacturing method of an LED module including: forming an insulating film on a substrate; forming a first ground pad and a second ground pad separated from each other on the insulating film; forming a first division film that fills a space between the first and second ground pads, a second division film deposited on a surface of the first ground pad, and a third division film deposited on a surface of the second ground pad; forming a first partition layer of a predetermined height on each of the division films; sputtering seed metal to the substrate on which the first partition layer is formed; forming a second partition layer of a predetermined height on the first partition layer; forming a first mirror connected with the first ground pad and a second mirror connected with the second ground pad by performing a metal plating process to the substrate on which the second partition layer is formed; removing the first and second partition layers; connecting a zener diode to the first mirrorType: GrantFiled: March 18, 2011Date of Patent: April 15, 2014Assignee: Daewon Innost Co., Ltd.Inventors: Won Sang Lee, Young Keun Kim
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Publication number: 20140073075Abstract: A method for separating a light-emitting diode (LED) from a substrate comprises the following steps. First, a substrate is provided which includes a junction surface and a bottom surface far away from the junction surface. Then a plurality holes are formed on the junction surface. An LED structure is further grown on the junction surface, and includes a junction portion bonded to the junction surface. The bottom surface is then polished to be shrunk to communicate with the holes. Finally, the junction portion is etched by an etching liquid via the holes to separate the LED structure from the substrate. Accordingly, by forming the holes, the LED structure and the substrate can be separated through polishing and etching processes, thereby providing a high yield rate as well as reduced production costs.Type: ApplicationFiled: September 12, 2012Publication date: March 13, 2014Inventors: Wei-Yu YEN, Fu-Bang Chen, Chih-Sung Chang
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Patent number: 8664026Abstract: A method for fabricating a semiconductor lighting chip includes steps of providing a substrate with an epitaxial layer thereon. The epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer successively grown on the substrate. The epitaxial layer has dislocation defects traversing the first semiconductor layer, the active layer and the second semiconductor layer. The epitaxial layer is then subjected to an etching process which remove parts of the second semiconductor layer and the active layer along the dislocation defects to form recesses recessing from the second semiconductor layer to the active layer. Thereafter a first electrode and a second electrode are formed on the first semiconductor layer and the second semiconductor layer, respectively.Type: GrantFiled: August 17, 2011Date of Patent: March 4, 2014Assignee: Advanced Optoelectronic Technology, Inc.Inventors: Po-Min Tu, Shih-Cheng Huang
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Patent number: 8664022Abstract: A submount for a light emitting diode and a method for fabricating the same are provided. The method includes the following steps: (a) providing a silicon substrate; (b) forming a mask layer on the silicon substrate to expose a part of the silicon substrate; (c) forming a first silicon oxide layer in the part of the silicon substrate which is exposed; and (d) removing the mask layer and the first silicon oxide layer, so as to form a recess in the silicon substrate.Type: GrantFiled: March 5, 2012Date of Patent: March 4, 2014Assignee: Episil Technologies Inc.Inventors: Le-Sheng Yeh, Cheng-I Chien
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Publication number: 20140048838Abstract: A semiconductor light emitting device includes a first conductive semiconductor layer, an active layer, a second conductive semiconductor layer, a first internal electrode, a second internal electrode, an insulating part, and first and second pad electrodes. The active layer is disposed on a first portion of the first conductive semiconductor layer, and has the second conductive layer disposed thereon. The first internal electrode is disposed on a second portion of the first conductive semiconductor layer separate from the first portion. The second internal electrode is disposed on the second conductive semiconductor layer. The insulating part is disposed between the first and second internal electrodes, and the first and second pad electrodes are disposed on the insulating part to connect to a respective one of the first and second internal electrodes.Type: ApplicationFiled: June 27, 2013Publication date: February 20, 2014Inventors: Jong In YANG, Yong Il KIM, Kwang Min SONG, Wan Tae LIM, Se Jun HAN, Hyun Kwon HONG
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Patent number: 8655126Abstract: In order to provide a method of manufacturing an optical waveguide, which enables the formation of a smooth mirror face, the following method of manufacturing an optical waveguide having a mirror face is used. The method includes: a photocurable resin sheet laminating step of laminating an uncured photocurable resin sheet for forming a core on a surface of a first cladding layer that has been formed on a substrate; a mirror face forming step of forming a mirror face for guiding light to the core by pressing a die provided with a blade having, in a cross-section, a 45° inclined plane into the photocurable resin sheet; a core forming step of forming a core having the mirror face positioned at an end thereof by selectively exposing to light, and developing, the photocurable resin sheet; and a cladding layer forming step of forming a second cladding layer so as to bury the core.Type: GrantFiled: March 26, 2010Date of Patent: February 18, 2014Assignee: Panasonic CorporationInventors: Naoyuki Kondou, Tohru Nakashiba, Junko Yashiro, Shinji Hashimoto
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Patent number: 8647961Abstract: A method is described for filling cavities in wafers, the cavities being open to a predetermined surface of the wafer, including the following steps: applying a lacquer-like filling material to the predetermined surface of the wafer; heating the wafer at a first temperature; driving out gas bubbles enclosed in the filling material by heating the wafer under vacuum at a second temperature which is equal to or higher than the first temperature; and curing the filling material by heating the wafer at a third temperature which is higher than the second temperature. Furthermore, also described is a blind hole filled using such a method and general 3D cavities as well as a wafer having insulation trenches of a silicon via filled using such a method.Type: GrantFiled: August 4, 2011Date of Patent: February 11, 2014Assignee: Robert Bosch GmbHInventors: Jens Frey, Heribert Weber, Eckhard Graf, Roman Schlosser
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Patent number: 8648380Abstract: The present invention relates to a light emitting device having a plurality of non-polar light emitting cells and a method of fabricating the same. Nitride semiconductor layers are disposed on a Gallium Nitride substrate having an upper surface. The upper surface is a non-polar or semi-polar crystal and forms an intersection angle with respect to a c-plane. The nitride semiconductor layers may be patterned to form light emitting cells separated from one another. When patterning the light emitting cells, the substrate may be partially removed in separation regions between the light emitting cells to form recess regions. The recess regions are filled with an insulating layer, and the substrate is at least partially removed by using the insulating layer.Type: GrantFiled: April 18, 2013Date of Patent: February 11, 2014Assignee: Seoul Opto Device Co., Ltd.Inventors: Kwang Choong Kim, Won Cheol Seol, Dae Won Kim, Dae Sung Kal, Kyung Hee Ye
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Patent number: 8642368Abstract: The embodiments of the present invention generally relates to methods for enhancing the light extraction by surface roughening of the bottom n-GaN layer and/or top p-GaN layer so that the internal light from the active region is scattered outwardly to result in a higher external quantum efficiency. In one embodiment, a surface roughening process is performed on the n-GaN layer to form etching pits in a top surface of the n-GaN layer. Once the etching pits are formed, growth of the n-GaN material may be resumed on the roughened n-GaN layer to partially fill the etching pits, thereby forming air voids at the interface of the n-GaN layer and the subsequent, re-growth n-GaN layer. These air voids provide one or more localized regions with indices of reflection different from that of the n-GaN layer, such that the internal light generated by the active layers (e.g., the InGaN MQW layer), when passing through the n-GaN layer, is scattered by voids or bubbles.Type: GrantFiled: March 10, 2011Date of Patent: February 4, 2014Assignee: Applied Materials, Inc.Inventor: Jie Su
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Patent number: 8642388Abstract: A method for manufacturing LEDs includes following steps: forming circuit structures on a substrate, each circuit structure having a first metal layer and a second metal layer formed on opposite surfaces of the substrate and a connecting section interconnecting the first and second metal layers; cutting through each circuit structure along a middle of the connecting section to form first and second electrical connecting portions insulated from each other via a gap therebetween; arranging LED chips on the substrate and electrically connecting the LED chips to the first and second electrical connecting portions; forming an encapsulation on the substrate to cover the LED chips; and cutting through the substrate and the encapsulation between the first and second electrical connecting portions of neighboring circuit structures to obtain the LEDs.Type: GrantFiled: December 21, 2011Date of Patent: February 4, 2014Assignee: Advanced Optoelectronics Technology, Inc.Inventor: Chao-Hsiung Chang
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Publication number: 20140024158Abstract: Provided are a light-emitting element and a method of fabricating the same. The light-emitting element includes: a first pattern including conductive regions and non-conductive regions. The non-conductive regions are defined by the conductive regions. The light-emitting element also include an insulating pattern including insulating regions and non-insulating regions which correspond respectively to the conductive regions and non-conductive regions. The non-insulating regions are defined by the insulating regions. The light-emitting element further includes a light-emitting structure interposed between the first pattern and the insulating pattern. The light-emitting structure includes a first semiconductor pattern of a first conductivity type, a light-emitting pattern, and a second semiconductor pattern of a second conductivity type which are stacked sequentially. The light-emitting element also includes a second pattern formed in the non-insulating regions.Type: ApplicationFiled: September 24, 2013Publication date: January 23, 2014Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: Yu-Sik KIM
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Publication number: 20130344634Abstract: A method for fabricating an optical modulator includes forming n-type layer, a first oxide portion on a portion of the n-type layer, and a second oxide portion on a second portion of the n-type layer, patterning a first masking layer over the first oxide portion, portions of a planar surface of the n-type layer, and portions of the second oxide portion, implanting p-type dopants in the n-type layer to form a first p-type region and a second p-type region, removing the first masking layer, patterning a second masking layer over the first oxide portion, a portion of the first p-type region, and a portion of the n-type layer, and implanting p-type dopants in exposed portions of the n-type layer, exposed portions of the first p-type region, and regions of the n-type layer and the second p-type region disposed between the substrate and the second oxide portion.Type: ApplicationFiled: June 21, 2012Publication date: December 26, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: William M. Green, Jessie C. Rosenberg, Yurii A. Vlasov
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Publication number: 20130330869Abstract: An optical device processing method including: a groove forming step of forming a plurality of grooves on a front side of a sapphire substrate; a film forming step of forming an epitaxial film on the front side of the sapphire substrate after performing the groove forming step, thereby forming a plurality of optical devices and a plurality of crossing division lines for partitioning the optical devices; and a dividing step of dividing the sapphire substrate with the epitaxial film along the division lines after performing the film forming step, thereby obtaining a plurality of individual optical device chips.Type: ApplicationFiled: June 4, 2013Publication date: December 12, 2013Inventor: Kazuma SEKIYA
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Patent number: 8592237Abstract: A method for manufacturing a thin film transistor substrate including forming bus lines by etching a surface of a substrate to form bus line patterns and filling the bus line patterns with a bus line metal; forming a semiconductor channel layer at one portion of a pixel area defined by the bus lines; and forming source-drain electrodes on the semiconductor channel layer, a pixel electrode extending from the drain electrode within the pixel area, and a common electrode parallel with the pixel electrode. The bus lines are formed as being thicker but the bus lines are buried in the substrate so that the line resistance can be reduced and the step difference due to the thickness of bus line does not affect the device.Type: GrantFiled: June 9, 2011Date of Patent: November 26, 2013Assignee: LG Display Co., Ltd.Inventors: Jungil Lee, Injae Chung, Joonyoung Yang, Gisang Hong
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Patent number: 8592843Abstract: Embodiments relate to a light emitting device, a light emitting device package, and a lighting system. The light emitting device comprises: a light emitting structure including a first conductive type semiconductor layer, an active layer over the first conductive type semiconductor layer, and a second conductive type semiconductor layer over the active layer; a dielectric layer formed in each of a plurality of cavities defined by removing a portion of the light emitting structure; and a second electrode layer over the dielectric layer.Type: GrantFiled: October 21, 2010Date of Patent: November 26, 2013Assignee: LG Innotek Co., Ltd.Inventor: Sung Min Hwang
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Patent number: 8580591Abstract: The invention concerns a method of manufacturing a vertical PIN diode comprising: providing an epitaxial wafer comprising a vertically stacked N-type layer, intrinsic layer and P-type layer; forming an anode contact of the vertical PIN diode by forming an anode metallization on a first portion of the P-type layer defining an anode region; forming an electrically insulating layer around the anode region such that a first portion of the intrinsic layer extends vertically between the N-type layer and the anode region and second portions of the intrinsic layer extend vertically between the N-type layer and the electrically insulating layer; forming a trench in the electrically insulating layer and in the second portions of the intrinsic layer so as to expose a portion of the N-type layer defining a cathode region and to define a sacrificial side-guard ring consisting of a portion of the electrically insulating layer that extends laterally between the trench and the anode region and laterally surrounds said anodeType: GrantFiled: June 28, 2011Date of Patent: November 12, 2013Assignee: Selex Sistemi Integrati S.p.A.Inventors: Marco Peroni, Alessio Pantellini
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Patent number: 8574939Abstract: A semiconductor optoelectronic structure with increased light extraction efficiency and a fabrication method thereof are presented. The semiconductor optoelectronic structure includes continuous grooves formed under an active layer of the semiconductor optoelectronic structure to reflect light from the active layer and thereby direct more light through a light output surface so as to increase the light intensity from the semiconductor optoelectronic structure.Type: GrantFiled: July 14, 2010Date of Patent: November 5, 2013Assignee: Advanced Optoelectronic Technology, Inc.Inventors: Shih Cheng Huang, Po Min Tu, Peng Yi Wu, Wen Yu Lin, Chih Pang Ma, Tzu Chien Hong, Chia Hui Shen
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Publication number: 20130285033Abstract: The present invention aims at providing an organic EL device that emits light by an alternating current, has a simple structure and provides little increase of production processes, while downsizing an overall configuration and a simplifying a method for producing said organic EL device. The organic EL device includes a power feeding part and an organic-EL-element forming part. The organic-EL-element forming part includes a plurality of unit EL elements formed on a substrate. There is provided a plurality of series-connected parts each formed by a plurality of the unit EL elements that are electrically connected in series in a forward direction. A plurality of the series-connected parts are electrically connected to the power feeding part in parallel. The series-connected parts that are connected in parallel include a series-connected part that is connected to the power feeding part so as to have a reverse polarity.Type: ApplicationFiled: January 4, 2012Publication date: October 31, 2013Applicant: KANEKA CORPORATIONInventors: Akira Nishikawa, Shigeru Ayukawa, Hideo Yamagishi
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Patent number: 8569080Abstract: A method of packaging a light emitting diode comprising: providing a flexible substrate with a heat-conducting layer, an insulating layer covering on a surface of the heat-conducting layer and an electrically conductive layer positioned on the insulating layer; etching the conductive layer to form a gap in the conductive layer and expose a part of the insulating layer, the conductive layer being separated by the gap into a first electrode and a second electrode isolated from each other; stamping the flexible substrate with a mold at the position of the gap to form a recess in the flexible substrate; positioning a light emitting element on the conductive layer and electrically connecting the light emitting element to the conductive layer; and forming an encapsulation to cover the light emitting element.Type: GrantFiled: June 14, 2012Date of Patent: October 29, 2013Assignee: Advanced Optoelectronic Technology, Inc.Inventors: Li-Hsiang Chen, Hsin-Chiang Lin, Pin-Chuan Chen
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Publication number: 20130252361Abstract: Some aspects for the invention include a method and a structure including a light-emitting device disposed over a second crystalline semiconductor material formed over a semiconductor substrate comprising a first crystalline material.Type: ApplicationFiled: May 28, 2013Publication date: September 26, 2013Inventors: Jizhong Li, Anthony J. Lochtefeld
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Publication number: 20130248915Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a p-side electrode, an n-side electrode, an insulating film, a p-side interconnection section, an n-side interconnection section, a phosphor layer, and a metal film. The semiconductor layer is formed on a substrate which is then removed. The p-side interconnection section is provided on the insulating film and electrically connected to the p-side electrode. The n-side interconnection section is provided on the insulating film and electrically connected to the n-side electrode. The phosphor layer is provided on the first surface and includes a step portion continued to the side surface of the semiconductor layer. The metal film is provided on the side surface of the semiconductor layer and a side surface of the step portion of the phosphor layer.Type: ApplicationFiled: February 26, 2013Publication date: September 26, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Miyoko SHIMADA, Akihiro KOJIMA, Yosuke AKIMOTO, Hideto FURUYAMA, Hideyuki TOMIZAWA, Yoshiaki SUGIZAKI
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Patent number: 8536594Abstract: Solid state lighting (SSL) devices (e.g., devices with light emitting diodes) with reduced dimensions (e.g., thicknesses) and methods of manufacturing are disclosed herein. In one embodiment, an SSL device includes an SSL structure having a first region and a second region laterally spaced apart from the first region and an insulating material between and electrically isolating the first and second regions. The SSL device also includes a conductive material between the first and second regions and adjacent the insulating material to electrically couple the first and second regions in series.Type: GrantFiled: January 28, 2011Date of Patent: September 17, 2013Assignee: Micron Technology, Inc.Inventor: Vladimir Odnoblyudov
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Publication number: 20130230068Abstract: An edge-emitting semiconductor laser diode includes an epitactic semiconductor layer stack and a planarization layer. The semiconductor layer stack includes a main body and a ridge waveguide. The main body includes an active layer for generating electromagnetic radiation. The planarization layer embeds the ridge waveguide such that a surface of the ridge waveguide and a surface of the planarization layer form a flat main surface. A method for producing such a semiconductor laser diode is also disclosed.Type: ApplicationFiled: September 7, 2011Publication date: September 5, 2013Applicant: OSRAM Opto Semiconductors GmbHInventors: Alfred Lell, Christoph Nelz, Christian Rumbolz, Stefan Hartauer
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Patent number: 8525150Abstract: A semiconductor light emission device is disclosed. The semiconductor light emission device includes: a substrate; a current concentration preventing pattern formed in a mesh net shape on the substrate; an n-type clad layer formed on the substrate loaded with the current concentration preventing pattern; an active layer and a p-type clad layer sequentially formed on the n-type clad layer; an n-type electrode formed on a part of the n-type clad layer which is exposed by partially etching the p-type clad layer and active layer; and a p-type electrode formed on the p-type clad layer. The current concentration preventing pattern is formed in a double layer structure which includes a first layer formed from one material of SiO and SiN and on the substrate, and a second layer formed from a metal material and on the first layer.Type: GrantFiled: October 20, 2010Date of Patent: September 3, 2013Assignee: LG Display Co., Ltd.Inventors: Min Ki Yoo, Koo Hwa Lee, Rok Hee Lee, Geun Woo Lee