Groove Formation Patents (Class 438/42)
  • Patent number: 7989826
    Abstract: Embodiments provide a semiconductor light emitting device which comprises a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, a second conductive semiconductor layer on the active layer, and a plurality of third semiconductor structures spaced apart on the second conductive semiconductor layer.
    Type: Grant
    Filed: February 19, 2009
    Date of Patent: August 2, 2011
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hung Seob Cheong
  • Patent number: 7989243
    Abstract: A pixel structure fabricating method is provided. A gate is formed on a substrate. A gate insulation layer covering the gate is formed on the substrate. A channel layer, a source, and a drain are simultaneously formed on the gate insulation layer above the gate. The gate, channel layer, source, and drain form a thin film transistor (TFT). A passivation layer is formed on the TFT and the gate insulation layer. A black matrix is formed on the passivation layer. The black matrix has a contact opening above the drain and a color filter containing opening. A color filer layer is formed within the color filter containing opening through inkjet printing. A dielectric layer is formed on the black matrix and the color filter layer. The dielectric layer and the passivation layer are patterned to expose the drain. A pixel electrode electrically connected to the drain is formed.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: August 2, 2011
    Assignee: Au Optronics Corporation
    Inventors: Ta-Wen Liao, Chen-Pang Tung, Chia-Ming Chang, Zong-Long Jhang, Che-Yung Lai, Chun-Yi Chiang, Chou-Huan Yu, Hsiang-Chih Hsiao, Han-Tang Chou, Jun-Kai Chang
  • Patent number: 7981705
    Abstract: In a method of manufacturing a vertical type light-emitting diode, a multilayered structure of group III nitride semiconductor compounds is epitaxy deposited on an irregular surface of a substrate. The substrate is then removed to expose an irregular surface of the multilayered structure corresponding to the irregular surface of the substrate. A portion of the exposed irregular surface of the multilayered structure is then etched for forming an electrode contact surface on which an electrode layer is subsequently formed. With this method, no specific planarized region is required on the irregular surface of the substrate. As a result, planarization treatment of the substrate is not necessary. The same substrate with the irregular surface can be reused for fabricating vertical and horizontal light-emitting diodes.
    Type: Grant
    Filed: July 30, 2010
    Date of Patent: July 19, 2011
    Assignee: Tekcore Co., Ltd.
    Inventors: Wei-Jung Chung, Shih-Hung Lee, Cheng-Hsien Li, Wen-Hsien Lin, Nien-Tze Yeh
  • Patent number: 7977132
    Abstract: Light emitting diode (LED) dies are fabricated by forming LED layers including a first conductivity type layer, a light-emitting layer, and a second conductivity type layer. Trenches are formed in the LED layers that reach at least partially into the first conductivity type layer. Electrically insulation regions are formed in or next to at least portions of the first conductivity type layer along the die edges. A first conductivity bond pad layer is formed to electrically contact the first conductivity type layer and extend over the singulation streets between the LED dies. A second conductivity bond pad layer is formed to electrically contact the second conductivity type layer, and extend over the singulation streets between the LED dies and the electrically insulated portions of the first conductivity type layer. The LED dies are mounted to submounts and the LED dies are singulated along the singulation streets between the LED dies.
    Type: Grant
    Filed: May 6, 2009
    Date of Patent: July 12, 2011
    Assignees: Koninklijke Philips Electronics N.V., Philps Lumileds Lighting Company, LLC
    Inventors: Tal Margalith, Stefano Schiaffino, Henry Kwong-Hin Choy
  • Publication number: 20110163347
    Abstract: A light source and method for making the same are disclosed. The light source includes a substrate, and a light emitting structure that is divided into segments. The light emitting structure includes a first layer of semiconductor material of a first conductivity type deposited on the substrate, an active layer overlying the first layer, and a second layer of semiconductor material of an opposite conductivity type from the first conductivity type overlying the active layer. A barrier divides the light emitting structure into first and second segments that are electrically isolated from one another. A serial connection electrode connects the first layer in the first segment to the second layer in the second segment. A power contact is electrically connected to the second layer in the first segment, and a second power contact electrically connected to the first layer in the second segment.
    Type: Application
    Filed: March 16, 2011
    Publication date: July 7, 2011
    Inventor: Ghulam Hasnain
  • Publication number: 20110159624
    Abstract: A method of forming a light emitting diode is provided. The method includes providing a growth substrate; sequentially forming a sacrificial layer and an epitaxial layer on the growing substrate; forming one or more epitaxial layer openings penetrating the epitaxial layer and exposing the sacrificial layer; forming a supporting layer on the epitaxial layer, the supporting layer having one or more supporting layer openings penetrating the supporting layer and joining the epitaxial layer openings; and selectively etching the sacrificial layer to separate the growth substrate from the epitaxial layer.
    Type: Application
    Filed: December 30, 2010
    Publication date: June 30, 2011
    Inventors: Yi-Ming Chen, Tzu-Chieh Hsu, Chi-Hsing Chen, Hsin-Ying Wang
  • Patent number: 7968356
    Abstract: Provided are a light-emitting element, a light-emitting device including the same, and methods of fabricating the light-emitting element and the light-emitting device. The light-emitting element includes a substrate on which a dome pattern is formed and a light-emitting structure conformally formed on the dome pattern. The light-emitting structure includes a first conductive layer of a first conductivity type, a light-emitting layer, and a second conductive layer of a second conductivity type sequentially stacked on the substrate. The light-emitting element also includes a first electrode formed on the first conductive layer and a second electrode formed on the second conductive layer.
    Type: Grant
    Filed: August 10, 2009
    Date of Patent: June 28, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yu-Sik Kim
  • Patent number: 7968361
    Abstract: A method for producing a gallium nitride based compound semiconductor light emitting device which is excellent in terms of the light emitting properties and the light emission efficiency and a lamp is provided. In such a method for producing a gallium nitride based compound semiconductor light emitting device, which is a method for producing a GaN based semiconductor light emitting device having at least a buffer layer, an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer on a translucent substrate, on which an uneven pattern composed of a convex shape and a concave shape is formed, the buffer layer is formed by a sputtering method conducted in an apparatus having a pivoted magnetron magnetic circuit and the buffer layer contains AlN, ZnO, Mg, or Hf.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: June 28, 2011
    Assignee: Showa Denko K.K.
    Inventors: Hiroshi Osawa, Hironao Shinohara
  • Patent number: 7964426
    Abstract: A solid-state image pickup device is provided in which a pixel forming region 4 and a peripheral circuit forming region 20 are formed on the same semiconductor substrate, a first element isolation portion is formed by an element isolation layer 21 in which an insulating layer is buried into a semiconductor substrate 10 in the peripheral circuit forming region 20, a second element isolation portion is composed of an element isolation region 11 formed within the semiconductor substrate 10 and an element isolation layer 12 projected in the upper direction from the semiconductor substrate 10 in the pixel forming region 4 and an element isolation layer 21 of the first element isolation portion and the element isolation layer 12 of the second element isolation portion contain the same insulating layers 17, 18 and 19. This solid-state image pickup device has a structure capable of suppressing a noise relative to a pixel signal and which can be microminiaturized in the peripheral circuit forming region.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: June 21, 2011
    Assignee: Sony Corporation
    Inventor: Ikuo Yoshihara
  • Patent number: 7960198
    Abstract: A wide bandgap semiconductor device with surge current protection and a method of making the device are described. The device comprises a low doped n-type region formed by plasma etching through the first epitaxial layer grown on a heavily doped n-type substrate and a plurality of heavily doped p-type regions formed by plasma etching through the second epitaxial layer grown on the first epitaxial layer. Ohmic contacts are formed on p-type regions and on the backside of the n-type substrate. Schottky contacts are formed on the top surface of the n-type region. At normal operating conditions, the current in the device flows through the Schottky contacts. The device, however, is capable of withstanding extremely high current densities due to conductivity modulation caused by minority carrier injection from p-type regions.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: June 14, 2011
    Assignee: Semisouth Laboratories
    Inventors: Igor Sankin, Joseph Neil Merrett
  • Publication number: 20110136276
    Abstract: A nitride semiconductor laser device uses a substrate with low defect density, contains reduced strains inside a nitride semiconductor film, and thus offers a satisfactorily long useful life. On a GaN substrate (10) with a defect density as low as 106 cm?2 or less, a stripe-shaped depressed portion (16) is formed by etching. On this substrate (10), a nitride semiconductor film (11) is grown, and a laser stripe (12) is formed off the area right above the depressed portion (16). With this structure, the laser stripe (12) is free from strains, and the semiconductor laser device offers a long useful life. Moreover, the nitride semiconductor film (11) develops reduced cracks, resulting in a greatly increased yield rate.
    Type: Application
    Filed: December 27, 2010
    Publication date: June 9, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Takeshi KAMIKAWA, Eiji Yamada, Masahiro Araki, Yoshika Kaneko
  • Publication number: 20110134952
    Abstract: A method of manufacturing a semiconductor laser having an end surface window structure includes the steps of forming a groove near at least the formation position of the end surface window structure of a substrate, and growing a nitride-based group III-V compound semiconductor layer including an active layer formed of a nitride-based group III-V compound semiconductor including at least In and Ga on the substrate.
    Type: Application
    Filed: November 30, 2010
    Publication date: June 9, 2011
    Applicant: SONY CORPORATION
    Inventors: Junji Sawahata, Masaru Kuramoto, Osamu Goto
  • Publication number: 20110134948
    Abstract: Provided is a semiconductor laser chip improved more in heat dissipation performance. This semiconductor laser chip includes a substrate, which has a front surface and a rear surface, nitride semiconductor layers, which are formed on the front surface of the substrate, an optical waveguide (ridge portion), which is formed in the nitride semiconductor layers, an n-side electrode, which is formed on the rear surface of the substrate, and notched portions, which are formed in regions that include the substrate to run along the optical waveguide (ridge portion). The notched portions have notched surfaces on which a metal layer connected to the n-side electrode is formed.
    Type: Application
    Filed: December 2, 2010
    Publication date: June 9, 2011
    Inventors: Toshiyuki Kawakami, Akira Ariyoshi
  • Patent number: 7955951
    Abstract: The present invention discloses an LED-laser lift-off method, which applies to lift off a transient substrate from an epitaxial layer grown on the transient substrate after a support substrate having an adhesion metal layer is bonded to the epitaxial layer. Firstly, the epitaxial layer is etched to define separation channels around each chip section, and the epitaxial layer between two separation channels is not etched but preserved to form a separation zone. Each laser illumination area only covers one illuminated chip section, the separation channels surrounding the illuminated chip section, and the separation zones surrounding the illuminated chip section. Thus, the adhesion metal layer on the separation channels is only heated once. Further, the outward stress generated by the illuminated chip section is counterbalanced by the outward stress generated by the illuminated separation zones, and the stress-induced structural damage on the chip section is reduced.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: June 7, 2011
    Assignee: High Power Opto, Inc.
    Inventors: Liang-Jyi Yan, Yea-Chen Lee
  • Patent number: 7943965
    Abstract: A multi-bit phase-change memory device includes a semiconductor substrate with a plurality of phase-change patterns sequentially stacked above the semiconductor substrate. Each phase-change pattern crosses another phase change pattern, and each phase change pattern includes a phase-change conductive line formed on a surface thereof. Bipolar transistors are installed between the semiconductor substrate and the lowermost phase-change pattern and also among the phase-change patterns, and the bipolar transistors selectively form electrical connections between the semiconductor substrate and the lowermost phase-change pattern and also among the phase-change patterns. Heating electrodes are aligned between the respective bipolar transistors and phase-change patterns. The semiconductor substrate includes an active area that extends in a direction that is perpendicular to the extension direction of the lowermost phase-change pattern.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: May 17, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Hyoung Joon Kim
  • Publication number: 20110111543
    Abstract: A thin-film transistor including a gate electrode, a drain electrode, and a source electrode is formed. A first insulating film is formed so as to cover the thin-film transistor. A second insulating film is formed on the first insulating film. A transparent conductive film is formed on the second insulating film. An etching resist which is patterned by a photolithography process is formed on the transparent conductive film. A first transparent electrode is formed by patterning the transparent conductive film by a first etching using the etching resist. A penetration hole is formed in the second insulating film at a position above one of the drain electrode and the source electrode by a second etching which is performed using the etching resist on a surface of the second insulating film exposed from the first transparent electrode.
    Type: Application
    Filed: November 9, 2010
    Publication date: May 12, 2011
    Inventor: Kikuo ONO
  • Patent number: 7935554
    Abstract: Provided are a semiconductor light emitting device having a nano pattern and a method of manufacturing the semiconductor light emitting device. The semiconductor light emitting device includes: a semiconductor layer comprising a plurality of nano patterns, wherein the plurality of nano patterns are formed inside the semiconductor layer; and an active layer formed on the semiconductor layer. The optical output efficiency is increased and inner defects of the semiconductor light emitting device are reduced.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: May 3, 2011
    Assignee: Samsung LED Co., Ltd.
    Inventors: Jeong-wook Lee, Youn-joon Sung, Ho-sun Paek, Hyun-soo Kim, Joo-sung Kim, Suk-ho Yoon
  • Patent number: 7932160
    Abstract: The invention relates to a method of producing a semiconductor device, comprising the following steps consisting in: forming first, second and third semiconductor layers (1, 2, 3), whereby the first and second layers (1, 3) contain a smaller concentration of oxidizable species than the second layer (2); forming a mask (4) on the third layer (3); and oxidizing the second layer (2) with the diffusion of oxidizing species through the third layer (3).
    Type: Grant
    Filed: February 2, 2006
    Date of Patent: April 26, 2011
    Assignee: Centre National de la Recherche Scientifique (CNRS)
    Inventors: Guilhem Almuneau, Antonio Munoz-Yague, Thierry Camps, Chantal Fontaine, Véronique Bardinal-Delagnes
  • Patent number: 7928458
    Abstract: A semiconductor device is disclosed. The semiconductor device comprises a light-emitting diode chip disposed in a cavity of a semiconductor substrate. At least two isolated outer wiring layers are disposed on the bottom surface of the semiconductor substrate and are electrically connected to the light-emitting diode chip, serving as input terminals. A lens module is adhered to the top surface of the semiconductor substrate to cap the cavity, in which the lens module comprises a molded lens and a molded fluorescent layer thereunder and the molded fluorescent layer faces the light-emitting diode chip. A method for fabricating the semiconductor devices is also disclosed.
    Type: Grant
    Filed: July 15, 2008
    Date of Patent: April 19, 2011
    Assignee: VisEra Technologies Company Limited
    Inventors: Tzu-Han Lin, Jui-Ping Weng, Shin-Chang Shiung
  • Publication number: 20110084306
    Abstract: A semiconductor light emitting device and corresponding method of manufacture, where the semiconductor light emitting device includes a light emitting structure, a second electrode layer, an insulating layer, and a protrusion. The light emitting structure comprises a second conductive semiconductor layer, an active layer under the second conductive semiconductor layer, and a first conductive semiconductor layer under the active layer. The second electrode layer is formed on the light emitting structure. The insulating layer is formed along the circumference of the top surface of the light emitting structure. The protrusion protrudes from the undersurface of the insulating layer to the upper part of the first conductive semiconductor layer.
    Type: Application
    Filed: December 16, 2010
    Publication date: April 14, 2011
    Inventor: Hwan Hee Jeong
  • Patent number: 7923379
    Abstract: A method of forming an integrated circuit structure includes forming an opening in a substrate, with the opening extending from a top surface of the substrate into the substrate. The opening is filled with a filling material until a top surface of the filling material is substantially level with the top surface of the substrate. A device is formed over the top surface of the substrate, wherein the device includes a storage opening adjoining the filling material. A backside of the substrate is grinded until the filling material is exposed. The filling material is removed from the channel until the storage opening of the device is exposed.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: April 12, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jiou-Kang Lee, Ting-Hau Wu, Shang-Ying Tsai, Jung-Huei Peng, Chun-Ren Cheng
  • Patent number: 7919797
    Abstract: A trench isolation having a sidewall and bottom implanted region located within a substrate of a first conductivity type is disclosed. The sidewall and bottom implanted region is formed by an angled implant, a 90 degree implant, or a combination of an angled implant and a 90 degree implant, of dopants of the first conductivity type. The sidewall and bottom implanted region located adjacent the trench isolation reduces surface leakage and dark current.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: April 5, 2011
    Assignee: Aptina Imaging Corporation
    Inventors: Howard Rhodes, Chandra Mouli
  • Patent number: 7919342
    Abstract: A method of making an inorganic light-emitting diode display having a plurality of light-emitting elements including providing a substrate, and forming a plurality of patterned electrodes over the substrate. A raised area is formed around each patterned electrode to provide a well before depositing a dispersion containing inorganic, light-emissive core/shell nano-particles into each well. The dispersion is dried to form a light-emitting layer including the inorganic, light-emissive core/shell nano-particles. An unpatterned, common electrode is formed over the light-emitting layer. The light-emitting layer emits light by the recombination of holes and electrons supplied by the electrodes.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: April 5, 2011
    Assignee: Eastman Kodak Company
    Inventor: Ronald S. Cok
  • Patent number: 7919343
    Abstract: A method for surface treatment of a group III nitride crystal includes the steps of lapping a surface of a group III nitride crystal using a hard abrasive grain with a Mohs hardness higher than 7, and abrasive-grain-free polishing the lapped surface of the group III nitride crystal using a polishing solution without containing abrasive grain, and the polishing solution without containing abrasive grain has a pH of not less than 1 and not more than 6, or not less than 8.5 and not more than 14. Accordingly, the method for surface treatment of a group III nitride crystal can be provided according to which hard abrasive grains remaining at the lapped crystal can be removed to reduce impurities at the crystal surface.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: April 5, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Ishibashi, Naoki Matsumoto, Masato Irikura
  • Publication number: 20110076793
    Abstract: The present invention is related to a surface-mounting ceramic LED package and a method for its production comprising: layering a ceramic green sheet which has a hole and a second ceramic green sheet, inserting a mold with a groove to form a partition in the bottom of the ceramic green sheet substrate, and firing the ceramic green sheet substrate.
    Type: Application
    Filed: December 6, 2010
    Publication date: March 31, 2011
    Applicant: E.I. DUPONT DE NEMOURS AND COMPANY
    Inventors: Naoto Nakajima, Shuichi Tsunoda, Akira Inaba
  • Patent number: 7910941
    Abstract: A light-emitting diode (LED) apparatus includes an epitaxial multilayer, a micro/nano rugged layer and an anti-reflection layer. The epitaxial multilayer has a first semiconductor layer, an active layer and a second semiconductor layer in sequence. The micro/nano rugged layer is disposed on the first semiconductor layer of the epitaxial multilayer. The anti-reflection layer is disposed on the micro/nano rugged layer. In addition, a manufacturing method of the LED apparatus is also disclosed.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: March 22, 2011
    Assignee: Delta Electronics, Inc.
    Inventors: Shih-Peng Chen, Ching-Chuan Shiue, Chao-Min Chen, Horng-Jou Wang, Huang-Kun Chen
  • Patent number: 7903707
    Abstract: A nitride semiconductor light-emitting device wherein a substrate or nitride semiconductor layer has a defect concentration region and a low defect density region other than the defect concentration region. A portion including the defect concentration region of the nitride semiconductor layer or substrate has a trench region deeper than the low defect density region. Thus by digging the trench in the defect concentration region, the growth detection is uniformized, and the surface planarity is improved. The uniformity of the characteristic in the wafer surface leads to improvement of the yield.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: March 8, 2011
    Assignees: Sharp Kabushiki Kaisha, Sumitomo Electric Industries, Ltd.
    Inventors: Takeshi Kamikawa, Yoshika Kaneko, Kensaku Motoki
  • Patent number: 7903710
    Abstract: A nitride semiconductor light-emitting device wherein a substrate or nitride semiconductor layer has a defect concentration region and a low defect density region other than the defect concentration region. A portion including the defect concentration region of the nitride semiconductor layer or substrate has a trench region deeper than the low defect density region. Thus by digging the trench in the defect concentration region, the growth detection is uniformized, and the surface planarity is improved. The uniformity of the characteristic in the wafer surface leads to improvement of the yield.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: March 8, 2011
    Assignees: Sharp Kabushiki Kaisha, Sumitomo Electric Industries, Ltd.
    Inventors: Takeshi Kamikawa, Yoshika Kaneko, Kensaku Motoki
  • Patent number: 7902071
    Abstract: A method for forming a trench-gated field effect transistor (FET) includes the following steps. Using a first mask, defining and simultaneously forming a plurality of active gate trenches and at least one gate runner trench extending to a first depth within a silicon region such that (i) the at least one gate runner trench has a width greater than a width of each of the plurality of active gate trenches, and (ii) the plurality of active gate trenches are contiguous with the at least one gate runner trench; and using the first mask and a second mask for protecting the at least one gate runner trench, further extending only the plurality of active gate trenches to a second and final depth within the silicon region.
    Type: Grant
    Filed: July 6, 2010
    Date of Patent: March 8, 2011
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Bruce Douglas Marchant
  • Patent number: 7903708
    Abstract: A nitride semiconductor laser device uses a substrate with low defect density, contains reduced strains inside a nitride semiconductor film, and thus offers a satisfactorily long useful life. On a GaN substrate (10) with a defect density as low as 106 cm?2 or less, a stripe-shaped depressed portion (16) is formed by etching. On this substrate (10), a nitride semiconductor film (11) is grown, and a laser stripe (12) is formed off the area right above the depressed portion (16). With this structure, the laser stripe (12) is free from strains, and the semiconductor laser device offers a long useful life. Moreover, the nitride semiconductor film (11) develops reduced cracks, resulting in a greatly increased yield rate.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: March 8, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takeshi Kamikawa, Eiji Yamada, Masahiro Araki, Yoshika Kaneko
  • Publication number: 20110049556
    Abstract: The present invention provides a semiconductor light-emitting device capable of keeping high luminance intensity even if electric power increases, and hence the device is suitable for lighting instruments such as lights and lamps. This semiconductor device comprises a metal electrode layer provided with openings, and is so large in size that the electrode layer has, for example, an area of 1 mm2 or more. The openings have a mean diameter of 10 nm to 2 ?m, and they penetrate through the metal electrode layer. That metal electrode layer can be produced by use of self-assembling of block copolymer or by nano-imprinting techniques.
    Type: Application
    Filed: February 25, 2010
    Publication date: March 3, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akira FUJIMOTO, Ryota Kitagawa, Koji Asakawa
  • Patent number: 7892874
    Abstract: A nitride-based light-emitting device capable of suppressing reduction of the light output characteristic as well as reduction of the manufacturing yield is provided. This nitride-based light-emitting device comprises a conductive substrate at least containing a single type of metal and a single type of inorganic material having a lower linear expansion coefficient than the metal and a nitride-based semiconductor element layer bonded to the conductive substrate.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: February 22, 2011
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tatsuya Kunisato, Ryoji Hiroyama, Masayuki Hata, Kiyoshi Oota
  • Patent number: 7883913
    Abstract: A manufacturing method of an image sensor of vertical type is provided that includes: forming an insulation layer with a metal wiring and a contact plug therein on a first substrate; bonding a second substrate having an image sensing unit over the insulation layer; forming a trench in the second substrate to divide the image sensing unit for each pixel; forming a PTI by gap-filling the trench with insulating material; forming a first material layer over the PTI, the image sensing unit, and the insulation layer; and forming a second material layer over the first material layer and performing a deuterium annealing process thereon. The crystal defects of the substrate generated when performing the trench etching on the donor substrate to define unit pixels are cured by performing the deuterium annealing process, making it possible to improve the sensitivity and illumination characteristics of the image sensor of vertical type.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: February 8, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Jong Man Kim
  • Patent number: 7879637
    Abstract: A CMOS solid-state imaging device configured to restrain the occurrence of white spots and dark current caused by pixel defects, and also to increase the saturation signal amount. Adjacent pixels are separated by an element isolation portion formed of a diffusion layer and an insulating layer thereon, and the insulating layer of the element isolation portion is formed in a position equal to or shallower than the position of a pn junction on the side of an accumulation layer of a photoelectric conversion portion 38 constituting a pixel.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: February 1, 2011
    Assignee: Sony Corporation
    Inventors: Hideshi Abe, Keiji Tatani, Kazuichiro Itonaga
  • Publication number: 20110012094
    Abstract: Provided are an electro-optic device and a method for manufacturing the same. The method includes forming a bottom electrode on a substrate, forming a first insulation film to cross over the bottom electrode forming an organic film on the substrate where the bottom electrode and the first insulation film are formed, forming a top electrode film on the organic film, and forming a top electrode to cross the bottom electrode by removing a portion of the top electrode film through a laser-scribing process. Herein, in the forming of the top electrode through the laser-scribing process, an edge region of a bottom surface of the top electrode may be positioned corresponding to an upper side of the first insulation film. Therefore, it is possible to reduce the number of processing apparatuses and steps required for separately forming the plurality of top electrodes, thereby simplifying manufacturing processes and saving manufacturing cost.
    Type: Application
    Filed: July 8, 2010
    Publication date: January 20, 2011
    Inventors: Hyung Sup Lee, Chi Wook Yu, Sung Hul Lee
  • Publication number: 20110014734
    Abstract: The present invention discloses a method for fabricating a flip chip GaN LED, which has a predetermined region on an epitaxial layer for forming a first groove to expose a portion of the substrate, and another predetermined region on the epitaxial layer for forming a second groove to expose a portion of N type GaN Ohm contacting layer. On a side of the first groove, there are a translucent conducting layer, an N type electrode pad, a first isolation protection layer, a metallic reflection layer and a second isolation protection layer sequentially formed on the surface of a P type GaN Ohm contacting layer. On another side of the first groove, a translucent conducting layer, an N type electrode pad, a first isolation protection layer and a second isolation protection layer are sequentially formed on the surface of an N type GaN Ohm contacting layer.
    Type: Application
    Filed: July 20, 2009
    Publication date: January 20, 2011
    Inventor: Lien-Shine LU
  • Patent number: 7871841
    Abstract: A method of manufacturing a semiconductor light-emitting device includes steps of forming a vertical cavity structure including a layer to be oxidized on a semiconductor substrate, and then forming a circular groove having a depth which penetrates at least the layer to be oxidized from an upper surface of the vertical cavity structure, thereby forming a columnar mesa whose side face is surrounded by the groove, oxidizing the layer to be oxidized from the side face of the mesa, thereby forming a current confinement layer, and forming a mask layer covering at least a central region of the upper surface of the mesa and exposing at least an edge of the upper surface and the side face of the mesa to an external, and then etching at least the edge of the upper surface and the side face of the mesa by using the mask layer as a mask.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: January 18, 2011
    Assignee: Sony Corporation
    Inventors: Yuji Masui, Takahiro Arakida, Yoshinori Yamauchi, Rintaro Koda, Tomoyuki Oki
  • Patent number: 7867846
    Abstract: An Organic Light Emitting Display (OLED) and its fabrication method has a pixel defining layer provided on a first electrode which is formed with a gas vent groove to allow gas to vent when the pixel defining layer is being formed, so that gas is not left in a pixel but vented when a donor film is laminated by a Laser-Induced Thermal Imaging (LITI) method, thereby decreasing edge open failures.
    Type: Grant
    Filed: July 13, 2010
    Date of Patent: January 11, 2011
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Tae-Min Kang, Seong-Taek Lee, Myung-Won Song, Mu-Hyun Kim, Byung-Doo Chin, Jae-Ho Lee
  • Patent number: 7858414
    Abstract: A method of manufacturing a nitride semiconductor device includes the steps of forming a groove on a surface of a first substrate by scribing, and forming a nitride semiconductor layer on the surface where the groove is formed. In addition, the method includes the steps of bonding the nitride semiconductor layer and a second substrate together and separating the nitride semiconductor layer and the first substrate from each other. With this manufacturing method, a nitride semiconductor device can be obtained with high yield.
    Type: Grant
    Filed: March 17, 2006
    Date of Patent: December 28, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Mayuko Fudeta, Satoshi Komada
  • Patent number: 7858407
    Abstract: A microresonator comprising a single-crystal silicon resonant element and at least one activation electrode placed close to the resonant element, in which the resonant element is placed in an opening of a semiconductor layer covering a substrate, the activation electrode being formed in the semiconductor layer and being level at the opening.
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: December 28, 2010
    Inventors: Nicolas Abelé, Pascal Ancey, Alexandre Talbot, Karim Segueni, Guillaume Bouche, Thomas Skotnicki, Stéphane Monfray, Fabrice Casset
  • Publication number: 20100320489
    Abstract: A device includes a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region. The semiconductor structure includes an n-contact region and a p-contact region. A cross section of the n-contact region comprises a plurality of first regions wherein portions of the light emitting layer and p-type region are removed to expose the n-type region. The plurality of first regions are separated by a plurality of second regions wherein the light emitting layer and p-type region remain in the device. The device further includes a first metal contact formed over the semiconductor structure in the p-contact region and a second metal contact formed over the semiconductor structure in the n-contact region. The second metal contact is in electrical contact with at least one of the second regions in the n-contact region.
    Type: Application
    Filed: June 18, 2009
    Publication date: December 23, 2010
    Applicants: KONINKLIJKE PHILIPS ELECTRONICS N.V., PHILIPS LUMILEDS LIGHTING COMPANY, LLC
    Inventor: John E. EPLER
  • Patent number: 7849587
    Abstract: A method of manufacturing a solenoidal magnet structure, includes the step of providing a collapsible accurate mold in which to wind the coils winding wire into defined positions in the mold, placing a mechanical support structure over the coils so wound, impregnating the coils and the mechanical support structure with a thermosetting resin, allowing the thermosetting resin to harden, and collapsing the mold and removing the resultant solenoidal magnet structure formed by the resin impregnated coils and the mechanical support structure from the mold as a single solid piece.
    Type: Grant
    Filed: April 13, 2007
    Date of Patent: December 14, 2010
    Assignee: Siemens PLC
    Inventors: Simon James Calvert, Jonathan Noys, Adrian Mark Thomas
  • Patent number: 7846756
    Abstract: A method of making a device is disclosed including: forming a first hard mask layer over an underlying layer; forming a first imprint resist layer over the underlying layer; forming first features over the first hard mask layer by bringing a first imprint template in contact with the first imprint resist layer; forming a first spacer layer over the first features; etching the first spacer layer to form a first spacer pattern and to expose top of the first features; removing the first features; patterning the first hard mask, using the first spacer pattern as a mask, to form first hard mask features; and etching at least part of the underlying layer using the first hard mask features as a mask.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: December 7, 2010
    Assignee: SanDisk 3D LLC
    Inventors: Bing K. Yen, Chun-Ming Wang, Yung-Tin Chen, Steven Maxwell
  • Patent number: 7846755
    Abstract: The present invention discloses a light emitting diode. The light emitting diode includes a plurality of light emitting cells arranged on a substrate, each light emitting cell including a first semiconductor layer and a second semiconductor layer arranged on the first semiconductor layer; a first dielectric layer arranged on each light emitting cell and including a first opening to expose the first semiconductor layer and a second opening to expose the second semiconductor layer; a wire arranged on the first dielectric layer to couple two of the light emitting cells; and a second dielectric layer arranged on the first dielectric layer and the wire. The first dielectric layer and the second dielectric layer comprise the same material and the first dielectric layer is thicker than the second dielectric layer.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: December 7, 2010
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Dae Sung Kal, Dae Won Kim, Won Cheol Seo, Kyung Hee Ye, Joo Woong Lee
  • Publication number: 20100301381
    Abstract: Provided are a nitride semiconductor light emitting element, including an n-type nitride semiconductor substrate including a dislocation bundle concentration region, and a nitride semiconductor stacked body having an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer in this order on the n-type nitride semiconductor substrate, the nitride semiconductor light emitting element having a dielectric region in a region of the nitride semiconductor stacked body corresponding to the dislocation bundle concentration region, an electrode for p-type provided to be in contact with a portion of the p-type nitride semiconductor layer and a portion of the dielectric region, and an electrode for n-type provided on a side of the n-type nitride semiconductor substrate opposite to a side on which the nitride semiconductor stacked body is provided, and a manufacturing method thereof.
    Type: Application
    Filed: May 20, 2010
    Publication date: December 2, 2010
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Akihiro URATA
  • Patent number: 7842963
    Abstract: A process for forming electrical contacts for a semiconductor light emitting apparatus is disclosed. The light emitting apparatus has a first layer of first conductivity type, an active layer for generating light overlying the first layer, and a second layer of second conductivity type overlying the active layer.
    Type: Grant
    Filed: October 18, 2006
    Date of Patent: November 30, 2010
    Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company, LLC
    Inventors: Stefano Schiaffino, John Julian Uebbing
  • Patent number: 7838372
    Abstract: Methods of manufacturing semiconductor devices and structures thereof are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming recesses in a first region and a second region of a workpiece. The first region of the workpiece is masked, and the recesses in the second region of the workpiece are filled with a first semiconductive material. The second region of the workpiece is masked, and the recesses in the first region of the workpiece are filled with a second semiconductive material.
    Type: Grant
    Filed: May 22, 2008
    Date of Patent: November 23, 2010
    Assignees: Infineon Technologies AG, Chartered Semiconductor Manufacturing, Ltd., International Business Machines Corporation, Samsung Electronics Co., Ltd.
    Inventors: Jin-Ping Han, Jong Ho Yang, Chung Woh Lai, Henry Utomo
  • Patent number: 7838316
    Abstract: A method for manufacturing a nitride semiconductor laser element, which has over a substrate a laminate including an element region constituting a cavity, an island layer separated from the element region, an exposed region separating the element region from the island layer, and an auxiliary groove provided along an end face of the cavity, and with which the cavity end face is obtained by dividing the laminate and the substrate along the first auxiliary groove, the method comprises a step of: forming the laminate over the substrate; removing part of the laminate to separate the laminate into the element region and the island layer and to form the exposed region provided continuously in the cavity direction of the nitride semiconductor laser element; forming the first auxiliary groove so as to be adjacent to the island layer; and dividing so that the island layer is disposed in a corner of the nitride semiconductor laser element to obtain a nitride semiconductor laser element.
    Type: Grant
    Filed: July 16, 2008
    Date of Patent: November 23, 2010
    Assignee: Nichia Corporation
    Inventor: Shingo Masui
  • Publication number: 20100290493
    Abstract: A laser diode includes an active layer, a strip-shaped ridge provided above the active layer, a pair of resonator end faces sandwiching the active layer and the ridge from an extending direction of the ridge, and an upland section provided being contacted with both side faces of the ridge in at least one of the resonator end faces of the pair of resonator end face and in the vicinity thereof. A thickness from the active layer to a surface of the upland section is larger on the resonator end face side and is smaller on a central side of the ridge, and the thickness is continuously changed from a thick portion on the resonator end face side to a thin portion on the central side of the ridge.
    Type: Application
    Filed: April 29, 2010
    Publication date: November 18, 2010
    Applicant: SONY CORPORATION
    Inventors: Hidekazu Kawanishi, Junji Sawahata
  • Patent number: 7835602
    Abstract: A photonic guiding device and methods of making and using are disclosed. The photonic guiding device comprises a large core hollow waveguide configured to interconnect electronic circuitry on a circuit board. A reflective coating covers an interior of the hollow waveguide to provide a high reflectivity to enable light to be reflected from a surface of the reflective coating. A collimator is configured to collimate multi-mode coherent light directed into the hollow waveguide.
    Type: Grant
    Filed: October 23, 2008
    Date of Patent: November 16, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Michael Renne Ty Tan, Alexandre M. Bratkovski, Shih-Yuan (SY) Wang