Groove Formation Patents (Class 438/42)
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Patent number: 8368087Abstract: A light emitting device having a vertical structure and a method for manufacturing the same, which are capable of increasing light extraction efficiency, are disclosed. The method includes forming a light extraction layer on a substrate, forming a plurality of semiconductor layers on the light extraction layer, forming a first electrode on the semiconductor layers, forming a support layer on the first electrode, removing the substrate, and forming a second electrode on a surface from which the substrate is removed.Type: GrantFiled: March 16, 2010Date of Patent: February 5, 2013Assignees: LG Electronics Inc., LG Innotek Co., Ltd.Inventors: Jun Ho Jang, Yong Tae Moon
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Patent number: 8367447Abstract: A method for making a light emitting diode comprises the following steps. First, a substrate having an epitaxial growth surface is provided. Second, a carbon nanotube layer is located on the epitaxial growth surface. Third, a first semiconductor layer, an active layer, and a second semiconductor layer is grown on the epitaxial growth surface. Fourth, a portion of the second semiconductor layer and the active layer is etched to expose a portion of the first semiconductor layer. Fifth, a first electrode is electrically connected to the first semiconductor layer, and a second electrode electrically is connected to the second semiconductor layer.Type: GrantFiled: November 3, 2011Date of Patent: February 5, 2013Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.Inventors: Yang Wei, Shou-Shan Fan
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Patent number: 8367446Abstract: A method for preparing patterned substrate by using nano- or micro-particles is disclosed, which comprises the following steps: (A) providing a substrate with a photoresist layer formed thereon; (B) coating a surface of the photoresist layer with plural nano- or micro-particles, to form a particle layer; (C) exposing and developing the photoresist layer to obtain a patterned photoresist layer; and (D) removing the particle layer. In addition, after the particle layer is removed, the method of the present invention further comprises: (E1) using the patterned photoresist layer as an etching template to etch the substrate; and (E2) removing the patterned photoresist layer to obtain a patterned substrate with plural cavities formed thereon.Type: GrantFiled: May 18, 2010Date of Patent: February 5, 2013Assignee: National Central UniversityInventors: Chia-Hua Chan, Chia-Hung Hou, Tsing-Jen Chen, Chii-Chang Chen
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Patent number: 8357557Abstract: One aspect of the present invention provides a semiconductor light-emitting device improved in luminance, and also provides a process for production thereof. The process comprises a procedure of forming a relief structure on the light-extraction surface of the device by use of a self-assembled film. In that procedure, the light-extraction surface is partly covered with a protective film so as to protect an area for an electrode to be formed therein. The electrode is then finally formed there after the procedure. The process thus reduces the area incapable, due to thickness of the electrode, of being provided with the relief structure. Between the electrode and the light-extraction surface, a contact layer is formed so as to establish ohmic contact between them.Type: GrantFiled: March 4, 2010Date of Patent: January 22, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Akira Fujimoto, Ryota Kitagawa, Koji Asakawa, Hidefumi Yasuda, Yasuhiko Akaike, Takeyuki Suzuki
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Patent number: 8354289Abstract: A method for manufacturing a gallium nitride (GaN) wafer is provided. In the method for manufacturing the GaN wafer according to an embodiment, an etch stop layer is formed on a substrate, and a first GaN layer is formed on the etch stop layer. A portion of the first GaN layer is etched with a silane gas, and a second GaN layer is formed on the etched first GaN layer. A third GaN layer is formed on the second GaN layer.Type: GrantFiled: February 1, 2011Date of Patent: January 15, 2013Assignee: LG Siltron Inc.Inventors: Yong-Jin Kim, Dong-Kun Lee, Doo-Soo Kim, Ho-Jun Lee, Kye-Jin Lee
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Publication number: 20130001508Abstract: An LED comprises a substrate, a buffer layer, an epitaxial layer and a conductive layer. The epitaxial layer comprises a first N-type epitaxial layer, a second N-type epitaxial layer, and a blocking layer with patterned grooves sandwiched between the first and second N-type epitaxial layers. The first and second N-type epitaxial layers make contact each other via the patterned grooves. Therefore, the LED enjoys a uniform current distribution and a larger light emitting area. A manufacturing method for the LED is also provided.Type: ApplicationFiled: February 19, 2012Publication date: January 3, 2013Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.Inventors: YA-WEN LIN, SHIH-CHENG HUANG, PO-MIN TU, CHIA-HUNG HUANG, SHUN-KUEI YANG
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Publication number: 20130005065Abstract: Solid state lighting (“SSL”) devices with cellular arrays and associated methods of manufacturing are disclosed herein. In one embodiment, a light emitting diode includes a semiconductor material having a first surface and a second surface opposite the first surface. The semiconductor material has an aperture extending into the semiconductor material from the first surface. The light emitting diode also includes an active region in direct contact with the semiconductor material, and at least a portion of the active region is in the aperture of the semiconductor material.Type: ApplicationFiled: September 12, 2012Publication date: January 3, 2013Applicant: Micron Technology, Inc.Inventors: Scott Sills, Lifang Xu, Scott Schellhammer, Thomas Gehrke, Zaiyuan Ren, Anton De Villiers
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Patent number: 8343424Abstract: A device includes first and second material facing towards each other as to form at least one focusing microstructure with a focal point located outside of the first material.Type: GrantFiled: December 15, 2006Date of Patent: January 1, 2013Assignee: Koninklijke Philips Electronics N.V.Inventors: Peter Dirksen, Yuri Aksenov, Fredericus Christiaan Van Den Heuvel, Johannes Arnoldus Jacobus Maria Kwinten
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Patent number: 8344392Abstract: A light-emitting element includes a light-emitting stack includes: a first semiconductor layer; an active layer formed on the first semiconductor layer; and a second semiconductor layer formed on the active layer; a recess structure formed through the second semiconductor layer, the active layer, and extended in the first semiconductor layer, wherein the first semiconductor layer includes a contact region defined by the recess structure; a first electrode structure including a first contact portion on the contact region of the first semiconductor layer, and a second contact portion laterally extended from the first contact portion into the first semiconductor layer; and a dielectric layer formed on side surfaces of the second semiconductor layer and the active layer to insulate the second semiconductor layer and the active layer from the first contact portion.Type: GrantFiled: May 12, 2011Date of Patent: January 1, 2013Assignee: Epistar CorporationInventors: Jui Hung Yeh, Chun Kai Wang, Wei Yu Yen, Yu Yao Lin, Chien Fu Shen, De Shan Kuo, Ting Chia Ko
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Publication number: 20120319081Abstract: The present invention relates to a multi-luminous element and a method for manufacturing the same. The present invention provides the multi-luminous element comprising: a buffer layer disposed on a substrate; a first type semiconductor layer disposed on the buffer layer; a first active layer which is disposed on the first type semiconductor layer and is patterned to expose a part of the first type semiconductor layer; a second active layer disposed on the first type semiconductor layer which is exposed by the first active layer; and a second type semiconductor layer disposed on the first active layer and the second active layer, the first and second active layers being repeatedly disposed in the horizontal direction, and the method for manufacturing the same.Type: ApplicationFiled: March 15, 2011Publication date: December 20, 2012Applicant: KOREA PHOTONICS TECHNOLOGY INSTITUTEInventors: Seong Ran Jeon, Jae Bum Kim, Seung Jae Lee
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Patent number: 8329481Abstract: A manufacturing method of nitride semiconductor light emitting elements, which can reliably form a mechanically stable wiring electrode leading from a light emitting element surface. A structure protective sacrifice layer is formed around a first electrode layer on a device structure layer beforehand, and after separation of the device structure layer into respective portions for the light emitting elements, the resultant is stuck to a support substrate. Subsequently, forward tapered grooves reaching the structure protective sacrifice layer are formed, and the inverse tapered portion formed outward of the forward tapered groove is lifted off in a lift-off step. Thus, an insulating layer is formed on the forward tapered side walls of the light emitting element, and a wiring electrode layer electrically connected to the second electrode layer on the principal surface of the light emitting element is formed on the insulating layer.Type: GrantFiled: February 9, 2012Date of Patent: December 11, 2012Assignee: Stanley Electric Co., Ltd.Inventor: Mamoru Miyachi
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Patent number: 8324083Abstract: A method for producing a Group III nitride compound semiconductor element includes growing an epitaxial layer containing a Group III nitride compound semiconductor using a different kind of substrate as an epitaxial growth substrate, adhering a supporting substrate to the top surface of the epitaxial growth layer through a conductive layer, and then removing the epitaxial growth substrate by laser lift-off. Before adhesion of the epitaxial layer and the supporting substrate, a first groove that at least reaches an interface between the bottom surface of the epitaxial layer and the epitaxial growth substrate from the top surface of the epitaxial layer formed on the epitaxial growth substrate and acts as an air vent communicating with the outside of a wafer when the epitaxial layer and the supporting substrate are joined to each other.Type: GrantFiled: September 29, 2009Date of Patent: December 4, 2012Assignee: Toyoda Gosei Co., Ltd.Inventors: Toshiya Uemura, Masanobu Ando, Tomoharu Shiraki, Masahiro Ohashi, Naoki Arazoe, Ryohei Inazawa
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Patent number: 8319249Abstract: A semiconductor light emitting device and corresponding method of manufacture, where the semiconductor light emitting device includes a light emitting structure, a second electrode layer, an insulating layer, and a protrusion. The light emitting structure comprises a second conductive semiconductor layer, an active layer under the second conductive semiconductor layer, and a first conductive semiconductor layer under the active layer. The second electrode layer is formed on the light emitting structure. The insulating layer is formed along the circumference of the top surface of the light emitting structure. The protrusion protrudes from the undersurface of the insulating layer to the upper part of the first conductive semiconductor layer.Type: GrantFiled: December 16, 2010Date of Patent: November 27, 2012Assignee: LG Innotek Co., Ltd.Inventor: Hwan Hee Jeong
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Patent number: 8314443Abstract: A device includes a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region. The semiconductor structure includes an n-contact region and a p-contact region. A cross section of the n-contact region comprises a plurality of first regions wherein portions of the light emitting layer and p-type region are removed to expose the n-type region. The plurality of first regions are separated by a plurality of second regions wherein the light emitting layer and p-type region remain in the device. The device further includes a first metal contact formed over the semiconductor structure in the p-contact region and a second metal contact formed over the semiconductor structure in the n-contact region. The second metal contact is in electrical contact with at least one of the second regions in the n-contact region.Type: GrantFiled: May 2, 2012Date of Patent: November 20, 2012Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company LLCInventor: John E Epler
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Patent number: 8309381Abstract: A method for producing a light-emitting device including a growth substrate made of Group III nitride semiconductor, and a Group III nitride semiconductor layer stacked on the top surface of the growth substrate, includes forming, between the growth substrate and the semiconductor layer, a stopper layer exhibiting resistance to a wet etchant, and wet-etching the bottom surface of the growth substrate until the stopper layer is exposed.Type: GrantFiled: September 30, 2009Date of Patent: November 13, 2012Assignee: Toyoda Gosei Co., Ltd.Inventors: Miki Moriyama, Koichi Goshonoo
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Patent number: 8309972Abstract: Aspects include electrodes that provide specified reflectivity attributes for light generated from an active region of a Light Emitting Diode (LED). LEDs that incorporate such electrode aspects. Other aspects include methods for forming such electrodes, LEDs including such electrodes, and structures including such LEDs.Type: GrantFiled: January 25, 2012Date of Patent: November 13, 2012Assignee: Bridgelux, Inc.Inventors: Frank T. Shum, William W. So, Steven D. Lester
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Patent number: 8304273Abstract: The present invention provides a method to eliminate undesired parallel conductive paths of nanogap devices for aqueous sensing. The method involves the electrical insulation of an electrode pair, except for the nanogap region wherein electrical response is measured. The magnitude of undesired ionic current in a measurement is reduced by two orders of magnitude. The process to accomplish the present invention is self-aligned and avoids fabrication complexity. The invention has a great potential in nanogap device applications.Type: GrantFiled: January 23, 2009Date of Patent: November 6, 2012Assignee: Massachusetts Institute of TechnologyInventors: Francesco Stellacci, J Robert Barsotti, Jr., Zhang Huijuan, John Thong
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Patent number: 8304334Abstract: Favorable-quality III-V crystals are easily obtained at low cost without causing cracks, even when using a variety of substrates, and can be used to manufacture semiconductor devices with good quality and at high yields. The III-V crystals are characterized by the following properties: the carrier concentration, resistivity, and dislocation density of the III-V compound crystal are uniform to within ±30% variation along the surface; the III-V compound crystal is misoriented from the c-plane such that the crystal surface does not include any region where its off-axis angle with the c-plane is 0°; and the full width at half-maximum in XRD at the crystal center of the III-V compound is not greater than 150 arcsec.Type: GrantFiled: February 7, 2012Date of Patent: November 6, 2012Assignee: Sumitomo Electric Industries, Ltd.Inventors: Seiji Nakahata, Koji Uematsu, Ryu Hirota
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Patent number: 8304800Abstract: A light emitting device includes a substrate, a light emitting structure including a first conductive semiconductor layer having an exposed region, an active layer, and a second conductive semiconductor layer on the substrate, a first electrode on the exposed region of the first conductive semiconductor layer, and a second electrode on the second conductive semiconductor layer, wherein a side of the light emitting structure includes a first sloped side sloped from a reference plane, the first sloped side includes a concave-convex pattern having a concave-convex structure in which a first direction length is greater than a second direction length, the reference plane is a plane perpendicular to a direction in which the substrate faces the light emitting structure, and the first direction is a sloped direction of the first sloped side and the second direction is a lateral direction of the first sloped side.Type: GrantFiled: April 8, 2011Date of Patent: November 6, 2012Assignee: LG Innotek Co., Ltd.Inventors: Hee Young Beom, Sung Kyoon Kim
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Publication number: 20120276670Abstract: A method of fabricating a light emitting diode includes following steps. A substrate is provided, and the substrate includes an epitaxial growth surface. A carbon nanotube layer is located on the epitaxial growth surface. A first semiconductor layer, an active layer, and a second semiconductor layer grow in that order on the substrate. An upper electrode is deposited on the second semiconductor layer. The substrate is removed. A lower electrode is deposited on the first semiconductor layer.Type: ApplicationFiled: November 3, 2011Publication date: November 1, 2012Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITYInventors: YANG WEI, SHOU-SHAN FAN
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Publication number: 20120276673Abstract: A method for making a light emitting diode, the method includes the following steps. First, a substrate having an epitaxial growth surface is provided. Second, a carbon nanotube layer is placed on the epitaxial growth surface. Third, a first semiconductor layer, an active layer and a second semiconductor layer are grown on the epitaxial growth surface. Fourth, a portion of the second semiconductor layer and the active layer is etched to expose a portion of the first semiconductor layer. Fifth, a first electrode is prepared on the first semiconductor layer and a second electrode is prepared on the second semiconductor layer. Sixth, the carbon nanotube layer is removed.Type: ApplicationFiled: November 3, 2011Publication date: November 1, 2012Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITYInventors: YANG WEI, SHOU-SHAN FAN
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Publication number: 20120276671Abstract: A method of making a LED includes following steps. A substrate with an epitaxial growth surface is provided. A carbon nanotube layer is placed on the epitaxial growth surface. A semiconductor epitaxial layer is grown on the epitaxial growth surface, and the semiconductor epitaxial layer includes an N-type semiconductor layer, an active layer, a P-type semiconductor layer. The semiconductor epitaxial layer is etched to expose part of the carbon nanotube layer. A first electrode is formed on a surface of the semiconductor epitaxial layer which is away from the substrate. A second electrode is formed to electrically connect with the part of the carbon nanotube layer which is exposed.Type: ApplicationFiled: November 3, 2011Publication date: November 1, 2012Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITYInventors: YANG WEI, SHOU-SHAN FAN
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Publication number: 20120276672Abstract: A method for making a light emitting diode comprises the following steps. First, a substrate having an epitaxial growth surface is provided. Second, a carbon nanotube layer is located on the epitaxial growth surface. Third, a first semiconductor layer, an active layer, and a second semiconductor layer is grown on the epitaxial growth surface. Fourth, a portion of the second semiconductor layer and the active layer is etched to expose a portion of the first semiconductor layer. Fifth, a first electrode is electrically connected to the first semiconductor layer, and a second electrode electrically is connected to the second semiconductor layer.Type: ApplicationFiled: November 3, 2011Publication date: November 1, 2012Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITYInventors: YANG WEI, SHOU-SHAN FAN
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Patent number: 8294171Abstract: Disclosed are a light emitting device having a plurality of non-polar light emitting cells and a method of fabricating the same. This method comprises preparing a first substrate of sapphire or silicon carbide having an upper surface with an r-plane, an a-plane or an m-plane. The first substrate has stripe-shaped anti-growth patterns on the upper surface thereof, and recess regions having sidewalls of a c-plane between the anti-growth patterns. Nitride semiconductor layers are grown on the substrate having the recess regions, and the nitride semiconductor layers are patterned to form the light emitting cells separated from one another. Accordingly, there is provided a light emitting device having non-polar light emitting cells with excellent crystal quality.Type: GrantFiled: January 6, 2012Date of Patent: October 23, 2012Assignee: Seoul Opto Device Co., Ltd.Inventors: Won Cheol Seo, Kwang Choong Kim, Kyung Hee Ye
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Patent number: 8288185Abstract: Provided are a semiconductor device and a method of forming the same. According to the method, a first buried oxide layer is locally formed in a semiconductor substrate and a core semiconductor pattern of a line form, a pair of anchor-semiconductor patterns and a support-semiconductor pattern are formed by patterning a semiconductor layer on the first buried oxide layer to expose the first buried oxide layer. The pair of anchor-semiconductor patterns contact both ends of the core semiconductor pattern, respectively, and the support-semiconductor pattern contacts one sidewall of the core semiconductor pattern, the first buried oxide layer below the core semiconductor pattern is removed. At this time, a portion of the first buried oxide layer below each of the anchor-semiconductor patterns and a portion of the first buried oxide layer below the support-semiconductor pattern remain. A second buried oxide layer is formed to fill a region where the first buried oxide layer below the core semiconductor pattern.Type: GrantFiled: May 27, 2010Date of Patent: October 16, 2012Assignee: Electronics and Telecommunications Research InstituteInventors: In Gyoo Kim, Dae Seo Park, Jun Taek Hong, Gyungock Kim
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Publication number: 20120258558Abstract: Provided is a semiconductor laser, wherein (?a??w) >15 (nm) and Lt<25 (?m), where ?w is the wavelength of light corresponding to the band gap of the active layer disposed at a position within a distance of 2 ?m from one end surface in a resonator direction, ?a is the wavelength of light corresponding to the band gap of the active layer disposed at a position that is spaced a distance of equal to or more than ( 3/10)L and ?( 7/10)L from the one end surface in a resonator direction, “L” is the resonator length, and “Lt” is the length of a transition region provided between the position of the active layer with a band gap corresponding to a light wavelength of ?w+2 (nm) and the position of the active layer with a band gap corresponding to a light wavelength of ?a?2 (nm) in the resonator direction.Type: ApplicationFiled: June 19, 2012Publication date: October 11, 2012Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Kentaro TADA, Kenji ENDO, Kazuo FUKAGAI, Tetsuro OKUDA, Masahide KOBAYASHI
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Patent number: 8283677Abstract: A nitride semiconductor light-emitting device includes a substrate (101) made of silicon, a mask film (102) made of silicon oxide, formed on a principal surface of the substrate (101), and having at least one opening (102a), a seed layer (104) made of GaN selectively formed on the substrate (101) in the opening (102a), an LEG layer (105) formed on a side surface of the seed layer (104), and an n-type GaN layer (106), an active layer (107), and a p-type GaN layer (108) which are formed on the LEG layer (105). The LEG layer (105) is formed by crystal growth using an organic nitrogen material as a nitrogen source.Type: GrantFiled: February 2, 2009Date of Patent: October 9, 2012Assignee: Panasonic CorporationInventors: Toshiyuki Takizawa, Tetsuzo Ueda, Manabu Usuda
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Patent number: 8273584Abstract: A semiconductor device including a wafer-level LED includes a semiconductor structure coupled to first and second electrodes. The semiconductor includes a P-doped portion of a first layer to an N-doped portion of a second layer. The first layer includes a surface configured to emit light. The first electrode is electrically coupled to the P-doped portion of the first layer on a first side of the semiconductor structure. The first side is adjacent to the surface that is configured to emit the light. The second electrode is electrically coupled to the N-doped portion of the second layer on a second side of the semiconductor structure. The second side is also adjacent to the surface that configured to emit light.Type: GrantFiled: December 22, 2010Date of Patent: September 25, 2012Assignee: Infineon Technologies AGInventors: Chiang Chau Fatt, Kuek Hsieh Ting
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Publication number: 20120236895Abstract: A split ring-resonator includes a substrate, an inner-trench or cavity formed into the substrate, the inner trench or cavity including a split, and an outer trench or cavity formed into the substrate around the inner trench or cavity, the outer trench or cavity including another split disposed at an opposite end of the split in the inner trench or cavity, wherein the inner trench or cavity and the outer trench or cavity are configured to receive an electrically conductive gas and/or plasma to form a split-ring resonator,Type: ApplicationFiled: March 15, 2011Publication date: September 20, 2012Applicant: MILES TECHNOLOGIES, LLCInventor: Patrick Allen Miles
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Patent number: 8269306Abstract: A dielectric liner is formed in first and second trenches respectively in first and second portions of a substrate. A layer of material is formed overlying the dielectric liner so as to substantially concurrently substantially fill the first trench and partially fill the second trench. The layer of material is removed substantially concurrently from the first and second trenches to expose substantially all of the dielectric liner within the second trench and to form a plug of the material in the one or more first trenches. A second layer of dielectric material is formed substantially concurrently on the plug in the first trench and on the exposed portion of the dielectric liner in the second trench. The second layer of dielectric material substantially fills a portion of the first trench above the plug and the second trench.Type: GrantFiled: October 11, 2010Date of Patent: September 18, 2012Assignee: Micron Technology, Inc.Inventor: Sukesh Sandhu
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Publication number: 20120228599Abstract: This invention relates to an organic electroluminescent device (1) produced with less effort comprising a substrate (2), a substrate electrode (3) on top of the substrate (2), an electroluminescent layer stack (4) with at least one organic light emitting layer on top of the substrate electrode (3), a counter electrode (5) at least covering the electroluminescent layer stack (4), and a short prevention layer (6) covering the counter electrode (5) establishing a double layer (DL) of counter electrode (5) and short prevention layer (6), and an electrically isolating layer at least partly on top of the short prevention layer, where a tensile stress (TS) is induced to the double layer (DL) by the short prevention layer (5) suitable to roll-up (10) the double layer (DL) after deposition of the electrically isolating layer (8) adjacent to a cut introduced at least to the double layer (DL) in an area, where the double layer (DL) is arranged on top of the electroluminescent layer stack (4) suitable to electrically disType: ApplicationFiled: November 17, 2010Publication date: September 13, 2012Applicant: KONINKLIJKE PHILIPS ELECTRONICS, N.V.Inventor: Herbert F. Boerner
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Patent number: 8258537Abstract: Provided is a technique of effectively extracting the beams of light excited in an LED light emitter other than the light beams emitted from a light-emitting region in the direction of a light-extraction surface. A pit with a tapered sidewall is formed in a substrate. A thin-film semiconductor element is attached to the pit. Light beams emitted from a side surface of the thin-film semiconductor element are reflected by the sidewall of the thin-film semiconductor element. Achieved thereby is effective extraction of light beams other than the light beams emitted from the light-emitting region in the direction of the light-extraction surface.Type: GrantFiled: March 4, 2009Date of Patent: September 4, 2012Assignee: Oki Data CorporationInventors: Tomoki Igari, Tomohiko Sagimori, Mitsuhiko Ogihara, Takahito Suzuki, Hiroyuki Fujiwara, Hironori Furuta, Yusuke Nakai
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Patent number: 8260151Abstract: An integrated circuit die has a transistor circuitry section for implementing information handling operations. Optical circuitry is within the single semiconductor die. The optical circuitry includes a laser transmitter and is operably coupled to the transistor circuitry section. The transistor circuitry section originates information. The optical circuitry transmits the information in a laser beam through a wave guide to the edge of the integrated circuit die.Type: GrantFiled: April 18, 2008Date of Patent: September 4, 2012Assignee: Freescale Semiconductor, Inc.Inventors: Perry H. Pelley, Dennis C. Hartman
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Publication number: 20120213241Abstract: A broad stripe laser (1) comprising an epitaxial layer stack (2), which contains an active, radiation-generating layer (21) and has a top side (22) and an underside (23). The layer stack (2) has trenches (3) in which at least one layer of the layer stack (2) is at least partly removed and which lead from the top side (22) in the direction of the underside (23). The layer stack (2) has on the top side ridges (4) each adjoining the trenches (3), such that the layer stack (2) is embodied in striped fashion on the top side. The ridges (4) and the trenches (3) respectively have a width (d1, d2) of at most 20 ?m.Type: ApplicationFiled: June 28, 2010Publication date: August 23, 2012Applicant: OSRAM OPTO SEMICONDUCTORS GMBHInventors: Alfred Lell, Stefanie Rammelsberger
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Publication number: 20120196396Abstract: A method for fabricating a light emitting diode (LED) chip is provided. First, a substrate is provided. A buffer layer is formed on the substrate. The buffer layer is patterned to form a plurality of recesses on a surface thereof. A first type semiconductor layer is formed on the surface of the buffer layer. A portion of the surface where the first type semiconductor layer and the buffer layer are in contact constitutes a bonding surface, and voids exist between the buffer layer and the first type semiconductor layer. An active layer and a second type semiconductor layer are formed on the first type semiconductor layer in sequence. A second electrode is formed on the second type semiconductor layer. A lift-off process is performed to separate the first type semiconductor layer and the buffer layer.Type: ApplicationFiled: January 19, 2012Publication date: August 2, 2012Applicant: WALSIN LIHWA CORPInventors: Ming-Teng Kuo, Chang-Ho Chen
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Publication number: 20120194103Abstract: Solid state lighting (SSL) devices (e.g., devices with light emitting diodes) with reduced dimensions (e.g., thicknesses) and methods of manufacturing are disclosed herein. In one embodiment, an SSL device includes an SSL structure having a first region and a second region laterally spaced apart from the first region and an insulating material between and electrically isolating the first and second regions. The SSL device also includes a conductive material between the first and second regions and adjacent the insulating material to electrically couple the first and second regions in series.Type: ApplicationFiled: January 28, 2011Publication date: August 2, 2012Applicant: MICRON TECHNOLOGY, INC.Inventor: Vladimir Odnoblyudov
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Patent number: 8232571Abstract: Disclosed are a light emitting device having a plurality of light emitting cells and a method of fabricating the same. The light emitting device comprises a plurality of light emitting cells positioned on a substrate to be spaced apart from one another. Each of the light emitting cells comprises a first conductive-type upper semiconductor layer, an active layer and a second conductive-type lower semiconductor layer. Electrodes are positioned between the substrate and the light emitting cells, and each of the electrodes has an extension extending toward adjacent one of the light emitting cells. An etching prevention layer is positioned in regions between the light emitting cells and between the electrodes. Each wire has one end connected to the upper semiconductor layer and the other end connected to the electrode through the etching prevention layer.Type: GrantFiled: November 23, 2009Date of Patent: July 31, 2012Assignee: Seoul Opto Device Co., Ltd.Inventor: Won Cheol Seo
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Patent number: 8227277Abstract: A method of fabricating a group-III nitride semiconductor laser device includes: preparing a substrate of a hexagonal group-III nitride semiconductor, where the substrate has a semipolar primary surface; forming a substrate product having a laser structure, an anode electrode and a cathode electrode, where the laser structure includes the substrate and a semiconductor region, and where the semiconductor region is formed on the semipolar primary surface; scribing a first surface of the substrate product in part in a direction of the a-axis of the hexagonal group-III nitride semiconductor; and carrying out breakup of the substrate product by press against a second surface of the substrate product, to form another substrate product and a laser bar.Type: GrantFiled: October 20, 2011Date of Patent: July 24, 2012Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yusuke Yoshizumi, Yohei Enya, Takashi Kyono, Masahiro Adachi, Katsushi Akita, Masaki Ueno, Takamichi Sumitomo, Shinji Tokuyama, Koji Katayama, Takao Nakamura, Takatoshi Ikegami
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Patent number: 8227820Abstract: A semiconductor light-emitting diode, and method of fabricating same, wherein an indium (In)-containing light-emitting layer, as well as subsequent device layers, is deposited on a textured surface. The resulting device is a phosphor-free white light source.Type: GrantFiled: February 9, 2005Date of Patent: July 24, 2012Assignee: The Regents of the University of CaliforniaInventors: Rajat Sharma, Paul Morgan Pattison, John Francis Kaeding, Shuji Nakamura
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Patent number: 8222662Abstract: An LED package structure includes a transparent substrate having a supporting face and a light-emergent face opposite to the supporting face, a housing disposed on the supporting face, two electrodes disposed on the housing, an LED chip disposed on the supporting face and electrically connected to the two electrodes, a reflecting layer covering the LED chip to reflect light emitted by the LED chip toward the transparent substrate, and a phosphor layer formed on the light-emergent face of the substrate. The phosphor layer includes a plurality of layers each having a specific light wavelength conversion range to generate a light with a predetermined color.Type: GrantFiled: December 21, 2010Date of Patent: July 17, 2012Assignee: Advanced Optoelectronic Technology, Inc.Inventors: Chia-Hui Shen, Tzu-Chien Hung, Jian-Shihn Tsang
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Patent number: 8218919Abstract: A MEMS-based display device is described, wherein an array of interferometric modulators are configured to reflect light through a transparent substrate. The transparent substrate is sealed to a backplate and the backplate may contain electronic circuitry fabricated on the backplane. The electronic circuitry is placed in electrical communication with the array of interferometric modulators and is configured to control the state of the array of interferometric modulators.Type: GrantFiled: January 3, 2012Date of Patent: July 10, 2012Assignee: QUALCOMM MEMS Technologies, Inc.Inventor: Karen Tyger
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Patent number: 8211722Abstract: A flip-chip LED fabrication method includes the steps of (a) providing a GaN epitaxial wafer, (b) forming a first groove in the GaN epitaxial layer, (c) forming a second groove in the GaN epitaxial layer to expose a part of the N-type GaN ohmic contact layer of the GaN epitaxial layer, (d) forming a translucent conducting layer on the epitaxial layer, (e) forming a P-type electrode pad and an N-type electrode pad on the translucent conducting layer, (f) forming a first isolation protection layer on the P-type electrode pad, the N-type electrode pad, the first groove and the second groove, (g) forming a metallic reflection layer on the first isolation protection layer, (h) forming a second isolation protection layer on the first isolation protection layer and the metallic reflection layer, (i) forming a third groove to expose one lateral side of the N-type electrode pad, (j) separating the processed GaN epitaxial wafer into individual GaN LED chips, and (k) bonding at least one individual GaN LED chip thus obtType: GrantFiled: June 21, 2011Date of Patent: July 3, 2012Inventor: Lien-Shine Lu
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Patent number: 8211724Abstract: The present invention relates to a light emitting device having a plurality of non-polar light emitting cells and a method of fabricating the same. Nitride semiconductor layers are disposed on a Gallium Nitride substrate having an upper surface. The upper surface is a non-polar or semi-polar crystal and forms an intersection angle with respect to a c-plane. The nitride semiconductor layers may be patterned to form light emitting cells separated from one another. When patterning the light emitting cells, the substrate may be partially removed in separation regions between the light emitting cells to form recess regions. The recess regions are filled with an insulating layer, and the substrate is at least partially removed by using the insulating layer.Type: GrantFiled: November 23, 2009Date of Patent: July 3, 2012Assignee: Seoul Opto Device Co., Ltd.Inventors: Kwang Choong Kim, Won Cheol Seo, Dae Won Kim, Dae Sung Kal, Kyung Hee Ye
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Publication number: 20120153339Abstract: A light-emitting diode chip structure including a conductive substrate, a semiconductor stacking layer and a patterned seed crystal layer is provided. The conductive substrate has a surface. The surface has a first region and a second region alternately distributed over the surface. The semiconductor stacking layer is disposed on the conductive substrate, and the surface of the conductive substrate faces the semiconductor stacking layer. The patterned seed crystal layer is disposed on the first region of the surface of the conductive substrate and between the conductive substrate and the semiconductor stacking layer. The patterned seed crystal layer separates the semiconductor stacking layer from the first region. The semiconductor stacking layer covers the patterned seed crystal layer and the second region, and is electrically connected to the conductive substrate through the second region. A fabrication method of the light-emitting diode chip structure is also provided.Type: ApplicationFiled: March 17, 2011Publication date: June 21, 2012Applicant: Lextar Electronics CorporationInventors: JUN-RONG CHEN, CHI-WEN KUO, KUN-FU HUANG, JUI-YI CHU, KUO-LUNG FANG
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Patent number: 8198177Abstract: Seeds are implanted in a regular pattern upon an undersubstrate. An AlxInyGa1-x-yN (0?x?1, 0?y?1, 0<x+y?1) mixture crystal is grown on the seed implanted undersubstrate by a facet growth method. The facet growth makes facet pits above the seeds. The facets assemble dislocations to the pit bottoms from neighboring regions and make closed defect accumulating regions (H) under the facet bottoms. The closed defect accumulating regions (H) arrest dislocations permanently. Release of dislocations, radial planar defect assemblies and linear defect assemblies are forbidden. The surrounding accompanying low dislocation single crystal regions (Z) and extra low dislocation single crystal regions (Y) are low dislocation density single crystals.Type: GrantFiled: October 25, 2011Date of Patent: June 12, 2012Assignee: Sumitomo Electric Industries, Ltd.Inventors: Seiji Nakahata, Ryu Hirota, Kensaku Motoki, Takuji Okahisa, Kouji Uematsu
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Publication number: 20120142133Abstract: A method for fabricating a semiconductor lighting chip includes steps of providing a substrate with an epitaxial layer thereon. The epitaxial layer comprises a first semiconductor layer, an active layer and a second semiconductor layer successively grown on the substrate. The epitaxial layer has dislocation defects traversing the first semiconductor layer, the active layer and the second semiconductor layer. The epitaxial layer is then subjected to an etching process which remove parts of the second semiconductor layer and the active layer along the dislocation defects to form recesses recessing from the second semiconductor layer to the active layer. Thereafter a first electrode and a second electrode are formed on the first semiconductor layer and the second semiconductor layer, respectively.Type: ApplicationFiled: August 17, 2011Publication date: June 7, 2012Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.Inventors: PO-MIN TU, SHIH-CHENG HUANG
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Patent number: 8193018Abstract: A method of patterning a substrate that includes locating a single mask film over the substrate and forming first opening portions in first locations in the mask film. First electrical materials are deposited over the substrate and mask film to form patterned areas in the first locations. Second opening portions are formed in second locations different from the first locations in the mask film. Subsequently, second electrical materials are deposited over the substrate and mask film to form patterned areas in the first and second locations.Type: GrantFiled: January 10, 2008Date of Patent: June 5, 2012Assignee: Global OLED Technology LLCInventor: Ronald S. Cok
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Patent number: 8193479Abstract: An image sensor formed in a semiconductor stack of a lower region of a first conductivity type and of an upper region of a second conductivity type, including: a photodiode formed of a first portion of the stack; a read area formed of a second portion of the stack; a trench with insulated walls filled with a conductive material, the trench surrounding the photodiode and the read area and being interrupted, all along its height, on a portion facing the photodiode and the read area; and first connection mechanism associated with the conductive material of the trench and capable of being connected to a reference bias voltage.Type: GrantFiled: April 24, 2009Date of Patent: June 5, 2012Assignee: STMicroelectronics (Crolles 2) SASInventors: François Roy, Benoît Ramadout
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Patent number: 8188487Abstract: A surface emitting laser includes a lower multilayer mirror, an active layer, and an upper multilayer mirror stacked onto a substrate. A first current confinement layer having a first electrically conductive region and a first insulating region is formed above or below the active layer using a first trench structure. A second current confinement layer having a second electrically conductive region and a second insulating region is formed above or below the first current confinement layer using a second trench structure. The first and second trench structures extend from a top surface of the upper multilayer mirror towards the substrate such that the second trench structure surrounds the first trench structure. When the surface emitting laser is viewed in an in-plane direction of the substrate, a boundary between the first electrically conductive region and the first insulating region is disposed inside the second electrically conductive region.Type: GrantFiled: July 15, 2010Date of Patent: May 29, 2012Assignee: Canon Kabushiki KaishaInventor: Mitsuhiro Ikuta
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Patent number: 8188508Abstract: A device includes a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region. The semiconductor structure includes an n-contact region and a p-contact region. A cross section of the n-contact region comprises a plurality of first regions wherein portions of the light emitting layer and p-type region are removed to expose the n-type region. The plurality of first regions are separated by a plurality of second regions wherein the light emitting layer and p-type region remain in the device. The device further includes a first metal contact formed over the semiconductor structure in the p-contact region and a second metal contact formed over the semiconductor structure in the n-contact region. The second metal contact is in electrical contact with at least one of the second regions in the n-contact region.Type: GrantFiled: December 6, 2011Date of Patent: May 29, 2012Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company, LLCInventor: John E. Epler