Compound Semiconductor Patents (Class 438/46)
  • Patent number: 11404668
    Abstract: An organic light emitting diode (OLED) display panel and a method of manufacturing the same are provided. The OLED display panel includes a base substrate, a thin film transistor layer, an OLED device layer and a packaging layer sequentially disposed. The packaging layer includes a first inorganic packaging layer, a first organic layer and a second inorganic packaging layer sequentially disposed. The first inorganic packaging layer is formed with a first groove and the first organic packaging layer is formed with a second groove.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: August 2, 2022
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Zhao Li
  • Patent number: 11398600
    Abstract: A method of manufacturing an electroluminescent device includes forming a first patterned structure in a first pixel through a first opening of a first sacrificial layer; removing the first sacrificial layer; forming a second patterned structure in a second pixel through a second opening of a second sacrificial layer; removing the second sacrificial layer; and removing a first patterned protecting layer from the first patterned structure and a second patterned protecting layer from the second patterned structure to respectively form a first patterned light-emitting layer and a second patterned light-emitting layer.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: July 26, 2022
    Assignee: INT TECH CO., LTD.
    Inventors: Tzu-Hao Wang, Huei-Siou Chen
  • Patent number: 11393952
    Abstract: The array of gallium-nitride (GaN) nanocolumns have quantum wells in a polar c-plane or in a semi-polar plane to emit light directed to ends of the nanocolumns and an interstitial filler material with light emitted in the nanocolumns being guided to exit from an end of the nanocolumns.
    Type: Grant
    Filed: January 18, 2022
    Date of Patent: July 19, 2022
    Inventors: Najeeb Ashraf Khalid, Huy Binh Le, Alexander Novikov
  • Patent number: 11380870
    Abstract: The present application relates to an organic light-emitting diode (OLED) encapsulation structure, a method of encapsulating an organic light-emitting diode (OLED), and an organic light-emitting diode (OLED) display device. The OLED encapsulation structure includes a substrate, a self-healing encapsulation layer, and at least two inorganic encapsulation layers, wherein a cavity is formed between two adjacent layers of the inorganic encapsulation layers, a layer of the self-healing encapsulation layer is provided in the cavity, and one of the inorganic encapsulation layers covers the OLED device. The self-healing encapsulation layer 13 is used to achieve self-healing of cracks at room temperature to prevent water and oxygen from entering the interior of the OLED panel through cracks.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: July 5, 2022
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Zhao Li
  • Patent number: 11342477
    Abstract: A method of making a semiconductor device, comprising: forming a plurality of semiconductor seeds of a first III-nitride material through a mask provided over a substrate; growing a second III-nitride semiconductor material; planarizing the grown second semiconductor material to form a plurality of discrete base elements having a substantially planar upper surface. Preferably the step of planarizing involves performing atomic distribution of III type atoms of the grown second semiconductor material under heating to form the planar upper surface, and without supply of III type atoms is carried out during the step of planarization.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: May 24, 2022
    Assignee: HEXAGEM AB
    Inventors: Lars Samuelson, Jonas Ohlsson, Zhaoxia Bi
  • Patent number: 11322646
    Abstract: Some embodiments of the present disclosure provide a light-emitting diode package. The light-emitting diode package includes a transparent substrate. The light-emitting diode package also includes a first light-emitting diode which is disposed on the transparent substrate and has a first multiple quantum well structure. The light-emitting diode package further includes a second light-emitting diode which is disposed on the transparent substrate and has a second multiple quantum well structure. The first multiple quantum well structure and the second multiple quantum well structure are disposed to emit lights with different wavelengths.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: May 3, 2022
    Assignee: INNOLUX CORPORATION
    Inventors: Shun-Yuan Hu, Chin-Lung Ting, Ker-Yih Kao, Li-Wei Mao
  • Patent number: 11309351
    Abstract: A micro light-emitting diode includes a first micro light-emitting diode including a first light-emitting layer and emitting light at a first wavelength, and a second micro light-emitting diode including the first light-emitting layer and a second light-emitting layer emitting light at a second wavelength longer than the first wavelength, in which the second light-emitting layer is a nitride semiconductor layer doped with a second rare earth element, and a nitride semiconductor of the first micro light-emitting diode and the nitride semiconductor of the second micro light-emitting diode are separated from each other.
    Type: Grant
    Filed: February 17, 2020
    Date of Patent: April 19, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Katsuji Iguchi, Hidenori Kawanishi
  • Patent number: 11251477
    Abstract: A nanofluid contact potential difference cell comprises a cathode with a lower work function and an anode with a higher work function separated by a nanometer-scale spaced inter-electrode gap containing a nanofluid with intermediate work function nanoparticle clusters. The cathode comprises a refractory layer and a thin film of electrosprayed dipole nanoparticle clusters partially covering a surface of the refractory layer. A thermal power source, placed in good thermal contact with the cathode, drives an electrical current through an electrical circuit connecting the cathode and anode with an external electrical load in between. A switch is configured to intermittently connect the anode and the cathode to maintain non-equilibrium between a first current from the cathode to the anode and a second current from the anode to the cathode.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: February 15, 2022
    Assignee: Birmingham Technologies, Inc.
    Inventor: Joseph G. Birmingham
  • Patent number: 11239391
    Abstract: A composition of matter comprising at least one nanostructure grown epitaxially on an optionally doped ?-Ga2O3 substrate, wherein said nanostructure comprises at least one group III-V compound.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: February 1, 2022
    Assignee: NORWEGIAN UNIVERSITY OF SCIENCE AND TECHNOLOGY (NTNU)
    Inventors: Bjørn Ove Myking Fimland, Helge Weman, Dingding Ren
  • Patent number: 11220759
    Abstract: A method of manufacturing a group-III nitride crystal includes: a seed crystal preparation step of preparing a plurality of dot-shaped group-III nitrides on a substrate as a plurality of seed crystals for growth of a group-III nitride crystal; and a crystal growth step of bringing surfaces of the seed crystals into contact with a melt containing an alkali metal and at least one group-III element selected from gallium, aluminum, and indium in an atmosphere containing nitrogen and thereby reacting the group-III element with the nitrogen in the melt to grow the group-III nitride crystal.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: January 11, 2022
    Assignees: OSAKA UNIVERSITY, PANASONIC CORPORATION
    Inventors: Yusuke Mori, Masayuki Imanishi, Masashi Yoshimura, Kousuke Murakami, Shinsuke Komatsu, Masahiro Tada, Yoshio Okayama
  • Patent number: 11211526
    Abstract: A semiconductor light-emitting element having an emission peak wavelength of 395 nm or more and 425 nm or less, comprises: a substrate including a first surface and a second surface, at least one surface selected from the group consisting of the first and second surfaces having an uneven region; a semiconductor layer on the first surface; and a multilayer reflective film on the second surface or the semiconductor layer, wherein the multilayer reflective film includes a structure having a plurality of first dielectric films and a plurality of second dielectric films, the first dielectric films and the second dielectric films being alternately stacked.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: December 28, 2021
    Assignees: TOSHIBA MATERIALS CO., LTD., MEIJO UNIVERSITY
    Inventors: Satoshi Kamiyama, Atsuya Sasaki, Ryosuke Hiramatsu, Hideaki Hirabayashi
  • Patent number: 11205739
    Abstract: Provided is a semiconductor light-emitting device which can mitigate a multipeak in an emission spectrum in a bonding-type semiconductor light-emitting device having an InP cladding layer. The semiconductor light-emitting device of the present disclosure includes a first conductive type InP cladding layer, a semiconductor light-emitting layer, and a second conductive type InP cladding layer provided sequentially over a conductive support substrate, the second conductive type InP cladding layer being on a light extraction side, and the semiconductor light-emitting device further includes a metal reflective layer, between the conductive support substrate and the first conductive type InP cladding layer, for reflecting light emitted from the semiconductor light-emitting layer; and a plurality of recesses provided in a surface of the second conductive type InP cladding layer.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: December 21, 2021
    Assignee: DOWA Electronics Materials Co., Ltd.
    Inventors: Jumpei Yamamoto, Tetsuya Ikuta
  • Patent number: 11201300
    Abstract: A condensed cyclic compound represented by Formula 1: wherein, in Formula 1, groups and variables are the same as described in the specification.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: December 14, 2021
    Assignees: SAMSUNG ELECTRONICS CO., LTD., SAMSUNG SDI CO., LTD.
    Inventors: Sangmo Kim, Eunsuk Kwon, Jongsoo Kim, Jhunmo Son, Dongseon Lee, Soonok Jeon, Yeonsook Chung, Yongsik Jung
  • Patent number: 11195975
    Abstract: Solid state light emitting micropixels array structures having hydrogen barrier layers to minimize or eliminate undesirable passivation of doped GaN structures due to hydrogen diffusion.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: December 7, 2021
    Assignee: Ostendo Technologies, Inc.
    Inventors: Hussein S. El-Ghoroury, Kameshwar Yadavalli, Andrew Teren, Qian Fan
  • Patent number: 11139339
    Abstract: An array substrate including a base substrate; a thin film transistor disposed on the base substrate, the thin film transistor including a gate electrode connected to a gate line; an active layer; a gate insulating layer insulating the gate electrode from the active layer; a first electrode connected to a data line; and a second electrode spaced apart from the first electrode; a micro light emitting diode disposed on a side of the gate insulating layer away from the base substrate, the micro light emitting diode including a first electrode, a light emitting layer and a second electrode; and a common electrode. The second electrode of the thin film transistor is connected to one of the first and second electrodes of the micro light emitting diode. The other of the first and second electrodes of the micro light emitting diode is connected to the common electrode.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: October 5, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Chunping Long
  • Patent number: 11133435
    Abstract: Provided is a technique for manufacturing a nitride semiconductor substrate with which it is possible to manufacture a nitride semiconductor substrate having sufficiently reduced dislocation density with a large area even if manufactured on an inexpensive substrate made of sapphire, etc. A nitride semiconductor substrate in which a nitride semiconductor layer formed on a substrate is formed by laminating an undoped nitride layer and a rare earth element-added nitride layer to which a rare earth element is added as a doping material, and the dislocation density is of the order of 106 cm?2 or less.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: September 28, 2021
    Assignee: OSAKA UNIVERSITY
    Inventors: Yasufumi Fujiwara, Wanxin Zhu, Atsushi Koizumi, Brandon Mitchell, Tom Gregorkiewicz
  • Patent number: 11114591
    Abstract: A coated phosphors that include a shell comprising a first Mn4+ doped phosphor of formula I Ax[MFy]:Mn4+??I directly disposed on a core comprising a second phosphor. The second phosphor is a material other than a compound of formula I or formula II Ax[MFy]??II wherein A is, independently at each occurrence, Li, Na, K, Rb, Cs, or a combination thereof; M is, independently at each occurrence, Si, Ge, Sn, Ti, Zr, Al, Ga, In, Sc, Hf, Y, La, Nb, Ta, Bi, Gd, or a combination thereof; x is the absolute value of the charge of the [MFy] ion; and y is 5, 6 or 7.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: September 7, 2021
    Assignee: CURRENT LIGHTING SOLUTIONS, LLC
    Inventors: James Edward Murphy, William Winder Beers, William Erwin Cohen
  • Patent number: 11101454
    Abstract: A method of peeling a mother protective film from a mother display panel includes: laminating the mother display panel and the mother protective film, the mother display panel including a plurality of display cells each including a display area and a peripheral area around the plurality of display cell; forming a target area and a dummy area in the mother protective film by forming a cutting line in a closed loop shape enclosing the target area corresponding to each of the display cells and a first additional cutting line in a first direction near the cutting line; physically peeling off the dummy area from the mother display panel, including: primarily peeling off a portion of the mother protective film adjacent to the first additional cutting line; and secondarily peeling off rest of the mother protective film from the mother display panel along the cutting line.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: August 24, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jiwon Jung, Youngji Kim, Yiseul Um, Younghoon Lee, Youngseo Choi
  • Patent number: 11094747
    Abstract: An organic EL display apparatus (100) has a plurality of pixels including red pixels (R), green pixels (G) and blue pixels (B), the apparatus (100) including: a substrate (1); a plurality of organic EL elements (10) supported on the substrate, with one organic EL element provided in each pixel; a generally lattice-shaped first bank (21) defining the pixels, the first bank including a plurality of first portions (21A) extending in a first direction and a plurality of second portions (21B) extending in a second direction that crosses the first direction; and a plurality of second banks (22) provided on a top portion (21t) of the first bank, wherein the second banks are not formed at intersections (cr) between the first portions and the second portions of the first bank, and the second banks are more liquid repellent than the first bank.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: August 17, 2021
    Assignee: Sakai Display Products Corporation
    Inventors: Yukiya Nishioka, Katsuhiko Kishimoto
  • Patent number: 11038079
    Abstract: A light-emitting device and a manufacturing method thereof are provided. The light-emitting device includes a substrate, an epitaxial blocking layer, and a light-emitting epitaxial structure. The substrate has a surface, in which the surface includes a plurality of protruding parts and a plurality of recess parts relative to the protruding parts. The epitaxial blocking layer disposed on the substrate covers the recess parts and exposes the protruding parts. The light-emitting epitaxial structure disposed on the substrate is connected to the protruding parts and is disposed above the recess parts. The light-emitting epitaxial structure is formed by using the protruding parts as a growth surface thereof so as to have a better crystalline quality.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: June 15, 2021
    Assignees: KAISTAR LIGHTING (XIAMEN) CO., LTD., BRIDGELUX WUXI R&D CO., LTD.
    Inventors: Hung-Chih Yang, Xiao-Kun Lin, Jian-Ran Huang, Ben-Jie Fan, Ho-Chien Chen, Chan-Yang Lu, Shuen-Ta Teng, Cheng-Chang Hsieh
  • Patent number: 11024769
    Abstract: A group III nitride semiconductor light-emitting element comprises, in the following order: an n-type group III nitride semiconductor layer; a group III nitride semiconductor laminated body obtained by alternately laminating a barrier layer and a well layer narrower in bandgap than the barrier layer in the stated order so that the number of barrier layers and the number of well layers are both N, where N is an integer; an AlN guide layer; and a p-type group III nitride semiconductor layer. The AlN guide layer has a thickness of 0.7 nm or more and 1.7 nm or less. An Nth well layer in the group III nitride semiconductor laminated body and the AlN guide layer are in contact with each other, or a final barrier layer is further provided between the Nth well layer and the AlN guide layer.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: June 1, 2021
    Assignee: DOWA Electronics Materials Co., Ltd.
    Inventors: Yasuhiro Watanabe, Takehiko Fujita
  • Patent number: 11001940
    Abstract: A new GaN single crystal is provided. A GaN single crystal according to the present embodiment comprises a gallium polar surface which is a main surface on one side and a nitrogen polar surface which is a main surface on the opposite side, wherein on the gallium polar surface is found at least one square area, an outer periphery of which is constituted by four sides each with a length of 2 mm or more, and, when the at least one square are is divided into a plurality of sub-areas each of which is a square of 100 ?m×100 ?m, pit-free areas account for 80% or more of the sub-areas.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: May 11, 2021
    Assignee: MITSUBISHI CHEMICAL CORPORATION
    Inventors: Hideo Fujisawa, Yutaka Mikawa, Shinichiro Kawabata, Hideo Namita, Tae Mochizuki
  • Patent number: 10991850
    Abstract: A group III nitride semiconductor light-emitting element comprises, in the following order: an n-type group III nitride semiconductor layer; a group III nitride semiconductor laminated body obtained by alternately laminating a barrier layer and a well layer narrower in bandgap than the barrier layer in the stated order so that the number of barrier layers and the number of well layers are both N, where N is an integer; an AlN guide layer; and a p-type group III nitride semiconductor layer. The AlN guide layer has a thickness of 0.7 nm or more and 1.7 nm or less. An Nth well layer in the group III nitride semiconductor laminated body and the AlN guide layer are in contact with each other, or a final barrier layer is further provided between the Nth well layer and the AlN guide layer.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: April 27, 2021
    Assignee: DOWA Electronics Materials Co., Ltd.
    Inventors: Yasuhiro Watanabe, Takehiko Fujita
  • Patent number: 10916706
    Abstract: A composition having excellent dischargeability by an ink jet method and reduced clogging of an ink jet apparatus is provided. The composition contains a fluorinated alcohol A represented by the formula (1) and having a boiling point of 50° C. or more and less than 150° C., a fluorinated alcohol B represented by the formula (1) and having a boiling point of 150° C. or more and less than 300° C., and a charge transportable compound, in which the ratio rate of the fluorinated alcohol B with respect to 100 parts by mass of the sum of the fluorinated alcohol A and the fluorinated alcohol B is 10 parts by mass to 90 parts by mass: CnFH2nF+1-mFFnFOH ??(1) In formula (1), nF is an integer of 1 to 12 and mF is an integer of 1 to 25, provided that 2nF+1?mF.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: February 9, 2021
    Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Masanobu Tanaka, Motoo Noda
  • Patent number: 10910250
    Abstract: The present disclosure relates to a method for mechanically separating layers, in particular in a double layer transfer process. The present disclosure relates more in particular to a method for mechanically separating layers, comprising the steps of providing a semiconductor compound comprising a layer of a handle substrate and an active layer with a front main side and a back main side opposite the front main side, wherein the layer of the handle substrate is attached to the front main side of the active layer, then providing a layer of a carrier substrate onto the back main side of the active layer, and then initiating mechanical separation of the layer of the handle substrate, wherein the layer of the handle substrate and the layer of the carrier substrate are provided with a substantially symmetrical mechanical structure.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: February 2, 2021
    Assignee: Soitec
    Inventors: Marcel Broekaart, Ionut Radu, Didier Landru
  • Patent number: 10903352
    Abstract: A manufacturing method of a vertical GaN-based semiconductor device having: a GaN-based semiconductor substrate; a GaN-based semiconductor layer including a drift region having doping concentration of an n type impurity, which is lower than that of the GaN-based semiconductor substrate, and is provided on the GaN-based semiconductor substrate; and MIS structure having the GaN-based semiconductor layer, an insulating film contacting the GaN-based semiconductor layer, and a conductive portion contacting the insulating film, the method includes: implanting an n type dopant in a back surface of the GaN-based semiconductor substrate after forming of the MIS structure, and annealing the GaN-based semiconductor substrate after the implanting of the n type dopant.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: January 26, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Shinya Takashima, Katsunori Ueno, Masaharu Edo
  • Patent number: 10851293
    Abstract: A method includes mixing a first fluoride phosphor powder that is doped with tetravalent manganese with a treatment solution for a designated period of time, stopping the mixing to allow the fluoride phosphor powder to settle, removing at least some liquid that has separated from the first fluoride phosphor powder, repeating (a) the mixing, (b) the stopping of the mixing, and (c) removing at least some of the liquid during one or more additional cycles, and obtaining a second fluoride phosphor powder following the repeating of the mixing, the stopping of the mixing, and the removing of at least some of the liquid. The second fluoride phosphor powder includes a reduced amount of the manganese relative to the first fluoride phosphor powder.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: December 1, 2020
    Assignee: CURRENT LIGHTING SOLUTIONS, LLC
    Inventors: Fangming Du, William Winder Beers, William Erwin Cohen, Clark David Nelson
  • Patent number: 10847759
    Abstract: A method of manufacturing a display apparatus according to some embodiments of the present disclosure includes preparing a display substrate in which at least one hole region is defined when viewed in a planar view, disposing a first adhesive film on the display substrate, etching the hole region of the display substrate by irradiating first light in the form of laser light, and peeling off the first adhesive film, wherein the first adhesive film transmits at least a portion of the first light.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: November 24, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyojin Kim, Sokwon Noh, Changhan Lee, Myunghwan Kim, Sangyeol Kim, Woohyun Kim, Taehyun Sung, Sejoong Shin, Horyun Chung
  • Patent number: 10763392
    Abstract: A light emitting device including a substrate, a first semiconductor layer, a mesa disposed thereon and including a second semiconductor layer and an active layer, a first contact electrode contacting the first semiconductor layer exposed around the mesa, a second contact electrode contacting the second semiconductor layer, a passivation layer covering the first contact electrode, the mesa, and the second contact electrode and having openings disposed on the first and second contact electrodes, and first and second bump electrodes electrically connected to the first and second contact electrodes through the openings, respectively, in which the mesa has indentations in plan view, the first contact electrode is spaced apart from the mesa by a predetermined distance, surrounds the mesa, and contacts the first semiconductor layer in the indentations, and each of the first and second bump electrodes covers one of the openings of the passivation layer and a portion thereof.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: September 1, 2020
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Seong Kyu Jang, Hong Suk Cho, Kyu Ho Lee, Chi Hyun In
  • Patent number: 10731076
    Abstract: Processes for producing stable Mn4+ doped phosphors include dispersing a compound of formula I in a solution comprising a compound of formula II to form a dispersion; applying pressure to the dispersion at a temperature less than 200° C. to form a phosphor product; and contacting the phosphor product with a fluorine-containing oxidizing agent in gaseous form at an elevated temperature; wherein A is Li, Na, K, Rb, Cs, or a combination thereof; M is Si, Ge, Sn, Ti, Zr, Al, Ga, In, Sc, Hf, Y, La, Nb, Ta, Bi, Gd, or a combination thereof; x is the absolute value of the charge of the [MFy] ion; and y is 5, 6 or 7.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: August 4, 2020
    Assignee: CURRENT LIGHTING SOLUTIONS, LLC
    Inventors: Anant Achyut Setlur, James Edward Murphy
  • Patent number: 10700135
    Abstract: An organic light-emitting diode (OLED) display panel and an OLED display device are provided. The OLED display panel comprises a first substrate; a first electrode layer disposed on the first substrate and including a plurality of first electrodes; a hole transport layer disposed on a surface of the first electrode layer far away from the first substrate, and formed by a first hole transport material and a second hole transport material having different carrier mobility; a plurality of light-emitting devices disposed on a surface of the hole transport layer far away from the first electrode layer and arranged in correspondence with the plurality of first electrodes respectively; an electron transport layer disposed on a surface of the plurality of light-emitting devices far away from the hole transport layer; and a second electrode layer disposed on a surface of the electron transport layer far away from the plurality of light-emitting devices.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: June 30, 2020
    Assignees: SHANGHAI TIANMA AM-OLED CO., LTD., TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventors: Xiangcheng Wang, Jinghua Niu, Wei He, Yuji Hamada, Chen Liu, Honggang Yan
  • Patent number: 10692825
    Abstract: A light emitting chip package includes a light-emitting chip, a molding compound, and a redistribution wiring structure. The light-emitting chip includes an emission zone, a first electrode, and a second electrode. The molding compound covers at least a sidewall of the light-emitting chip and supports the light-emitting chip. The redistribution wring structure disposed in the molding compound includes a first interconnect wiring structure electrically connected to the first electrode and a second interconnect wiring structure electrically connected to the second electrode. The first interconnect wiring structure and the second interconnect wiring structure respectively include a first pad and a second pad, and the first pad and the second pad are located at the same side of the light emitting chip package.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: June 23, 2020
    Assignee: HLJ TECHNOLOGY CO., LTD.
    Inventors: Chih-Hung Chuang, Jen-Hsiang Yang
  • Patent number: 10636845
    Abstract: An organic EL display apparatus (100) has a plurality of pixels including red pixels (R), green pixels (G) and blue pixels (B), the apparatus (100) including: a substrate (1); a plurality of organic EL elements (10) supported on the substrate, with one organic EL element provided in each pixel; a generally lattice-shaped first bank (21) defining the pixels, the first bank including a plurality of first portions (21A) extending in a first direction and a plurality of second portions (21B) extending in a second direction that crosses the first direction; and a plurality of second banks (22) provided on a top portion (21t) of the first bank, wherein the second banks are not formed at intersections (cr) between the first portions and the second portions of the first bank, and the second banks are more liquid repellent than the first bank.
    Type: Grant
    Filed: December 25, 2017
    Date of Patent: April 28, 2020
    Assignee: Sakai Display Products Corporation
    Inventors: Yukiya Nishioka, Katsuhiko Kishimoto
  • Patent number: 10573780
    Abstract: An ultraviolet light-emitting device including a substrate, a first conductive type semiconductor layer disposed on the substrate, a mesa disposed on the first conductive type semiconductor layer and including a second conductive type semiconductor layer and an active layer disposed between the semiconductor layers, a first contact electrode contacting the exposed first conductive type semiconductor layer around the mesa, a second contact electrode contacting the second conductive type semiconductor layer on the mesa, a passivation layer covering the first contact electrode, the mesa, and the second contact electrode and having openings disposed above the first and second contact electrodes, and first and second bump electrodes electrically connected to the first and second contact electrodes through the openings of the passivation layer, in which the mesa has depressions in plan view, and the first and second bump electrodes cover the openings and a portion of the passivation layer.
    Type: Grant
    Filed: January 11, 2017
    Date of Patent: February 25, 2020
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Seong Kyu Jang, Hong Suk Cho, Kyu Ho Lee, Chi Hyun In
  • Patent number: 10573783
    Abstract: A group III nitride semiconductor light-emitting element having longer element life than conventional group III nitride semiconductor light-emitting elements and a method of manufacturing the same are provided. A group III nitride semiconductor light-emitting element 100 comprises, in the following order: an n-type group III nitride semiconductor layer 30; a group III nitride semiconductor laminated body 40 obtained by alternately laminating a barrier layer 40a and a well layer 40b narrower in bandgap than the barrier layer 40a in the stated order so that the number of barrier layers 40a and the number of well layers 40b are both N, where N is an integer; an AlN guide layer 60; and a p-type group III nitride semiconductor layer 70, wherein the AlN guide layer 60 has a thickness of 0.5 nm or more and 2.0 nm or less.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: February 25, 2020
    Assignee: DOWA Electronics Materials Co., Ltd.
    Inventors: Yasuhiro Watanabe, Takehiko Fujita
  • Patent number: 10516077
    Abstract: Provided is a display apparatus. The display apparatus may include a monolithic device in which a light emitting element array, a transistor array, and a color control member are monolithically provided on one substrate. The display apparatus may include a first layered structure including the light emitting element array, a second layered structure including the transistor array, and a third layered structure including the color control member, wherein the second layered structure may be between the first layered structure and the third layered structure. The light emitting element array may include a plurality of light emitting elements comprising an inorganic material. The plurality of light emitting elements may have a vertical nanostructure.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: December 24, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chilhee Chung, Junhee Choi, Sungwoo Hwang, Shinae Jun, Deukseok Chung, Junseok Cho
  • Patent number: 10403496
    Abstract: A method of forming a compound semiconductor substrate includes providing a crystalline base substrate having a first semiconductor material and a main surface, and forming a first semiconductor layer on the main surface and having a pair of tracks disposed on either side of active device regions. The first semiconductor layer is formed from a second semiconductor material having a different coefficient of thermal expansion than the first semiconductor material. The pair of tracks have a relatively weaker crystalline structure than the active device regions. The method further includes thermally cycling the base substrate and the first semiconductor layer such that the first semiconductor layer expands and contracts at a different rate than the base substrate. The pair of tracks physically decouple adjacent ones of the active device regions during the thermal cycling.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: September 3, 2019
    Assignee: Infineon Technologies Austria AG
    Inventors: Simone Lavanga, Uttiya Chowdhury
  • Patent number: 10392724
    Abstract: A process of forming an epitaxial wafer is disclosed. The process includes steps of (a) growing an aluminum nitride (AlN) layer at a first temperature and a first flow rate of ammonia (NH3); and (b) growing a gallium nitride (GaN) layer on the AlN layer. The step (b) includes a first period and a second period. At least one of a temperature from the first temperature to a second temperature that is lower than the first temperature and a flow rate of NH3 from the first flow rate to a second flow rate different from the first flow rate is carried out during the first period. The second period grows the GaN layer at the second temperature and the second flow rate of NH3.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: August 27, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Keiichi Yui
  • Patent number: 10396250
    Abstract: An exemplary light emitting diode is provided to comprise: a first semiconductor layer; a mesa disposed on the first semiconductor layer and including an active layer and a second semiconductor layer disposed on the active layer; a ZnO transparent electrode disposed on the mesa; a first electrode disposed on the first semiconductor layer; and a second electrode disposed on the ZnO transparent electrode, and including a second electrode pad and at least one second electrode extending portion extending from the second electrode pad. The second electrode extending portion contacts the ZnO transparent electrode. The ZnO transparent electrode includes a first region and a second region. The first region protrudes from the top surface of the ZnO transparent electrode, includes a plurality of projecting portions arranged in a predetermined pattern, the thickness of the first region greater than the thickness of the second region.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: August 27, 2019
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Chan Seob Shin, Myoung Hak Yang, Yeo Jin Yoon, Seom Geun Lee
  • Patent number: 10297976
    Abstract: A diode laser bar assembly is formed to exhibit a relatively low thermal resistance, which also providing an increased range of conditions over which the internal stress conditions may be managed. In particular, the submount configuration of the prior art is replaced by a pair of platelets, disposed above and below the diode laser bar so as to form a “sandwich” structure. The bottom platelet is disposed between the heatsink (cooler) and the diode laser bar. Thus, the bottom platelet may be relatively thin, creating a low thermal resistance configuration. The combination of the top and bottom platelets provides the ability to create various configurations and designs that best accommodate stress conditions for a particular situation.
    Type: Grant
    Filed: May 16, 2016
    Date of Patent: May 21, 2019
    Assignee: II-VI Laser Enterprise GmbH
    Inventors: Jürgen Müller, Rainer Bättig, Reinhard Brunner, Stefan Weiss
  • Patent number: 10297650
    Abstract: Disclosed is an organic light emitting diode (OLED) display device including a substrate including a pixel region and a boundary region outside the pixel region. The pixel region comprises an area having a short side and a long side. The pixel region comprises an array of pixels to emit light. The OLED display device includes a substrate in the pixel region and in the boundary region The OLED display device further includes a first electrode of a light emitting device in the pixel region over the substrate, a first bank covering edges of the first electrode in the pixel region on the substrate in the boundary region, wherein a width of an edge of the first bank along the short side of the pixel region is different from a width of an edge of the first bank along the long side of the pixel region, and a second bank on a portion of the first bank in the boundary region.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: May 21, 2019
    Assignee: LG Display Co., Ltd.
    Inventors: Hong-Ki Park, Hyo-Dae Bae
  • Patent number: 10170303
    Abstract: A system and method for growing a gallium nitride (GaN) structure that includes providing a template; and growing at least a first GaN layer on the template using a first sputtering process, wherein the first sputtering process includes: controlling a temperature of a sputtering target, and modulating between a gallium-rich condition and a gallium-lean condition, wherein the gallium-rich condition includes a gallium-to-nitrogen ratio having a first value that is greater than 1, and wherein the gallium-lean condition includes the gallium-to-nitrogen ratio having a second value that is less than the first value. Some embodiments include a load lock configured to load a substrate wafer into the system and remove the GaN structure from the system; and a plurality of deposition chambers, wherein the plurality of deposition chambers includes a GaN-deposition chamber configured to grow at least the first GaN layer on a template that includes the substrate wafer.
    Type: Grant
    Filed: May 26, 2017
    Date of Patent: January 1, 2019
    Inventor: Robbie J. Jorgenson
  • Patent number: 10153404
    Abstract: In one embodiment, a solid cylindrical tablet is pre-formed for a reflective cup containing an LED die, such as a blue LED die. The tablet comprises uniformly-mixed phosphor particles and transparent/translucent particles of a high TC material, such as quartz, in a hardened silicone binder, where the index of refraction of the high TC material is matched to that of the silicone to minimize internal reflection. Tablets can be made virtually identical in composition and size. The bulk of the tablet will be the high TC material. After the tablet is placed in the cup, the LED module is heated, preferably in a vacuum, to melt the silicone so that the mixture flows around the LED die and fills the voids to encapsulate the LED die. The silicone is then cooled to harden.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: December 11, 2018
    Assignee: Lumileds LLC
    Inventors: Grigoriy Basin, Mikhail Fouksman
  • Patent number: 10096774
    Abstract: The present invention discloses an evaporation method and an evaporation device. The evaporation method includes successively providing at least one mask above a base substrate and forming at least one evaporation sub-pattern on the base substrate by an evaporation process so that an evaporation pattern is formed on the base substrate, wherein the evaporation pattern is constituted by the at least one evaporation sub-pattern. As the evaporation pattern finally formed is constituted by the at least one evaporation sub-pattern, only a small number of opening regions are required to be formed on each of the masks used for forming the evaporation sub-patterns compared with the prior art, so that the widths of the shield regions between the adjacent opening regions may be set to be larger.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: October 9, 2018
    Assignees: BOE Technology Group Co., Ltd., Ordos Yuansheng Optoelectronics Co., Ltd.
    Inventors: Junsheng Chen, Cheng Li
  • Patent number: 10026704
    Abstract: An embodiment is a method including forming a first passive device in a first wafer, forming a first dielectric layer over a first side of the first wafer, forming a first plurality of bond pads in the first dielectric layer, planarizing the first dielectric layer and the first plurality of bond pads to level top surfaces of the first dielectric layer and the first plurality of bond pads with each other, hybrid bonding a first device die to the first dielectric layer and at least some of the first plurality of bond pads, and encapsulating the first device die in a first encapsulant.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: July 17, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Hsi Wu, Der-Chyang Yeh, Hsien-Wei Chen, Jie Chen
  • Patent number: 9997665
    Abstract: A light emitting diode has a light emitting region including a multiple quantum well structure, including a first protection layer, a first intermediate layer over the first protection layer, a quantum barrier layer over the first intermediate layer, a second intermediate layer over the well layer, a second protection layer over the second intermediate layer, and a quantum barrier layer over the second protection layer.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: June 12, 2018
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhibin Liu, Shasha Chen, Dongyan Zhang, Xiaofeng Liu, Duxiang Wang
  • Patent number: 9997672
    Abstract: An electrode structure of an LED includes an adhesion layer and a bond pad layer. The adhesion layer is stacked on the LED. The bond pad layer is stacked on the adhesion layer. The bond pad layer includes at least two first metal layers, at least two second metal layers and an outermost gold layer sequentially and alternately stacked. The first metal layers are selected from the group consisting Al and an Al alloy, and the second metal layers are selected from the group consisting of Ti, Ni, Cr, Pt, Pd, TiN, TiW, W, Rh and Cu. Thus, the main structure of the bond pad layer is a stacked structure of the first metal layers and the second metal layers. The first metal layers may be selected from a low-cost material, and the second metal layers improve issues of inadequate hardness and electromigration of the first metal layers.
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: June 12, 2018
    Assignee: TEKCORE CO., LTD.
    Inventors: Hai-Wen Hsu, Jia-Hong Sun
  • Patent number: 9991671
    Abstract: A method for producing a semiconductor laser element includes providing a semiconductor wafer comprising: a nitride semiconductor substrate, and a semiconductor stack located on the substrate, the semiconductor stack including a plurality of nitride semiconductor layers; forming in the substrate a fissure starting point and a fissure extending from the fissure starting point; forming a cleavage reference portion extending parallel to a cleavage plane of the semiconductor wafer as estimated from a plan view shape of the fissure; and cleaving the semiconductor wafer parallel to the cleavage reference portion to thereby obtain resonator end faces.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: June 5, 2018
    Assignee: NICHIA CORPORATION
    Inventors: Hiroki Sakata, Hiroki Koizumi
  • Patent number: 9991414
    Abstract: In a method according to embodiments of the invention, a III-nitride layer is grown on a growth substrate. The III-nitride layer is connected to a host substrate. The growth substrate is removed. The growth substrate is a non-III-nitride material. The growth substrate has an in-plane lattice constant asubstrate. The III-nitride layer has a bulk lattice constant alayer. In some embodiments, [(|asubstrate?alayer|)/asubstrate]*100% is no more than 1%.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: June 5, 2018
    Assignee: Lumileds LLC
    Inventors: Nathan Frederick Gardner, Melvin Barker McLaurin, Michael Jason Grundmann, Werner Goetz, John Edward Epler, Qi Ye
  • Patent number: 9938148
    Abstract: A method of producing nitride nanoparticles comprises reacting at least one organometallic compound, for example an alkyl metal, with at least one source of nitrogen. The reaction may involve one or more liquid phase organometallic compounds, or may involve one or more liquid phase organometallic compounds dissolved in a solvent or solvent mixture. The reaction constituents may be heated to a desired reaction temperature (for example in the range 40° C. to 300° C.).
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: April 10, 2018
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Alastair James Daniel Grundy, Peter Neil Taylor, Michael Alan Schreuder, Stewart Edward Hooper, Jonathan Heffernan