Abstract: According to example embodiments, a normally-off high electron mobility transistor (HEMT) includes: a channel layer having a first nitride semiconductor, a channel supply layer on the channel layer, a source electrode and a drain electrode at sides of the channel supply layer, a depletion-forming layer on the channel supply layer, a gate insulating layer on the depletion-forming layer, and a gate electrode on the gate insulation layer. The channel supply layer includes a second nitride semiconductor and is configured to induce a two-dimensional electron gas (2DEG) in the channel layer. The depletion-forming layer is configured has at least two thicknesses and is configured to form a depletion region in at least a partial region of the 2DEG. The gate electrode contacts the depletion-forming layer.

Abstract: A highly dislocation free compound semiconductor, e.g. AlxInyGa1-x-yN (0?x, y?1), is formed on a lattice mismatched substrate, e.g. Si, by first depositing a polycrystalline buffer layer on the substrate. A defective layer is then created at or near the interface of the substrate and the polycrystalline buffer layer, e.g. through ion implantation. A monocrystalline template layer of the compound semiconductor is then created on the buffer layer, and an epilayer of the compound semiconductor is grown on the template layer. A compound semiconductor based device structure may be formed in the epilayer.

Abstract: A semiconductor device having dislocations and a method of fabricating the semiconductor device is disclosed. The exemplary semiconductor device and method for fabricating the semiconductor device enhance carrier mobility. The method includes providing a substrate having an isolation feature therein and two gate stacks overlying the substrate, wherein one of the gate stacks is atop the isolation feature. The method further includes performing a pre-amorphous implantation process on the substrate. The method further includes forming a stress film over the substrate. The method also includes performing an annealing process on the substrate and the stress film.

Abstract: A method of forming nanocrystals includes loading a substrate into a chamber, applying a first voltage to a first target to form a thin film including a first metal compound on the substrate by sputtering, and applying a second voltage to a second target and forming nanocrystals in the thin film by sputtering.

Abstract: A III-nitride switch includes a recessed gate contact to produce a nominally off, or an enhancement mode, device. By providing a recessed gate contact, a conduction channel formed at the interface of two III-nitride materials is interrupted when the gate electrode is inactive to prevent current flow in the device. The gate electrode can be a schottky contact or an insulated metal contact. Two gate electrodes can be provided to form a bi-directional switch with nominally off characteristics. The recesses formed with the gate electrode can have sloped sides. The gate electrodes can be formed in a number of geometries in conjunction with current carrying electrodes of the device.

Abstract: Described herein is a method and precursor composition for depositing a multicomponent film. In one embodiment, the method and composition described herein is used to deposit a germanium-containing film such as Germanium Tellurium, Antimony Germanium, and Germanium Antimony Tellurium (GST) films via an atomic layer deposition (ALD) and/or other germanium, tellurium and selenium based metal compounds for phase change memory and photovoltaic devices. In this or other embodiments, the Ge precursor used comprises trichlorogermane.

Abstract: Methods of forming photo detectors are provided. The method includes providing a semiconductor layer on a substrate, forming a trench in the semiconductor layer, forming a first single crystalline layer and a second single crystalline layer using a selective single crystalline growth process in the trench, and patterning the first and second single crystalline layers and the semiconductor layer to form a first single crystalline pattern, a second single crystalline pattern and an optical waveguide.

Abstract: An epitaxial substrate, in which a group of group-III nitride layers is formed on a single-crystal silicon substrate so that a crystal plane is approximately parallel to a substrate surface, comprises: a first group-III nitride layer formed of AlN on the base substrate; a second group-III nitride layer formed of InxxAlyyGazzN (xx+yy+zz=1, 0?xx?1, 0<yy?1 and 0<zz?1) on the first group-III nitride layer; and at least one third group-III nitride layer epitaxially-formed on the second group-III nitride layer, wherein: the first group-III nitride layer is a layer containing multiple defects including at least one type of a columnar crystal, a granular crystal, a columnar domain and a granular domain; and an interface between the first group-III nitride layer and the second group-III nitride layer is a three-dimensional asperity surface.

Abstract: A method includes forming a stress compensation layer over a first side of a semiconductor substrate and forming a Group III-nitride layer over a second side of the substrate. Stress created on the substrate by the Group III-nitride layer is at least partially reduced by stress created on the substrate by the stress compensation layer. Forming the stress compensation layer could include forming a stress compensation layer from amorphous or microcrystalline material. Also, the method could include crystallizing the amorphous or microcrystalline material during subsequent formation of one or more layers over the second side of the substrate. Crystallizing the amorphous or microcrystalline material could occur during subsequent formation of the Group III-nitride layer and/or during an annealing process. The amorphous or microcrystalline material could create no or a smaller amount of stress on the substrate, and the crystallized material could create a larger amount of stress on the substrate.

Abstract: Atomic layer deposition (ALD) processes for forming thin films comprising GaN are provided. In some embodiments, ALD processes for forming doped GaN thin films are provided. The thin films may find use, for example, in light-emitting diodes.

Abstract: First and second template epitaxial semiconductor material portions including different semiconductor materials are formed within a dielectric template material layer on a single crystalline substrate. Heteroepitaxy is performed to form first and second epitaxial semiconductor portions on the first and second template epitaxial semiconductor material portions, respectively. At least one dielectric bonding material layer is deposited, and a handle substrate is bonded to the at least one dielectric bonding material layer. The single crystalline substrate, the dielectric template material layer, and the first and second template epitaxial semiconductor material portions are subsequently removed. Elemental semiconductor devices and compound semiconductor devices can be formed on the first and second semiconductor portions, which are embedded within the at least one dielectric bonding material layer on the handle substrate.

Abstract: A method of forming an amorphous silicon film includes: forming a seed layer on a surface of a base by heating the base and supplying an amino silane-based gas to the heated base, forming the amorphous silicon film with thickness for layer growth on the seed layer by heating the base and supplying a silane-based gas containing no amino group to the seed layer on the surface of the heated base, and decreasing a film thickness of the amorphous silicon film by etching the amorphous silicon film formed with thickness for layer growth.

Abstract: Methods of depositing III-nitride semiconductor materials on substrates include depositing a layer of III-nitride semiconductor material on a surface of a substrate in a nucleation HVPE process stage to form a nucleation layer having a microstructure comprising at least some amorphous III-nitride semiconductor material. The nucleation layer may be annealed to form crystalline islands of epitaxial nucleation material on the surface of the substrate. The islands of epitaxial nucleation material may be grown and coalesced in a coalescence HVPE process stage to form a nucleation template layer of the epitaxial nucleation material. The nucleation template layer may at least substantially cover the surface of the substrate. Additional III-nitride semiconductor material may be deposited over the nucleation template layer of the epitaxial nucleation material in an additional HVPE process stage. Final and intermediate structures comprising III-nitride semiconductor material are formed by such methods.

Abstract: Precursors for use in depositing tellurium-containing films on substrates such as wafers or other microelectronic device substrates, as well as associated processes of making and using such precursors, and source packages of such precursors. The precursors are useful for deposition of Ge2Sb2Te5 chalcogenide thin films in the manufacture of nonvolatile Phase Change Memory (PCM), by deposition techniques such as chemical vapor deposition (CVD) and atomic layer deposition (ALD).

Abstract: A preferred method of optimizing a Ga-nitride device material structure for a frequency multiplication device comprises: determining the amplitude and frequency of the input signal being multiplied in frequency; providing a Ga-nitride region on a substrate; determining the Al percentage composition and impurity doping in an AlGaN region positioned on the Ga-nitride region based upon the power level and waveform of the input signal and the desired frequency range in order to optimize power input/output efficiency; and selecting an orientation of N-face polar GaN or Ga-face polar GaN material relative to the AlGaN/GaN interface so as to orient the face of the GaN so as to optimize charge at the AlGaN/GaN interface. A preferred embodiment comprises an anti-serial Schottky varactor comprising: two Schottky diodes in anti-serial connection; each comprising at least one GaN layer designed based upon doping and thickness to improve the conversion efficiency.

Abstract: A method includes forming a stress compensation layer over a first side of a semiconductor substrate and forming a Group III-nitride layer over a second side of the substrate. Stress created on the substrate by the Group III-nitride layer is at least partially reduced by stress created on the substrate by the stress compensation layer. Forming the stress compensation layer could include forming a stress compensation layer from amorphous or microcrystalline material. Also, the method could include crystallizing the amorphous or microcrystalline material during subsequent formation of one or more layers over the second side of the substrate. Crystallizing the amorphous or microcrystalline material could occur during subsequent formation of the Group III-nitride layer and/or during an annealing process. The amorphous or microcrystalline material could create no or a smaller amount of stress on the substrate, and the crystallized material could create a larger amount of stress on the substrate.

Abstract: Epitaxial films are grown by alternately exposed to precursor dosing regions, inert gas plasma regions, hydrogen-containing plasma regions, chlorine-containing plasma and metrology regions, or regions where an atomic hydrogen source is located. Alternately, laser irradiation techniques may be substituted for the plasma energy in some of the processing regions. The film growth process can be implemented at substrate temperatures between about 25 C and about 600 C, together with optional exposures to laser irradiation to cause the surface of the film to melt or to experience a near-melt condition.

Abstract: A method of manufacturing a MOSFET includes the steps of preparing a silicon carbide substrate, forming an active layer on the silicon carbide substrate, forming a gate oxide film on the active layer, forming a gate electrode on the gate oxide film, forming a source contact electrode on the active layer, and forming a source interconnection on the source contact electrode. The step of forming the source interconnection includes the steps of forming a conductor film on the source contact electrode and processing the conductor film by etching the conductor film with reactive ion etching. Then, the method of manufacturing a MOSFET further includes the step of performing annealing of heating the silicon carbide substrate to a temperature not lower than 50° C. after the step of processing the conductor film.

Abstract: The present invention in one preferred embodiment discloses a new design of HVPE reactor, which can grow gallium nitride for more than one day without interruption. To avoid clogging in the exhaust system, a second reactor chamber is added after a main reactor where GaN is produced. The second reactor chamber may be configured to enhance ammonium chloride formation, and the powder may be collected efficiently in it. To avoid ammonium chloride formation in the main reactor, the connection between the main reactor and the second reaction chamber can be maintained at elevated temperature. In addition, the second reactor chamber may have two or more exhaust lines. If one exhaust line becomes clogged with powder, the valve for an alternative exhaust line may open and the valve for the clogged line may be closed to avoid overpressuring the system. The quartz-made main reactor may have e.g. a pyrolytic boron nitride liner to collect polycrystalline gallium nitride efficiently.

Abstract: According to one embodiment, a method for manufacturing a semiconductor device, wherein an amorphous semiconductor film comprising a microcrystal is annealed using a microwave, to crystallize the amorphous semiconductor film comprising the microcrystal using the microcrystal as a nucleus.

Abstract: Certain aspects of the present disclosure are directed to a method that includes: depositing, in a deposition environment, an amorphous semiconductor material on a substrate to form a semiconductor film on the substrate; filling, in the depositing process, the deposition environment with a first precursor material such that the semiconductor film formed on the substrate includes a first layer having a first material characteristic; filling, in the depositing process, the deposition environment with a crystallization-stop precursor material such that the silicon film includes a crystallization-stop layer having a crystallization characteristic different from a crystallization characteristic of the first layer; depositing a metal film on the semiconductor film; and annealing the semiconductor film and the metal film at an predetermined annealing temperature for a predetermined period of time such that the first layer is at least partially crystallized and the crystallization-stop layer is at least partially amo

Abstract: A reactive evaporation method for forming a group III-V amorphous material attached to a substrate includes subjecting the substrate to an ambient pressure of no greater than 0.01 Pa, and introducing active group-V matter to the surface of the substrate at a working pressure of between 0.05 Pa and 2.5 Pa, and group III metal vapor, until an amorphous group III-V material layer is formed on the surface.

Abstract: A semiconductor device may include a composite represented by Formula 1 below as an active layer. x(Ga2O3).y(In2O3).z(ZnO)??Formula 1 wherein, about 0.75?x/z?about 3.15, and about 0.55?y/z? about 1.70. Switching characteristics of displays and driving characteristics of driving transistors may be improved by adjusting the amounts of a gallium (Ga) oxide and an indium (In) oxide mixed with a zinc (Zn) oxide and improving optical sensitivity.

Abstract: According to one embodiment, a nitride semiconductor device includes a semiconductor layer, a source electrode, a drain electrode, a first and a second gate electrode. The semiconductor layer includes a nitride semiconductor. The source electrode provided on a major surface of the layer forms ohmic contact with the layer. The drain electrode provided on the major surface forms ohmic contact with the layer and is separated from the source electrode. The first gate electrode is provided on the major surface between the source and drain electrodes. The second gate electrode is provided on the major surface between the source and first gate electrodes. When a potential difference between the source and first gate electrodes is 0 volts, a portion of the layer under the first gate electrode is conductive. The first gate electrode is configured to switch a constant current according to a voltage applied to the second gate electrode.

Abstract: A semiconductor device is manufactured by forming at least one epitaxial structure over a substrate. A portion of the substrate is cut and lifted to expose a partial surface of the epitaxial structure. A first electrode is then formed on the exposed partial surface to result in a vertical semiconductor device.

Abstract: A light-emitting device includes a semiconductor layer, a light-emitting stack structure formed on a first surface of the semiconductor layer, and a plurality of inverted pyramid structures formed on a second surface of the semiconductor layer opposite to the first surface. Each of the inverted pyramid structures has a sectional area increasing as each of the inverted pyramid structures is more extended in a vertical direction from the second surface.

Abstract: A highly reliable semiconductor device which is formed using an oxide semiconductor and has stable electric characteristics is provided. A semiconductor device which includes an amorphous oxide semiconductor layer including a region containing oxygen in a proportion higher than that in the stoichiometric composition, and an aluminum oxide film provided over the amorphous oxide semiconductor layer is provided. The amorphous oxide semiconductor layer is formed as follows: oxygen implantation treatment is performed on a crystalline or amorphous oxide semiconductor layer which has been subjected to dehydration or dehydrogenation treatment, and then thermal treatment is performed on the oxide semiconductor layer provided with an aluminum oxide film at a temperature lower than or equal to 450° C.

Abstract: A deposition process to form a conformal phase change material film on the surface of a substrate to produce a memory device wafer comprises providing a substrate to a chamber of a deposition system; providing an activation region; introducing one or more precursors into the chamber upstream of the substrate; optionally introducing one or more co-reactants upstream of the substrate; activating the one or more precursors; heating the substrate; and depositing the phase change material film on the substrate from the one or more precursors by chemical vapor deposition. The deposited phase change material film comprises GexSbyTezAm in which A is a dopant selected from the group of N, C, In, Sn, and Se. In one implementation, the process is carried out to form GST films doped with carbon and nitrogen, to impart beneficial film growth and performance properties to the film.

Abstract: Compound semiconductor devices and methods of doping compound semiconductors are provided. Embodiments of the invention provide post-deposition (or post-growth) doping of compound semiconductors, enabling nanoscale compound semiconductor devices including diodes and transistors. In one method, a self-limiting monolayer technique with an annealing step is used to form shallow junctions. By forming a sulfur monolayer on a surface of an InAs substrate and performing a thermal annealing to drive the sulfur into the InAs substrate, n-type doping for InAs-based devices can be achieved. The monolayer can be formed by surface chemistry reactions or a gas phase deposition of the dopant. In another method, a gas-phase technique with surface diffusion is used to form doped regions. By performing gas-phase surface diffusion of Zn into InAs, p-type doping for InAs-based devices can be achieved.

Abstract: Described herein is a liquid crystal (LC) device having Gallium Nitride HEMT electrodes. The Gallium Nitride HEMT electrodes can be grown on a variety of substrates, including but not limited to sapphire, silicon carbide, silicon, fused silica (using a calcium flouride buffer layer), and spinel. Also described is a structure provided from GaN HEMT grown on large area silicon substrates and transferred to another substrate with appropriate properties for OPA devices. Such substrates include, but are not limited to sapphire, silicon carbide, silicon, fused silica (using a calcium fluoride buffer layer), and spinel. The GaN HEMT structure includes an AlN interlayer for improving the mobility of the structure.

Abstract: Embodiment of the present invention provides a method of forming a semiconductor device. The method includes providing a semiconductor substrate; epitaxially growing a silicon-carbon layer on top of the semiconductor substrate; amorphizing the silicon-carbon layer; covering the amorphized silicon-carbon layer with a stress liner; and subjecting the amorphized silicon-carbon layer to a solid phase epitaxy (SPE) process to form a highly substitutional silicon-carbon film. In one embodiment, the highly substitutional silicon-carbon film is formed to be embedded stressors in the source/drain regions of an nFET transistor, and provides tensile stress to a channel region of the nFET transistor for performance enhancement.

Abstract: This invention relates to a process for forming a continuous pattern on a substrate with a liquid media. Upon the deposition of the liquid media on the substrate, a portion the continuous pattern is evaporated upon contact with the substrate.

Abstract: A vapor deposition reactor includes a chamber filled with a first material, and at least one reaction module in the chamber. The reaction module may be configured to make a substrate pass the reaction module through a relative motion between the substrate and the reaction module. The reaction module may include an injection unit for injecting a second material to the substrate. A method for forming thin film includes positioning a substrate in a chamber, filling a first material in the chamber, moving the substrate relative to a reaction module in the chamber, and injecting a second material to the substrate while the substrate passes the reaction module.

Abstract: A silicon oxide film is formed on an epitaxial layer by dry thermal oxidation, an ohmic electrode is formed on a back surface of a SiC substrate, an ohmic junction is formed between the ohmic electrode and the back surface of the SiC substrate by annealing the SiC substrate, the silicon oxide film is removed, and a Schottky electrode is formed on the epitaxial layer. Then, a sintering treatment is performed to form a Schottky junction between the Schottky electrode and the epitaxial layer.

Abstract: A method for forming an epitaxial wafer is provided as one enabling growth of a gallium nitride based semiconductor with good crystal quality on a gallium oxide region. In step S107, an AlN buffer layer 13 is grown. In step S108, at a time t5, a source gas G1 containing hydrogen, trimethylaluminum, and ammonia, in addition to nitrogen, is supplied into a growth reactor 10 to grow the AlN buffer layer 13 on a primary surface 11a. The AlN buffer layer 13 is so called a low-temperature buffer layer. After a start of film formation of the buffer layer 13, in step S109 supply of hydrogen (H2) is started at a time t6. At the time t6, H2, N2, TMA, and NH3 are supplied into the growth reactor 10. A supply amount of hydrogen is increased between times t6 and t7, and at the time t7 the increase of hydrogen is terminated to supply a constant amount of hydrogen. At the time t7, H2, TMA, and NH3 are supplied into the growth reactor 10.

Abstract: A method for depositing gallium using a gallium ink, comprising, as initial components: a gallium component comprising gallium; a stabilizing component; an additive; and, a liquid carrier; is provided comprising applying the gallium ink on the substrate; heating the applied gallium ink to eliminate the additive and the liquid carrier, depositing gallium on the substrate; and, optionally, annealing the deposited gallium.

Abstract: A method can include depositing a thin metal film on a substrate of a sample, establishing a metal island on the substrate by patterning the thin metal film, and annealing the sample to de-wet the metal island and form a metal droplet from the metal island. The method can also include growing a nanowire on the substrate using the metal droplet as a catalyst, depositing a thin film of a semiconductor material on the sample, annealing the sample to allow for lateral crystallization to form a crystal grain, and patterning the crystal grain to establish a crystal island. An electronic device can be fabricated using the crystal island.

Abstract: Methods and apparatus for forming semiconductor structures are disclosed herein. In some embodiments, a semiconductor structure may include a first germanium carbon layer having a first side and an opposing second side; a germanium-containing layer directly contacting the first side of the first germanium carbon layer; and a first silicon layer directly contacting the opposing second side of the first germanium carbon layer. In some embodiments, a method of forming a semiconductor structure may include forming a first germanium carbon layer atop a first silicon layer; and forming a germanium-containing layer atop the first germanium carbon layer.

Abstract: During the growth of a nitride semiconductor crystal on a nonpolar face nitride substrate, such as an m-face, the gas that constitutes the main flow in the process of heating up to a relatively high temperature range, before growth of the nitride semiconductor layer, (the atmosphere to which the main nitride face of the substrate is exposed) and the gas that constitutes the main flow until growth of first and second nitride semiconductor layers is completed (the atmosphere to which the main nitride face of the substrate is exposed) are primarily those that will not have an etching effect on the nitride, while no Si source is supplied at the beginning of growth of the nitride semiconductor layer. Therefore, nitrogen atoms are not desorbed from near the nitride surface of the epitaxial substrate, thus suppressing the introduction of defects into the epitaxial film. This also makes epitaxial growth possible with a surface morphology of excellent flatness.

Abstract: A method of manufacturing a semiconductor wafer, which includes: a semiconductor substrate made of silicon and having both a central area and an outer periphery area; and a compound semiconductor layer made of a nitride-based semiconductor and formed on the semiconductor substrate, the method comprising: forming a growth inhibition layer to inhibit the compound semiconductor layer from growing on a tapered part provided in the outer periphery area of the semiconductor substrate; and growing the compound semiconductor layer on at least the central area of the semiconductor substrate, after the growth inhibition layer has been formed.

Abstract: A method for growing flat, low defect density, and strain-free thick non-polar III-V nitride materials and devices on any suitable foreign substrates using a fabricated nanocolumns compliant layer with an HVPE growth process is provided. The method uses a combination of dry and wet etching to create nanocolumns consisting of layers of non-polar III nitride material and other insulating materials or materials used to grow the non-polar III-V nitride materials.

Abstract: A method for growing reduced defect density planar gallium nitride (GaN) films is disclosed. The method includes the steps of (a) growing at least one silicon nitride (SiNx) nanomask layer over a GaN template, and (b) growing a thickness of a GaN film on top of the SiNx nanomask layer.

Abstract: Oxygen can be doped into a gallium nitride crystal by preparing a non-C-plane gallium nitride seed crystal, supplying material gases including gallium, nitrogen and oxygen to the non-C-plane gallium nitride seed crystal, growing a non-C-plane gallium nitride crystal on the non-C-plane gallium nitride seed crystal and allowing oxygen to infiltrating via a non-C-plane surface to the growing gallium nitride crystal. Oxygen-doped {20-21}, {1-101}, {1-100}, {11-20} or {20-22} surface n-type gallium nitride crystals are obtained.

Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a dielectric material layer on a silicon substrate, the dielectric material layer being patterned to define a plurality of regions separated by the dielectric material layer; a first buffer layer disposed on the silicon substrate; a heterogeneous buffer layer disposed on the first buffer layer; and a gallium nitride layer grown on the heterogeneous buffer layer only within the plurality of regions.

Abstract: A deposition process to form a conformal phase change material film on the surface of a substrate to produce a memory device wafer comprises providing a substrate to a chamber of a deposition system; providing an activation region; introducing one or more precursors into the chamber upstream of the substrate; optionally introducing one or more co-reactants upstream of the substrate; activating the one or more precursors; heating the substrate; and depositing the phase change material film on the substrate from the one or more precursors by chemical vapor deposition. The deposited phase change material film comprises GexSbyTezAm in which A is a dopant selected from the group of N, C, In, Sn, and Se. In one implementation, the process is carried out to form GST films doped with carbon and nitrogen, to impart beneficial film growth and performance properties to the film.

Abstract: It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer including a channel formation region using an oxide semiconductor layer, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment for reducing impurities such as moisture (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer.

Abstract: Electrical devices containing carbon nanotubes can be passivated to protect the carbon nanotubes from degradation while substantially preserving the carbon nanotubes' electrical conductivity and switching characteristics. Such electrical devices can include a first metal contact, a switching layer containing a plurality of carbon nanotubes disposed on the first metal contact, a passivation layer containing amorphous carbon, a metal carbide, or any combination thereof that is disposed on at least a top surface of the switching layer, and a second metal contact disposed upon the passivation layer. Methods for forming the electrical devices can include disposing a passivation layer containing amorphous carbon on at least a top surface of the switching layer, and optionally heating to at least partially convert the amorphous carbon within the passivation layer into a metal carbide.

Abstract: Methods which can be applied during the epitaxial growth of semiconductor structures and layers of III-nitride materials so that the qualities of successive layers are successively improved. An intermediate epitaxial layer is grown on an initial surface so that growth pits form at surface dislocations present in the initial surface. A following layer is then grown on the intermediate layer according to the known phenomena of epitaxial lateral overgrowth so it extends laterally and encloses at least the agglomerations of intersecting growth pits. Preferably, prior to growing the following layer, a discontinuous film of a dielectric material is deposited so that the dielectric material deposits discontinuously so as to reduce the number of dislocations in the laterally growing material. The methods of the invention can be performed multiple times to the same structure. Also, semiconductor structures fabricated by these methods.

Abstract: The present invention provides a method of forming an electrode having reduced corrosion and water decomposition on a surface thereof. A conductive layer is deposited on a substrate. The conductive layer is partially oxidized by an oxygen plasma process to convert a portion thereof to an oxide layer thereby forming the electrode. The oxide layer is free of surface defects and the thickness of the oxide layer is from about 0.09 nm to about 10 nm and ranges therebetween, controllable with 0.2 nm precision.

Abstract: A semiconductor device and a method for forming the same are provided. The semiconductor device comprises: a substrate (1); an insulating layer (2), formed on the substrate (1) and having a trench (21) to expose an upper surface of the substrate (1); a first buffer layer (3), formed on the substrate (1) and in the trench (21); and a compound semiconductor layer (4), formed on the first buffer layer (3), wherein an aspect ratio of the trench (21) is larger than 1 and smaller than 10, wherein the first buffer layer (3) is formed by a low-temperature reduced pressure chemical vapor deposition process at a temperature between 200° C. and 500° C., and wherein the compound semiconductor layer (4) is formed by a low-temperature metal organic chemical vapor deposition process at a temperature between 200° C. and 600° C.