Abstract: This invention relates to processes for preparing films of copper indium gallium sulfide/selenides (CIGS/Se) on substrates via inks comprising CIGS/Se microparticles and a plurality of particles. This invention relates to inks, coated layers, and film compositions. Such films are useful in the preparation of photovoltaic devices. This invention also relates to processes for preparing coated substrates and for making photovoltaic devices.

Abstract: A method for producing a high-quality group-III element nitride crystal at a high crystal growth rate, and a group-III element nitride crystal are provided. The method includes the steps of placing a group-III element, an alkali metal, and a seed crystal of group-III element nitride in a crystal growth vessel, pressurizing and heating the crystal growth vessel in an atmosphere of nitrogen-containing gas, and causing the group-III element and nitrogen to react with each other in a melt of the group-III element, the alkali metal and the nitrogen so that a group-III element nitride crystal is grown using the seed crystal as a nucleus. A hydrocarbon having a boiling point higher than the melting point of the alkali metal is added before the pressurization and heating of the crystal growth vessel.

Abstract: Precursors for use in depositing tellurium-containing films on substrates such as wafers or other microelectronic device substrates, as well as associated processes of making and using such precursors, and source packages of such precursors. The precursors are useful for deposition of Ge2Sb2Te5 chalcogenide thin films in the manufacture of nonvolatile Phase Change Memory (PCM), by deposition techniques such as chemical vapor deposition (CVD) and atomic layer deposition (ALD).

Abstract: An apparatus includes a substrate and a plurality of DNA oligomers in contact with a top surface of the substrate. The substrate is a polar ferroelectric or a polar compound semiconductor.

Abstract: In a transistor including an oxide semiconductor film, a metal oxide film for preventing electrification which is in contact with the oxide semiconductor film and covers a source electrode and a drain electrode is formed. Then, oxygen is introduced (added) to the oxide semiconductor film through the metal oxide film and heat treatment is performed. Through these steps of oxygen introduction and heat treatment, impurities such as hydrogen, moisture, a hydroxyl group, or hydride are intentionally removed from the oxide semiconductor film, so that the oxide semiconductor film is highly purified. Further, by providing the metal oxide film, generation of a parasitic channel on a back channel side of the oxide semiconductor film can be prevented in the transistor.

Abstract: A III-nitride switch includes a recessed gate contact to produce a nominally off, or an enhancement mode, device. By providing a recessed gate contact, a conduction channel formed at the interface of two III-nitride materials is interrupted when the gate electrode is inactive to prevent current flow in the device. The gate electrode can be a schottky contact or an insulated metal contact. Two gate electrodes can be provided to form a bi-directional switch with nominally off characteristics. The recesses formed with the gate electrode can have sloped sides. The gate electrodes can be formed in a number of geometries in conjunction with current carrying electrodes of the device.

Abstract: A pixel structure and a fabrication method thereof are provided. A scan line, a gate, an oxide conductor layer, a metal conductor layer, an oxide semiconductor layer, and an insulation layer between the gate and the metal conductor layer are formed on a substrate. The oxide conductor layer includes a pixel electrode and a first auxiliary pattern partially overlapped with where the gate is. The first auxiliary pattern includes a first metal contact portion and a first semiconductor contact portion. The metal conductor layer includes a data line, a source connected to the data line, and a drain separated from the source. The drain contacts the first metal contact portion, exposes the first semiconductor contact portion between the source and the drain, and is electrically connected to the pixel electrode. The oxide semiconductor layer is connected between the source and the drain and contacts the first semiconductor contact portion.

Abstract: Methods and apparatus for depositing thin films incorporating the use of a surfactant are described. Methods and apparatuses include a deposition process and system comprising multiple isolated processing regions which enables rapid repetition of sub-monolayer deposition of thin films. The use of surfactants allows the deposition of high quality epitaxial films at lower temperatures having low values of surface roughness. The deposition of Group III-V thin films such as GaN is used as an example.

Abstract: A GaN sample in a sealed enclosure is heated very fast to a high temperature above the point where GaN is thermodynamically stable and is then cooled down very fast to a temperature where it is thermodynamically stable. The time of the GaN exposure to a high temperature range above its thermodynamic stability is sufficiently short, in a range of few seconds, to prevent the GaN from decomposing. This heating and cooling cycle is repeated multiple times without removing the sample from the enclosure. As a result, by accumulating the exposure time in each cycle, the GaN sample can be exposed to a high temperature above its point of thermodynamic stability for a long time but the GaN sample integrity is maintained (i.e., the GaN doesn't decompose) due to the extremely short heating duration of each single cycle.

Abstract: A method of fabricating semiconductor devices is disclosed. The method comprises providing a substrate with a plurality of epitaxial layers mounted on the substrate and separating the substrate from the plurality of epitaxial layers while the plurality of epitaxial layers is intact. This preserves the electrical, optical, and mechanical properties of the plurality of epitaxial layers.

Abstract: A method includes arranging a bonding layer of a predetermined thickness on at least one of a first functional region bonded on a release layer, which is capable of falling into a releasable condition when subjected to a process, on a first substrate, and a region, to which the first functional region is to be transferred, on a second substrate; bonding the first functional region to the second substrate through the bonding layer; and separating the first substrate from the first functional region at the release layer.

Abstract: Freestanding III-nitride single-crystal substrates whose average dislocation density is not greater than 5×105 cm?2 and that are fracture resistant, and a method of manufacturing semiconductor devices utilizing such freestanding III-nitride single-crystal substrates are made available. The freestanding III-nitride single-crystal substrate includes one or more high-dislocation-density regions (20h), and a plurality of low-dislocation-density regions (20k) in which the dislocation density is lower than that of the high-dislocation-density regions (20h), wherein the average dislocation density is not greater than 5×105 cm?2. Herein, the ratio of the dislocation density of the high-dislocation-density region(s) (20h) to the average dislocation density is sufficiently large to check the propagation of cracks in the substrate. And the semiconductor device manufacturing method utilizes the freestanding III-nitride single crystal substrate (20p).

Abstract: An amorphous oxide semiconductor contains at least one element selected from In, Ga, and Zn at an atomic ratio of InxGayZnz, wherein the density M of the amorphous oxide semiconductor is represented by the relational expression (1) below: M?0.94×(7.121x+5.941y+5.675z)/(x+y+z)??(1) where 0?x?1, 0?y?1, 0?z?1, and x+y+z?0.

Abstract: A thin film transistor includes a gate electrode formed on a substrate, a semiconductor pattern overlapped with the gate electrode, a source electrode overlapped with a first end of the semiconductor pattern and a drain electrode overlapped with a second end of the semiconductor pattern and spaced apart from the source electrode. The semiconductor pattern includes an amorphous multi-elements compound including a II B element and a VI A element or including a III A element and a V A element and having an electron mobility no less than 1.0 cm2/Vs and an amorphous phase, wherein the VI A element excludes oxygen. Thus, a driving characteristic of the thin film transistor may be improved.

Abstract: It is an object to provide a semiconductor device with a novel structure. The semiconductor device includes memory cells connected to each other in series and a capacitor. One of the memory cells includes a first transistor connected to a bit line and a source line, a second transistor connected to a signal line and a word line, and a capacitor connected to the word line. The second transistor includes an oxide semiconductor layer. A gate electrode of the first transistor, one of a source electrode and a drain electrode of the second transistor, and one electrode of the capacitor are connected to one another.

Abstract: Exemplary embodiments of the present invention relate to a method of fabricating a light emitting diode (LED). According to an exemplary embodiment of the present invention, the method includes growing a first GaN-based semiconductor layer on a substrate at a first temperature by supplying a chamber with a nitride source gas and a first metal source gas, stopping the supply of the first metal source gas and maintaining the first temperature for a first time period after stopping the supply of the first metal source gas, decreasing the temperature of the substrate to the a second temperature after the first time period elapses, growing an active layer of the first GaN-based semiconductor layer at the second temperature by supplying the chamber with a second metal source gas.

Abstract: A method can include depositing a thin metal film on a substrate of a sample, establishing a metal island on the substrate by patterning the thin metal film, and annealing the sample to de-wet the metal island and form a metal droplet from the metal island. The method can also include growing a nanowire on the substrate using the metal droplet as a catalyst, depositing a thin film of a semiconductor material on the sample, annealing the sample to allow for lateral crystallization to form a crystal grain, and patterning the crystal grain to establish a crystal island. An electronic device can be fabricated using the crystal island.

Abstract: A field effect transistor including a semiconductor layer including a composite oxide which contains In, Zn, and one or more elements X selected from the group consisting of Zr, Hf, Ge, Si, Ti, Mn, W, Mo, V, Cu, Ni, Co, Fe, Cr, Nb, Al, B, Sc, Y and lanthanoids in the following atomic ratios (1) to (3): In/(In+Zn)=0.2 to 0.8??(1) In/(In+X)=0.29 to 0.99??(2) Zn/(X+Zn)=0.29 to 0.99??(3).

Abstract: Growth methods for planar, non-polar, Group-III nitride films are described. The resulting films are suitable for subsequent device regrowth by a variety of growth techniques.

Abstract: A silicon carbide substrate includes a base layer made of silicon carbide, silicon carbide layers made of single-crystal silicon carbide and arranged side by side on the base layer when viewed in plan view, and a filling portion made of silicon carbide and filling a gap formed between the adjacent silicon carbide layers. The filling portion has a surface roughness of not more than 50 ?m in RMS value.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: Embodiments of the present invention relate to methods for forming a doped amorphous silicon oxide layer utilized in thin film solar cells. In one embodiment, a method for forming a doped p-type amorphous silicon containing layer on a substrate includes providing a substrate in a processing chamber, supplying a gas mixture having a hydrogen-based gas, a silicon-based gas and a carbon and oxygen containing gas into the processing chamber, the gas mixture having a volumetric flow ratio of the hydrogen-based gas to the silicon-based gas between about 5 and about 15, wherein a volumetric flow ratio of the carbon and oxygen containing gas to the total combined flow of hydrogen-based gas and the silicon-based gas is between about 10 percent and about 50 percent; and maintaining a process pressure of the gas mixture within the processing chamber at between about 1 Torr and about 10 Torr while forming a doped p-type amorphous silicon containing layer.

Abstract: A semiconductor device may include a composite represented by Formula 1 below as an active layer. x(Ga2O3).y(In2O3).z(ZnO)??Formula 1 wherein, about 0.75?x/z?about 3.15, and about 0.55?y/z?about 1.70. Switching characteristics of displays and driving characteristics of driving transistors may be improved by adjusting the amounts of a gallium (Ga) oxide and an indium (In) oxide mixed with a zinc (Zn) oxide and improving optical sensitivity.

Abstract: A device for generating sprays of charged droplets, and resulting nanoparticles, the device comprising a first needle connected to an electrical potential line to generate a first spray of charged particles from the first needle, and a second needle spaced apart from and facing the first needle, and connected to an electrical line configured to ground the second needle or to apply a voltage to the second needle that is the same polarity as the voltage applied to the first needle. The device also comprising an electric field modifier connected to the first needle, and configured to modify an electrical field to generate a second spray of charged particles from the second needle.

Abstract: The present disclosure provides a method of fabricating a semiconductor device that includes providing a semiconductor substrate, forming a trench in the substrate, where a bottom surface of the trench has a first crystal plane orientation and a side surface of the trench has a second crystal plane orientation, and epitaxially (epi) growing a semiconductor material in the trench. The epi process utilizes an etch component. A first growth rate on the first crystal plane orientation is different from a second growth rate on the second crystal plane orientation.

Abstract: Provided is a method for transferring, onto a second substrate, at least one of functional regions arranged and joined to a first separation layer that is disposed on a first substrate and that becomes separable by a treatment, in which regions on the second substrate where the functional regions are to be transferred have a second separation layer that becomes separable by a treatment. The method includes a step of joining the first substrate to the second substrate by bonding such that the functional regions contact the second separation layer; a step of separating the functional regions from the first substrate at the first separation layer; and a step of, before or after the step of separation, forming separation grooves penetrating through the second substrate and the second separation layer from a surface of the second substrate, the surface being opposite to a surface having the second separation layer thereon.

Abstract: A fabrication method of a group III nitride crystal substance includes the steps of cleaning the interior of a reaction chamber by introducing HCl gas into the reaction chamber, and vapor deposition of a group III nitride crystal substance in the cleaned reaction chamber. A fabrication apparatus of a group III nitride crystal substance includes a configuration to introduce HCl gas into the reaction chamber, and a configuration to grow a group III nitride crystal substance by HVPE. Thus, a fabrication method of a group III nitride crystal substance including the method of effectively cleaning deposits adhering inside the reaction chamber during crystal growth, and a fabrication apparatus employed in the fabrication method are provided.

Abstract: Graded core/shell semiconductor nanorods and shapped nanorods are disclosed comprising Group II-VI, Group III-V and Group IV semiconductors and methods of making the same. Also disclosed are nanorod barcodes using core/shell nanorods where the core is a semiconductor or metal material, and with or without a shell. Methods of labeling analytes using the nanorod barcodes are also disclosed.

Abstract: A method of forming a circuit structure includes providing a substrate; forming recesses in the substrate; forming a mask layer over the substrate, wherein the mask layer covers non-recessed portions of the substrate, with the recesses exposed through openings in the mask layer; forming a buffer/nucleation layer on exposed portions of the substrate in the recesses; and growing a group-III group-V (III-V) compound semiconductor material from the recesses until portions of the III-V compound semiconductor material grown from the recesses join each other to form a continuous III-V compound semiconductor layer.

Abstract: Embodiments of the invention relate to methods of fabricating semiconductor structures, and to semiconductor structures fabricated by such methods. In some embodiments, the methods may be used to fabricate semiconductor structures of III-V materials, such as InGaN. A semiconductor layer is fabricated by growing sublayers using differing sets of growth conditions to improve the homogeneity of the resulting layer, to improve a surface roughness of the resulting layer, and/or to enable the layer to be grown to an increased thickness without the onset of strain relaxation.

Abstract: A gallium ink is provided, comprising, as initial components: a gallium component comprising gallium; a stabilizing component; an additive; and, a liquid carrier; wherein the gallium ink is a stable dispersion. Also provided are methods of preparing the gallium ink and for using the gallium ink in the preparation of semiconductor films (e.g., in the deposition of a CIGS layer for use in photovoltaic devices).

Abstract: The invention concerns a method for preparing a NIII-V semiconductor. According to the invention, the method includes at least one step of doping a semiconductor of general formula AlxGa1-xN, wherein the atomic number x represents the number between 0 and 1 with a p-type electron-accepting dopant, as well as a co-doping step with a codopant capable of modifying the structure of the valency band. The invention also concerns a semiconductor as well as its use in electronics or optoelectronics. The invention further concerns a device as well as a diode using such a semiconductor.

Abstract: A passivated germanium surface that is a germanium carbide material formed on and in contact with the termanium material. An intermediate semiconductor device structure and a semiconductor device structure, each of which comprises the passivated germanium having germanium carbide material thereon, are also disclosed.

Abstract: The present invention relates to a method that involves providing a stack of a first substrate and a InGaN seed layer formed on the first substrate, growing an InGaN layer on the InGaN seed layer to obtain an InGaN-on-substrate structure, forming a first mirror layer overlaying the exposed surface of the grown InGaN layer, attaching a second substrate to the exposed surface of the mirror layer, detaching the first substrate from the InGaN seed layer and grown InGaN layer to expose a surface of the InGaN seed layer opposite the first mirror layer, and forming a second mirror layer overlaying the opposing surface of the InGaN seed layer.

Abstract: The present invention provides a light-emitting element, a method of manufacturing the light-emitting element, a light-emitting device, and a method of manufacturing the light-emitting device. A method of manufacturing a light-emitting element includes: forming a first conductive layer of a first conductive type, a light-emitting layer, and a second conductive layer of a second conductive type on at least one first substrate, forming an ohmic layer on the second conductive layer and bonding the at least one first substrate to a second substrate. The second substrate being larger than the first substrate. The method further includes etching portions of the ohmic layer, the second conductive layer, and the light-emitting layer to expose a portion of the first conductive layer.

Abstract: Provided are an oxide semiconductor composition, a preparation method thereof, an oxide semiconductor thin film using the composition, and a method of forming an electronic device. The oxide semiconductor composition includes a photosensitive material and an oxide semiconductor precursor.

Abstract: The impurity concentration in the oxide semiconductor film is reduced, and a highly reliability can be obtained.

Abstract: A method and apparatus for the deposition of thin films is described. In embodiments, systems and methods for epitaxial thin film formation are provided, including systems and methods for forming binary compound epitaxial thin films. Methods and systems of embodiments of the invention may be used to form direct bandgap semiconducting binary compound epitaxial thin films, such as, for example, GaN, InN and AlN, and the mixed alloys of these compounds, e.g., (In, Ga)N, (Al, Ga)N, (In, Ga, Al)N. Methods and apparatuses include a multistage deposition process and system which enables rapid repetition of sub-monolayer deposition of thin films.

Abstract: Methods of transferring a metal and/or organic layer from a patterned stamp, preferably a soft, elastomeric stamp, to a substrate are provided. The patterned metal or organic layer may be used for example, in a wide range of electronic devices. The present methods are particularly suitable for nanoscale patterning of organic electronic components.

Abstract: A highly reliable semiconductor device which is formed using an oxide semiconductor and has stable electric characteristics is provided. A semiconductor device which includes an amorphous oxide semiconductor layer including a region containing oxygen in a proportion higher than that in the stoichiometric composition, and an aluminum oxide film provided over the amorphous oxide semiconductor layer is provided. The amorphous oxide semiconductor layer is formed as follows: oxygen implantation treatment is performed on a crystalline or amorphous oxide semiconductor layer which has been subjected to dehydration or dehydrogenation treatment, and then thermal treatment is performed on the oxide semiconductor layer provided with an aluminum oxide film at a temperature lower than or equal to 450° C.

Abstract: A group III nitride semiconductor device having a gallium nitride based semiconductor film with an excellent surface morphology is provided. A group III nitride optical semiconductor device 11a includes a group III nitride semiconductor supporting base 13, a GaN based semiconductor region 15, an active layer active layer 17, and a GaN semiconductor region 19. The primary surface 13a of the group III nitride semiconductor supporting base 13 is not any polar plane, and forms a finite angle with a reference plane Sc that is orthogonal to a reference axis Cx extending in the direction of a c-axis of the group III nitride semiconductor. The GaN based semiconductor region 15 is grown on the semipolar primary surface 13a. A GaN based semiconductor layer 21 of the GaN based semiconductor region 15 is, for example, an n-type GaN based semiconductor, and the n-type GaN based semiconductor is doped with silicon.

Abstract: A method of forming an oxide layer. The method includes: forming a layer of reaction-inhibiting functional groups on a surface of a substrate; forming a layer of precursors of a metal or a semiconductor on the layer of the reaction-inhibiting functional groups; and oxidizing the precursors of the metal or the semiconductor in order to obtain a layer of a metal oxide or a semiconductor oxide. According to the method, an oxide layer having a high thickness uniformity may be formed and a semiconductor device having excellent electrical characteristics may be manufactured.

Abstract: An off-axis cut of a nonpolar III-nitride wafer towards a polar (?c) orientation results in higher polarization ratios for light emission than wafers without such off-axis cuts. A 5° angle for an off-axis cut has been confirmed to provide the highest polarization ratio (0.9) than any other examined angles for off-axis cuts between 0° and 27°.

Abstract: Disclosed are atomic layer deposition method and a semiconductor device including the atomic layer, including the steps: placing a semiconductor substrate in an atomic layer deposition chamber; feeding a first precursor gas to the semiconductor substrate within the chamber to form a first discrete monolayer on the semiconductor substrate; feeding an inert purge gas to the semiconductor substrate within the chamber to remove the first precursor gas which has not formed the first discrete monolayer on the semiconductor substrate; feeding a second precursor gas to the chamber to react with the first precursor gas which has formed the first discrete monolayer, forming a discrete atomic size islands; and feeding an inert purge gas to the semiconductor substrate within the chamber to remove the second precursor gas which has not reacted with the first precursor gas and byproducts produced by the reaction between the first and the second precursor gases.

Abstract: Described herein is a liquid crystal (LC) device having Gallium Nitride HEMT electrodes. The Gallium Nitride HEMT electrodes can be grown on a variety of substrates, including but not limited to sapphire, silicon carbide, silicon, fused silica (using a calcium fluoride buffer layer), and spinel. Also described is a structure provided from GaN HEMT grown on large area silicon substrates and transferred to another substrate with appropriate properties for OPA devices. Such substrates include, but are not limited to sapphire, silicon carbide, silicon, fused silica (using a calcium fluoride buffer layer), and spinel. The GaN HEMT structure includes an AlN interlayer for improving the mobility of the structure.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: A semiconductor laser device capable of reducing the threshold current and improving luminous efficiency and a method of fabricating the same are obtained. This semiconductor laser device comprises a semiconductor substrate having a principal surface and a semiconductor element layer, formed on the principal surface of the semiconductor substrate, having a principal surface substantially inclined with respect to the principal surface of the semiconductor substrate and including an emission layer.

Abstract: A method and apparatus for the deposition of thin films is described. In embodiments, systems and methods for epitaxial thin film formation are provided, including systems and methods for forming binary compound epitaxial thin films. Methods and systems of embodiments of the invention may be used to form direct bandgap semiconducting binary compound epitaxial thin films, such as, for example, GaN, InN and AlN, and the mixed alloys of these compounds, e.g., (In, Ga)N, (Al, Ga)N, (In, Ga, Al)N. Methods and apparatuses include a multistage deposition process and system which enables rapid repetition of sub-monolayer deposition of thin films.

Abstract: A semiconductor structure may include a polycrystalline substrate comprising a metal, the polycrystalline substrate having substantially randomly oriented grains, as well as a buffer layer disposed thereover. The buffer layer may comprise a plurality of islands having an average island spacing therebetween. A polycrystalline semiconductor layer is disposed over the buffer layer.