Abstract: A method of forming a polycrystalline thin film for a thin film transistor, a mask used in the method, and a method of making a flat panel display device using the method of forming a polycrystalline thin film for a thin film transistor are disclosed. Certain embodiments are capable of providing a display device in which the polycrystalline thin film is uniformly crystallized such luminance non-uniformity is reduced. In the method of forming a polycrystalline thin film for a thin film transistor, amorphous material is crystallized using a laser and a mask having a mixed structure of one or more transmission region sets each comprising one or more transmission regions through which the laser beam is capable of passing and one or more non-transmission regions through which the laser beam is not capable of passing. The laser beam is directed onto overlapping regions of the material.

Abstract: In a first aspect, a first method of forming an epitaxial film on a substrate is provided. The first method includes (a) providing a substrate; (b) exposing the substrate to at least a silicon source so as to form an epitaxial film on at least a portion of the substrate; and (c) exposing the substrate to HCl and Cl2 so as to etch the epitaxial film and any other films formed during step (b). Numerous other aspects are provided.

Abstract: The present invention grows nanostructures using a microwave heating-based sublimation-sandwich SiC polytype growth method comprising: creating a sandwich cell by placing a source wafer parallel to a substrate wafer, leaving a small gap between the source wafer and the substrate wafer; placing a microwave heating head around the sandwich cell to selectively heat the source wafer to a source wafer temperature and the substrate wafer to a substrate wafer temperature; creating a temperature gradient between the source wafer temperature and the substrate wafer temperature; sublimating Si- and C-containing species from the source wafer, producing Si- and C-containing vapor species; converting the Si- and C-containing vapor species into liquid metallic alloy nanodroplets by allowing the metalized substrate wafer to absorb the Si- and C-containing vapor species; and growing nanostructures on the substrate wafer once the alloy droplets reach a saturation point for SiC.

Abstract: A method of manufacturing a nanowire, a method of manufacturing a semiconductor apparatus including a nanowire and a semiconductor apparatus formed from the same are provided. The method of manufacturing a semiconductor apparatus may include forming a material layer pattern on a substrate, forming a first insulating layer on the material layer pattern, a first nanowire forming layer and a top insulating layer on the substrate, wherein a total depth of the first insulating layer and the first nanowire forming layer may be formed to be smaller than a depth of the material layer pattern, sequentially polishing the top insulating layer, the first nanowire forming layer and the first insulating layer so that the material layer pattern is exposed, exposing part of the first nanowire forming layer to form an exposed region and forming a single crystalline nanowire on an exposed region of the first nanowire forming layer.

Abstract: A silicon wafer is produced through the steps of forming a silicon ingot by a CZ method with an interstitial oxygen concentration of not more than 7.0×1017 atoms/cm3 and with a diameter of a COP occurring region not more than a diameter of a crystal, slicing a wafer from the silicon ingot after doping the silicon ingot with phosphorus, forming a polysilicon layer or a strained layer on one main surface of the wafer, and mirror polishing the other main surface of the wafer.

Abstract: This invention discloses semiconductor device that includes a top region and a bottom region with an intermediate region disposed between said top region and said bottom region with a controllable current path traversing through the intermediate region. The semiconductor device further includes a trench with padded with insulation layer on sidewalls extended from the top region through the intermediate region toward the bottom region wherein the trench includes randomly and substantially uniformly distributed nano-nodules as charge-islands in contact with a drain region below the trench for electrically coupling with the intermediate region for continuously and uniformly distributing a voltage drop through the current path.

Abstract: There is provided a method for fabricating an image display device having an active matrix substrate including high-performance transistor circuits operating with high mobility as drive circuits for driving pixel portions which are arranged as a matrix. The portion of a polysilicon film formed in a drive circuit region DAR1 provided on the periphery of the pixel region PAR of the active matrix substrate SUB1 composing the image display device is irradiated and scanned with a pulse modulated laser beam or a pseudo CW laser beam to be reformed into a quasi-strip-like-crystal silicon film having a crystal boundary continuous in the scanning direction so that discrete reformed regions each composed of the quasi-strip-like-crystal silicon film are formed.

Abstract: Methods of forming memory cells are disclosed which include forming a pillar above a substrate, the pillar including a steering element and a memory element, and performing one or more etches vertically through the pillar to form multiple memory cells. Memory cells formed from such methods, as well as numerous other aspects are also disclosed.

Abstract: The present invention relates to a method for preparing a polysilicon rod using a metallic core means, comprising: installing a core means in an inner space of a deposition reactor used for preparing a silicon rod, wherein the core means is constituted by forming one or a plurality of separation layer(s) on the surface of a metallic core element and is connected to an electrode means; heating the core means by supplying electricity through the electrode means; and supplying a reaction gas into the inner space for silicon deposition, thereby forming a deposition output in an outward direction on the surface of the core means. According to the present invention, the deposition output and the core means can be separated easily from the silicon rod output obtained by the process of silicon deposition, and the contamination of the deposition output caused by impurities of the metallic core element can be minimized, thereby a high-purity silicon can be prepared in a more economic and convenient way.

Abstract: A method of forming a crystalline silicon layer on a microrough face of a substrate by reducing the microroughness of the face and then performing a metal induced crystallization process on the face is disclosed.

Abstract: Memory cells, and methods of forming such memory cells, are provided that include a carbon-based reversible resistivity switching material. In particular embodiments, methods in accordance with this invention form a memory cell by forming a layer of carbon material above a substrate, forming a barrier layer above the carbon layer, forming a hardmask layer above the barrier layer, forming a photoresist layer above the hardmask layer, patterning and developing the photoresist layer to form a photoresist region, patterning and etching the hardmask layer to form a hardmask region, and using an ashing process to remove the photoresist region while the barrier layer remains above the carbon layer. Other aspects are also provided.

Abstract: The present invention relates to a method of depositing a polycrystalline silicon thin film within a single chamber through a chemical vapor deposition (CVD) process employing a single wafer technique. Particularly, a fine crystalline structure of the polycrystalline silicon thin film is formed in a columnar shape by using SiH4 (Silane) as a silicon source gas and maintaining the thin film deposition pressure at a certain level so as to control fine grains to improve uniformity of electrical characteristics, thereby preventing a characteristic degradation of the thin film.

Abstract: This invention provides a method for forming polysilicon by using silane with introducing hydrogen, such that polysilicon is microcrystalline. This microcrystal polysilicon can be applied to floating gate of flash memory to improve the character of flash memory.

Abstract: A device includes a crystalline material within an area confined by an insulator. In one embodiment, the area confined by the insulator is an opening in the insulator having an aspect ratio sufficient to trap defects using an ART technique. Method and apparatus embodiments of the invention can reduce edge effects in semiconductor devices. Embodiments of the invention can provide a planar surface over a buffer layer between a plurality of uncoalesced ART structures.

Abstract: Methods for depositing a microcrystalline silicon film layer with improved deposition rate and film quality are provided in the present invention. Also, photovoltaic (PV) cell having a microcrystalline silicon film is provided. In one embodiment, the method produces a microcrystalline silicon film on a substrate at a deposition rate greater than about 20 nm per minute, wherein the microcrystalline silicon film has a crystallized volume between about 20 percent to about 80 percent.

Abstract: A vertical CVD apparatus is arranged to process a plurality of target substrates all together to form a silicon germanium film. The apparatus includes a reaction container having a process field configured to accommodate the target substrates, and a common supply system configured to supply a mixture gas into the process field. The mixture gas includes a first process gas of a silane family and a second process gas of a germane family. The common supply system includes a plurality of supply ports disposed at different heights.

Abstract: Methods for depositing a microcrystalline silicon film layer with improved deposition rate and film quality are provided in the present invention. Also, a photovoltaic (PV) cell having a microcrystalline silicon film is provided. In one embodiment, the method produces a microcrystalline silicon film on a substrate at a deposition rate greater than about 20 nm per minute, wherein the microcrystalline silicon film has a crystallized volume between about 20 percent to about 80 percent.

Abstract: The invention relates to a method for producing a MEMS/NEMS structure from a substrate made in a monocrystalline semiconductor material, the structure comprising a flexible mechanical element connected to the substrate by at least one anchoring zone, the method comprising the following steps: the formation of a protection layer on one face of the substrate, the protection layer being made in a monocrystalline material different from the material of the substrate, etching of the protection layer and the substrate in order to produce at least one cavity, the etching being done so as to leave an overhang made in the material of the protection layer on the edges of the cavity, filling in of the cavity with an electrically insulating material in order to obtain an insulating anchoring portion, epitaxy of a semiconductor material from the protection layer and the electrically insulating material in order to obtain a layer designed to produce the flexible mechanical element, liberation of the flexible mechanical

Abstract: A method for manufacturing wafers using a low EPD crystal growth process and a wafer annealing process is provided that results in GaAs/InGaP wafers that provide higher device yields from the wafer.

Abstract: Methods for depositing a microcrystalline silicon film layer with improved deposition rate and film quality are provided in the present invention. Also, a photovoltaic (PV) cell having a microcrystalline silicon film is provided. In one embodiment, the method produces a microcrystalline silicon film on a substrate at a deposition rate greater than about 20 nm per minute, wherein the microcrystalline silicon film has a crystallized volume between about 20 percent to about 80 percent.

Abstract: A method of manufacturing a semiconductor substrate includes a growing step of growing a second single crystalline semiconductor on a first single crystalline semiconductor, a blocking layer forming step of forming a blocking layer on the second single crystalline semiconductor, and a relaxing step of generating crystal defects at a portion deeper than the blocking layer to relax a stress acting on the second single crystalline semiconductor. The blocking layer includes, e.g., a porous layer, and prevents the crystal defects at the portion deeper than the blocking layer from propagating to the surface of the second single crystalline semiconductor.

Abstract: Object of this invention is to provide a plasma CVD method capable of forming a microcrystalline silicon film at low hydrogen gas flow rate, thereby providing a low-cost microcrystalline silicon solar cell. In the plasma CVD method forming the microcrystalline silicon film, plural antennas are arranged to form an antenna array structure in a vacuum chamber. One end of each antenna is connected to a high frequency power source and anther end is grounded. Substrates are placed facing the antenna arrays, and the substrate temperature is kept between 150 and 250° C. Plasma is generated by introducing gas mixture of hydrogen and silane to the chamber, and by introducing high frequency power to the antennas.

Abstract: A method for manufacturing a semiconductor device, semiconductor production equipment, and a storage medium, which suppress abnormal arc discharge occurring when plasma is excited while preventing misalignment of a substrate placed on an electrostatic chuck, are provided. The method includes a first process in which a substrate is placed on an electrostatic chuck in a reaction container and a first electrostatic chuck voltage is applied to the electrostatic chuck to absorb the substrate onto the electrostatic chuck, a second process in which the first electrostatic chuck voltage is reduced to a second electrostatic chuck voltage, a third process in which a high-frequency voltage is applied between parallel plate electrodes in the reaction container to generate plasma, and a fourth process in which the second electrostatic chuck voltage is changed to a third electrostatic chuck voltage higher than the second electrostatic chuck voltage.

Abstract: A method of forming a thin film transistor relative to a substrate includes, a) providing a thin film transistor layer of polycrystalline material on a substrate, the polycrystalline material comprising grain boundaries; b) providing a fluorine containing layer adjacent the polycrystalline thin film layer; c) annealing the fluorine containing layer at a temperature and for a time period which in combination are effective to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries; and d) providing a transistor gate operatively adjacent the thin film transistor layer. The thin film transistor can be fabricated to be bottom gated or top gated. A buffering layer can be provided intermediate the thin film transistor layer and the fluorine containing layer, with the buffering layer being transmissive of fluorine from the fluorine containing layer during the annealing.

Abstract: In a method of making a c-Si-based cell or a ?c-Si-based cell, the improvement of increasing the minority charge carrier's lifetime, comprising: a) placing a c-Si or polysilicon wafer into CVD reaction chamber under a low vacuum condition and subjecting the substrate of the wafer to heating; and b) passing mixing gases comprising NH3/H2 through the reaction chamber at a low vacuum pressure for a sufficient time and at a sufficient flow rate to enable growth of an a-Si:H layer sufficient to increase the lifetime of the c-Si or polysilicon cell beyond that of the growth of an a-Si:H layer without treatment of the wafer with NH3/H2.

Abstract: A method of MBE growth of a semiconductor layer structure comprises growing a first (Al,Ga)N layer (step 13) over a substrate at the first substrate temperature (T1) using ammonia as the nitrogen precursor. The substrate is then cooled (step 14) to a second-substrate temperature (T2) which is lower than the first substrate temperature. An (In,Ga)N quantum well structure is then grown (step 15) over the first (Al,Ga)N layer by MBE using ammonia as the nitrogen precursor. The supply of ammonia to the substrate is maintained continuously during the first growth step, the cooling step, and the second growth step. After completion of the growth of the (In,Ga)N quantum well structure, the substrate may be heated to a third temperature (T3) which is greater than the second substrate temperature (T2). A second (Al,Ga)N layer is then grown over the (In,Ga)N quantum well structure (step 17).

Abstract: The present invention describes an approach to grow highly crystalline semiconductor films, multilayers of semiconductor thin films on foreign substrate such as glass, quartz. Specifically, The film were grown by first forming crystalline seeds, and transferring the seeds onto the substrate, and growing continuous semiconductor film through epitaxial growth on the seeds.

Abstract: An image display system has a multi-gate thin film transistor (TFT) disposed on a transparent substrate. The multi-gate TFT includes a silicon film layer, a first electrode and a reflecting layer. The silicon film layer is formed on the transparent substrate and has a first crystallization zone and a second crystallization zone, which are not adjacent to each other. A grain size of the first crystallization zone is smaller than a grain size of the second crystallization zone. The first electrode corresponding to the first crystallization zone is disposed on the silicon film layer. The reflecting layer corresponding to the second crystallization zone is disposed on the transparent substrate. The silicon film layer is disposed on the transparent substrate and the reflecting layer.

Abstract: In some aspects, a method of fabricating a memory cell is provided that includes fabricating a steering element above a substrate, and fabricating a reversible-resistance switching element coupled to the steering element by fabricating a carbon nano-tube (“CNT”) seeding layer by depositing a silicon-germanium layer above the substrate, patterning and etching the CNT seeding layer, and selectively fabricating CNT material on the CNT seeding layer. Numerous other aspects are provided.

Abstract: In some aspects, a method of fabricating a memory cell is provided that includes: (1) fabricating a first conductor above a substrate; (2) selectively fabricating a carbon nano-tube (“CNT”) material above the first conductor by: (a) fabricating a CNT seeding layer on the first conductor, wherein the CNT seeding layer comprises silicon-germanium (“Si/Ge”), (b) planarizing a surface of the deposited CNT seeding layer, and (c) selectively fabricating CNT material on the CNT seeding layer; (3) fabricating a diode above the CNT material; and (4) fabricating a second conductor above the diode. Numerous other aspects are provided.

Abstract: Segmented semiconductor nanowires are manufactured by removal of material from a layered structure of two or more semiconductor materials in the absence of a template. The removal takes place at some locations on the surface of the layered structure and continues preferentially along the direction of a crystallographic axis, such that nanowires with a segmented structure remain at locations where little or no removal occurs. The interface between different segments can be perpendicular to or at angle with the longitudinal direction of the nanowire.

Abstract: The manufacturing method includes attaching a single crystal semiconductor layer to a supporting substrate, detecting a position of a deficiency region in the single crystal semiconductor layer, forming a non-single-crystal semiconductor layer over the single crystal semiconductor layer, selectively improving crystallinity of a portion of the non-single-crystal semiconductor layer based on the position of the deficiency region, the portion being overlapped with the deficiency region, and planarizing the non-single-crystal semiconductor layer over the supporting substrate.

Abstract: By an evacuation unit including first and second turbo molecular pumps connected in series, the ultimate pressure in a reaction chamber is reduced to ultra-high vacuum. By a knife-edge-type metal-seal flange, the amount of leakage in the reaction chamber is reduced. A microcrystalline semiconductor film and an amorphous semiconductor film are stacked in the same reaction chamber where the pressure is reduced to ultra-high vacuum. By forming the amorphous semiconductor film covering the surface of the microcrystalline semiconductor film, oxidation of the microcrystalline semiconductor film is prevented.

Abstract: In a power MISFET having a trench gate structure with a dummy gate electrode, a technique is provided for improving the performance of the power MISFET, while preventing electrostatic breakdown of a gate insulating film therein. A power MISFET having a trench gate structure with a dummy gate electrode, and a protective diode are formed on the same semiconductor substrate. The protective diode is provided between a source electrode and a gate interconnection. In a manufacturing method of such a semiconductor device, a polycrystalline silicon film for the dummy gate electrode and a polycrystalline silicon film for the protective diode are formed simultaneously. A source region of the power MISFET and an n+-type semiconductor region of the protective diode are formed in the same step.

Abstract: An oxygen- or nitrogen-terminated silicon nanocrystalline structure is formed on a silicon substrate by forming a silicon film of fine silicon crystals and amorphous silicon on a substrate, and oxidizing or nitriding the formed silicon film with ions and radicals formed from an oxidizing gas or a nitriding gas. The oxidizing or nitriding step comprises substeps of disposing the substrate provided with the silicon film in an oxidizing or nitriding gas atmosphere within a plasma treatment chamber, and then plasma-oxiziding or plasma-nitriding the substrate provided with the silicon film by applying a high frequency electric field to the oxidizing or nitriding gas atmosphere. The method allows the particle diameter of the oxygen- or nitrogen-terminated silicon nanocrystals to be regulated to an accuracy of 1 to 2 nm, the density thereof per unit area to be increased, and the silicon nanocrystalline structure to be produced easily and inexpensively.

Abstract: Methods in accordance with the invention involve patterning and etching very small dimension pillars, such as in formation of a memory array in accordance with the invention. When dimensions of pillars become very small, the photoresist pillars used to pattern them may not have sufficient mechanical strength to survive the photoresist exposure and development process. Using methods according to the present invention, these photoresist pillars are printed and developed larger than their intended final dimension, such that they have increased mechanical strength, then are shrunk to the desired dimension during a preliminary etch performed before the etch of underlying material begins.

Abstract: Chemical vapor deposition processes utilize chemical precursors that allow for the deposition of thin films to be conducted at or near the mass transport limited regime. The processes have high deposition rates yet produce more uniform films, both compositionally and in thickness, than films prepared using conventional chemical precursors. In preferred embodiments, a higher order silane is employed to deposit thin films containing silicon that are useful in the semiconductor industry in various applications such as transistor gate electrodes.

Abstract: A photovoltaic device having a first electrode layer, a high resistivity transparent film disposed on the first electrode, a second electrode layer, and an inorganic photoactive layer disposed between the first and second electrode layers, wherein the inorganic photoactive layer is disposed in at least partial electrical contact with the high resistivity transparent film, and in at least partial electrical contact with the second electrode. The photoactive layer has a first inorganic material and a second inorganic material different from the first inorganic material, wherein the first and second inorganic materials exhibit a type II band offset energy profile, and wherein the photoactive layer has a first population of nanostructures of a first inorganic material and a second population of nanostructures of a second inorganic material.

Abstract: A solar call is provided along with a method for forming a semiconductor nanocrystalline silicon insulating thin-film with a tunable bandgap. The method provides a substrate and introduces a silicon (Si) source gas with at least one of the following source gases: germanium (Ge), oxygen, nitrogen, or carbon into a high density (HD) plasma-enhanced chemical vapor deposition (PECVD) process. A SiOxNyCz thin-film embedded with a nanocrystalline semiconductor material is deposited overlying the substrate, where x, y, z?0, and the semiconductor material is Si, Ge, or a combination of Si and Ge. As a result, a bandgap is formed in the SiOxNyCz thin-film, in the range of about 1.9 to 3.0 electron volts (eV). Typically, the semiconductor nanoparticles have a size in a range of 1 to 20 nm.

Abstract: The invention concerns a method and a system for detecting a body (801) in a zone (802) located proximate an interface (803). The body is illuminated by an electromagnetic radiation (804) comprising at least two different wavelengths, located in ranges corresponding to near infrared and to green-blue. The method comprises the following steps: selecting two wavelengths; providing, for each of said wavelengths, an image (805) of the interface and of the zone; extracting from said data of each image two sets of data (807) respectively representing at least one part of the body in the near infrared range and in the green-blue range; comparing said data sets (807). It is thus possible to detect the presence of a body by discriminating between a body entirely located beneath the interface and a body located at least partly above the interface.

Abstract: A plasma deposition apparatus for making polycrystalline silicon including a chamber for depositing said polycrystalline silicon, the chamber having an exhaust system for recovering un-deposited gases; a support located within the deposition chamber for holding a target substrate having a deposition surface, the deposition surface defining a deposition zone; at least one induction coupled plasma torch located within the deposition chamber and spaced apart from the support, the at least one induction coupled plasma torch producing a plasma flame that is substantially perpendicular to the deposition surface, the plasma flame defining a reaction zone for reacting at least one precursor gas source to produce the polycrystalline silicon for depositing a layer of the polycrystalline silicon the deposition surface.

Abstract: Methods for forming a microcrystalline silicon layer in a thin film transistor structure are provided. In one embodiment, a method for forming a microcrystalline silicon layer includes providing a substrate in a processing chamber, supplying a first gas mixture having a hydrogen containing gas to a silicon containing gas flow rate ratio greater than about 200:1 into the processing chamber, maintaining a first process pressure greater than about 6 Torr in the processing chamber to deposit a first microcrystalline silicon containing layer in presence of a plasma formed from the first gas mixture, supplying a second gas mixture into the processing chamber, and maintaining a second process pressure less than about 5 Torr in the processing chamber to deposit a second microcrystalline silicon containing layer in presence of a plasma formed from the second gas mixture.

Abstract: Methods for forming a microcrystalline silicon layer in a thin film transistor structure are provided. In one embodiment, a method for forming a microcrystalline silicon layer includes providing a substrate in a processing chamber, supplying a gas mixture having a hydrogen-based gas, a silicon-based gas and an argon gas into the processing chamber, the gas mixture having a volumetric flow ratio of the hydrogen-based gas to the silicon-based gas greater than about 100:1, wherein a volumetric flow ratio of the argon gas to the total combined flow of hydrogen-based gas and the silicon-based gas is between about 5 percent and about 40 percent, and maintaining a process pressure of the gas mixture within the processing chamber at greater than about 3 Torr while depositing a microcrystalline silicon layer on the substrate.

Abstract: In one example, a method of epitaxially forming a silicon-containing material on a substrate surface is presented which includes positioning a substrate into a process chamber. The substrate has a monocrystalline surface and at least a second surface, such as an amorphous surface and/or a polycrystalline surface. The substrate is exposed to a deposition gas to deposit an epitaxial layer on the monocrystalline surface and a polycrystalline layer on the second surface. The deposition gas preferably contains a silicon source and at least a second elemental source, such as a germanium source, a carbon source and/or combinations thereof. Thereafter, the method further provides exposing the substrate to an etchant gas to etch the polycrystalline layer and the epitaxial layer in a manner such that the polycrystalline layer is etched at a faster rate than the epitaxial layer.

Abstract: A high-density memory array. A plurality of word lines and a plurality of bit lines are arranged to access a plurality of memory cells. Each memory cell includes a first conductive terminal and an article in physical and electrical contact with the first conductive terminal, the article comprising a plurality of nanoscopic particles. A second conductive terminal is in physical and electrical contact with the article. Select circuitry is arranged in electrical communication with a bit line of the plurality of bit lines and one of the first and second conductive terminals. The article has a physical dimension that defines a spacing between the first and second conductive terminals such that the nanotube article is interposed between the first and second conducive terminals. A logical state of each memory cell is selectable by activation only of the bit line and the word line connected to that memory cell.

Abstract: The present invention provides a method of recrystallizing a silicon sheet, and in particular recrystallizing a small grained silicon sheet to improve material properties such as grain size and orientation. According to one aspect, the method includes using rapid thermal processing (RTP) to melt and recrystallize one or more entire silicon sheet(s) in one heating sequence. According to another aspect, the method includes directionally controlling a temperature drop across the thickness of the sheet so as to facilitate the production of a small number of nuclei in the melted material and their growth into large grains. According to a further aspect, the invention includes a re-crystallization chamber in an overall process flow that enables high-throughput processing of silicon sheets having desired properties for applications such as photovoltaic modules.

Abstract: A method for epitaxially forming a silicon-containing material on a substrate surface utilizes a halogen containing gas as both an etching gas as well as a carrier gas through adjustments of the process chamber temperature and pressure. It is beneficial to utilize HCl as the halogen containing gas because converting HCl from a carrier gas to an etching gas can easily be performed by adjusting the chamber pressure.

Abstract: In a method of manufacturing a polysilicon thin film and a method of manufacturing a TFT having the thin film, a laser beam is irradiated on a portion of an amorphous silicon thin film to liquefy the portion of the amorphous silicon thin film. The amorphous silicon thin film is on a first end portion of a substrate. The liquefied silicon is crystallized to form silicon grains. The laser beam is shifted from the first end portion towards a second end portion of the substrate opposite the first end portion by an interval in a first direction. The laser beam is then irradiated onto a portion of the amorphous silicon thin film adjacent to the silicon grains to form a first polysilicon thin film. Therefore, electrical characteristics of the amorphous silicon thin film may be improved.

Abstract: There are provided preflow periods t11, t12 in which group III element materials TMG, TMA and TMI are not supplied from a group III element material container to a reaction region (reactor), while a group V element material PH3 and an Mg dopant material are supplied from a group V element material container and a dopant material container to the reaction region (reactor) after an Mg-undoped group III-V compound semiconductor layer is crystallinically grown and before an Mg-doped group III-V compound semiconductor layer is crystallinically grown. According to the semiconductor manufacturing method, an Mg doping profile can be accurately controlled.

Abstract: A method for manufacturing a semiconductor device includes forming a first semiconductor layer on a semiconductor substrate, forming a second semiconductor layer on the first semiconductor layer, etching the second semiconductor layer and the first semiconductor layer to form a first groove passing through the second semiconductor layer and the first semiconductor layer, forming a support in the first groove, etching the second semiconductor layer to form a second groove that exposes the first semiconductor layer, forming a cavity between the second semiconductor layer and the semiconductor substrate by etching the first semiconductor layer through the second groove, forming a semiconductor film in the cavity, and thermally oxidizing the semiconductor film.