Abstract: A microlens, an image sensor including the microlens, a method of forming the microlens and a method of manufacturing the image sensor are provided. The microlens includes a polysilicon pattern, having a cylindrical shape, formed on a substrate, and a round-type shell portion enclosing the polysilicon pattern. The microlens may further include a filler material filling an interior of the shell portion, or a second shell portion covering the first shell portion. The method of forming a microlens includes forming a silicon pattern on a semiconductor substrate having a lower structure, forming a capping film on the semiconductor substrate over the silicon pattern, annealing the silicon pattern and the capping film altering the silicon pattern to a polysilicon pattern having a cylindrical shape and the capping film to a shell portion for a round-type microlens, and filling an interior of the shell portion with a lens material through an opening between the semiconductor substrate and an edge of the shell portion.

Abstract: Exact alignment of a recrystallized region, which is to be formed in an amorphous or polycrystalline film, is facilitated. An alignment mark is formed, which is usable in a step of forming an electronic device, such as a thin-film transistor, in the recrystallized region. In addition, in a step of obtaining a large-grain-sized crystal-phase semiconductor from a semiconductor film, a mark structure that is usable as an alignment mark in a subsequent step is formed on the semiconductor film in the same exposure step. Thus, the invention includes a light intensity modulation structure that modulates light and forms a light intensity distribution for crystallization, and a mark forming structure that modulates light and forms a light intensity distribution including a pattern with a predetermined shape, and also forms a mark indicative of a predetermined position on a crystallized region.

Abstract: A method of fabrication of thin films for photovoltaic or electronic applications is provided. The method includes fabricating a nanocrystal precursor layer and selenizing the nanocrystal precursor layer in a selenium containing atmosphere. The nanocrystal precursor layer includes one of CuInS2, CuIn(Sy,Se1?y)2, CuGaS2, CuGa(Sy,Se1?y)2, Cu(InxGa1?x)S2, and Cu(InxGa1?x)(Sy,Se1?y)2 nanoparticles and combinations thereof, wherein 0?x?1 and 1?y?0.

Abstract: A manufacturing method of a semiconductor device is provided, comprising: loading a substrate into a processing chamber; forming a first film on the substrate by supplying silicon atom-containing gas, boron atom-containing gas, and germanium atom-containing gas into the processing chamber; forming a second film on the first film by supplying the silicon atom-containing gas and the boron atom-containing gas into the processing chamber; and unloading the substrate from the processing chamber.

Abstract: It is an object to provide an epitaxial silicon wafer that is provided with an excellent gettering ability in which a polysilicon layer is formed on the rear face side of a silicon crystal substrate into which phosphorus (P) and germanium (Ge) have been doped. A silicon epitaxial layer is grown by a CVD method on the surface of a silicon crystal substrate into which phosphorus and germanium have been doped at a high concentration. After that, a PBS forming step for growing a polysilicon layer is executed on the rear face side of a silicon crystal substrate. By the above steps, the number of LPDs (caused by an SF) that occur on the surface of the epitaxial silicon wafer due to the SF can be greatly reduced.

Abstract: A semiconductor body comprised of a semiconductor material includes a first monocrystalline region of the semiconductor material having a first lattice constant along a reference direction, a second monocrystalline region of the semiconductor material having a second lattice constant, which is different than the first, along the reference direction, and a third, strained monocrystalline region between the first region and the second region.

Abstract: It is an object to provide an epitaxial silicon wafer that is provided with an excellent gettering ability in which a polysilicon layer is formed on the rear face side of a silicon crystal substrate into which phosphorus (P) and germanium (Ge) have been doped. A PBS forming step for growing a polysilicon layer is executed on the rear face side of a silicon crystal substrate into which phosphorus and germanium have been doped at a high concentration to execute a baking treatment. After a surface layer of the silicon crystal substrate is then polished up to a predetermined amount, a silicon epitaxial layer is grown by a CVD method. By the above steps, the number of LPDs (caused by an SF) that occur on the surface of the epitaxial silicon wafer due to the SF can be greatly reduced.

Abstract: A germanium-containing layer is deposited on a single crystalline bulk silicon substrate in an ambient including a level of oxygen partial pressure sufficient to incorporate 1%-50% of oxygen in atomic concentration. The thickness of the germanium-containing layer is preferably limited to maintain some degree of epitaxial alignment with the underlying silicon substrate. Optionally, a graded germanium-containing layer can be grown on, or replace, the germanium-containing layer. An at least partially crystalline silicon layer is subsequently deposited on the germanium-containing layer. A handle substrate is bonded to the at least partially crystalline silicon layer. The assembly of the bulk silicon substrate, the germanium-containing layer, the at least partially crystalline silicon layer, and the handle substrate is cleaved within the germanium-containing layer to provide a composite substrate including the handle substrate and the at least partially crystalline silicon layer.

Abstract: A method includes an act of providing a crystalline substrate with a diamond-type lattice and an exposed substantially (111)-surface. The method also includes an act of forming a graphene layer or a graphene-like layer on the exposed substantially (111)-surface.

Abstract: A p-channel MOS transistor includes a gate electrode formed on a silicon substrate in correspondence to a channel region therein via a gate insulation film, the gate electrode carrying sidewall insulation films on respective sidewall surfaces thereof, and source and drain regions of p-type are formed in the substrate at respective outer sides of the sidewall insulation films, wherein each of the source and drain regions encloses a polycrystal region of p-type accumulating therein a compressive stress.

Abstract: A method of forming an integrated circuit device that includes a plurality of multiple gate FinFETs (MuGFETs) is disclosed. Fins of different crystal orientations for PMOS and NMOS MuGFETs are formed through amorphization and crystal regrowth on a direct silicon bonded (DSB) hybrid orientation technology (HOT) substrate. PMOS MuGFET fins are formed with channels defined by fin sidewall surfaces having (110) crystal orientations. NMOS MuGFET fins are formed with channels defined by fin sidewall surfaces having (100) crystal orientations in a Manhattan layout with the sidewall channels of the different PMOS and NMOS MuGFETs aligned at 0° or 90° rotations.

Abstract: A vertical transistor having a wrap-around-gate and a method of fabricating such a transistor. The wrap-around-gate (WAG) vertical transistors are fabricated by a process in which source, drain and channel regions of the transistor are automatically defined and aligned by the fabrication process, without photolithographic patterning.

Abstract: A method of fabricating a polycrystalline silicon thin that includes a metal layer forming operation of forming a metal layer on an insulating substrate, a first silicon layer forming operation of stacking a silicon layer on the metal layer formed in the metal layer forming operation, a first annealing operation of forming a silicide layer using by moving catalyst metal atoms from the metal layer to the silicon layer using an annealing process, a second silicon layer forming operation of stacking an amorphous silicon layer on the silicide layer, and a crystallization operation of crystallizing the amorphous silicon layer into crystalline silicon through the medium of particles of the silicide layer.

Abstract: A method of manufacturing a memory device includes forming a first dielectric layer over a substrate, forming a charge storage element over the first dielectric layer and forming an inter-gate dielectric over the charge storage element. The method also includes depositing a silicon control gate layer over the inter-gate dielectric using a reactant that contains chlorine.

Abstract: An object is to provide a semiconductor device with improved reliability and for which a defect due to an end portion of a semiconductor layer provided in an island-shape is prevented, and a manufacturing method thereof. A structure includes an island-shaped semiconductor layer provided over a substrate, an insulating layer provided over a top surface and a side surface of the island-shaped semiconductor layer, and a gate electrode provided over the island-shaped semiconductor layer with the insulating layer interposed therebetween. In the insulating layer provided to be in contact with the island-shaped semiconductor layer, a region that is in contact with the side surface of the island-shaped semiconductor layer is made to have a lower dielectric constant than a region over the top surface of the island-shaped semiconductor layer.

Abstract: A method for producing a High Temperature Thin Film Layer On Glass (HTTFLOG) of silicon, which is a precursor component of thin film transistors (TFTs). The invention described here is a superior method of fabricating HTTFLOG precursor structures or components for liquid crystal displays (LCDs) with quicker production time and lower cost of manufacture while enabling a groundbreaking increase in small and large screen resolution. This invention is a new sub-assembly intended for original equipment manufacturer (OEM) consumption and inclusion in display products.

Abstract: A method for forming a semiconductor film suitable for a practical photoelectric conversion device having favorable photoelectric conversion efficiency and adapted to volume production and increased substrate area, and a method for manufacturing a photoelectric conversion device including the semiconductor film are provided. The method for forming a semiconductor film manufactures the semiconductor film including amorphous structure by a plasma CVD method. The semiconductor film is an amorphous film of SiGe-based compound or a microcrystalline film of SiGe-based compound. The plasma CVD method controls bandgap in thickness direction of the semiconductor film by varying the ON or OFF time of electric power applied to generate a plasma and intermittently supplying the power. The ON time and OFF time of the power fall in a range where the duty ratio ON time/(ON time+OFF time)×100(%) is 10% or more and 50% or less.

Abstract: A method for forming a field effect power semiconductor is provided. The method includes providing a semiconductor body, a conductive region arranged next to a main surface of the semiconductor body, and an insulating layer arranged on the main horizontal surface. A narrow trench is etched through the insulating layer to expose the conductive region. A polycrystalline semiconductor layer is deposited and a vertical poly-diode structure is formed. The polycrystalline semiconductor layer has a minimum vertical thickness of at least half of the maximum horizontal extension of the narrow trench. A polycrystalline region which forms at least a part of a vertical poly-diode structure is formed in the narrow trench by maskless back-etching of the polycrystalline semiconductor layer. Further, a semiconductor device with a trench poly-diode is provided.

Abstract: A semiconductor substrate fabrication method according to the first aspect of this invention is characterized by including a preparation step of preparing an underlying substrate, a stacking step of stacking, on the underlying substrate, at least two multilayered films each including a peeling layer and a semiconductor layer, and a separation step of separating the semiconductor layer.

Abstract: Apparatus and method for plasma deposition of thin film photovoltaic materials at microwave frequencies. The apparatus inhibits deposition on windows or other microwave transmission elements that couple microwave energy to deposition species. The apparatus includes a microwave applicator with conduits passing therethrough that carry deposition species. The applicator transfers microwave energy to the deposition species to transform them to a reactive state conducive to formation of a thin film material. The conduits physically isolate deposition species that would react to form a thin film material at the point of microwave power transfer. The deposition species are separately energized and swept away from the point of power transfer to prevent thin film deposition. The invention allows for the ultrafast formation of silicon-containing amorphous semiconductors that exhibit high mobility, low porosity, little or no Staebler-Wronski degradation, and low defect concentration.

Abstract: Provided is a method of depositing an ultra-fine grain polysilicon thin film. The method includes forming a nitrogen atmosphere in a chamber loaded with a substrate, and supplying a source gas into the chamber to deposit a polysilicon thin film on the substrate, in which the source gas includes a silicon-based gas, a nitrogen-based gas, and a phosphorous-based gas. The forming of the nitrogen atmosphere may include supplying a nitrogen-based gas into the chamber.

Abstract: A method for forming a silicon film having a microcrystal structure is provided. The method includes following steps. A plasma-enhanced chemical vapor deposition system having a reaction chamber, a top electrode and a bottom electrode is provided. The top electrode and the bottom electrode are opposite and disposed in the reaction chamber. A substrate is disposed on the bottom electrode. A silane gas is applied into the reaction chamber. A silicon film having a microcrystal structure is formed by simultaneously irradiating the silane gas in the reaction chamber by a carbon dioxide laser and performing a plasma-enhanced chemical vapor deposition step.

Abstract: Shaped nanocrystal particles and methods for making shaped nanocrystal particles are disclosed. One embodiment includes a method for forming a branched, nanocrystal particle. It includes (a) forming a core having a first crystal structure in a solution, (b) forming a first arm extending from the core having a second crystal structure in the solution, and (c) forming a second arm extending from the core having the second crystal structure in the solution.

Abstract: A seed crystal including mixed phase grains having high crystallinity with a low grain density is formed under a first condition, and a microcrystalline semiconductor film is formed over the seed crystal under a second condition which allows the mixed phase grains in the seed crystal to grow to fill a space between the mixed phase grains. In the first condition, the flow rate of hydrogen is 50 times or greater and 1000 times or less that of a deposition gas containing silicon or germanium, and the pressure in a process chamber is greater than 1333 Pa and 13332 Pa or less. In the second condition, the flow rate of hydrogen is 100 times or greater and 2000 times or less that of a deposition gas containing silicon or germanium, and the pressure in the process chamber is 1333 Pa or greater and 13332 Pa or less.

Abstract: A process for producing a photovoltaic device, wherein when providing an n-type amorphous silicon layer on an i-type amorphous silicon layer, a desired crystallization ratio can be achieved without reducing the deposition rate.

Abstract: The invention can provide or facilitate energy recovery operations during semiconductor processing operations by utilizing a bell jar having a radiation shield thereon that is comprised of a mediating layer comprising nickel disposed on an interior surface of the bell jar, and a reflective layer which can comprise a gold layer that is disposed on the mediating layer. The reflective layer has an emissivity of less than 5% and, more preferably, the reflective layer has an emissivity of less than about 1%. Heat from the reaction chamber can be used to reduce the heating load of one or more other unit operations.

Abstract: In a method of depositing a crystalline germanium layer on a substrate, a substrate is placed in the process zone comprising a pair of process electrodes. In a deposition stage, a crystalline germanium layer is deposited on the substrate by introducing a deposition gas comprising a germanium-containing gas into the process zone, and forming a capacitively coupled plasma of the deposition gas by coupling energy to the process electrodes. In a subsequent treatment stage, the deposited crystalline germanium layer is treated by exposing the crystalline germanium layer to an energized treatment gas or by annealing the layer.

Abstract: Methods of manufacturing power semiconductor devices include forming an epitaxial and dielectric layer, patterning and etching the dielectric layer, forming a first oxide layer, forming a first conductive layer on top of the first oxide layer, etching the first conductive layer away inside an active trench, forming a second oxide layer and second conductive layer. The second conductive layer does not extend completely over the first conductive layer in a first region outside of the active trench. The methods further include forming a third oxide layer over the second conductive layer, etching a first opening through the third oxide layer exposing the second conductive layer outside the active trench, etching a second opening through the second oxide layer outside the active trench in the first region exposing the first conductive layer but not the second conductive layer, and filling the first and second openings with conductive material.

Abstract: On a translucent substrate, an insulating film having a refractive index n and an amorphous silicon film are deposited successively. By irradiating the amorphous silicon film with a laser beam having a beam shape of a band shape extending along a length direction with a wavelength ?, a plurality of times from a side of amorphous silicon film facing the insulating film, while an irradiation position of the laser beam is shifted each of the plurality of times in a width direction of the band shape by a distance smaller than a width dimension of the band shape, a polycrystalline silicon film is formed from the amorphous silicon film. Forming the polycrystalline silicon film forms crystal grain boundaries which extend in the width direction and are disposed at a mean spacing measured along the length direction and ranging from (?/n)×0.95 to (?/n)×1.

Abstract: A method for detaching a first material layer from a second material layer includes following steps: forming a high-magnetic-permeability material layer on a first material layer comprised of low-magnetic-permeability material; removing a portion of the high-magnetic-permeability material layer to expose a portion of the first material layer; epitaxially growing a second material layer comprised of low-magnetic-permeability material on the exposed portion of the first material layer and the high-magnetic-permeability material layer; cooling the first and second material layers; heating the high-magnetic-permeability material layer, thus detaching the first material layer from the second material layer.

Abstract: A method of etching and tilling deep trenches is disclosed, which includes: forming an ONO(oxide-nitride-oxide) sandwich layer on a semiconductor substrate; forming deep trenches by using top oxide of the sandwich layer as a stop layer; removing the top oxide and middle SiN of the sandwich layer; tilling the deep trenches with epitaxial film or polysilicon film; polishing the wafer to get a planarized surface by stopping at the surface of the bottom oxide layer; removing the bottom oxide layer.

Abstract: Methods for forming a microcrystalline silicon layer in a thin film transistor structure are provided. In one embodiment, a method for forming a microcrystalline silicon layer includes providing a substrate in a processing chamber, supplying a first gas mixture having a hydrogen containing gas to a silicon containing gas flow rate ratio greater than about 200:1 into the processing chamber, maintaining a first process pressure greater than about 6 Torr in the processing chamber to deposit a first microcrystalline silicon containing layer in presence of a plasma formed from the first gas mixture, supplying a second gas mixture into the processing chamber, and maintaining a second process pressure less than about 5 Torr in the processing chamber to deposit a second microcrystalline silicon containing layer in presence of a plasma formed from the second gas mixture.

Abstract: An electrode circuit for plasma CVD includes: an alternating-current source; a matching circuit that is connected to the alternating-current source; and parallel plate electrodes that are constituted of a pair of an anode electrode and a cathode electrode, in which the anode electrode and the cathode electrode are arranged such that electrode surfaces of the anode electrode and the cathode electrode face each other. The matching circuit, the parallel plate electrodes, and plasma generated by the parallel plate electrodes form a balanced circuit.

Abstract: Disclosed is a method for depositing microcrystalline silicon on a substrate in a plasma chamber system, comprising the following steps: prior to initiating the plasma, providing the plasma chamber system with at least one reactive, silicon-containing gas and hydrogen, or exclusively hydrogen; initiating the plasma; after the plasma is initiated, continuously supplying the chamber system exclusively with reactive, silicon-containing gas, or after the plasma is initiated, continuously supplying the chamber system with at least one mixture comprising a reactive, silicon-containing gas and hydrogen, wherein the concentration of reactive, silicon-containing gas during the supply into the chamber is adjusted to greater than 0.5%; adjusting the plasma power to between 0.1 and 2.5 W/cm2 electrode surface; selecting a deposition rate of greater than 0.5 nm/s; and depositing, the microcrystalline layer having a thickness of less than 1000 nanometers on the substrate.

Abstract: An amorphous silicon layer and a single crystal silicon layer are formed in an upper portion of a silicon pillar. Then, by performing the selective epitaxial growth method twice, an amorphous silicon layer and an amorphous silicon germanium layer are formed in this order on the silicon pillar. Subsequently, by heat treatment, a second impurity diffusion layer including a single crystal silicon layer is formed in the upper portion of the silicon pillar. At the same time of the formation of the second impurity diffusion layer, a first contact plug including a single crystal silicon layer and a polycrystalline silicon germanium layer is formed on the silicon pillar. Then, a second contact plug made of metal is formed so that it is connected to the first contact plug.

Abstract: A method for an intrinsic type microcrystalline silicon layer is provided. In one embodiment, a method for forming an intrinsic type microcrystalline silicon layer includes dynamically ramping up a silane gas supplied in a gas mixture to a surface of a substrate disposed in a processing chamber, dynamically ramping down a RF power applied in the gas mixture supplied to the processing chamber to form a plasma in the gas mixture, and forming an intrinsic type microcrystalline silicon layer on the substrate.

Abstract: In a vertical diode, an N+-type layer, an N?-type layer, and a P+-type layer are stacked in this order on a lower electrode film, and an upper electrode film is provided thereon. The effective impurity concentration of the N?-type layer is lower than the effective impurity concentrations of the N+-type layer and the P+-type layer. At least one of the N+-type layer, the N?-type layer, and the P+-type layer is formed from a small grain size polycrystalline semiconductor whose each crystal grain does not penetrate each layer through its thickness.

Abstract: To provide a manufacturing method of a microcrystalline semiconductor film, the manufacturing method comprises the steps of forming a first semiconductor film over a substrate by generating plasma by performing continuous discharge under an atmosphere containing a deposition gas; forming a second semiconductor film over the first semiconductor film by generating plasma by performing pulsed discharge under the atmosphere containing the deposition gas; forming a third semiconductor film over the second semiconductor film by generating plasma by performing continuous discharge under the atmosphere containing the deposition gas; and forming a fourth semiconductor film over the third semiconductor film by generating plasma by performing pulsed discharge under the atmosphere containing the deposition gas.

Abstract: A method for forming polycrystalline semiconductor film from amorphous semiconductor film at reduced temperatures and/or accelerated rates. The inclusion of a small percentage of semiconductor material, such as 2% within the metal layer, reduces the temperatures required for crystallization of the amorphous semiconductor by at least 50° C. in comparison to the use of the metal layer without the small percentage of semiconductor material. During a low temperature isothermal annealing process adjacent Al-2% Si and a-Si films undergo a layer exchange resulting in formation of a continuous polycrystalline silicon film having good physical and electrical properties. Formation of polycrystalline-semiconductor in this manner is suitable for use with low temperature substrates (e.g., glass, plastic) as well as with numerous integrated circuit and MEMs fabrication devices and practices.

Abstract: The present invention relates to a method for manufacturing a display device including a p-channel thin film transistor and an n-channel thin film transistor having a microcrystalline semiconductor film each of which are an inverted-staggered type, and relates to a method for formation of an insulating film and a semiconductor film which are included in the thin film transistor. Two or more kinds of high-frequency powers having different frequencies are supplied to an electrode for generating glow discharge plasma in a reaction chamber. High-frequency powers having different frequencies are supplied to generate glow discharge plasma, so that a thin film of a semiconductor or an insulator is formed. High-frequency powers having different frequencies (different wavelength) are superimposed and applied to the electrode of a plasma CVD apparatus, so that densification and uniformity of plasma for preventing the effect of surface standing wave of plasma can be realized.

Abstract: A thin film transistor including a first polycrystalline semiconductor layer disposed on a substrate, a second polycrystalline semiconductor layer disposed on the first polycrystalline semiconductor layer, and metal catalysts configured to adjoin the first polycrystalline semiconductor layer and spaced apart from one another at specific intervals.

Abstract: This invention generally relates to a process for suppressing silicon self-interstitial diffusion near the substrate/epitaxial layer interface of an epitaxial silicon wafer having a heavily doped silicon substrate and a lightly doped silicon epitaxial layer. Interstitial diffusion into the epitaxial layer is suppressed by a silicon self-interstitial sink layer comprising dislocation loops.

Abstract: Methods for manufacturing a semiconductor device with alternating P type and N type semiconductor conductive regions are disclosed. One method includes forming a trench in an N type epitaxial layer; forming carbon-contained silicon layer on sidewalls of the trench; and filling the trench with P type semiconductor layer. In another method, the carbon-contained silicon layer is replaced by a carbon film formed by diffusion process. The carbon-contained silicon layer or the carbon film can effectively inhibit the diffusion of P type impurities into the N type semiconductor layers. Further, a semiconductor device having carbon-contained layer or carbon film formed between P type and N type conductive layers is also disclosed.

Abstract: Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.

Abstract: The present disclosure relates to a semiconductor device that has a first semiconductor structure that is grown to form a non-planar growth surface. The non-planar growth surface is formed from multiple facets and provides a defined contour. The defined contour may include, but is not limited to a corrugated contour or a pyramidal contour. A second semiconductor structure is grown over the non-planar growth surface of the first semiconductor structure, and as such, the second semiconductor structure is non-planar and follows the defined contour of the non-planar growth surface of the first semiconductor structure. The first and second semiconductor structures may form the foundation for various types of electrical and optoelectrical semiconductor devices, such as diodes, transistors, thyristors, and the like.

Abstract: Embodiments of the present invention generally relate to methods of forming a microcrystalline silicon layer on a substrate in a deposition chamber. In, one embodiment, the method includes flowing a processing gas into a diffuser region between a backing plate and a showerhead of the deposition chamber, flowing the processing gas through a plurality of holes in the showerhead and into a process volume between the showerhead and a substrate support in the deposition chamber, igniting a plasma in the process volume, back-flowing gas ions formed in the plasma through the plurality of holes in the showerhead and into the diffuser region, mixing the gas ions and the processing gas in the diffuser region, re-flowing the gas ions and processing gas through the plurality of holes in the showerhead and into the process volume, and depositing a microcrystalline silicon layer on the substrate.

Abstract: The invention relates to a method for producing polycrystalline silicon rods by deposition from the gas phase on a thin rod, wherein one or a plurality of disks consisting of a material having a lower electrical resistivity than the polycrystalline silicon under deposition conditions are introduced above the electrodes and/or below the bridge of the rod pair.

Abstract: The present invention makes it possible to prepare a thin film transistor fitted with a resin substrate by lowering a process temperature during formation of an oxide semiconductor, and further makes it possible to improve manufacturing efficiency and reduce variations in thin film transistor performance. Disclosed is a thin film transistor of the present invention possessing a semiconductor containing metal oxide, the semiconductor comprising a coating film made from a solution or a dispersion of a precursor, wherein the metal oxide contains indium as a first metal element, gallium or aluminum as a second metal element, and zinc or tin as a third metal element, and a ratio of the third metal element to total metal elements in the metal oxide is 25 at % or less, or 0 at %.

Abstract: A layer including a semiconductor film is formed over a glass substrate and is heated. A thermal expansion coefficient of the glass substrate is greater than 6×10?7/° C. and less than or equal to 38×10?7/° C. The heated layer including the semiconductor film is irradiated with a pulsed ultraviolet laser beam having a width of less than or equal to 100 ?m, a ratio of width to length of 1:500 or more, and a full width at half maximum of the laser beam profile of less than or equal to 50 ?m, so that a crystalline semiconductor film is formed. As the layer including the semiconductor film formed over the glass substrate, a layer whose total stress after heating is ?500 N/m to +50 N/m, inclusive is formed.

Abstract: In one embodiment the present invention is a method of conducting multiple step multiple chamber chemical vapor deposition while avoiding reactant memory in the relevant reaction chambers. The method includes depositing a layer of semiconductor material on a substrate using vapor deposition in a first deposition chamber followed by evacuation of the growth chamber to reduce vapor deposition source gases remaining in the first deposition chamber after the deposition growth and prior to opening the chamber. The substrate is transferred to a second deposition chamber while isolating the first deposition chamber from the second deposition chamber to prevent reactants present in the first chamber from affecting deposition in the second chamber and while maintaining an ambient that minimizes or eliminates growth stop effects. After the transferring step, an additional layer of a different semiconductor material is deposited on the first deposited layer in the second chamber using vapor deposition.