Abstract: A method for manufacturing a semiconductor device is provided, which comprises at least a steps of forming a gate insulating film over a substrate, a step of forming a microcrystalline semiconductor film over the gate insulating film, and a step of forming an amorphous semiconductor film over the microcrystalline semiconductor film. The microcrystalline semiconductor film is formed by introducing a silicon hydride gas or a silicon halide gas when a surface of the gate insulating film is subjected to hydrogen plasma to generate a crystalline nucleus over the surface of the gate insulating film, and by increasing a flow rate of the silicon hydride gas or the silicon halide gas.

Abstract: This invention relates to the controlled growth of uniform octapod-shaped colloidal nanocrystals and use thereof. These octapod-shaped nanocrystals can be applied in many fields of technology. This represents the first approach reported so far for the predictable and controlled fabrication of octapod-shaped nanocrystals. The synthesis approach is applicable to a broad range of materials, such as group II-VI semiconductor nanocrystals but is not limited to these materials. Using several cation exchange and oxidation procedures, we also demonstrate in this application that extremely uniform octapod-shaped nanocrystals of other materials can be synthesized, including various semiconductors, metals and insulators.

Abstract: The present invention discloses a semiconductor device and a manufacturing method thereof. The method comprises the steps of providing a substrate on which a graphene layer or carbon nanotube layer is formed; exposing part of the graphene layer or carbon nanotube layer after forming a gate structure on the graphene layer or carbon nanotube layer, wherein the gate structure comprises a gate stack, a spacer and a cap layer, the cap layer is located on the gate stack, and the spacer surrounds the gate stack and the cap layer; epitaxially growing a semiconductor layer on the exposed graphene layer or carbon nanotube layer; and forming a metal contact layer on the semiconductor layer. In the present invention, the semiconductor layer is formed on the graphene layer or carbon nanotube layer, and then the metal contact layer is formed on the semiconductor layer, instead of forming the metal contact layer directly from the graphene layer or carbon nanotube layer.

Abstract: A method for fabricating a P-type polycrystalline silicon-germanium structure comprises steps: forming an aluminum layer and an amorphous germanium layer on a P-type monocrystalline silicon substrate in sequence; annealing the P-type monocrystalline silicon substrate, the aluminum layer and the amorphous germanium layer at a temperature of 400-650° C.; and undertaking an aluminum-induced crystallization process in which germanium atoms of the amorphous germanium layer and silicon atoms of the P-type monocrystalline silicon substrate simultaneously pass through the aluminum layer and then the amorphous germanium layer being induced and converted into a P-type polycrystalline silicon-germanium layer between the P-type monocrystalline silicon substrate and the aluminum layer. The present invention is a simple, reliable and low-cost method to fabricate a P-type polycrystalline silicon-germanium layer on a P-type monocrystalline silicon substrate.

Abstract: A method of fabricating a polycrystalline silicon thin that includes a metal layer forming operation of forming a metal layer on an insulating substrate, a first silicon layer forming operation of stacking a silicon layer on the metal layer formed in the metal layer forming operation, a first annealing operation of forming a silicide layer using by moving catalyst metal atoms from the metal layer to the silicon layer using an annealing process, a second silicon layer forming operation of stacking an amorphous silicon layer on the silicide layer, and a crystallization operation of crystallizing the amorphous silicon layer into crystalline silicon through the medium of particles of the silicide layer.

Abstract: A method of making a three-dimensional structure in semiconductor material includes providing a substrate (20) is provided having at least a surface including semiconductor material. Selected areas of the surface of the substrate are exposed to a focussed ion beam whereby the ions are implanted in the semiconductor material in the selected areas. Several layers of a material selected from the group consisting of mono-crystalline, poly-crystalline or amorphous semiconductor material, are deposited on the substrate surface and between depositions focussed ion beam is used to expose the surface so as to define a three-dimensional structure. Material not part of the final structure (30) defined by the focussed ion beam is etched away so as to provide a three-dimensional structure on the substrate (20).

Abstract: Semiconductor devices and methods for making such devices are described. The semiconductor devices contain an epitaxial layer made by providing a semiconductor substrate containing an upper surface with a single-crystal structure; forming a layer on the upper surface of the substrate, wherein the layer comprises substantially the same material as the semiconductor substrate and comprises an amorphous or polycrystalline structure; and heating the layer using low temperature microwaves to change the amorphous structure to a single-crystal structure. The epitaxial layer can also be made by providing the semiconductor substrate with an upper surface of a single-crystal material and then forming an epitaxial layer on the substrate upper surface using microwaves at a wafer temperature less than about 550° C. In-situ or implanted dopants in the epitaxial layer can be activated using the same, or separate, low temperature microwave processing. Other embodiments are described.

Abstract: A bottom gate-type thin film transistor includes a gate insulating film, an interlayer insulating film formed on the gate insulating film, having an opening which is formed in a formation region of a gate electrode, and a semiconductor film formed on the interlayer insulating film so as to cover the opening. The interlayer insulating film contains nitrides in an amount larger than that in the gate insulating film, and the semiconductor film includes a microcrystalline semiconductor film or a polycrystalline semiconductor film formed on semiconductor crystalline nuclei which are formed on the gate insulating film and the interlayer insulating film and contain at least Ge.

Abstract: A semiconductor component is provided having a substrate and at least one semiconductor layer realized to be polycrystalline on one side of the substrate. The polycrystalline semiconductor layer contains the crystal nuclei.

Abstract: A method for manufacturing a microcrystalline semiconductor film having high crystallinity is provided. A method for manufacturing a semiconductor device which has favorable electric characteristics with high productivity is provided. After a first microcrystalline semiconductor film is formed over a substrate, treatment for flattening a surface of the first microcrystalline semiconductor film is performed. Then, treatment for removing an amorphous semiconductor region on a surface side of the flattened first microcrystalline semiconductor film is performed so that a second microcrystalline semiconductor film having high crystallinity and flatness is formed. After that, a third microcrystalline semiconductor film is formed over the second microcrystalline semiconductor film.

Abstract: Provided is a method of promoting a deposition of semiconductor crystal nuclei on an insulating film such as a silicon oxide film even at a low temperature of 450° C. or lower in a reactive thermal CVD method. As one means thereof, a first semiconductor film is formed on an insulating substrate, and then semiconductor crystal nuclei are formed on parts of the first semiconductor film and simultaneously the first semiconductor film other than that in forming regions of the semiconductor crystal nuclei and their peripheries is removed by etching. Thereafter, a second semiconductor film is formed with using the semiconductor crystal nuclei as seeds.

Abstract: To provide a manufacturing method of a microcrystalline semiconductor film, the manufacturing method comprises the steps of forming a first semiconductor film over a substrate by generating plasma by performing continuous discharge under an atmosphere containing a deposition gas; forming a second semiconductor film over the first semiconductor film by generating plasma by performing pulsed discharge under the atmosphere containing the deposition gas; forming a third semiconductor film over the second semiconductor film by generating plasma by performing continuous discharge under the atmosphere containing the deposition gas; and forming a fourth semiconductor film over the third semiconductor film by generating plasma by performing pulsed discharge under the atmosphere containing the deposition gas.

Abstract: In one embodiment, a method of manufacturing a semiconductor device includes oxidizing a substrate to form local oxide regions that extend above a top surface of the substrate. A membrane layer is formed over the local oxide regions and the top surface of the substrate. A portion of the substrate under the membrane layer is removed. The local oxide regions under the membrane layer is removed.

Abstract: A method for manufacturing the integrated circuit device including, providing a substrate having a first region and a second region. Forming a dielectric layer over the substrate in the first region and the second region. Forming a sacrificial gate layer over the dielectric layer. Patterning the sacrificial gate layer and the dielectric layer to form gate stacks in the first and second regions. Forming an ILD layer within the gate stacks in the first and second regions. Removing the sacrificial gate layer in the first and second regions. Forming a protector over the dielectric layer in the first region; and thereafter removing the dielectric layer in the second region.

Abstract: A high-quality crystalline silicon film can be formed at a high film forming rate by performing a plasma CVD process. In a crystalline silicon film forming method for forming a crystalline silicon film on a surface of a processing target object by using a plasma CVD apparatus for introducing microwave into a processing chamber through a planar antenna having a multiple number of holes and generating plasma, the crystalline silicon film forming method includes generating plasma by exciting a film forming gas containing a silicon compound represented as SinH2n+2 (n is equal to or larger than 2) by the microwave; and depositing a crystalline silicon film on the surface of the processing target substrate by performing the plasma CVD process with the plasma.

Abstract: Perovskite semiconductor thin films and the method of making Perovskite semiconductor thin films are disclosed. Perovskite semiconductor thin films were deposited on inexpensive substrates such as glass and ceramics. CsSnI3 films contained polycrystalline domains with typical size of 300 nm and larger. It is confirmed experimentally that CsSnI3 compound in its black phase is a direct band-gap semiconductor, consistent with the calculated band structure from the first principles.

Abstract: Disclosed is a method of manufacturing crystalline Si by using plasma. According to the disclosed method, silicon (Si) deposition and reduction processes using plasma are cyclically performed in order to completely remove an a-Si layer so as to form crystalline Si on a substrate early in the process.

Abstract: Provided is a silicon wafer which is stabilized in quality exerting no adverse influence on device characteristics and manufactured by restricting a boron contamination from the environment, and a manufacturing process therefor. Concretely, the silicon wafer is characterized by an attached boron amount thereon being 1×1010 atoms/cm2 or less. In order to manufacture such a wafer as contains a small amount of boron attached on the wafer surface, the wafer is treated in an atmosphere of boron concentration of 15 ng/m3 or less. Boron-less filters and boron adsorbing filters are used as filters in a clean room and the like so as to lower the boron concentration in the atmosphere.

Abstract: In one embodiment a method of forming a compressive polycrystalline semiconductive material layer is disclosed. The method comprises forming a polycrystalline semiconductive seed layer over a substrate and forming a silicon layer by depositing silicon directly on the polycrystalline silicon seed layer under amorphous process conditions at a temperature below 600 C.

Abstract: Disclosed is a thin film transistor that is provided with a gate insulating film that is inexpensive, and that is less likely to have a low-density microcrystalline silicon layer formed thereon due to plasma induced damage, while suppressing fluctuation of a threshold voltage. In a TFT (100) having the bottom gate structure, since a silicon nitride film (31) having a natural oxide film (32) formed on the surface thereof is used as the gate insulating film (30), the gate insulating film (30) is not only capable of preventing the alkali metal ions contained in a glass substrate (10) from entering the gate insulating film (30), but also capable of suppressing a formation of the low-density microcrystalline silicon layer on the surface of a microcrystalline silicon film (41) on the side in contact with the gate insulating film (30). Since the mobility of the microcrystalline silicon film (41) is increased, the operation speed of the TFT (100) can be improved.

Abstract: A semiconductor memory device includes a plurality of memory blocks formed over a substrate including source regions and separated from each other by a slit, a plurality of bit lines coupled to the strings of the memory blocks and disposed over the memory blocks, and source contact lines formed within the slits, coupled to the source regions, respectively, and disposed in a direction to cross the plurality of bit lines.

Abstract: A germanium-containing layer is deposited on a single crystalline bulk silicon substrate in an ambient including a level of oxygen partial pressure sufficient to incorporate 1%-50% of oxygen in atomic concentration. The thickness of the germanium-containing layer is preferably limited to maintain some degree of epitaxial alignment with the underlying silicon substrate. Optionally, a graded germanium-containing layer can be grown on, or replace, the germanium-containing layer. An at least partially crystalline silicon layer is subsequently deposited on the germanium-containing layer. A handle substrate is bonded to the at least partially crystalline silicon layer. The assembly of the bulk silicon substrate, the germanium-containing layer, the at least partially crystalline silicon layer, and the handle substrate is cleaved within the germanium-containing layer to provide a composite substrate including the handle substrate and the at least partially crystalline silicon layer.

Abstract: The disclosure relates to a high purity 2H-SiC composition and methods for making same. The embodiments represented herein apply to both thin film and bulk growth of 2H-SiC. According to one embodiment, the disclosure relates to doping an underlying substrate or support layer with one or more surfactants to nucleate and grow high purity 2H-SiC. In another embodiment, the disclosure relates to a method for preparing 2H-SiC compositions by nucleating 2H-SiC on another SiC polytype using one or more surfactants. The surfactants can include AlN, Te, Sb and similar compositions. These nucleate SiC into disc form which changes to hexagonal 2H-SiC material.

Abstract: Disclosed are atomic layer deposition method and a semiconductor device including the atomic layer, including the steps: placing a semiconductor substrate in an atomic layer deposition chamber; feeding a first precursor gas to the semiconductor substrate within the chamber to form a first discrete monolayer on the semiconductor substrate; feeding an inert purge gas to the semiconductor substrate within the chamber to remove the first precursor gas which has not formed the first discrete monolayer on the semiconductor substrate; feeding a second precursor gas to the chamber to react with the first precursor gas which has formed the first discrete monolayer, forming a discrete atomic size islands; and feeding an inert purge gas to the semiconductor substrate within the chamber to remove the second precursor gas which has not reacted with the first precursor gas and byproducts produced by the reaction between the first and the second precursor gases.

Abstract: According to one embodiment, a semiconductor device is disclosed. The device includes a semiconductor substrate, and an interconnection above the semiconductor substrate. The interconnection includes a co-catalyst layer, a catalyst layer on the co-catalyst layer, and a graphene layer on the catalyst layer. The co-catalyst layer includes a portion contacting the catalyst layer. The portion has a face-centered cubic structure with a (111) plane oriented parallel to a surface of the semiconductor substrate. The catalyst layer has a face-centered cubic structure with a (111) plane oriented parallel to the surface of the semiconductor substrate.

Abstract: A microcrystalline semiconductor film with high crystallinity is manufactured. In addition, a thin film transistor with excellent electric characteristics and high reliability, and a display device including the thin film transistor are manufactured with high productivity. A deposition gas containing silicon or germanium is introduced from an electrode including a plurality of projecting portions provided in a treatment chamber of a plasma CVD apparatus, glow discharge is caused by supplying high-frequency power, and thereby crystal particles are formed over a substrate, and a microcrystalline semiconductor film is formed over the crystal particles by a plasma CVD method.

Abstract: A method of manufacturing a nanowire, a method of manufacturing a semiconductor apparatus including a nanowire and a semiconductor apparatus formed from the same are provided. The method of manufacturing a semiconductor apparatus may include forming a material layer pattern on a substrate, forming a first insulating layer on the material layer pattern, a first nanowire forming layer and a top insulating layer on the substrate, wherein a total depth of the first insulating layer and the first nanowire forming layer may be formed to be smaller than a depth of the material layer pattern, sequentially polishing the top insulating layer, the first nanowire forming layer and the first insulating layer so that the material layer pattern is exposed, exposing part of the first nanowire forming layer to form an exposed region and forming a single crystalline nanowire on an exposed region of the first nanowire forming layer.

Abstract: An object of one embodiment of the present invention is to provide a technique for manufacturing a dense crystalline semiconductor film (e.g., a microcrystalline semiconductor film) without a cavity between crystal grains. A plasma region is formed between a first electrode and a second electrode by supplying high-frequency power of 60 MHz or less to the first electrode under a condition where a pressure of a reactive gas in a reaction chamber of a plasma CVD apparatus is set to 450 Pa to 13332 Pa, and a distance between the first electrode and the second electrode of the plasma CVD apparatus is set to 1 mm to 20 mm; crystalline deposition precursors are formed in a gas phase including the plasma region; a crystal nucleus of 5 nm to 15 nm is formed by depositing the deposition precursors; and a microcrystalline semiconductor film is formed by growing a crystal from the crystal nucleus.

Abstract: By an evacuation unit including first and second turbo molecular pumps connected in series, the ultimate pressure in a reaction chamber is reduced to ultra-high vacuum. By a knife-edge-type metal-seal flange, the amount of leakage in the reaction chamber is reduced. A microcrystalline semiconductor film and an amorphous semiconductor film are stacked in the same reaction chamber where the pressure is reduced to ultra-high vacuum. By forming the amorphous semiconductor film covering the surface of the microcrystalline semiconductor film, oxidation of the microcrystalline semiconductor film is prevented.

Abstract: Nano-sized materials and/or polysilicon are formed using heat generated from a micro-heater, the micro-heater may include a substrate, a heating element unit formed on the substrate, and a support structure formed between the substrate and the heating element unit. Two or more of the heating element units may be connected in series.

Abstract: An object is to provide a film deposition apparatus in which the amount of leakage from the outside of the chamber to the inside of the chamber is reduced. Even if leakage occurs from the outside of the chamber to the inside of the chamber, oxygen and nitrogen included in an atmosphere that surrounds the outer wall of the chamber are reduced as much as possible and the atmosphere is filled with a noble gas or hydrogen, whereby the inside of the chamber is kept cleaner at 1/100 or less, preferably, 1/1000 or less of oxygen concentration and nitrogen concentration than those in the air. Since the space with high airtightness is provided adjacent to the outside of the chamber, the chamber is covered with a bag and a high-purity argon gas is supplied to the bag.

Abstract: A layer including a semiconductor film is formed over a glass substrate and is heated. A thermal expansion coefficient of the glass substrate is greater than 6×10?7/° C. and less than or equal to 38×10?7/° C. The heated layer including the semiconductor film is irradiated with a pulsed ultraviolet laser beam having a width of less than or equal to 100 ?m, a ratio of width to length of 1:500 or more, and a full width at half maximum of the laser beam profile of less than or equal to 50 ?m, so that a crystalline semiconductor film is formed. As the layer including the semiconductor film formed over the glass substrate, a layer whose total stress after heating is ?500 N/m to +50 N/m, inclusive is formed.

Abstract: A method for manufacturing a single crystal nano-structure includes providing a device layer with a 100 structure on a substrate; providing a stress layer onto the device layer; patterning the stress layer along the 110 direction of the device layer; selectively removing parts of the stress layer to obtain exposed parts of the device layer; plane dependent etching of the exposed parts of the device layer to obtain an exposed 111 faces of the device layer; thermally oxidizing the exposed 111 face of the device layer and forming a lateral oxidation layer at an interface of the device layer and the stress layer; providing a mask layer onto the oxidized exposed 111 face of the device layer; removing remaining parts of the stress layer to obtain further exposed parts of the device layer; removing the mask layer; plane dependent etching of the further exposed parts of the device layer to form a single crystal nano-structure with a triangular shaped cross section, until a side of the triangular shaped cross section

Abstract: A semiconductor structure may include a polycrystalline substrate comprising a metal, the polycrystalline substrate having substantially randomly oriented grains, as well as a buffer layer disposed thereover. The buffer layer may comprise a plurality of islands having an average island spacing therebetween. A polycrystalline semiconductor layer is disposed over the buffer layer.

Abstract: A method for fabricating a semiconductor device according to the present invention includes the steps of: (a) providing a substrate (11a) in a chamber (26); (b) supplying a microwave into the chamber (26) through a dielectric plate (24), of which one surface that faces the chamber is made of alumina, thereby depositing a microcrystalline silicon film (14) with an aluminum concentration of 1.0×1016 atoms/cm3 or less on the substrate (11a) by high-density plasma CVD process; and (c) making a thin-film transistor that uses the microcrystalline silicon film as its active layer. As a result, a semiconductor device including a TFT that uses a microcrystalline silicon film with a mobility of more than 0.5 cm2/Vs as its active layer is obtained.

Abstract: Embodiments of the present invention generally relate to methods of forming epitaxial layers and devices having epitaxial layers. The methods generally include forming a first epitaxial layer including phosphorus and carbon on a substrate, and then forming a second epitaxial layer including phosphorus and carbon on the first epitaxial layer. The second epitaxial layer has a lower phosphorus concentration than the first epitaxial layer, which allows for selective etching of the second epitaxial layer and undesired amorphous silicon or polysilicon deposited during the depositions. The substrate is then exposed to an etchant to remove the second epitaxial layer and undesired amorphous silicon or polysilicon. The carbon present in the first and second epitaxial layers reduces phosphorus diffusion, which allows for higher phosphorus doping concentrations. The increased phosphorus concentrations reduce the resistivity of the final device.

Abstract: An embodiment of the present invention is a microcrystalline semiconductor film having a thickness of more than or equal to 70 nm and less than or equal to 100 nm and including a crystal grain partly projecting from a surface of the microcrystalline semiconductor film. The crystal grain has an orientation plane and includes a crystallite having a size of 13 nm or more. Further, the film density of the microcrystalline semiconductor film is higher than or equal to 2.25 g/cm3 and lower than or equal to 2.35 g/cm3, preferably higher than or equal to 2.30 g/cm and lower than or equal to 2.33 g/cm3.

Abstract: Disclosed are a method of fabricating a silicon quantum dot layer and a device manufactured using the same. A first capping layer is formed on a substrate, and a silicon-containing precursor layer is formed on the first capping layer. A second capping layer is formed on the silicon-containing precursor layer. The first capping layer, the silicon-containing precursor layer, and the second capping layer are irradiated to convert the silicon-containing precursor layer into a stack including a first poly-crystalline silicon layer, a silicon quantum dot layer on the first poly-crystalline silicon layer, and a second poly-crystalline silicon layer on the silicon quantum dot layer.

Abstract: A method for preparing a polysilicon rod using a metallic core means, including: installing a core means in an inner space of a deposition reactor used for preparing a silicon rod, the core means being constituted by forming at least one separation layer on the surface of a metallic core element and being connected to an electrode means, heating the core means by supplying electricity through the electrode means, and supplying a reaction gas into the inner space for silicon deposition, thereby forming a deposition output in an outward direction on the surface of the core means. The deposition output and the core means can be separated easily from the silicon rod output obtained by the process of silicon deposition, and the contamination of the deposition output caused by impurities of the metallic core element can be minimized, thereby a high-purity silicon can be prepared more economically and conveniently.

Abstract: Methods for forming and treating a silicon containing layer in a thin film transistor structure or solar cell devices are provided. In one embodiment, a method for forming a silicon containing layer on a substrate includes providing a substrate into a processing chamber, providing a gas mixture having a silicon containing gas into the processing chamber, providing a hydrogen containing gas from a remote plasma source coupled to the processing chamber, applying a RF power less than 17.5 mWatt/cm2 to the processing chamber, and forming a silicon containing layer on the substrate.

Abstract: According to the present invention, an AlN crystal film seed layer having high crystallinity is combined with selective/lateral growth, whereby a Group III nitride semiconductor multilayer structure more enhanced in crystallinity can be obtained. The Group III nitride semiconductor multilayer structure of the present invention is a Group III nitride semiconductor multilayer structure where an AlN crystal film having a crystal grain boundary interval of 200 nm or more is formed as a seed layer on a C-plane sapphire substrate surface by a sputtering method and an underlying layer, an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer, each composed of a Group III nitride semiconductor, are further stacked, wherein regions in which the seed layer is present and is absent are formed on the C-plane sapphire substrate surface and/or regions capable of epitaxial growth and incapable of epitaxial growth are formed in the underlying layer.

Abstract: Methods for selectively depositing an epitaxial layer are provided herein. In some embodiments, providing a substrate having a monocrystalline first surface and a non-monocrystalline second surface; exposing the substrate to a deposition gas to deposit a layer on the first and second surfaces, the layer comprising a first portion deposited on the first surfaces and a second portion deposited on the second surfaces; and exposing the substrate to an etching gas comprising a first gas comprising hydrogen and a halogen and a second gas comprising at least one of a Group III, IV, or V element to selectively etch the first portion of the layer at a slower rate than the second portion of the layer. In some embodiments, the etching gas comprises hydrogen chloride (HCl) and germane (GeH4).

Abstract: A semiconductor device having a non-volatile memory and a method of manufacturing the same are provided. The semiconductor device includes a base material and a stack structure. The stack structure disposed on the base material at least includes a tunneling layer, a trapping layer and a dielectric layer. The trapping layer is disposed on the tunneling layer. The dielectric layer has a dielectric constant and is disposed on the trapping layer. The dielectric layer is transformed from a first solid state to a second solid state when the dielectric layer undergoes a process.

Abstract: A method of manufacturing a semiconductor device includes forming a gate electrode on a semiconductor substrate and a sidewall spacer on the gate electrode. Then, a portion of the semiconductor substrate at both sides of the sidewall spacer is partially etched to form a trench. A SiGe mixed crystal layer is formed in the trench. A silicon layer is formed on the SiGe mixed crystal layer. A portion of the silicon layer is partially etched using an etching solution having different etching rates in accordance with a crystal direction of a face of the silicon layer to form a capping layer including a silicon facet having an (111) inclined face.

Abstract: Provided is a technique for manufacturing a photoelectric conversion element using a dense crystalline semiconductor film without a cavity between crystal grains.

Abstract: Disclosed are methods and materials useful in the preparation of semiconductor devices. In particular embodiments, disclosed are methods for engineering polycrystalline aluminum nitride substrates that are thermally matched to further materials that can be combined therewith. For example, the polycrystalline aluminum nitride substrates can be engineered to have a coefficient of thermal expansion (CTE) that is closely matched to the CTE of a semiconductor material and/or to a material that can be used as a growth substrate for a semiconductor material. The invention also encompasses devices incorporating such thermally engineered substrates and semiconductor materials grown using such thermally engineered substrates. The thermally engineered substrates are advantageous for overcoming problems caused by damage arising from CTE mismatch between component layers in semiconductor preparation methods and materials.

Abstract: Smooth silicon and silicon germanium films are deposited by plasma enhanced chemical vapor deposition (PECVD). The films are characterized by roughness (Ra) of less than about 4 ?. In some embodiments, smooth silicon films are undoped and doped polycrystalline silicon films. The dopants can include boron, phosphorus, and arsenic. In some embodiments the smooth polycrystalline silicon films are also highly conductive. For example, boron-doped polycrystalline silicon films having resistivity of less than about 0.015 Ohm cm and Ra of less than about 4 ? can be deposited by PECVD. In some embodiments smooth silicon films are incorporated into stacks of alternating layers of doped and undoped polysilicon, or into stacks of alternating layers of silicon oxide and doped polysilicon employed in memory devices. Smooth films can be deposited using a process gas having a low concentration of silicon-containing precursor and/or a process gas comprising a silicon-containing precursor and H2.

Abstract: Disclosed are methods for manufacturing semiconductor devices and the devices thus obtained. In one embodiment, the method comprises obtaining a semiconductor substrate comprising a germanium region doped with n-type dopants at a first doping level and forming an interfacial silicon layer overlying the germanium region, where the interfacial silicon layer is doped with n-type dopants at a second doping level and has a thickness higher than a critical thickness of silicon on germanium, such that the interfacial layer is at least partially relaxed. The method further includes forming over the interfacial silicon layer a layer of material having an electrical resistivity smaller than 1×10?2 ?cm, thereby forming an electrical contact between the germanium region and the layer of material, wherein the electrical contact has a specific contact resistivity below 10?4 ?cm2.

Abstract: An organometal material gas is supplied into a low electron temperature and high density plasma excited by microwaves to form a thin film of a compound on a substrate as a film forming object. In this case, the temperature of a supply system for the organometal material gas is controlled by taking advantage of the relationship between the vapor pressure and temperature of the organometal material gas.

Abstract: Purified SiHCl3 and/or SiCl4 are used as a sweep gas across a permeate side of a gas separation membrane receiving effluent gas from a polysilicon reactor. The combined sweep gas and permeate is recycled to the reactor.