Repair Or Restoration Patents (Class 438/4)
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Patent number: 7829895Abstract: The pixel structure and the repairing method of the TFT array substrate are provided. The pixel has a semiconductor electrode which is partially overlapped with a floating metal located in the first conductive layer. Both the data line and the drain electrode have protruded regions partially overlapped with the semiconductor electrode and the floating metal. Once the pixel is found to be a white defect, a laser beam is used to irradiate the protruded region of the data line to electrically connect the data line and the floating metal and so as to form a diode structure having the rectified effect. Consequently, after the laser repair, the pixel defect will display as the non-flicked white point and black point in the white-picture inspection and the black-picture inspection respectively.Type: GrantFiled: August 28, 2007Date of Patent: November 9, 2010Assignee: Chunghwa Picture Tubes, Ltd.Inventor: Yuan-Hsin Tsou
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Patent number: 7824929Abstract: An object of the present invention is to remove micro-scratches on a surface of a GaN substrate cut from a GaN ingot. The invention is directed to establish a method for surface treatment of a GaN substrate, including heating the surface in an atmosphere containing trimethylgallium, ammonia, and hydrogen. It is preferable that the trimethylgallium feeding rate is 150 ?mol/min or higher, the ratio of trimethylgallium feeding rate to ammonia feeding rate (V/III ratio) is 1,200 to 4,000, and the heating temperature is 1,000° C. to 1,250° C. In addition, the temperature of the surface treatment is set to be higher than that of the following GaN growth, and the feed rate of trimethylgallium is lower than that of the growth procedure. RMS of roughness on the substrate was equal to or less than 1.3 nm, and the substrate whose step condition is excellent can be obtained.Type: GrantFiled: October 21, 2008Date of Patent: November 2, 2010Assignee: Toyoda Gosei Co., Ltd.Inventors: Masato Aoki, Miki Moriyama
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Publication number: 20100273276Abstract: A liquid crystal display device and its fabrication method may prevent occurrence of light leakage generated from the sides of a data line. A dummy pattern at sides of the data line with glass powder as an insulation film may simplify the repairing process. A method for fabricating a liquid crystal display device includes a gate electrode, a gate line, a dummy pattern and a first insulation film that are formed on a substrate. A switching element is formed on a portion of the gate electrode and includes a source electrode, a drain electrode and an active layer. A data line formed at a portion of the dummy pattern. A second insulation film is formed on the substrate and has a first contact hole that exposes a portion of the drain electrode. A pixel electrode is formed on the substrate and is electrically connected with the drain electrode through the first contact hole.Type: ApplicationFiled: July 7, 2010Publication date: October 28, 2010Applicant: LG Display Co., Ltd.Inventors: Kyoung Mook Lee, Jae Young Oh, Kye Chan Song
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Patent number: 7816717Abstract: A semiconductor memory device, comprising: a semiconductor substrate; a memory cell section comprising a memory transistor provided on the semiconductor substrate, the memory transistor including a first gate electrode provided on the semiconductor substrate with a gate insulating film interposed therebetween, and a source and drain provided at both sides of the first gate electrode on the semiconductor substrate, and a ferroelectric capacitor provided above the memory transistor, the ferroelectric capacitor including a first electrode film connected to any one of a source and drain of the memory transistor, a second electrode film connected to the other one of the drain and source of the memory transistor, and a ferroelectric film provided between the first electrode film and the second electrode film, the memory cell section having the memory transistor and the ferroelectric capacitor connected in parallel to each other; and a select transistor section, comprising a select transistor provided at an end of tType: GrantFiled: January 25, 2008Date of Patent: October 19, 2010Assignee: Kabushiki Kaisha ToshibaInventor: Tohru Ozaki
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Patent number: 7816190Abstract: An E-ink display and method for repairing the same is provided. The method is for repairing a thin film transistor array substrate of the E-ink display. The thin film transistor array substrate having a plurality of pixel units is provided initially. Each of the pixel unit includes a thin film transistor and a pixel electrode. The thin film transistor has a gate electrode, a source electrode and a drain electrode. The gate electrode, the source electrode and the drain electrode are connected electrically to a scan line, a data line and the pixel electrode respectively. A portion of the pixel electrode is located above the data line. Next, a repairing portion is formed at the space between the data line and the pixel electrode. The repairing portion is utilized to electrically connect the pixel electrode and the data line.Type: GrantFiled: February 23, 2007Date of Patent: October 19, 2010Assignee: Prime View International Co. Ltd.Inventors: Yu-Chen Hsu, Chi-Ming Wu
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Patent number: 7807219Abstract: A process of repairing a plasma etched low-k dielectric material having surface-bound silanol groups includes exposing at least one surface of the dielectric material to (a) a catalyst so as to form hydrogen bonds between the catalyst and the surface-bound silanol groups obtaining a catalytic intermediary that reacts with the silane capping agent so as to form surface-bound silane compounds, or (b) a solution comprising a supercritical solvent, a catalyst, and a silane capping agent so as to form hydrogen bonds between a catalyst and the surface-bound silanol groups obtaining a catalytic intermediary that reacts with the silane capping agent so as to form surface-bound silane compounds. Horizontal networks can be formed between adjacent surface-bound silane compounds.Type: GrantFiled: June 27, 2006Date of Patent: October 5, 2010Assignee: Lam Research CorporationInventor: James DeYoung
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Publication number: 20100240153Abstract: The present invention is directed to permitting a wiring material to be reused in a repair work so as to achieve productivity improvement and cost reduction.Type: ApplicationFiled: March 22, 2010Publication date: September 23, 2010Applicant: SANYO Electric Co., Ltd.Inventor: Tomonori Tabe
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Publication number: 20100236035Abstract: A system and method for detecting a defect in a solar cell and repairing and characterizing a solar cell includes applying a test signal to the solar cell, monitoring the response of solar cell, detecting a defect associated with its location during the monitoring step, removing or isolating the defect from a solar cell and characterizing solar cell performance. The defect may be a short between the emitter and the base of solar cell. The system and method also detect a precise location of the defect based on the use of light valve panel (LVP), which can control the input beam to or output beam from the solar cell in terms of size, position, gray level, and wavelength of the transmitted light. The LVP may be realized in any one of a variety of ways. For example, the active matrix liquid crystal display (AMLCD) such as Thin Film Transistor driven LCD (TFT-LCD) may be used as the LVP.Type: ApplicationFiled: March 19, 2009Publication date: September 23, 2010Inventor: Kyo Young Chung
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Publication number: 20100233829Abstract: Disclosed herein are mono-functional silylating compounds that may exhibit enhanced silylating capabilities. Also disclosed are method of synthesizing and using these compounds. Finally methods to determine effective silylation are also disclosed.Type: ApplicationFiled: March 10, 2010Publication date: September 16, 2010Applicant: American Air Liquide Inc.Inventors: James J.F. McANDREW, Curtis Anderson, Christian Dussarrat
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Publication number: 20100230807Abstract: A method of repairing a nonvolatile semiconductor memory device to eliminate defects includes monitoring a memory endurance indicator for a nonvolatile semiconductor memory device contained in a semiconductor package. It is determined whether that the memory endurance indicator exceeds a predefined limit. Finally, in response to determining that the memory endurance indicator exceeds the predefined limit, the device is annealed.Type: ApplicationFiled: September 4, 2008Publication date: September 16, 2010Inventors: Gary B. Bronner, Ming Li, Donald R. Mullen, Frederick Ware, Kevin S. Donnelly
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Patent number: 7790477Abstract: Contaminants from surfaces of temperature sensitive substrates, such as glass substrates are removed by exposing the surfaces to a hydrogen Surface-mixed diffusion flame for a predetermined duration of time. The predetermined duration of time being insufficient to heat up the surfaces substantially thereby causing damage to the temperature sensitive substrates.Type: GrantFiled: February 6, 2009Date of Patent: September 7, 2010Assignee: Agency For Science, Technology And ResearchInventors: David Tee Liang, Tuti Mariana Lim, Sau Ngen Chen
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Patent number: 7781232Abstract: Methods and reworked intermediate and resultant electronic modules made thereby, whereby a component in need of rework is located and removed from the module to reveal encapsulated solder connections residing within an underfill matrix. Heights of both the solder connections and underfill matrix are reduced, followed by etching the solder out of the solder connections to form openings within the underfill matrix. The underfill material is then removed to expose metallurgy of the substrate. A blank having a release layer with an array of solder connections is aligned with the exposed metallurgy, and this solder array is transferred from the blank onto the metallurgy. The transferred solder connections are then flattened using heat and pressure, followed by attaching solder connections of a new component to the flattened solder connections and underfilling these reworked solder connections residing between the new chip and substrate.Type: GrantFiled: January 17, 2008Date of Patent: August 24, 2010Assignee: International Business Machines CorporationInventors: Charles L. Arvin, Benjamin V. Fasano, Mario J. Interrante, Glenn A. Pomerantz
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Method and apparatus for reducing the effect of shunting defects on thin film solar cell performance
Publication number: 20100210040Abstract: The present invention provides methods of manufacturing a high efficiency solar cell. In one embodiment, in a solar cell having a grid pattern that channels current, a defect causes an undesired current flow is removed by mechanically removing a portion of the grid pattern, thereby passivating the defect by removing a segment of the solar cell adjacent the defect. The segment also includes the front and back portions of the solar cell at the location of the defect without including the defect.Type: ApplicationFiled: February 22, 2010Publication date: August 19, 2010Applicant: SOLOPOWER, INC.Inventor: Bulent M. Basol -
Publication number: 20100207106Abstract: A structure is disclosed for repairing a defective pixel of an organic light emitting display device of which a defect pixel is repaired. An organic light emitting diode includes a first electrode, a light emitting layer formed on a light emitting region of the first electrode, and a second electrode formed on the light emitting layer. The first electrode and the second electrode are conductively coupled to each other for preventing the organic light emitting diode from emitting light, for example, by irradiating a laser on a portion of the second electrode to cause a short-circuit between the first electrode and the second electrode.Type: ApplicationFiled: December 11, 2009Publication date: August 19, 2010Inventors: Zail Lhee, Sang-Mok Hong, Sun-Youl Lee
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Patent number: 7776624Abstract: A semiconductor fabrication method. The method includes providing a semiconductor substrate, wherein the semiconductor substrate includes a semiconductor material. Next, a top portion of the semiconductor substrate is removed. Next, a first semiconductor layer is epitaxially grown on the semiconductor substrate, wherein a first atomic percent of a first semiconductor material in the first semiconductor layer is equal to a substrate atomic percent of the substrate semiconductor material in the semiconductor substrate.Type: GrantFiled: July 8, 2008Date of Patent: August 17, 2010Assignee: International Business Machines CorporationInventors: Ashima B. Chakravarti, Judson Robert Holt, Jeremy John Kempisty, Suk Hoon Ku, Woo-Hyeong Lee, Amlan Majumdar, Ryan Matthew Mitchell, Renee Tong Mo, Zhibin Ren, Dinkar Singh
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Publication number: 20100201658Abstract: A method of manufacturing a display device is provided, in which interlayer short formed in a capacitor in a wiring board or in an intersection between wiring lines may be repaired, and a display device is provided. A method of manufacturing a display device comprising steps of: forming a wiring board having a lower conductive film, an insulating film and an upper conductive film in order on a substrate; repairing interlayer short being short between the upper conductive film and the lower conductive film; and forming display elements on the wiring board. Laser light having a pulse width of 10 picoseconds or less is irradiated to a short-included region including the interlayer short in the step of repairing the interlayer short in order to remove at least the upper conductive film between the lower conductive film, the insulating film and the upper conductive film within the short-included region.Type: ApplicationFiled: February 3, 2010Publication date: August 12, 2010Applicant: SONY CORPORATIONInventors: Ryo Koshiishi, Manabu Kodate
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Publication number: 20100193007Abstract: This invention discloses a thin film solar cell module and method for repairing the same. The method for repairing the thin film solar cell module comprises the steps of: inspecting a plurality of unit cells so as to determine the abnormal unit cell(s) according to a loss of power generation efficiency; inspecting the abnormal unit cell(s) so as to determine a suitable separation groove; and filling-in the suitable outside separation groove so that the abnormal unit cell is electrically short connected with an adjacent unit cell of the abnormal unit cell.Type: ApplicationFiled: February 3, 2010Publication date: August 5, 2010Inventors: Chun-Hsiung LU, Chien-Chung Bi
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Publication number: 20100190272Abstract: A rework method of a metal hard mask layer is provided. First, a material layer is provided. A dielectric layer, a first metal hard mask layer, and a patterned first dielectric hard mask layer have been sequentially formed on the material layer. There is a defect on a region of the first metal hard mask layer, and therefore the region of the first metal hard mask layer is not able to be patterned. After that, the patterned first dielectric hard mask layer and the first metal hard mask layer are removed. A planarization process is then performed on the dielectric layer. Next, a second metal hard mask layer and a second dielectric hard mask layer are sequentially formed on the dielectric layer.Type: ApplicationFiled: January 23, 2009Publication date: July 29, 2010Applicant: UNITED MICROELECTRONICS CORP.Inventors: Yu Zhang, Bin Zhao, Kah-Lun Toh, Shi-Jie Bai
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Publication number: 20100178716Abstract: The present inventions relate to methods and apparatus for detecting and mechanically removing defects and a surrounding portion of the photovoltaic layer and the substrate in a thin film solar cell such as a Group IBIIIAVIA compound thin film solar cell to improve its efficiency.Type: ApplicationFiled: February 9, 2010Publication date: July 15, 2010Applicant: SOLOPOWER, INC.Inventors: Geordie Zapalac, David Soltz, Bulent M. Basol
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Publication number: 20100173431Abstract: Provided is a wafer reclamation method for reclaiming a semiconductor wafer, on which a different material layer is formed, by removing the different material layer. The wafer reclamation method includes a physically removing step of physically removing the different material layer, a film forming step of forming a film on a surface of the semiconductor wafer from which the different material layer has been removed in the physically removing step, and a dry etching step of etching the semiconductor wafer by plasma together with the film formed in the film forming step.Type: ApplicationFiled: August 25, 2008Publication date: July 8, 2010Applicant: PANASONIC CORPORATIONInventors: Shogo Okita, Gaku Sugahara, Hiroyuki Suzuki, Ryuzou Houchin, Mitsuru Hiroshima
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Patent number: 7749778Abstract: A method of monitoring and testing electro-migration and time dependent dielectric breakdown includes forming an addressable wiring test array, which includes a plurality or horizontally disposed metal wiring and a plurality of segmented, vertically disposed probing wiring, performing a single row continuity/resistance check to determine which row of said metal wiring is open, performing a full serpentine continuity/resistance check, and determining a position of short defects.Type: GrantFiled: January 3, 2007Date of Patent: July 6, 2010Assignee: International Business Machines CorporationInventors: Kaushik Chanda, Lawrence Clevenger, Timothy J. Dalton, Louis L. C. Hsu, Chih-Chao Yang
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Publication number: 20100163881Abstract: An array substrate for an electrophoresis type display device includes a plurality of gate lines on a substrate; a gate insulating layer on the plurality of gate lines; a plurality of data lines on the gate insulating layer and crossing the plurality of gate lines to define a plurality of pixel regions; a thin film transistor corresponding to each pixel region, the thin film transistor including a gate electrode, a semiconductor layer, and source and drain electrodes; a first passivation layer on the plurality of data lines; a second passivation layer on the first passivation layer, wherein the second passivation layer includes a first hole over the data line, and/or a second hole over the gate line with at least the gate insulating layer therebetween; and a pixel electrode on the second passivation layer and connected to the drain electrode, wherein a portion of the pixel electrode covers the first hole, and another portion of the pixel electrode covers the second hole.Type: ApplicationFiled: December 9, 2009Publication date: July 1, 2010Inventors: Seung-Chul KANG, Sung-Jin PARK
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Publication number: 20100163880Abstract: A thin film transistor array panel comprises a repair line disposed in a peripheral area of a display area and being configured to repair when at least one of a gate line and a data line are disconnected, and a detour line disposed in the peripheral area and comprising at least one resistor having higher resistance than a remaining portion of the detour line, wherein both ends of the detour line are connected to the repair line to protect the array panel.Type: ApplicationFiled: November 4, 2009Publication date: July 1, 2010Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: Sang-Jin JEON
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Patent number: 7745234Abstract: A method of forming a semiconductor card. A semiconductor package having a damaged controller die is reclaimed. The reclaim process includes severing the electrical connections between the controller die and the semiconductor package substrate without exposing the passive component. In one embodiment, the cutting tool comprises a saw blade. An electrically insulating material is deposited over the exposed bond wires to complete the reclaim process. The reclaimed package and a new controller die are affixed to a second substrate to electrically couple the memory die of the reclaimed package with the new controller die—forming a new package. The new package is encapsulated to form a new memory card.Type: GrantFiled: June 30, 2008Date of Patent: June 29, 2010Assignee: SanDisk CorporationInventors: King Hoo Ong, Robertito Piaduche, Ning Ye, Hem Takiar
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Publication number: 20100155734Abstract: Provided is an electrophoretic display device and a method of manufacturing and repairing the electrophoretic display device.Type: ApplicationFiled: December 17, 2009Publication date: June 24, 2010Inventors: Jae Gu Lee, Seung Chul Kang
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Patent number: 7736915Abstract: A method for neutralizing trapped charges in a buried oxide layer. The method includes providing a semiconductor structure which includes (a) a semiconductor layer, (b) a charge accumulation layer on top of the semiconductor layer, and (c) a doped region in direct physical contact with the semiconductor layer, wherein the charge accumulation layer comprises trapped charges of a first sign, and wherein the doped region and the semiconductor layer form a P-N junction diode. Next, free charges are generated in the P-N junction diode, wherein the free charges are of a second sign opposite to the first sign. Next, the free charges are accelerated towards the charge accumulation layer, resulting in some of the free charges entering the charge accumulation layer and neutralizing some of the trapped charges in the charge accumulation layer.Type: GrantFiled: February 21, 2006Date of Patent: June 15, 2010Assignee: International Business Machines CorporationInventors: John M. Aitken, Ethan Harrison Cannon, Alvin Wayne Strong
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Patent number: 7732224Abstract: A method of forming a metal line pattern for a semiconductor device is provided. The method includes forming a preliminary structure on a semiconductor substrate, having a lower barrier metal layer, a metal layer, and an upper barrier and/or passivation layer having a first thickness; removing a top surface of the passivation layer so that the passivation layer has a second thickness; forming a sub-passivation layer on the passivation layer; forming an adhesion promoter and a photoresist pattern on the sub-passivation layer; and forming a metal line pattern by etching the preliminary structure using the photoresist pattern as an etching mask.Type: GrantFiled: November 8, 2007Date of Patent: June 8, 2010Assignee: Dongbu HiTek Co., Ltd.Inventor: In Cheol Baek
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Patent number: 7727779Abstract: A method of repairing a light emitting device which makes high quality image display possible even if a pin hole is formed during formation of an EL layer is provided. The method of repairing a light emitting device is characterized in that a reverse bias voltage is applied to an EL element at given time intervals to thereby reduce a current flowing into an EL element when the reverse bias voltage is applied to the EL element.Type: GrantFiled: April 13, 2006Date of Patent: June 1, 2010Assignee: Semiconductor Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai, Mai Osada
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Patent number: 7723764Abstract: A method of repairing a defective one of devices mounted on substrate is provided. Devices are arrayed on a substrate and electrically connected to wiring lines connected to a drive circuit, to be thus mounted on the substrate. The devices mounted on the substrate are then subjected to an emission test. If a defective device is detected in this test, a repair device is mounted at a position corresponding to a position of the defective device. At this time, after wiring lines connected to the defective device are cut off, the repair device is electrically connected to portions of the wiring lines, the portions of the wiring lines being located at positions nearer to the drive circuit side than the cut-off positions of the wiring lines.Type: GrantFiled: May 25, 2006Date of Patent: May 25, 2010Assignee: Sony CorporationInventors: Toyoharu Oohata, Toshiaki Iwafuchi, Hisashi Ohba
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Patent number: 7705267Abstract: Systems and methods for removing material from a packaged electronic device of the type encapsulated with a protective material that forms an outer surface of the device. An exemplary system includes a stage for placing the device in a first position for receiving laser radiation to remove the material by ablation, and for placing the device in a second position for viewing one or more features along the outer surface of the device. An optical system is configured to provide an exterior image, including one or more features along an exposed surface of the device, while the device remains in the second position. A viewing system displays a captured image of the device, including one or more features interior to the protective surface, overlayed with the exterior image for simultaneous viewing of both images so that a position of a first feature present in the captured image can be viewed in relation to a position of a second feature in the exterior image.Type: GrantFiled: June 30, 2006Date of Patent: April 27, 2010Inventor: Jon Heyl
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Publication number: 20100099204Abstract: A thin film transistor array comprising a substrate, a plurality of scan lines, a plurality of data lines, a plurality of thin film transistors, a plurality of common lines, a plurality of top electrodes, a plurality of connection lines and a plurality of pixel electrodes is provided. Wherein, each thin film transistor is disposed in one of the pixel areas and driven through the corresponding scan line and data line. Each thin film transistor includes a gate, a source and a drain. The drain of the thin film transistor is electrically connected to the corresponding top electrode by the corresponding connection line. Besides, the drain of the thin film transistor is electrically connected to the pixel electrode, and a portion of the connection line is not covered by the pixel electrode.Type: ApplicationFiled: December 27, 2009Publication date: April 22, 2010Applicant: AU OPTRONICS CORPORATIONInventor: Han-Chung Lai
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Publication number: 20100090207Abstract: An electroluminescent organic semiconductor element includes a substrate and a first electrode arranged on the substrate. The semiconductor element additionally contains a second electrode and at least one organic layer, which is arranged between the first electrode and the second electrode. The organic layer is a layer that generates light by recombination of charge carriers. At least one of the first and the second electrode contains a highly conductive organic sublayer.Type: ApplicationFiled: February 1, 2008Publication date: April 15, 2010Inventors: Markus Klein, Tilman Schlenker
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Patent number: 7695982Abstract: A wafer comprising a low-k dielectric layer is refurbished for reuse. Initially, a removable layer is provided on the wafer. The low-k dielectric layer is formed over the removable layer. The overlying low-k dielectric layer is removed from the wafer by etching away the removable layer by at least partially immersing the wafer in an etching solution. Thereafter, another low-k dielectric layer can be formed over another removable layer.Type: GrantFiled: April 19, 2007Date of Patent: April 13, 2010Assignee: Applied Matreials, Inc.Inventors: Hong Wang, Krishna Vepa, Paul V. Miller
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Patent number: 7689377Abstract: An improved compensation circuit that compensates for lifetime performance drifts due to aging of integrated circuits to improve the circuit performance. In one example embodiment, this is achieved by applying a body bias voltage VBB to the integrated circuit to compensate for the lifetime performance drift due to hot carrier and NBTI induced aging.Type: GrantFiled: November 22, 2006Date of Patent: March 30, 2010Assignee: Texas Instruments IncorporatedInventors: Palkesh Jain, Hugh Thomas Mair
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Patent number: 7678712Abstract: The invention concerns a method for applying a surface modification agent composition for organosilicate glass dielectric films. More particularly, the invention pertains to a method for treating a silicate or organosilicate dielectric film on a substrate, which film either comprises silanol moieties or has had at least some previously present carbon containing moieties removed therefrom. The treatment adds carbon containing moieties to the film and/or seals surface pores of the film, when the film is porous.Type: GrantFiled: March 22, 2005Date of Patent: March 16, 2010Assignee: Honeywell International, Inc.Inventors: Anil S. Bhanap, Robert R. Roth, Kikue S. Burnham, Brian J. Daniels, Denis H. Endisch, Ilan Golecki
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Patent number: 7670856Abstract: A method of making a nitride semiconductor substrate having the steps of providing a free-standing substrate that is of a nitride semiconductor and has one of a penetrating pit and a penetrating crack that penetrate from a top surface to a back surface of the free-standing substrate, attaching a metal to the penetrating pit or the penetrating crack, the metal being adapted to be nitrided, and nitriding the metal to form a nitride that seals the penetrating pit or the penetrating crack. A nitride semiconductor substrate has a free-standing substrate that is formed of a nitride semiconductor and has one of a penetrating pit and a penetrating crack that penetrate from a top surface to a back surface of the free-standing substrate, and a metal nitride that seals the penetrating pit or the penetrating crack. The metal nitride is formed of GaN, InN and AlN.Type: GrantFiled: October 25, 2007Date of Patent: March 2, 2010Assignee: Hitachi Cable, Ltd.Inventors: Takayuki Suzuki, Takeshi Meguro
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Publication number: 20100044691Abstract: Aspects of the present invention relate to an organic light emitting diode (OLED) display and a manufacturing method thereof. The OLED display includes: a substrate; pixel electrodes disposed on the substrate; a pixel defining layer disposed on the substrate, having a plurality of openings that expose the pixel electrodes; an organic emission layer formed on the pixel electrodes; and a common electrode formed on the organic emission layer and the pixel defining layer. An electrode cut is formed in the common electrode, around one of the openings of the pixel defining layer, to electrically isolate a portion of the common electrode.Type: ApplicationFiled: August 14, 2009Publication date: February 25, 2010Applicant: Samsung Mobile Display Co., Ltd.Inventors: Sang-Mok Hong, Zail Lhee, Kaun-Soo Lee
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Patent number: 7666689Abstract: A method holds wafers that contain patterned structures using a particle blasting tool. Next, the method directs particles at the patterned structures, such that the particles contact the patterned structures with a predetermined velocity and remove the patterned structures. This process of directing the particles at the wafer is controlled to stop directing the particles when substantially all of the patterned structures are removed from the wafer. This process also comprises selecting the particles to have a size equal to or less than 3 microns. For example, the particles can comprise aluminum oxide, silicon oxide, cerium, and/or a plastic. By maintaining the particle size equal to 3 microns or less, the blasting produces a substantially smooth wafer surface, thereby omitting the need for subsequent wafer polishing. Further, the wafers produced by such processing do not exhibit the highly stress lattice and fragile nature of wafers processed by wet processing.Type: GrantFiled: December 12, 2006Date of Patent: February 23, 2010Assignee: International Business Machines CorporationInventors: Steven R. Codding, David Domina, James L. Hardy, Timothy Krywanczyk
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System, apparatus and method of selective laser repair for metal bumps of semiconductor device stack
Patent number: 7666690Abstract: Exemplary embodiments of the selective laser repair apparatus and method may allow the repair of metal bumps in a semiconductor device stack by applying a laser beam to a damaged and/or defective bump. Metal bumps may be repaired and individual chips and/or packages forming a device stack need not be separated. The operation of a control unit and a driving unit may position a laser unit such that a laser beam may be irradiated at the damaged and/or defective metal bump. An X-ray inspection unit may obtain information about the damaged and/or defective metal bump.Type: GrantFiled: August 13, 2008Date of Patent: February 23, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Kang-Wook Lee, Se-Young Jeong -
Patent number: 7662645Abstract: Reworking method for removing defects on integrated circuit device is disclosed. An integrated circuit is provided, which has a substrate, a conductive material layer formed in the substrate, a dielectric layer formed on the substrate, at least a contact plug embedded in the dielectric layer, and a conductive layer contacting to the contact plug formed on the dielectric layer. A defect is found in the conductive layer and the reworking method is performed, including an etch back process, a chemical mechanical polishing process, and a deposition process. The reworking method removes the prior formed conductive layer and reform a conductive layer to prevent the integrated circuit from being scraped.Type: GrantFiled: September 6, 2007Date of Patent: February 16, 2010Assignee: United Microelectronics Corp.Inventor: Hui-Shen Shih
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Patent number: 7659206Abstract: A method of treating a substrate comprises depositing silicon oxycarbide on the substrate and removing the silicon oxycarbide from the substrate. The silicon oxycarbide on the substrate is decarbonized by exposure to an energized oxygen-containing gas that heats the substrate and converts the layer of silicon oxycarbide into a layer of silicon oxide. The silicon oxide is removed by exposure to a plasma of fluorine-containing process gas. Alternatively, the remaining silicon oxide can be removed by a fluorine-containing acidic bath. In yet another version, a plasma of a fluorine-containing gas and an oxygen-containing gas is energized to remove the silicon oxycarbide from the substrate.Type: GrantFiled: February 21, 2006Date of Patent: February 9, 2010Assignee: Applied Materials, Inc.Inventors: Krishna Vepa, Yashraj Bhatnagar, Ronald Rayandayan, Venkata Balagani
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Publication number: 20100029018Abstract: The present invention relates to a method for repairing a semiconductor device. The method includes cutting a fuse without creation of residue by transforming the fuse into a nonconductor of high resistance by oxidizing the fuse by irradiating the fuse with an oxygen ion beam instead of a laser in a blowing process. The method includes transforming a fuse corresponding to a defective cell among a plurality of fuses formed in an upper portion of a semiconductor substrate into an oxide film.Type: ApplicationFiled: December 30, 2008Publication date: February 4, 2010Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Chi Hwan Jang
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Publication number: 20100029019Abstract: Disclosed is a system and a method for detecting and repairing alien materials on a semiconductor wafer. The system includes a transfer arm for transferring and aligning a wafer, an inspection unit, on which the wafer is seated, and which obtains an image of the wafer surface, an analysis module for analyzing the alien material appearing in the image obtained by the inspection unit, and a repair unit for repairing the alien material according to information regarding the analyzed alien material. The simple construction of the system and method for detecting and repairing alien materials on a wafer reduces the manufacturing cost, avoids the loss of manufacturing cost, and increases the semiconductor chip yield ratio.Type: ApplicationFiled: August 26, 2009Publication date: February 4, 2010Applicant: SNU PRECISION CO. LTD.Inventors: Heui Jae PARK, Heung Hyun SHIN, Il Hwan LEE
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Publication number: 20100026923Abstract: A repairable pixel structure includes a substrate, at least a data line, at least a gate line, a transparent pixel electrode, a TFT, and a transparent pre-repair electrode. The TFT includes a gate, a drain, and a source. The transparent pre-repair electrode is disposed corresponding to the electrode in a vertical direction and is electrically connected to the drain. When a broken circuit occurs in the pixel structure, a laser beam is provided to perform a welding process on the transparent pre-repair electrode for repairing the pixel structure.Type: ApplicationFiled: February 18, 2009Publication date: February 4, 2010Inventors: Chien-Ming Chen, Kuang-Kuei Wang, Chia-Ming Chiang, Chi-Liang Kuo
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Publication number: 20100015732Abstract: Base semiconductor chips, each comprising a plurality of chiplets, are manufactured and tested. For a base semiconductor chip having at least one non-functional chiplet, at least one repair semiconductor chiplet, which provides the same functionality as one of the at least one non-functional chiplet is designed to provide, is vertically stacked. The at least one repair semiconductor chiplet provides the functionality that the at least one non-functional chiplet is designed to provide to the base semiconductor chip. A functional multi-chip assembly is formed, which provides the same functionality as a base semiconductor chip in which all chiplets are functional. In case a first attempt to repair the base semiconductor chip by stacking repair semiconductor chips is unsuccessful, additional repair semiconductor chips may be subsequently stacked to fully repair the base semiconductor chip.Type: ApplicationFiled: July 16, 2008Publication date: January 21, 2010
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Publication number: 20100015731Abstract: An apparatus, system and method for repairing a carbon depleted low-k material in a low-k dielectric film layer includes identifying a repair chemistry having a hydrocarbon group, the repair chemistry configured to repair the carbon depleted low-k material and applying the identified repair chemistry meniscus to the low-k dielectric film layer such that the carbon depleted low-k material in the low-k dielectric film layer is sufficiently exposed to the repair chemistry meniscus substantially repairing the low-k material. The repaired low-k material exhibits substantially equivalent low-k dielectric characteristics of the low-k dielectric film layer.Type: ApplicationFiled: February 20, 2007Publication date: January 21, 2010Applicant: LAM RESEARCH CORPORATIONInventors: Seokmin Yun, Mark Wilcoxson, John M. de Larios
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Patent number: 7648846Abstract: An active matrix substrate including a substrate, a plurality of pixel units, a plurality of driving lines, an electron static discharge (ESD) protection circuit and a floating line is provided. The substrate has an active region and a peripheral region connected with the active region. The pixel units are arranged in a matrix in the active region. The driving lines electrically connected to the pixels are disposed in the active region and the peripheral region. The ESD protection circuit and the floating line are disposed in the peripheral region of the substrate. The ESD protection circuit is electrically connected to the driving lines. The ESD protection circuit includes an outer short ring (OSR) and an inner short ring (ISR) disposed between the pixel units and the OSR. The floating line is located beside the outer driving line.Type: GrantFiled: May 29, 2008Date of Patent: January 19, 2010Assignee: Au Optronics CorporationInventor: Han-Chung Lai
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Publication number: 20100001396Abstract: Repairable semiconductor device and method. In one embodiment a method, provides a first body having a first semiconductor chip and a first metal layer. A second body includes a second semiconductor chip and a second metal layer. Metal of the first metal layer is removed. The first semiconductor chip is removed from the first body. The second body is attached to the first body. The first metal layer is electrically coupled to the second metal layer.Type: ApplicationFiled: July 7, 2008Publication date: January 7, 2010Applicant: INFINEON TECHNOLOGIES AGInventors: Thorsten Meyer, Gerald Ofner
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Publication number: 20100003768Abstract: Apparatus and methods are provided that enable processing of patterned layers on substrates using a detachable mask. Unlike prior art where the mask is formed directly over the substrate, according to aspects of the invention the mask is made independently of the substrate. During use, the mask is positioned in close proximity or in contact with the substrate so as to expose only portions of the substrate to processing, e.g., sputtering or etch. Once the processing is completed, the mask is moved away from the substrate and may be used for another substrate. The substrate may be cycled for a given number of substrates and then be removed for cleaning or disposal.Type: ApplicationFiled: June 30, 2009Publication date: January 7, 2010Applicant: INTEVAC, INC.Inventors: Michael S. BARNES, Terry BLUCK
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Publication number: 20090325321Abstract: A method of forming a semiconductor card. A semiconductor package having a damaged controller die is reclaimed. The reclaim process includes severing the electrical connections between the controller die and the semiconductor package substrate without exposing the passive component. In one embodiment, the cutting tool comprises a saw blade. An electrically insulating material is deposited over the exposed bond wires to complete the reclaim process. The reclaimed package and a new controller die are affixed to a second substrate to electrically couple the memory die of the reclaimed package with the new controller die—forming a new package. The new package is encapsulated to form a new memory card.Type: ApplicationFiled: June 30, 2008Publication date: December 31, 2009Inventors: KH Ong, Robertito Piaduche, Ning Ye, Hem Takiar