Abstract: Highly ordered Ge films are prepared directly on single crystal Si substrates by applying an aqueous coating solution having Ge-bound polymer onto the substrate and then heating in a hydrogen-containing atmosphere. A coating solution was prepared by mixing water, a germanium compound, ethylenediaminetetraacetic acid, and polyethyleneimine to form a first aqueous solution and then subjecting the first aqueous solution to ultrafiltration.

Abstract: The present invention provides a superior method for the removal of nitride semiconductor thin films, thick films, heterostructures, and bulk material from initial substrates and/or templates. The method utilizes specially patterned mask layers between the initial substrates/templates and the nitride semiconductors to decrease adhesion between the nitride semiconductor and underlying material. Thermal stresses generated upon cooling the nitride semiconductor from its deposition temperature trigger spontaneous separation of the nitride semiconductor from the initial substrate or template at the mask layer. The invention remedies deficiencies in the prior art by providing a simple, reproducible, and effective means of removing initial substrates and templates from a variety of nitride semiconductor layers and structures.

Abstract: Methods for depositing a microcrystalline silicon film layer with improved deposition rate and film quality are provided in the present invention. Also, photovoltaic (PV) cell having a microcrystalline silicon film is provided. In one embodiment, the method produces a microcrystalline silicon film on a substrate at a deposition rate greater than about 20 nm per minute, wherein the microcrystalline silicon film has a crystallized volume between about 20 percent to about 80 percent.

Abstract: Methods for depositing a microcrystalline silicon film layer with improved deposition rate and film quality are provided in the present invention. Also, a photovoltaic (PV) cell having a microcrystalline silicon film is provided. In one embodiment, the method produces a microcrystalline silicon film on a substrate at a deposition rate greater than about 20 nm per minute, wherein the microcrystalline silicon film has a crystallized volume between about 20 percent to about 80 percent.

Abstract: A doped semiconductor junction for use in an electronic device and a method for making such junction is disclosed. The junction includes a first polycrystalline semiconductor layer doped with donors or acceptors over a substrate such that the first doped semiconductor layer has a first polarity, the first layer including fused semiconductor nanoparticles; and a second layer in contact with the first semiconductor layer over a substrate to form the semiconductor junction.

Abstract: A sealing member 21 is lifted to cause its edge 21a to be in contact with a contact surface 17a of a support member 13. In the state where a precision ejection nozzle 5 is isolated, a gas exhaust unit 41 is operated to exhaust the inside of a chamber 1 to reduce the pressure in the chamber 1 to a predetermined level. Then, a purge gas is introduced into the chamber 1 from a purge gas supply source 31 through a gas introduction section 26 to replace the atmosphere in the chamber 1 with the purge gas, and the pressure in the chamber 1 is returned to the atmospheric pressure. After that, the sealing member 21 is lowered to release the isolation of the precision ejection nozzle 5. Then, liquid droplets of a liquid device material are ejected toward the surface of a substrate S while a carriage 7 is reciprocated in the X direction.

Abstract: A method for forming a passivated densified nanoparticle thin film on a substrate in a chamber is disclosed. The method includes depositing a nanoparticle ink on a first region on the substrate, the nanoparticle ink including a set of Group IV semiconductor particles and a solvent. The method also includes heating the nanoparticle ink to a first temperature between about 30° C. and about 400° C., and for a first time period between about 1 minute and about 60 minutes, wherein the solvent is substantially removed, and a porous compact is formed. The method further includes flowing an oxidizer gas into the chamber; and heating the porous compact to a second temperature between about 600° C. and about 1000° C., and for a second time period of between about 5 seconds and about 1 hour; wherein the passivated densified nanoparticle thin film is formed.

Abstract: Method for manufacturing a semiconductor device including a transistor having a grooved gate structure and a transistor having a planar gate structure on the same substrate, in which, even when the semiconductor device is configured as a dual gate structure in which a gate electrode structure is a poly-metal gate structure, and a grooved gate and a planar gate are made in different conductivity types, then sufficient dopant is injected into polysilicon in the grooved gate to prevent depletion, and impurity ions do not pass through a gate insulating film even when the planar gate is formed also polysilicon having the same film thickness. The method includes: injecting ions into an amorphous silicon layer for the grooved gate; subsequently, turning it into polysilicon once; injecting ions once again to amorphousize a surface layer of the polysilicon layer and injecting ions of a different conductivity type for the planar gate.

Abstract: Single-crystalline growth is realized using a liquid-phase crystallization approach involving the inhibition of defects typically associated with liquid-phase crystalline growth of lattice mismatched materials. According to one example embodiment, a semiconductor device structure includes a substantially single-crystal region. A liquid-phase material, such as Ge or a semiconductor compound, is crystallized to form the single-crystal region using an approach involving defect inhibition for the promotion of single-crystalline growth. In some instances, this defect inhibition involves the reduction and/or elimination of defects using a relatively small physical opening via which a crystalline growth front propagates. In other instances, this defect inhibition involves causing a change in crystallization front direction relative to a crystallization seed location.

Abstract: Disclosed herein is a method for production of a thin-film semiconductor device which includes, a first step to form a gate electrode on a substrate, a second step to form a gate insulating film of silicon oxynitride on the substrate in such a way as to cover the gate electrode, a third step to form a semiconductor thin film on the gate insulating film, and a fourth step to perform heat treatment in an oxygen-containing oxidizing atmosphere for modification through oxygen binding with oxygen-deficient parts in the silicon oxynitride film constituting the gate insulating film.

Abstract: A method for making a structure includes depositing a solution upon a surface and irradiating the solution with microwaves to crystallize solute of the solution on the surface.

Abstract: A high frequency diode comprising: a P type region, a N type region, and an I layer as a high resistivity layer interposed between the P type region and the N type region, wherein the I layer is made of a silicon wafer that has a carbon concentration of 5×1015 to 5×1017 atoms/cm3 interstitial oxygen concentration of 6.5×1017 to 13.5×1017 atoms/cm3, and a resistivity of 100 ?cm or more.

Abstract: The present invention provides a process for forming a semiconductor film, comprising the steps of applying a semiconductor particle dispersion liquid to a substrate surface by spray coating in such a manner that the atomized droplets of the dispersion liquid discharged from the spray coater have a mean diameter of about 30 ?m or less, and drying the coating to form a porous semiconductor film; and use of the semiconductor film obtained by the process.

Abstract: Embodiments relate to printing features from an ink containing a material precursor. In some embodiments, the material includes an electrically active material, such as a semiconductor, a metal, or a combination thereof. In another embodiment, the material includes a dielectric. The embodiments provide improved printing process conditions that allow for more precise control of the shape, profile and dimensions of a printed line or other feature. The composition(s) and/or method(s) improve control of pinning by increasing the viscosity and mass loading of components in the ink. An exemplary method thus includes printing an ink comprising a material precursor and a solvent in a pattern on the substrate; precipitating the precursor in the pattern to form a pinning line; substantially evaporating the solvent to form a feature of the material precursor defined by the pinning line; and converting the material precursor to the patterned material.

Abstract: A solution of a hydrazine-based precursor of a metal chalcogenide is prepared by adding an elemental metal and an elemental chalcogen to a hydrazine compound. The precursor solution can be used to form a film. The precursor solutions can be used in preparing field-effect transistors, photovoltaic devices and phase-change memory devices.

Abstract: A method is disclosed for making a doped semiconductor transport layer for use in an electronic device comprising: growing in-situ doped semiconductor nanoparticles in a colloidal solution; depositing the in-situ doped semiconductor nanoparticles on a surface; and annealing the deposited in-situ doped semiconductor nanoparticles so that the organic ligands boil off the surface of the in-situ doped semiconductor nanoparticles.

Abstract: A method for manufacturing an epitaxial wafer includes: a step of pulling a single crystal from a boron-doped silicon melt in a chamber based on a Czochralski process; and a step of forming an epitaxial layer on a surface of a silicon wafer sliced from the single crystal. The single crystal is allowed to grow while passed through a temperature region of 800 to 600° C. in the chamber in 250 to 180 minutes during the pulling step. The grown single crystal has an oxygen concentration of 10×1017 to 12×1017 atoms/cm3 and a resistivity of 0.03 to 0.01 ?cm. The silicon wafer is subjected to pre-annealing prior to the step of forming the epitaxial layer on the surface of the silicon wafer, for 10 minutes to 4 hours at a predetermined temperature within a temperature region of 650 to 900° C. in an inert gas atmosphere. The method is to fabricate an epitaxial wafer that has a diameter of 300 mm or more, and that attains a high IG effect, and involves few epitaxial defects.

Abstract: A method for producing a Group IV semiconductor thin film in a chamber is disclosed. The method includes positioning a substrate in the chamber, wherein the chamber further has a chamber pressure. The method further includes depositing a nanoparticle ink on the substrate, the nanoparticle ink including set of Group IV semiconductor nanoparticles and a solvent, wherein each nanoparticle of the set of Group IV semiconductor nanoparticles includes a nanoparticle surface, wherein a layer of Group IV semiconductor nanoparticles is formed. The method also includes striking a hydrogen plasma; and heating the layer of Group IV semiconductor nanoparticles to a fabrication temperature of between about 300° C. and about 1350° C., and between about 1 nanosecond and about 10 minutes; wherein the Group IV semiconductor thin film is formed.

Abstract: Semiconductor wafers of silicon are produced by pulling a single crystal growing on a phase boundary from a melt contained in a crucible and cutting of semiconductor wafers therefrom, wherein during pulling of the single crystal, heat is delivered to a center of the phase boundary and a radial profile of a ratio V/G from the center to an edge of the phase boundary is controlled, G being the temperature gradient perpendicular to the phase boundary and V being the pull rate. The radial profile of the ratio V/G is controlled so that the effect of thermomechanical stress in the single crystal adjoining the phase boundary, is compensated with respect to creation of intrinsic point defects. The invention also relates to defect-free semiconductor wafers of silicon, which can be produced economically by this method.

Abstract: A method of fabricating a semiconductor metamaterial is provided, comprising providing a sample of engineered microstructured material that is transparent to electromagnetic radiation and comprises one or more elongate, high aspect ratio voids, passing through the voids a high pressure fluid comprising a semiconductor material carried in a carrier fluid, and causing the semiconductor material to deposit onto the surface of the one or more voids of the engineered microstructured material to form the metamaterial. Many microstructured materials and semiconductor materials can be used, together with various techniques for controlling the location, spatial extent, and thickness of the deposition of the semiconductor within the microstructured material, so that a wide range of different metamaterials can be produced.

Abstract: A method of fabricating a densified nanoparticle thin film with a set of occluded pores in a chamber is disclosed. The method includes positioning a substrate in the chamber; and depositing a nanoparticle ink, the nanoparticle ink including a set of Group IV semiconductor particles and a solvent. The method further includes heating the nanoparticle ink to a first temperature between about 30° C. and about 300° C., and for a first time period between about 5 minutes and about 60 minutes, wherein the solvent is substantially removed, and a porous compact with a set of pores is formed. The method also includes heating the porous compact to a second temperature between about 300° C. and about 900° C., and for a second time period of between about 5 minutes and about 15 minutes, and flowing a precursor gas into the chamber at a partial pressure between about 0.

Abstract: A semiconductor single crystal manufacturing apparatus and method are provided which are capable of improving the speed of designing and arranging a silicon single crystal manufacturing apparatus while reducing labor by making it possible to instantaneously find optimum design values and optimum arrangement for a cooler without requiring a lot of labor or time, regardless of a housing structure of a CZ furnace, in-furnace members' configuration, and manufacturing conditions. Stable manufacture of defect-free silicon single crystals is also made possible by designing and arranging the cooler such that when a heat absorption amount of the cooler is denoted by Q and a semiconductor single crystal radius is denoted by r, the heat absorption amount of the cooler Q satisfies r2/1100?Q?r2/400, or alternatively Q satisfies r2.7/20500?Q?r2.7/19300.

Abstract: A method of making an ex-situ doped semiconductor transport layer for use in an electronic device includes: growing a first set of semiconductor nanoparticles having surface organic ligands in a colloidal solution; growing a second set of dopant material nanoparticles having surface organic ligands in a colloidal solution; depositing a mixture of the first set of semiconductor nanoparticles and the second set of dopant material nanoparticles on a surface, wherein there are more semiconductor nanoparticles than dopant material nanoparticles; performing a first anneal of the deposited mixture of nanoparticles so that the organic ligands boil off the surfaces of the first and second set of nanoparticles; performing a second anneal of the deposited mixture so that the semiconductor nanoparticles fuse to form a continuous semiconductor layer and the dopant material atoms diffuse out from the dopant material nanoparticles and into the continuous semiconductor layer.

Abstract: A method of manufacturing a semiconductor device, includes the steps of: raising a temperature of a sapphire substrate which is included in the semiconductor device from a room temperature to a preheat temperature of 150° C. to 450° C. and keeping the preheat temperature for a first predetermined time, thereby preheating the semiconductor device; and subsequently raising a temperature of the sapphire substrate from the preheat temperature to a thermal reaction temperature of 500° C. or higher and keeping the thermal reaction temperature for a second predetermined time, thereby performing a thermal reaction treatment of the semiconductor device.

Abstract: The object of the disclosure is to measure temperature using pyrometers, in a simple and economic way, enabling precise temperature measurement, even for low temperatures. The disclosure presents an apparatus and method for thermally treating substrates, wherein the substrate is exposed to at least a first and at least a second radiation; the predetermined wavelengths of the first radiation are absorbed between the first radiation source and the substrate; a radiation from the substrate is measured in the predetermined wavelength using a radiation detector arranged on the same side as a second radiation source; the second radiation from the second radiation source is modulated and determined.

Abstract: A population of nanocrystals having a narrow and controllable size distribution and can be prepared by a segmented-flow method.

Abstract: A method of processing a substrate, comprising forming a chemically amplified resist film on a substrate, irradiating energy beams to the chemically amplified resist film to form a latent image therein, carrying out heat treatment with respect to the chemically amplified resist film, heating treatment being carried out in a manner of relatively moving a heating section for heating the chemically amplified resist film and the substrate forming a gas stream flowing reverse to the relatively moving direction of the heating section between the lower surface of the heating section and the chemically amplified resist film.

Abstract: A method of manufacturing a semiconductor device that provides a semiconductor device having improved channel mobility includes a process of forming a gate insulation film of silicon oxide film, silicon nitride film or silicon oxide nitride film or the like on a silicon oxide substrate, and following formation of the gate insulation film on the silicon oxide substrate with heat treatment for a given time at a temperature range of 900° C. to 1000° C. in an atmosphere containing not less than 25% H2O (water).

Abstract: It is an object of the present invention to provide a porous body containing an oxide semiconductor in which more efficient photocatalytic reactions and photoelectrode reactions occur. The present invention relates to a porous body having a network structure skeleton wherein 1) the aforementioned skeleton is composed of an inner part and a surface part, 2) the aforementioned inner part is substantially made of carbon material, and 3) all or part of the aforementioned surface part is an oxide semiconductor, and to a manufacturing method therefor.

Abstract: Disclosed herein is a method of forming a single crystal SiC on a Si Substrate wherein a SiGe layer lower in melting point than Si and SiC and an amorphous SiC are formed on the Si layer and this structure is annealed at a temperature higher than the melting point of SiGe to relieve strain between SiC and the Si substrate and to cause an amorphous SiC to crystallize at the same time, thereby forming the single crystal SiC layer good in crystallinity and surface morphology.

Abstract: The invention provides a method of forming a high-performance thin-film at low cost using a liquid material in safety, an apparatus to form a thin-film, a method of manufacturing a semiconductor device, an electro-optical unit, and an electronic apparatus. An apparatus to form a thin-film includes a coating unit to apply a liquid material containing a thin-film component onto a substrate and also includes heat-treating units to heat the substrate applied with the liquid material. The coating unit and the heat-treating units each include a control device to control the atmosphere in a treating chamber to treat the substrate.

Abstract: A method is disclosed for forming a semiconductor device using strained silicon. After forming a first substrate material with a first natural lattice constant on a device substrate and a second substrate material with a second natural lattice constant on the first substrate material, a channel, source and drain regions of a field effective transistor are further defined using the first and second substrate materials. After implanting one or more impurity materials to the source and drain regions, and the transistor goes through an annealing process using a high speed heat source other than a Tungsten-Halogen lamp.

Abstract: A glass bottle containing a sample of an organic material to be purified is located at a position surrounded by a heater near one end in an outer glass tube. An inner glass tube for catching organic crystals obtained by recrystallization is located at a position near the other end in the outer glass tube. When the sample of the organic material is sublimed and purified, the inside of the outer glass tube is kept in a higher vacuum state (lower pressure) than 200 Pa by a vacuum pump. The sample inside the outer glass tube is heated by the heater, to sublime organic molecules of the sample contained in the glass bottle. The outer glass tube is provided with a temperature gradient, so that organic molecule vapor is cooled near the other end in the outer glass tube, and is recrystallized inside the inner glass tube.

Abstract: A method for manufacturing a transistor, includes the steps of preparing a substrate, preparing a liquid material containing a silane compound, the silane compound forming a high order silane when photopolymerized, coating the liquid material on the substrate so as to form a coating film, exposing the coating film to an atmosphere comprising at least one of oxygen and ozone so as to oxidize a surface of the coating film, and performing at least one of thermal processing and photoirradiation processing on the coating film in an inert atmosphere so as to transform the coating film into a silicon layer and a silicon oxide layer disposed on the silicon layer.

Abstract: A structure and method are provided for dissipating heat from a semiconductor device chip. A first layer of a dielectric material (e.g. polyimide) is formed on a front side of a heat spreader (typically Si). A plurality of openings are formed through this first layer; the openings are filled with metal (typically Cu), thereby forming metal studs extending through the first layer. A second layer of metal is formed on the backside of the device chip. The first layer and the second layer are then bonded in a bonding process, thereby forming a bonding layer where the metal studs contact the second layer. The bonding layer thus provides a thermal conducting path from the chip to the heat spreader.

Abstract: Thin film for optical applications, light-emitting structure using the same and the fabrication method thereof are disclosed. The present invention provides a silica or silica-related thin film for optical applications in which silicon nanoclusters and rare earth elements are co-doped. The average size of the silicon nanoclusters is less than 3 nm and the concentration of the rare earth elements is less than 0.1 atomic %. The ratio of the rare earth element concentration to that of silicon nanoclusters is controlled to range from 1 to 10 in the thin film. The thin film emits light by exciting the rare earth elements through electron-hole recombinations in the silicon nanoclusters. According to the present invention, the conditions such as the size and concentration of the silicon nanoclusters, the concentration of the rare earth element, and their concentration ratio are specifically optimized to fabricate optical devices with better performance.

Abstract: In the manufacture of an integrated circuit, a first electrode (48) is formed on a substrate (28). In a first embodiment, a strontium bismuth tantalate layer (50) and a second electrode (52) are formed on top of the first electrode (48). Prior to the final crystallization anneal, the first electrode (48), the strontium bismuth tantalate layer (50) and the second electrode (52) are patterned. The final crystallization anneal is then performed on the substrate (28). In a second embodiment, a second layer (132) of strontium bismuth tantalate is deposited on top of the strontium bismuth tantalate layer (50) prior to the forming of the second electrode (52) on top of the first and second layers (50), (132). In a third embodiment, a carefully controlled UV baking process is performed on the strontium bismuth tantalate layer (50).

Abstract: An electrode manufacturing method comprises: forming plural protruding portions on a surface of a substrate; introducing first particles having a size that changes according to heat, light, or a first solvent between said plural protruding portions; changing the size of the first particles by applying heat, light, or the first solvent to said first particles; and depositing an electrode material onto the surface of said substrate.

Abstract: A method and an apparatus for manufacturing a device are provided. The method and the apparatus can form micro wiring without undesired wetting and spreading using an inexpensive functional-liquid supplying method. A method for forming a device, such as a radiofrequency identification tag, includes: making patterns at a plurality of sections having different degrees of affinity to the functional liquid on a substrate to form the device; and supplying the functional liquid to the selected section having high affinity to the functional liquid. Forming the plurality of sections having different degrees of affinity to the functional liquid includes, for example: supplying an organosiloxane film on the substrate, and exposing the organosiloxane film through an optical mask.

Abstract: This invention provides a new procedure for attaching molecules to semiconductor surfaces, in particular silicon. The molecules, which include, but are not limited to porphyrins and ferrocenes, have been previously shown to be attractive candidates for molecular-based information storage. The new attachment procedure is simple, can be completed in short times, requires minimal amounts of material, is compatible with diverse molecular functional groups, and in some instances affords unprecedented attachment motifs. These features greatly enhance the integration of the molecular materials into the processing steps that are needed to create hybrid molecular/semiconductor information storage devices.

Abstract: The invention includes methods of forming epitaxially-grown semiconductive material having a flattened surface, and methods of incorporating such material into trenched regions and elevated/source drain regions. A method of forming epitaxially-grown semiconductive material having a flattened surface can include the following. Initially, a single crystal first semiconductor material is provided. A second semiconductive material is epitaxially grown from a surface of the first semiconductor material. The epitaxial growth is stopped, and subsequently an upper surface of the second semiconductor material is exposed to at least one hydrogen isotope to reduce curvature of (i.e., flatten) a surface of the second semiconductor material.

Abstract: The present invention provides a manufacturing method of a semiconductor device, which is able to improve on-current and mobility of a polycrystal TFT without disturbing a high integration level, and also provide a semiconductor device obtained in accordance with the manufacturing method.

Abstract: The present invention provides a method for thermal processing a semiconductor wafer wherein the semiconductor wafer is heat-treated by means of flash radiation means constituted by a flash discharge lamp after preheating the semiconductor wafer to a predetermined temperature by means of preheating means, the preheating is performed at a preheating temperature capable of controlling that the maximum tension of the semiconductor wafer when heated by the flash radiation means is to be less than the tense strength of the semiconductor wafer itself.

Abstract: A method of manufacturing a device comprising individual thin films including a silicon film, a gate insulating film, a conductive film for a gate electrode, an interlayer insulating film, and a conductive film for an electrode and wiring, comprising: a step of applying a liquid material to form an applied film; and a heat treatment and/or a light irradiating treatment of making the applied film into the silicon film, wherein, as the liquid material, a high-order silane composition comprising a high-order silence formed by photopolymerization by irradiating a silane compound solution having a photopolymerization property with UV rays is used.

Abstract: Provided is a process for manufacturing a silicon wafer employing heat treatment which is applied on the silicon wafer in inert gas atmosphere represented by Ar annealing to annihilate Grown-in defects in a surface layer region of the silicon wafer as well as to cause no degradation of haze and micro-roughness on a surface thereof. In a process for manufacturing a silicon wafer having a step of heat treating the silicon wafer in inert gas atmosphere, using a purge box with which the silicon wafer heat treated in the inert gas atmosphere can be unloaded to outside a reaction tube of a heat treatment furnace without being put into contact with the open air, the purge box is filled with mixed gas of nitrogen and oxygen or 100% oxygen gas, and the heat treated silicon wafer is unloaded into the purge box.

Abstract: The invention provides a method for fabricating a transistor in which the bulk characteristics of the gate insulating film and the interface characteristics can be simultaneously improved by a low-temperature process. The method can include the step of forming a semiconductor film on a substrate, the step of forming a gate insulating film on the semiconductor film by depositing a silicon oxide film by a diode parallel plate plasma enhanced CVD process using at least TEOS and oxygen as source materials, the step of forming a metal film, which accelerates the decomposition of gases permeated into the gate insulating film, on the gate insulating film, and the step of performing low-temperature heat treatment on the gate insulating film. Accordingly, it is possible to form high-quality gate insulating film having both satisfactory bulk and interface characteristics by a low temperature process.

Abstract: To provide a manufacturing method for a field-effect transistor, such as a thin-film transistor, enabling reductions in the number patterning steps and the number of photomasks and improvements in the throughput and the yield. In the method, an oxide film is formed by processing the surface of a crystalline semiconductor with ozone water or hydrogen peroxide water. Using the oxide film thus formed as an etch stop, a gate electrode, a source electrode, and a drain electrode of the field-effect transistor are simultaneously formed from a same starting film in one patterning step by use of one photomask. After forming the gate electrode, the source electrode, and the drain electrode, heating is performed thereon at 800° C. or higher for a predetermined time. Thereby, the contact resistances between the source electrode and the crystalline semiconductor and between the drain electrode and the crystalline semiconductor are reduced, whereby improving the electrical conductivity.

Abstract: A method for the production of a silicon single crystal by pulling the single crystal, according to the Czochralski method, from a melt which is held in a rotating crucible, the single crystal growing at a growth front, heat being deliberately supplied to the center of the growth front by a heat flux directed at the growth front. The method produces a silicon single crystal with an oxygen content of from 4*1017 cm−3 to 7.2*1017 cm−3 and a radial concentration change for boron or phosphorus of less than 5%, which has no agglomerated self-point defects. Semiconductor wafers are separated from the single crystal. These semiconductor wafers have may have agglomerated vacancy defects (COPs) as the only self-point defect type or may have certain other defect distributions.

Abstract: A method for forming a, single-crystal silicon layer on a transparent substrate. A transparent substrate having an amorphous silicon layer formed thereon and a silicon wafer having a hydrogen ion layer formed therein are provided. The silicon wafer is then reversed and laminated onto the amorphous silicon layer so that a layer of single-crystal silicon is between the hydrogen ion layer and the amorphous silicon layer. The laminated silicon wafer and the amorphous silicon layer are then subjected to laser or infrared light to cause chemical bonding of the single crystal silicon layer and the amorphous silicon layer and inducing a hydro-cracking reaction thereby separating the silicon wafer is and the transparent substrate at the hydrogen ion layer, and leaving the single-crystal silicon layer on the transparent substrate.

Abstract: The present invention relates to a leadless surface-mount resin-sealing semiconductor device and a manufacturing method thereof; in a semiconductor device comprising a semiconductor element, a resin package sealing this semiconductor element, a terminal formed on a mount side of this resin package so as to protrude thereon, and a wire electrically connecting this terminal and an electrode pad on the semiconductor element to each other, a heat sink dissipating heat generated in the semiconductor element is provided on an undersurface of the semiconductor element so as to improve a heat-dissipation property.