Abstract: A method and apparatus for thermally processing a substrate is provided. A substrate is disposed within a processing chamber configured for thermal processing by directing electromagnetic energy toward a surface of the substrate. An energy blocker is provided to block at least a portion of the energy directed toward the substrate. The blocker prevents damage to the substrate from thermal stresses as the incident energy approaches an edge of the substrate.

Abstract: A semiconductor die package. Embodiments of the package can include a substrate with solid conductive pins disposed throughout. A semiconductor die can be attached to a surface of the substrate. Electrical connection to the semiconductor die can be provided by the solid conductive pins.

Abstract: A semiconductor package includes a substrate having a first surface portion in a cavity. The first surface portion includes an artificially formed grass structure. The package includes a getter film formed over the grass structure.

Abstract: A method of recycling monitor wafers. The method includes: (a) providing a semiconductor wafer which includes a dopant layer extending from a top surface of the wafer into the wafer a distance less than a thickness of the wafer, the dopant layer containing dopant species; after (a), (b) attaching an adhesive tape to a bottom surface of the wafer; after (b), (c) removing the dopant layer; and after (c), (d) removing the adhesive tape.

Abstract: An image intensifier device and a method of fabricating the image intensifier device are disclosed. The image intensifier device includes a microchannel plate (MCP) having a thin-film applied to a surface thereof. An anode assembly comprising an image sensor mounted to a header is positioned adjacent the MCP. A spacer defining a mounting surface is positioned against a mounting surface of the header of the anode assembly for separating the MCP from the anode assembly. A recess is defined in either the header or the spacer at the interface between the header and the spacer. The recess forms a passageway defined between the spacer and the header thru which organic gases pass.

Abstract: A method for manufacturing a poly-crystal silicon photovoltaic device using horizontal metal induced crystallization comprises the steps of forming at least one layer of an amorphous silicon thin film on a substrate, forming at least one groove of which depth is less than or equal to that of the thin film on the amorphous silicon thin film, and horizontally crystallizing the amorphous silicon thin film by forming a metal layer on an upper portion of the groove. Since a crystal shape and a growth direction of the photovoltaic device can be adjusted by the method, a poly-crystal silicon thin film for improving current flow can be formed at a low-temperature.

Abstract: This invention discloses a defect isolation method for thin-film solar cell having at least a defect therein. The thin-film solar cell comprises a substrate, a front electrode layer, an absorber layer and a back electrode layer stacked in such a sequence. The defect isolation method includes the steps of: detecting at least a defect formed in thin-film solar cell and acquiring the positions of the defects, and applying a laser light to scribe the outer circumference of the defects according to the positions of the defects so as to form at least an isolation groove having a closed-curve configuration.

Abstract: Method of processing a substrate containing at least one semiconductor of the SiXAY type and comprising at least four separate types of light elements, comprising at least the following steps: carrying out a first anneal of the substrate at a temperature T1 corresponding to a thermal activation temperature for a first one of the four types of light elements, carrying out a second anneal of the substrate at a temperature T2 corresponding to a thermal activation temperature for a second one of the four types of light elements, carrying out a third anneal of the substrate at a temperature T3 corresponding to a thermal activation temperature for a third one of the four types of light elements, carrying out a fourth anneal of the substrate at a temperature T4 corresponding to a thermal activation temperature for a fourth one of the four types of light elements, each anneal comprising a holding at the temperature T1, T2, T3 or T4 and the temperatures T1, T2, T3 and T4 being such that T1>T2>T3>T4.

Abstract: In the production of a wafer for backside illumination type solid imaging device having a plurality of pixels inclusive of a photoelectric conversion device and a charge transfer transistor formed at its front surface side and a light receiving surface at its back surface side, an active layer made of a given epitaxial film is formed on a silicon wafer made of a C-containing CZ crystal directly or through an insulating film, and then subjected to a heat treatment to form precipitates containing C and O as a gettering sink at a position just beneath the active layer.

Abstract: A fragile layer is formed in a single crystal silicon substrate, a first impurity silicon layer is formed on the one surface side in the single crystal silicon substrate, and a first electrode is formed thereover. After one surface of a supporting substrate and the first electrode are bonded, the single crystal silicon substrate is separated along the fragile layer to form a single crystal silicon layer over the supporting substrate. Crystal defect repair treatment or crystal defect elimination treatment of the single crystal silicon layer is performed; then, epitaxial growth is conducted on the single crystal silicon layer by activating a source gas containing at least a silane-based gas with plasma generated at atmospheric pressure or near atmospheric pressure. A second impurity silicon layer is formed on a surface side in the single crystal silicon layer which is epitaxial grown.

Abstract: The invention relates to a method of purifying a crystalline silicon substrate and to a process for producing a photovoltaic cell. The method of purifying a crystalline silicon substrate according to the invention is of the type that includes a step of extracting impurities by external gettering and which includes, before said step of extracting the impurities by external gettering, at least one step of rapidly annealing the substrate at a temperature of between 750° C. and 1000° C. inclusive for a time of between 1 second and 10 minutes inclusive. The invention is particularly applicable in the photovoltaic cell field.

Abstract: A method for manufacturing a CMOS image sensor that independently forms a poly routing line connected to a gate poly of a reset transistor is provided. In an embodiment, a semiconductor substrate is prepared defining a device isolation region and an active region. Subsequently, a plurality of gate polys are formed on a predetermined portion of the active region. A photodiode is formed in a portion of the semiconductor substrate located at one side of one of the plurality of gate polys. After an oxide layer is deposited on the semiconductor substrate including the gate polys, the oxide layer is selectively removed to form oxide layer patterns for exposing a portion of the plurality of gate polys. After a polysilicon layer is deposited on the oxide layer pattern, the polysilicon layer is selectively removed to form a routing line connected to the portion of the plurality of gate polys.

Abstract: An embrittlement layer is formed in the single crystal semiconductor substrate and a first impurity semiconductor layer, a first electrode, and an insulating layer are formed on one surface of the single crystal semiconductor substrate. After attaching the insulating layer and a supporting substrate to each other to bond the single crystal semiconductor substrate and the supporting substrate, the single crystal semiconductor substrate is separated along the embrittlement layer to form a stack including a first single crystal semiconductor layer. A first semiconductor layer and a second semiconductor layer are formed over the first single crystal semiconductor layer. A second single crystal semiconductor layer is formed by solid phase growth. A second impurity semiconductor layer having a conductivity type opposite to that of the first impurity semiconductor layer is formed on the second single crystal semiconductor layer. A second electrode is formed on the second impurity semiconductor layer.

Abstract: Method of processing a substrate containing at least one semiconductor of the SiXAY type and comprising at least four separate types of light elements, comprising at least the following steps: carrying out a first anneal of the substrate at a temperature T1 corresponding to a thermal activation temperature for a first one of the four types of light elements, carrying out a second anneal of the substrate at a temperature T2 corresponding to a thermal activation temperature for a second one of the four types of light elements, carrying out a third anneal of the substrate at a temperature T3 corresponding to a thermal activation temperature for a third one of the four types of light elements, carrying out a fourth anneal of the substrate at a temperature T4 corresponding to a thermal activation temperature for a fourth one of the four types of light elements, each anneal comprising a holding at the temperature T1, T2, T3 or T4 and the temperatures T1, T2, T3 and T4 being such that T1>T2>T3>T4.

Abstract: The present invention generally comprises a method and apparatus for supplemental pumping, gas feed, and/or RF current for a process. When depositing amorphous silicon, the amount of process gases, RF current, and vacuum may be less than the amount of process gases, RF current, and vacuum necessary to deposit microcrystalline silicon. When a single chamber is used to deposit both amorphous and microcrystalline silicon, coupling a supplemental power supply, a supplemental gas source, and a supplemental vacuum pump to the chamber may be beneficial. The supplemental power supply, vacuum pump, and gas source, may be coupled with the chamber when the microcrystalline silicon is deposited and uncoupled when amorphous silicon is deposited. In a cluster tool arrangement, the supplemental power supply, vacuum pump, and gas source may serve multiple chambers that each deposit both amorphous and microcrystalline silicon.

Abstract: A photo sensor has an insulator layer for covering a diode stack, and the insulator layer is made of photoresist to reduce a side leakage current.

Abstract: A method for operating a photosensitive device is provided. At first, the photosensitive device is provided, which comprising a photo sensor circuit and a photo sensor, where the photo sensor is located above and electrically coupled with the photo sensor circuit, and where the photo sensor comprises a bottom electrode; a photosensitive layer located on the bottom electrode; and a transparent electrode located on the photosensitive layer. Then, a first electrical potential is supplied to the transparent electrode, and a second electrical potential is supplied to the bottom electrode, where the first electrical potential is greater than the second electrical potential.

Abstract: A method for manufacturing a CMOS image sensor is provided. The method can include forming an interlayer dielectric layer on a semiconductor substrate including a gate electrode, photodiode area, and LDD region; selectively removing the interlayer dielectric layer such that the interlayer dielectric layer remains on the photodiode area; performing a first heat treatment process; sequentially forming a first insulating layer and a second insulating layer on the semiconductor substrate, where the etching selectivity of the first insulating layer is different from the etching selectivity of the second insulating layer; selectively etching the second insulating layer to form spacers on sidewalls of the gate electrode; selectively removing the first insulating layer to expose a source/drain area and forming a high-density N-type diffusion area in the exposed source/drain area; performing a second heat treatment process; and forming a metal silicide layer the high-density N-type diffusion area.

Abstract: There is provided a method of scribing a stuck mother substrate for obtaining a plurality of stuck substrates formed by sticking a first square substrate and a second square substrate together so that one side of opposing two sides of the square substrates is aligned and the other side is not aligned so that the first substrate is set back to the second substrate from a stuck mother substrate in which a first mother substrate and a second mother substrate are stuck together. In the method of scribing a stuck mother substrate, the second mother substrate is strongly scribed for a full scribe line and the first mother substrate is strongly scribed for a half scribe line. On the other hand, the first mother substrate is weakly scribed for the full scribe line.

Abstract: The specification teaches a system for manufacturing microelectronic, microoptoelectronic or micromechanical devices (microdevices) in which a contaminant absorption layer improves the life and operation of the microdevice. In an embodiment, a system for manufacturing the devices includes efficiently integrating a getter material in multiple microdevices.

Abstract: A technique for controlling an atmosphere within an enclosure involves providing a getter within the atmosphere of the enclosure. An LED manufactured according to the technique may include a getter within an enclosed volume of the LED device.

Abstract: A process for producing a single-crystal silicon wafer, comprises the following steps: producing a layer on the front surface of the silicon wafer by epitaxial deposition or production of a layer whose electrical resistance differs from the electrical resistance of the remainder of the silicon wafer on the front surface of the silicon wafer, or production of an external getter layer on the back surface of the silicon wafer, and heat treating the silicon wafer at a temperature which is selected to be such that an inequality (1) [ Oi ] < [ Oi ] eq ? ( T ) ? exp ? 2 ? ? SiO ? ? 2 ? ? rkT is satisfied, where [Oi] is an oxygen concentration in the silicon wafer, [Oi]eq(T) is a limit solubility of oxygen in silicon at a temperature T, ?SiO2 is the surface energy of silicon dioxide, ? is a volume of a precipitated oxygen atom, r is a mean COP and k the Boltzmann constant, with the silicon wafer, during the heat treatment, at least part of the time being exposed to an oxygen-con

Abstract: A method for producing a silicon wafer, comprising performing an activation of metallic impurities by irradiating laser light on the metallic impurities constituting contaminants in the silicon wafer, changing the electric charge of the contaminants, and activating the contaminants to a state such that the contaminants easily react with oxygen precipitation nuclei and are subjected to gettering.

Abstract: A chip module assembly includes a CO2 getter exposed through a gas-permeable membrane to a chip cavity of a chip module. One or more chips is/are enclosed within the cavity. The CO2 getter comprises a liquid composition including 1,8-diaza-bicyclo-[5,4,0]-undec-7-ene (DBU) in a solvent that includes an alcohol, preferably, 1-hexanol. In one embodiment, a sheet of gas-permeable membrane is heat-welded to form a pillow-shaped bag in which the liquid composition is sealed. The pillow-shaped bag containing the liquid composition is preferably disposed in a recess of a heat sink and exposed to the cavity through a passage between the recess and the cavity. The CO2 getter can remove a relatively large amount of carbon dioxide from the cavity, and thus effectively prevents solder joint corrosion. For example, based on the formula weights and densities of the DBU and 1-hexanol, 200 g of the liquid composition can remove over 34 g of carbon dioxide.

Abstract: A solid-state imaging device capable of reducing the occurrence of a dark current and a pixel defect is provided. A solid-state imaging device 10 is formed in which a plurality of photoelectric conversion elements 4 are formed in a semiconductor substrate 1; circuits 5 which read out signal charge from each of the plurality of photoelectric conversion elements 4 are respectively formed on the semiconductor substrate 1; light is applied from the opposite side to the circuits 5 which read out signal charge from each of the plurality of photoelectric conversion elements; and a gettering region is provided in an element-isolation area 2 which separate the photoelectric conversion elements 4 adjacent to each other.

Abstract: To provide a back-illuminated solid-state imaging device able to suppress a crystal defect caused by a metal contamination in a process and to suppress a dark current to improve quantum efficiency, a camera including the same and a method of producing the same, having the steps of forming a structure including a substrate, a first conductive type epitaxial layer and a first conductive type impurity layer, the first conductive type epitaxial layer being formed on the substrate to have a first impurity concentration, and the first conductive type impurity layer being formed in a boundary region to have a second impurity concentration higher than the first impurity concentration of the epitaxial layer; forming a second conductive type region storing a charge generated by a photoelectric conversion in the epitaxial layer; forming an interconnection layer on the epitaxial layer; and removing the substrate.

Abstract: A method for forming a MEMS device is disclosed, where a final release step is performed just prior to a wafer bonding step to protect the MEMS device from contamination, physical contact, or other deleterious external events. Without additional changes to the MEMS structure between release and wafer bonding and singulation, except for an optional stiction treatment, the MEMS device is best protected and overall process flow is improved. The method is applicable to the production of any MEMS device and is particularly beneficial in the making of fragile micromirrors.

Abstract: Techniques are here disclosed for a solar cell pre-processing method and system for annealing and gettering a solar cell semiconductor wafer having an undesirably high dispersion of transition metals, impurities and other defects. The process forms a surface contaminant layer on the solar cell semiconductor (e.g., silicon) wafer. A surface of the semiconductor wafer receives and holds impurities, as does the surface contaminant layer. The lower-quality semiconductor wafer includes dispersed defects that in an annealing process getter from the semiconductor bulk to form impurity cluster toward the surface contaminant layer. The impurity clusters form within the surface contaminant layer while increasing the purity level in wafer regions from which the dispersed defects gettered. Cooling follows annealing for retaining the impurity clusters and, thereby, maintaining the increased purity level of the semiconductor wafer in regions from which the impurities gettered.

Abstract: A semiconductor substrate for forming a pixel area provided surfacially with a plurality of pixels for photoelectric conversion, the semiconductor substrate, including a polysilicon film of a thickness of 0.5-2.0, on a rear surface of the pixel area-bearing surface, and having an oxygen concentration of 1.3-1.5E+18 atom/cm3 (old ASTM).

Abstract: A mask is formed selectively on a crystalline silicon film containing a catalyst element, and an amorphous silicon film is formed so as to cover the mask. Phosphorus is implanted into the amorphous silicon film and the portion of the crystalline silicon film which is not covered with the mask. The silicon films are then heated by rapid thermal annealing (RTA). By virtue of the existence of the amorphous silicon film, the temperature of the crystalline silicon film is increased uniformly, whereby the portion of the crystalline silicon film covered with the mask is also heated sufficiently and the catalyst element existing in this region moves to the phosphorus-implanted, amorphous portion having high gettering ability. As a result, the concentration of the catalyst element is reduced in the portion of the silicon film covered with the mask. A semiconductor device is manufactured by using this portion.

Abstract: The invention is directed to a hermetically sealed device and a method for making such device. The device includes optical, micro-electromechanical, electronic and opto-electronic devices, having a substrate with one or a plurality of optical, opto-electronic, electronic or micro-electromechanical (“MEMS”) elements either singly or in combination that are located on a substrate; a covering having a top part and an extension extending a distance from the top part from the top part, an adhesive that is used to bond the extension portion of the covering to the substrate; and a sealing agent for hermetically sealing the area where the covering extension is bonded to the substrate. In the method of the invention the sealing agent is applied using atomic layer deposition techniques.

Abstract: According to the present invention, a gettering layer is deposited both on the side surfaces and the bottom surface of a semiconductor chip. The semiconductor chip is then mounted on the board of a package so that a Schottky barrier is formed on the bottom surface. With this structure, metal ions that pass through the board of the package can be captured by the defect layer deposited on the side surfaces and/or the bottom surface of the semiconductor chip, and by the Schottky barrier.

Abstract: Ultra-low leakage current backside-illuminated semiconductor photodiode arrays are fabricated using a method of formation of a transparent, conducting bias electrode layer that avoids high-temperature processing of the substrate after the wafer has been gettered. As a consequence, the component of the reverse-bias leakage current associated with strain, crystallographic defects or impurities introduced during elevated temperature processing subsequent to gettering can be kept extremely low. An optically transparent, conductive bias electrode layer, serving as both an optical window and an ohmic backside equipotential contact surface for the photodiodes, is fabricated by etching through the polysilicon gettering layer and a portion of the thickness of heavily-doped crystalline silicon layer formed within, and near the back of, the substrate during the gettering process.

Abstract: A method for assembling a micro-electromechanical system (MEMS) device that includes a micro-machine is described. The method comprises forming the micro-machine on a die, the die having a top surface and a bottom surface, providing a plurality of die bonding pedestals on a surface of a housing, and mounting at least one of the top surface of the die and components of the micro-machine to the die bonding pedestals such that a bottom surface of the die at least partially shields components of the micro-machine from loose gettering material.

Abstract: A method of fabricating a via and a trench is disclosed. A disclosed method comprises: forming a via hole and a trench in a interlayer dielectric layer on a semiconductor substrate where a predetermined device is formed; depositing a thin Hf layer on the substrate; performing a thermal treatment of the substrate to getter oxygen and forming a barrier layer; and filling copper into the via hole and the trench.

Abstract: A method for fabricating a complementary metal oxide semiconductor image sensor is capable of protecting a low temperature oxide from delaminating a passivation layer. The method includes the steps of: forming a passivation layer on a pad metal; exposing a predetermined part of the pad metal by patterning the passivation layer using a first pad mask; forming an oxide layer on the exposed pad metal and the passivation layer formed around the pad open region; forming a color filter, a planarization layer and a microlens, sequentially; forming a low temperature oxide layer on the above structure to protect the microlens; and opening the pad metal by selectively etching the low temperature oxide layer and the oxide layer formed around the pad open region by a second pad mask.

Abstract: A mask is formed selectively on a crystalline silicon film containing a catalyst element, and an amorphous silicon film is formed so as to cover the mask. Phosphorus is implanted into the amorphous silicon film and the portion of the crystalline silicon film which is not covered with the mask. The silicon films are then heated by rapid thermal annealing (RTA). By virtue of the existence of the amorphous silicon film, the temperature of the crystalline silicon film is increased uniformly, whereby the portion of the crystalline silicon film covered with the mask is also heated sufficiently and the catalyst element existing in this region moves to the phosphorus-implanted, amorphous portion having high gettering ability. As a result, the concentration of the catalyst element is reduced in the portion of the silicon film covered with the mask. A semiconductor device is manufactured by using this portion.

Abstract: The present invention is directed to a single crystal Czochralski-type silicon wafer, and a process for the preparation thereof, which has at least a surface layer of high resistivity, the layer having an interstitial oxygen content which renders it incapable of forming thermal donors in an amount sufficient to affect resistivity upon being subjected to a conventional semiconductor device manufacturing process. The present invention further directed to a silicon on insulator structure derived from such a wafer.

Abstract: A process for removing a contaminant selected from among copper, nickel, and a combination thereof from a silicon wafer having a surface and an interior. The process comprises cooling the silicon wafer in a controlled atmosphere from a temperature at or above an oxidation initiation temperature and initiating a flow of an oxygen-containing atmosphere at said oxidation initiation temperature to create an oxidizing ambient around the silicon wafer surface to form an oxide layer on the silicon wafer surface and a strain layer at an interface between the oxide layer and the silicon wafer interior. The cooling of the wafer is also controlled to permit diffusion of atoms of the contaminant from the silicon wafer interior to the strain layer. Then the silicon wafer is then cleaned to remove the oxide layer and the strain layer, thereby removing said contaminant having diffused to the strain layer.

Abstract: A method of manufacturing a thin-film solar cell, comprising the steps of: forming an amorphous silicon film on a substrate; placing a metal element that accelerates the crystallization of silicon in contact with the surface of the amorphous silicon film; subjecting the amorphous silicon film to a heat treatment to obtain a crystalline silicon film; depositing a silicon film to which phosphorus has been added in contact with the crystalline silicon film; and subjecting the crystalline silicon film and the silicon film to which phosphorus has been added to a heat treatment to getter the metal element from the crystalline film.

Abstract: A method of fabricating a germanium photodetector includes preparing a silicon wafer as a silicon substrate; depositing a layer of silicon nitride on the silicon substrate; patterning and etching the silicon nitride layer; depositing a first germanium layer on the silicon nitride layer; patterning and etching the germanium layer wherein a portion of the germanium layer is in direct physical contact with the silicon substrate; depositing a layer of silicon oxide on the germanium layer wherein the germanium layer is encapsulated by the silicon oxide layer; annealing the structure at a temperature wherein the germanium melts and the other layers remain solid; growing a second, single-crystal layer of germanium on the structure by liquid phase epitaxy; selectively removing the silicon oxide layer; and completing the germanium photodetector.

Abstract: A method in which thin-film p-i-n heterojunction photodiodes are formed by selective epitaxial growth/deposition on pre-designated active-area regions of standard CMOS devices. The thin-film p-i-n photodiodes are formed on active areas (for example n+-doped), and these are contacted at the bottom (substrate) side by the “well contact” corresponding to that particular active area. There is no actual potential well since that particular active area has only one type of doping. The top of each photodiode has a separate contact formed thereon. The selective epitaxial growth of the p-i-n photodiodes is modular, in the sense that there is no need to change any of the steps developed for the “pure” CMOS process flow. Since the active region is epitaxially deposited, there is the possibility of forming sharp doping profiles and band-gap engineering during the epitaxial process, thereby optimizing several device parameters for higher performance.

Abstract: A method for modifying a surface of a substrate to be processed, by utilizing plasma includes the steps of adjusting a temperature of the substrate from 200° C. to 400° C., introducing gas including nitrogen atoms or mixture gas including inert gas and the gas including nitrogen atoms into a plasma process chamber, adjusting pressure in the plasma process chamber above 13.3 Pa, generating plasma in the plasma process chamber, and injecting ions equal to or smaller than 10 eV in the plasma into the substrate to be processed.

Abstract: A transistor of a semiconductor device has an increased driving capacity. The semiconductor device has a first gate insulation film formed by a selective oxidation, a second gate insulation film formed by thermal oxidation and a gate electrode formed across the first and the second gate insulation films. The second gate insulation film is composed of a thicker gate insulation film and a thinner gate insulation film.

Abstract: The present invention is directed to a single crystal Czochralski-type silicon wafer, and a process for the preparation thereof, which has at least a surface layer of high resistivity, the layer having an interstitial oxygen content which renders it incapable of forming thermal donors in an amount sufficient to affect resistivity upon being subjected to a conventional semiconductor device manufacturing process. The present invention further directed to a silicon on insulator structure derived from such a wafer.

Abstract: A driver circuit integration type (monolithic type) active matrix display device having high performance is formed by using thin film transistors (TFT). While a nickel element is added t an amorphous silicon film 203, a head treatment is carried out to thereby crystallize the amorphous silicon film. Further, by carrying out a heat treatment in an oxidizing atmosphere containing a halogen element, a thermal oxidation film 209 is formed. At this time, cyrstallinity is improved and gettering of the nickel element proceeds. TFTs are formed by using the thus obtained crystalline silicon film, and various circuits are constituted by using the TFTs, so that a data driver circuit capable of driving the active matrix circuit having the dot number of fifty thousands to three millions can be obtained.

Abstract: A method for removing the edge bead from a substrate by applying an impinging stream of a medium that is not a solvent for the material to be removed. The medium is applied to the periphery of the substrate with sufficient force to remove the material. Also an apparatus to perform the inventive method.

Abstract: An Indium/Gallium/Arsenide (InGaAs) detector having avalanche photodiodes (APD's) and p-i-n photodiodes on a single chip is provided. A method of fabricating the InGaAs device is also provided. The bias on the APD and p-i-n photodiodes are separately controlled.

Abstract: Ultra-low leakage current backside-illuminated semiconductor photodiode arrays are fabricated using a method of formation of a transparent, conducting bias electrode layer that avoids high-temperature processing of the substrate after the wafer has been gettered. As a consequence, the component of the reverse-bias leakage current associated with strain, crystallographic defects or impurities introduced during elevated temperature processing subsequent to gettering can be kept extremely low. An optically transparent, conductive bias electrode layer, serving as both an optical window and an ohmic backside equipotential contact surface for the photodiodes, is fabricated by etching through the polysilicon gettering layer and a portion of the thickness of heavily-doped crystalline silicon layer formed within, and near the back of, the substrate during the gettering process.

Abstract: The present invention relates to a method of manufacturing a silicon-on-insulator substrate, comprising the steps of (1) providing a silicon-on-insulator semiconductor wafer having at least one surface of a silicon film; (2) implanting an inert atom into the at least one surface to form a damaged surface layer including a gettering site on the silicon film and to leave an undamaged region of the silicon film; (3) subjecting the wafer to conditions to getter at least one impurity from the silicon film into the gettering site; and (4) removing the damaged surface layer.